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Module1 - PartA - Dr. Ilavarasi

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0% found this document useful (0 votes)
31 views53 pages

Module1 - PartA - Dr. Ilavarasi

Uploaded by

bbuli0510
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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INTRODUCTION AND OVERVIEW OF COMPUTER

Dr. Ilavarasi A K, VIT Chennai


ARCHITECTURE
MODULE 1 PART A
Dr. Ilavarasi A K,
SCOPE, VIT Chennai
1
TEXT BOOK(S)

31 July 2023
 Carl Hamacher, Zvonko Vranesic, Safwat
Zaky, Computer organization, Mc Graw
Hill, Fifth edition ,Reprint 2011.
 W. Stallings, Computer organization and
architecture, Prentice-Hall, 8th edition,
2009
REFERENCE BOOK
 David A. Patterson and . John L.
Hennessy ―Computer Organization
and Design-The Hardware/Software
Interface‖ 5th edition, Morgan
Kaufmann, 2011.
GRADING POLICY
 Digital Assignment 1= 10 marks (Written
Assignment, Rubric based Evaluation)

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Dr. Ilavarasi A K, VIT
 Digital Assignment 2 & 3 = 20 marks (Quiz)

 CAT 1- 2 to 2.5 Modules (15% Weightage)

 CAT 2- 3 Modules (15% Weightage)

 FAT- 100 marks ( 40 % Weightage)

4
OUTLINE
 Introduction to computer systems
 Overview of Organization and

Chennai
Dr. Ilavarasi A K, VIT
Architecture
 Functional components of a computer

 Registers and register files

 Interconnection architecture

5
INTRODUCTION TO COMPUTER SYSTEMS
A computer system is a electronic device

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Dr. Ilavarasi A K, VIT

 Accepts digitized input information
o Process it according to a list of internally stored
instructions
o Produces the resulting output information
• The list of instructions are called computer program
• Internal storage is via computer Memory

6
INTRODUCTION TO COMPUTER
SYSTEMS

 An user interacts with computer system

Chennai
Dr. Ilavarasi A K, VIT
with the help of application software
 Application software communicates
with the operating system and returns
the results of required operation

7
Dr. Ilavarasi A K, VIT
Chennai
8
HARDWARE COMPONENTS
SYSTEM SOFTWARE
 Operating System

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Dr. Ilavarasi A K, VIT
Interfaces between a user’s program and the
hardware and provides a variety of services and
supervisory functions
 Compilers
A program that translates high-level language
statements into assembly language statements
 Assembler
A program that translates assembly language
statements in to 1’s and 0’s

9
HIGH LEVEL TO HARDWARE LANGUAGE

 If programmer writes, Add A,B


The compiler translate to a symbolic
language called as assembly language:

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Dr. Ilavarasi A K, VIT
Mov A, R1
Add B,R1
Mov R1, C

 Assembler translates to binary


language that a machine understands
and is called as machine language, Eg.
1000110010100000

10
POWER OF ABSTRACTION

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Dr. Ilavarasi A K, VIT
High level language Assembly language Binary machine
program in C program language program
11
COMPUTER ORGANIZATION?

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Dr. Ilavarasi A K, VIT
 Encompasses all
physical/hardware aspects of
computer systems.
Eg., circuit design, control
unit, memory chip.
 How does a computer work?

12
COMPUTER ARCHITECTURE?

Chennai
Dr. Ilavarasi A K, VIT
 Logical aspects of system
implementation as seen by
the programmer.
 Eg., instruction sets,
instruction formats,
addressing modes.
 How do I design a computer?
13
FUNCTIONAL COMPONENTS OF A COMPUTER
CPU
ALU

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Dr. Ilavarasi A K, VIT
Control
Input Data Unit Data
Output

Registers

Data

15
Memory
FUNCTIONAL
COMPONENTS OF A
COMPUTER
CPU
ALU (Arithmetic & Logic Unit): This unit
performs the data processing functions of a
computer

Control unit:
 Coordinates the tasks between the
computer components.
 It takes the data from input devices

 Sends the input to processing units

 Transmits the final result/data to


output devices.

Registers: This is a storage unit within the


CPU. The data in this unit is collected from
the higher memory components (i.e. cache).
INPUT UNIT
 Input units are used to provide the
input data to the computer to solve
the problem given to the computer.
The commonly used input devices
are shown in the diagram.
OUTPUT UNIT
The output devices are used to
produce the results which are
processed by the computer
system.
The most commonly used output
devices are shown in the
diagram.
SYSTEM INTERCONNECTION
 A mechanism that provides for
communication among various
components of a computer like CPU, main
memory, secondary memory etc.
 System bus is very common mechanism for
connecting such components
SYSTEM INTERCONNECTION-
SYSTEM BUS
 System bus is a very common mechanism
for providing communication path for

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Dr. Ilavarasi A K, VIT
transfer of data across the functional units
of a computer like CPU, main memory and
I/O devices

24
WHERE OPERATING SYSTEM WILL BE
STORED IN COMPUTER?
WHERE OPERATING SYSTEM WILL BE STORED
IN COMPUTER?

 It resides on your Hard Drive. If you're a


Windows user, it's on your C drive by default.
Access Time

Storage
WHAT IS RAM?
 The information stored in this type of memory is
lost when the power supply to the PC or laptop
is switched off.
SRAM DRAM
Dr. Ilavarasi A K, VIT
Chennai
32
Secondary memory REGISTERS
 Register is memory unit inside the

Dr. Ilavarasi A K, VIT Chennai


processor and capable of high speed
Primary memory processing.
 The memory hierarchy defined in the
figure shows the memory levels of high
storage capacity to low storage capacity
Cache memory as well as low speed to high speed
 In memory hierarchy secondary
memory is less expensive one and
register is high expensive memory unit
Registers

33
REGISTERS
Registers have 2 specific roles:

Dr. Ilavarasi A K, VIT Chennai


1. User variable registers: These registers minimizes
main memory references
2. Control and status registers: These registers are used
by control unit in CPU to control the processor’s
operation and execution of operating system programs

34
USER VARIABLE REGISTERS
These registers are 4 types:
1. General purpose

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Dr. Ilavarasi A K, VIT
2. Data
3. Address
4. Condition codes

35
GENERAL PURPOSE REGISTERS

Dr. Ilavarasi A K, VIT Chennai


The programmer assigns these registers
for different functions
These registers can hold the operands of
arithmetic operations

36
DATA REGISTERS
 These registers only holds the data
The restriction of these registers is, these

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Dr. Ilavarasi A K, VIT
can not be used for operand address
calculation

37
ADDRESS REGISTERS
There are different categories of address registers
1. Segment pointers:

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Dr. Ilavarasi A K, VIT
a. These holds segments base address
b. There may be multiple registers
2. Index registers:
a. These can be used for indexed addressing
b. Autoindexed
3. Stack pointers: for user variable stack addressing, top
of the stack is pointed by a dedicated register

38
CONTROL AND STATUS REGISTERS
 The operation of the processor is controlled

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Dr. Ilavarasi A K, VIT
 These registers are not visible to the user on most of
the machines
 Some of these registers are visible in operating system
mode

39
CONTROL AND STATUS REGISTERS
There are 4 registers, which are important for execution
of an instruction

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Dr. Ilavarasi A K, VIT
1. Program counter: This register contain an
instruction address selected for fetching
2. Instruction register: Most recently fetched
instruction is stored in this register
3. Memory address register: This register holds the
address of the instruction in memory
4. Memory data/ buffer register: The data in this
register is either read from memory or written to
memory 40
CONTROL AND STATUS REGISTERS
Program status word (PSW): This register contains
status information. This also contains condition codes as

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Dr. Ilavarasi A K, VIT
well as some status information. Common fields or flags
of this register contain the following:
a. Sign
b. Zero
c. Carry
d. Equal
e. Overflow
f. Interrupt enable/disable
g. Supervisor 41
REGISTER FILE
 Register file is a structure that stores the processor’s
32 general purpose registers

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Dr. Ilavarasi A K, VIT
 It contains a register state of the computer.

42
REGISTER FILE
Registe
r
A register file with four inputs
Numbe 5 Read and two outputs are shown in the
Register1

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Dr. Ilavarasi A K, VIT
r Read figure.
5 Data1
Read
Register2 Registers Data
5
Read
Register3 Read
Data Data2
Write
Data
43

RegWrite
REGISTER FILE
 For reading of each data word from the registers, the
following are needed
1. Input – number of the register to be read

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Dr. Ilavarasi A K, VIT
2. Output – this will carry the value that has been
read from the registers

44
REGISTER FILE
 Write of data word needs two inputs:
1. Specifies the number of the register to be written

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Dr. Ilavarasi A K, VIT
2. Supplies the data to be written into the register.
 It outputs the contents of Read register inputs (i.e.
register number).

45
Dr. Ilavarasi A K, VIT
Chennai
46
INTERCONNECTION ARCHITECTURE

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Dr. Ilavarasi A K, VIT
47
INTERCONNECTION OF COMPONENTS

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Dr. Ilavarasi A K, VIT
 Program Counter (PC) is specialized register
 Keep track of the execution of a program
 It contains memory address of the next
instruction to be fetched and executed
 During the execution of an instruction, the
contents of the PC are updated to correspond to
the address of the next instruction to be executed
 PC points to the next instruction that is to be
fetched from memory.

48
INTERCONNECTION OF COMPONENTS

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Dr. Ilavarasi A K, VIT
 The Instruction Register (IR):
 Holds the instruction that is currently
being executed
 Its output is available to the control
circuits
 Generates the timing signals that
control the various processing elements
involved in executing the instruction 49
PROCESSOR- MEMORY INTERACTION

Chennai
Dr. Ilavarasi A K, VIT
 Two registers facilitates communication
with the memory
 Memory Address Register (MAR)
 holds the address of the location to be
accessed
 Memory Data Register (MDR)
 Contains the data to be written into or read
out of the addressed location 50
TYPICAL OPERATIONAL STEPS
 Programs reside in the memory

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Dr. Ilavarasi A K, VIT
 Execution of the program starts when PC is set to
point to the first instruction of the program
 The content of the PC are transferred to MAR
 A read control signal is sent to the memory
 The addressed word is read out of the memory and
loaded into the MDR
 Next, the contents of the MDR are transferred to the
IR
 At this point the instruction is ready to be decoded and
executed 51
TYPICAL OPERATIONAL STEPS

 It is necessary to obtain the required operands to complete the


execution of instruction
 If an operand resides in the memory, it has to be fetched by

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Dr. Ilavarasi A K, VIT
sending its address to the MAR and initiate read cycle
 Operand is read from the memory to MDR, then it is transferred
from MDR to ALU
 After one or more operands are fetched in this way, the ALU can
perform the desired operation.
 If the results of this operation is to be stored in the memory, the
results is sent to MDR
 The address of the location where the result is to be stored is sent
to the MAR, and write cycle is initiated
52
REFERENCES

Chennai
Dr. Ilavarasi A K, VIT
1. Carl Hamacher, Zvonko Vranesic,
Safwat Zaky, Computer organization,
Mc Graw Hill, Fifth edition ,Reprint
2011.
2. David A. Patterson and . John L.
Hennessy “Computer Organization and
Design-The Hardware/Software
Interface” 5th edition, Morgan
Kaufmann, 2011.
53

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