Exercise on a Multicycle Datapath
7th May 2024
To be submitted on 9th May 2024
Consider the following five MIPS assembly instructions and do as instructed.
i) Add r1, r2, r3 )
ii) LW r1, o%set_value (r2)
iii) SW r1, o%set_value (r2)
iv) Beq r1, r2, o%set_value
v) J O%set_Value
1. For each instruction, provide the related register transfer notation.
2. Produce six hardcopies of a Multicycle Datapath diagram, then:
(a) Trace the Ferch stage used by each instruction.
(b) Clearly show a trace of each instruction on a separate sheet.
You can do this in groups of 4 students, with your registration numbers.