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BelaSigna200 Telecom Bundle

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AMI Semiconductor

BelaSigna™ 200 Single-Chip Audio Processing System


BelaSigna 200 - Single-Chip Audio Processing System Feature Sheet
Key Features
• Up to 200 peak MIPS at 33MHz operating frequency
• Ultra-low power consumption: down to 0.05mW/MIPS
• Ultra miniaturized package options available
• Low supply voltage: 1.2V - 1.8V (CSP 1.8V only)
• Dual-Harvard 16-bit DSP core
• Dedicated filterbank coprocessor yielding equivalent
5MIPS/MHz; performs subband analysis and synthesis,
windowing, time folding, and equalization
• 8-Kwords data RAM and 12-Kwords program RAM
• Dual-channel 16-bit SD ADC/DAC with integrated
programmable amplifiers, attenuators and filters
• Programmable audio signal sampling rate up to 60kHz
• Six low-speed analog inputs (10-bit ADC, nominal
1.6kHz sampling rate)
• On-chip power management
• Programmable internal oscillator; external clock support
up to 33MHz
• Numerous digital interfaces including: GPIO, SPI, UART,
I2S, TWSS, PCM
• Package options: Evaluation PLCC, QFN52 (8 x 8mm),
CSP40 (2.3 x 3.7mm)

Product Description
BelaSigna 200 is a high-performance, programmable, This single-chip solution is ideally suited for embedded
mixed-signal digital signal processing (DSP) system that applications where audio performance, low power
is based on AMI Semiconductor’s patented second- consumption and miniaturization are critical.
generation SignaKlara™ technology. BelaSigna 200 targets a wide variety of digital speech-
and audio-centric products.

Product Benefits
E x c e p t i o n a l A u d i o P e r f o r m a n c e : Integrated single- S o f t w a r e - P r o g r a m m a b l e : Advanced algorithms are
chip technology facilitates high-fidelity sound. easily implemented with the evaluation and
development kit (EDK).
U l t r a - M i n i a t u r e S i z e : Easily embedded in even the
smallest portable devices. H i g h l y C o s t - E f f e c t i v e : Single-chip contains DSP core,
coprocessor, full stereo audio signal path, memory, and
U l t r a - L o w P o w e r C o n s u m p t i o n : High computational more. Encompasses a complete bill-of-material for
capabilities without compromising battery life. consumer OEM products.

F a s t T i m e - t o - M a r k e t : Advanced audio and speech F l e x i b l e : Fully software-programmable, allowing for


processing algorithms are available. Limited external OEM product variations and upgrades using the same
component requirements help simplify hardware device.
design.
Architecture Diagram

BelaSigna 200 - Single-Chip Audio Processing System Feature Sheet


Architecture Description
R C o r e 1 6 - b i t F i x e d - P o i n t D S P C o r e - A dual-Harvard place” processing by the DSP core and WOLA
architecture DSP core with single-cycle MAC and coprocessor. It handles mono and stereo data using a
specialized operations targeted to audio applications. smart access scheme, which ensures minimal address
The core ALU (16x16+40 MAC), two AGUs and a arithmetic and simplifies overall system programming.
program control unit form the central processing unit of
BelaSigna 200. S u p p o r t F u n c t i o n s - Thanks to the programmable on-
chip oscillator and power management functions,
Weighted Overlap-Add (WOLA) Filterbank Coprocessor BelaSigna 200 reduces reliance on other components.
The WOLA filterbank coprocessor performs block-based The multiplexed low-speed ADC is very useful for
operations including: complex FFT, IFFT, windowing, monitoring system parameters and user inputs such as
time folding, subband analysis, and synthesis. 18-bit volume, tone and balance. A built-in battery monitor
block floating-point processing preserve signal dynamics ensures optimal usage of battery power.
and signal-to-noise ratio. The coprocessor is highly
configurable and started by a single instruction from E x t e r n a l I n t e r f a c e s - BelaSigna 200 offers a wealth of
the DSP. peripheral connections, including: parallel, serial,
synchronous, and asynchronous interfaces. As a result,
A n a l o g F r o n t - e n d a n d B a c k - e n d - A complete stereo interfacing to most companion IC’s is seamless.
audio chain consists of programmable amplifiers, filters
and 16-bit SD ADCs and DACs. Direct digital outputs U n m a t c h e d A p p l i c a t i o n E x p e r t i s e - Our in-house
provide a direct interface to transducers. team of speech- and audio-centric application experts
provide a level of focus, experience and support that
Shared Memories and Input/Output Processor other general purpose DSP suppliers simply don’t
(IOP) match.
The DSP core and coprocessor share common dual-port
memories to maximize power efficiency during data E v a l u a t i o n a n d D e v e l o p m e n t K i t - Our state-of-the-
exchange. art EDK includes an evaluation board, advanced real-
time debugger and other software tools and
The IOP is an audio-optimized DMA controller that documentation to facilitate easy algorithm
efficiently transfers audio data from the ADC for “in- development.

Contact your local sales office at www.amis.com/sales for more information.

AMI Semiconductor
www.amis.com
Devices sold by AMIS are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. AMIS makes no warranty, express, statutory,
implied or by description, regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. AMIS makes no warranty of
merchantability or fitness for any purposes. AMIS reserves the right to discontinue production and change specifications and prices at any time and without notice. AMI
Semiconductor's products are intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high
reliability applications, such as military, medical life-support or life-sustaining equipment, are specifically not recommended without additional processing by AMIS for such
applications. Copyright ©2006 AMI Semiconductor, Inc. FN, 1.5K M-20340-004

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