SINGLE USER LICENSE - NOT FOR USE ON A NETWORK OR ONLINE

IPC-AJ-820A
2012 - February
Assembly and Joining Handbook
Supersedes IPC-AJ-820
April 1997
A standard developed by IPC

Association Connecting Electronics Industries

®
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The Principles of In May 1995 the IPC’s Technical Activities Executive Committee (TAEC) adopted Principles of
Standardization Standardization as a guiding principle of IPC’s standardization efforts.
Standards Should: Standards Should Not:
• Show relationship to Design for Manufacturability • Inhibit innovation
(DFM) and Design for the Environment (DFE) • Increase time-to-market
• Minimize time to market • Keep people out
• Contain simple (simplified) language • Increase cycle time
• Just include spec information • Tell you how to make something
• Focus on end product performance • Contain anything that cannot
• Include a feedback system on use and be defended with data
problems for future improvement

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understandings between manufacturers and purchasers, facilitating interchangeability and improve-
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 SINGLE USER LICENSE - NOT FOR USE ON A NETWORK OR ONLINE

IPC-AJ-820A
®

Assembly and Joining

Handbook

Developed by the Assembly and Joining Subcommittee (7-35) of the

Product Assurance Committee (7-30) of IPC

Supersedes: Users of this publication are encouraged to participate in the

IPC-AJ-820 - April 1997 development of future revisions.

Contact:

IPC
3000 Lakeside Drive, Suite 309S
Bannockburn, Illinois
60015-1249
Tel 847 615.7100
Fax 847 615.7105
SINGLE USER LICENSE - NOT FOR USE ON A NETWORK OR ONLINE

This Page Intentionally Left Blank

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February 2012 IPC-AJ-820A

Acknowledgment
Any document involving a complex technology draws material from a vast number of sources across many continents.
Shown below are the principal members of the IPC-AJ-820 development team including the Assembly and Joining Subcom-
mittee (7-35) of the Product Assurance Committee (7-30). It is not possible to include all of those who assisted in the evo-
lution of this handbook. To each of them, the members of the IPC extend their gratitude.

Product Assurance Assembly and Joining Technical Liaisons of the

Committee Subcommittee IPC Board of Directors
Chair Co-Chairs
Mel Parish Mary Muller Dongkai Shangguan
STI Electronics, Inc. Crane Aerospace & Electronics Flextronics International
Joseph Kane Shane Whiteside
BAE Systems Platform Solutions TTM Technologies

Assembly and Joining Subcommittee

Arye Grushka, A. A. Training Doug Rogers, Harris Corporation, Randy McNutt, Northrop Grumman
Consulting and Trade A.G. Ltd. GCSD Corp.
Teresa Rowe, AAI Corporation Richard Rumas, Honeywell Canada Becky Amundsen, Northrop
Constantino Gonzalez, ACME John Mastorides, Honeywell Grumman Corporation
Training & Consulting International Robert Netzel, Northrop Grumman
Debbie Wade, Advanced Rework Riley Northam, Honeywell Corporation
Technology-A.R.T Technology Solutions Inc. Toshiyasu Takei, NSK Co.
Leroy Buermann, Aerojet Andy Buchan, IEC Electronics Corp. Andrew Ganster, NSWC Crane
Agnes Ozarowski, BAE Systems Mark Northrup, IEC Electronics Joseph Sherfick, NSWC Crane
Gerald Leslie Bogert, Bechtel Plant Corp. Peggi Blakley, NSWC Crane
Machinery, Inc. Mark Talmadge, IEC Electronics Matt Garrett, Phonon Corporation
Thomas Carroll, Boeing - Integrated Corp.
Guy Ramsey, R & D Assembly
Defense Systems Steven Lacey, ITT Corporation -
David Nelson, Raytheon Company,
Jack Olson, Caterpillar Inc. Force Protection Systems
Fonda Wu, Raytheon Company,
Zenaida Valianu, Celestica Blen Talbot, L-3 Communications
Jeff Shubrooks, Raytheon Company
Lavanya Gopalakrishnan, Cisco Robert Fornefeld, L-3
Communications Richard Iodice, Raytheon Company
Systems Inc.
Linda Woody, Lockheed Martin Royce Taylor, Raytheon Company
David Corbett, Defense Supply
Center Columbus Missile & Fire Control Karen Walters Ebner, Raytheon
Robert Stringer, Lockheed Martin Identification Systems
Henry Sanftleben, Delphi Electronics
and Safety Missiles and Fire Control George Millman, Raytheon Missile
Hue Green, Lockheed Martin Space Systems
Stephen Osborne, DeWALT Industrial
Tool Company Systems Company Kathy Johnston, Raytheon Missile
Robert Cooke, NASA Johnson Space Systems
Glenn Dody, Dody Consulting
Center Martin Scionti, Raytheon Missile
Anne Lomonte, Draeger Medical
Garry McGuire, NASA Marshall Systems
Systems
Space Flight Center Mradul Mehrotra, Raytheon Missile
Julie Filips, Elbit Systems of America
James Blanche, NASA Marshall Systems, Inc.
Pam McCord, Elbit Systems of
Space Flight Center, Inc. Patrick Kane, Raytheon System
America
Ge Wang, Northrop Grumman Technology
Leo Lambert, EPTAC Corporation
Aerospace Systems Beverley Christian, Research In
Nancy Chism, Flextronics Motion Limited
Mahendra Gandhi, Northrop
Graham Naisbitt, Gen3 Systems Grumman Aerospace Systems Beverly MacTaggart, Rockwell
Limited Collins

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IPC-AJ-820A February 2012

Caroline Ehlinger, Rockwell Collins Terry Clitheroe, Solder Technologies Daniel Foster, U.S. Army Aviation &
David Adams, Rockwell Collins Gregg Owens, Space Exploration Missile Command
David Hillman, Rockwell Collins Technologies Jennifer Day, U.S. Army Aviation &
Mel Parrish, STI Electronics, Ltd. Missile Command
Douglas Pauls, Rockwell Collins
Patricia Scott, STI Electronics Sharon Ventress, U.S. Army Aviation
Eddie Hofer, Rockwell Collins
& Missile Command
Jeff Kieckhaefer, Rockwell Collins Renee Michalkiewicz, Trace
Laboratories - Baltimore Bihari Patel
Tammy Sargent, Rockwell Collins,
Bruce Hughes, U.S. Army Aviation & John Norton
Inc.
Missile Command Mari Paakkonen
Gaston Hidalgo, Samsung
Telecommunications America Calette Chamness, U.S. Army
Aviation & Missile Command

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February 2012 IPC-AJ-820A

Table of Contents
1 SCOPE ...................................................................... 1 3.3.1 Component Orientation ...................................... 21
1.1 Assembly and Joining Technology ...................... 1 3.3.2 Accessibility ....................................................... 22
1.2 Through-Hole Technology ................................... 1 3.3.3 Design Envelope ................................................ 22
1.3 Surface Mount Technology .................................. 1 3.3.4 Clearances .......................................................... 23
1.4 Related Documents .............................................. 2 3.3.5 Physical Support ................................................ 23
1.4.1 Joint Industry Standards ...................................... 2 3.4 Design for Automated Assembly ....................... 23
1.4.2 IPC - Association Connecting Electronics 3.4.1 Fiducial Marks ................................................... 23
Industries Documents ........................................... 4 3.4.2 Automated Through Hole Assembly ................. 23
1.4.3 United States Government Documents ............. 10 3.4.3 Automated Surface Mount Assembly ................ 23
1.4.4 American Society of Mechanical Engineers ..... 11 3.4.4 Automated Mixed-Technology Assembly ......... 24
1.4.5 ASTM International ........................................... 11 3.5 Through Hole Assembly .................................... 24
1.4.6 SAE International ............................................... 12 3.5.1 Lead Configuration ............................................ 24
1.4.7 Federal Aviation Regulations (FARs) ................ 12 3.5.2 Lead/Hole Relationships .................................... 28
1.4.8 Underwriters Laboratories ................................. 12 3.5.3 Through Hole Land Patterns ............................. 28
1.4.9 IEC Standards .................................................... 12 3.6 Surface Mount Assembly ................................... 29
1.4.10 Independent Distributors of Electronics 3.6.1 Basic Printed Board Features ............................ 29
Association (IDEA) ............................................ 12
3.6.2 Manufacturing Allowances ................................ 29
1.4.11 Electrostatic Discharge Association ................... 13
3.6.3 SMT Land Pattern Details ................................. 29
2 HANDLING ELECTRONIC ASSEMBLIES ............. 13 3.6.4 SMT Assembly Processing ................................ 30
2.1 Definitions .......................................................... 13
4 PRINTED CIRCUIT BOARDS ................................. 32
2.1.1 Electrostatic Discharge (ESD) ........................... 13
4.1 General Considerations ...................................... 32
2.1.2 Electrostatic Discharge Sensitive
Components (ESDS) .......................................... 13 4.2 Design Issues ...................................................... 34
2.1.3 Electrical Overstress (EOS) ............................... 13 4.2.1 Structures ............................................................ 34
2.2 Handling of ESDS Items (Components 4.2.2 Leaded vs. Leadless Components ...................... 34
and/or Assemblies) ............................................. 13 4.2.3 CTE Issues ......................................................... 34
2.2.1 Electrical Overstress (EOS) Damage 4.3 PCB Materials .................................................... 34
Prevention ........................................................... 14 4.3.1 Thermosetting Base Resins ................................ 34
2.2.2 Electrostatic Discharge (ESD) Damage 4.4 Printed Boards with Non-Metallic
Prevention ........................................................... 14 Constraining Cores ............................................. 36
2.3 Physical Handling .............................................. 15 4.5 Base Conductors ................................................ 36
2.3.1 Handling after Soldering .................................... 15 4.5.1 Metallic Foils ..................................................... 36
2.4 Contamination .................................................... 15 4.5.2 Electrodeposited Copper Foil ............................ 37
2.5 Processing Moisture Sensitive Components ..... 15 4.5.3 Rolled-Annealed Copper Foil ............................ 37
2.6 Classification of Non-IC Electronic 4.5.4 Additive Circuit Plating ..................................... 37
Components for Assembly Processes
(ECA/IPC/JEDEC J-STD-075) .......................... 16 4.6 Plating and Surface Finishes ............................. 37
4.6.1 Electroless Copper Plating ................................. 37
3 DESIGN CONSIDERATIONS .................................. 19
4.6.2 Semi-Conductive Coatings ................................ 37
3.1 Background and Theory ..................................... 19
4.6.3 Electrolytic Copper Plating ................................ 37
3.2 Basic Considerations .......................................... 19
3.2.1 End-Product Usage ............................................ 19 4.6.4 Gold Plating ....................................................... 38
3.2.2 Performance and Reliability .............................. 20 4.6.5 Immersion Silver ................................................ 41
3.2.3 Designing for Producibility ............................... 20 4.6.6 Immersion Tin .................................................... 42
3.3 Packaged-Component Assembly 4.6.7 Organic Solderability Preservative (OSP) ......... 42
Considerations .................................................... 21 4.6.8 Nickel Plating ..................................................... 43

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4.6.9 Tin/Lead Plating ................................................. 44 6.6 Printed Wiring Board Weak Knee
4.6.10 Solder Coating .................................................... 44 Phenomena ......................................................... 56
6.7 Troubleshooting a Solderability Problem .......... 57
4.6.11 Other Metallic Coatings for Edge Printed
Board Contacts ................................................... 45 6.8 Solderability Tests .............................................. 57
4.7 Printed Board Handling and Storage 6.8.1 IPC J-STD-002 ................................................... 57
Guidelines ........................................................... 45 6.8.2 Force Measurement ............................................ 58
5 ELECTRONIC CIRCUIT COMPONENTS ............... 45 6.9 IPC J-STD-003 ................................................... 59
5.1 Lead/Termination Finishes ................................. 46 6.10 The Importance of Flux Material in
Solderability Testing .......................................... 60
5.2 Moisture Sensitivity ........................................... 46
5.3 Components ........................................................ 46 7 ASSEMBLY AND JOINING MATERIALS ............... 61

5.3.1 Active versus Passive Components ................... 46 7.1 Introduction ........................................................ 61

5.3.2 Discrete versus Integrated Components ............ 46 7.2 Presoldering Chemicals ...................................... 62
7.2.1 Metal Surface Activating Solutions ................... 62
5.4 Through Hole versus Surface Mount
Components ........................................................ 46 7.2.2 Solder Mask ....................................................... 63
5.4.1 Through Hole Lead Components ...................... 47 7.2.3 Protective Coatings ............................................ 63
5.4.2 Surface Mount - Leadless Components ............ 47 7.3 Solder Fluxes ...................................................... 64
5.4.3 Surface Mount - Leaded Components ............... 47 7.3.1 Choosing the Proper Flux .................................. 64
5.5 Electronic Assemblies ........................................ 47 7.3.2 Flux Types .......................................................... 64
5.6 Packaging of Component ................................... 47 7.3.3 Rosin/Resin Fluxes (RO or RE
Classification) ..................................................... 65
5.7 Printed Circuit Board Connectors ..................... 47
7.3.4 ‘‘No Clean’’ Fluxes ............................................ 66
5.7.1 Printed Circuit Board Connector Selection ....... 47
7.3.5 Organic Fluxes (OR Classification) ................... 66
5.8 Sockets ................................................................ 48
7.3.6 Inorganic Fluxes (IN Classification) ................. 67
5.9 Test Points and Test Jacks ................................. 49
7.3.7 Topping Oils ....................................................... 67
5.10 Design and Assembly Process
Implementation for BGAs (IPC-7095) .............. 50 7.4 Solder .................................................................. 67
5.10.1 Scope .................................................................. 50 7.4.1 Solder Alloy Selection ....................................... 67
5.10.2 Purpose ............................................................... 50 7.4.2 Economics .......................................................... 68
5.11 Design and Assembly Process 7.4.3 Processing and Application ................................ 69
Implementation for Bottom Termination 7.4.4 Solder Specifications .......................................... 69
Components (BTC) (IPC-7093) ........................ 50
7.5 Low Temperature Solder Alloys ........................ 70
5.12 Design and Assembly Process
7.5.1 Applications ........................................................ 70
Implementation for Flip Chips (IPC-7094) ....... 50
7.5.2 Forms and Techniques ....................................... 72
5.13 Counterfeit Electronic Components and/or
Counterfeit Mechanical Fasteners ..................... 50 7.5.3 Wave Soldering .................................................. 72
5.13.1 Counterfeit Mechanical Fasteners ..................... 50 7.5.4 Special Considerations ....................................... 73
5.13.2 Counterfeit Electronic Components .................. 51 7.6 Traditional Solder Alloys ................................... 73
7.6.1 High Temperature Soldering Flux ..................... 74
6 SOLDERABILITY .................................................... 52
7.6.2 High Temperature Stripping and Tinning .......... 74
6.1 Introduction ........................................................ 52
7.7 Lead-Free Solder Alloys .................................... 75
6.2 Inherent Solderability ......................................... 53
7.8 Solder Paste ........................................................ 88
6.3 Surface Finishes ................................................. 54
7.8.1 Solder Paste Alloys ............................................ 88
6.3.1 Organic Surface Finishes ................................... 54
7.8.2 Test Methods to Evaluate Solder
6.3.2 Soluble Finishes ................................................. 54 Paste Properties .................................................. 89
6.3.3 Fusible Finishes .................................................. 54 7.8.3 Solder Paste Application .................................... 89
6.3.4 Barrier Underplate .............................................. 54 7.9 Solder Preforms .................................................. 89
6.4 Degradation of Solderability .............................. 54 7.9.1 Solder Preform Alloys ....................................... 90
6.5 Accelerated Conditioning .................................. 56 7.9.2 Designing Solder Preforms ................................ 90

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7.9.3 Preform Heating ............................................. 91 8.6 Component Characteristics,

7.10 Adhesive Materials ........................................ 91 Through-Hole ............................................... 116
7.10.1 Epoxy Adhesives ............................................ 91 8.6.1 Axial-Leaded Discrete Components ............ 116
7.10.2 Silicone Adhesives ......................................... 92 8.6.2 Radial-Leaded Discrete Components .......... 116
7.10.3 Polyurethane ................................................... 92 8.6.3 Dual-Inline Packages .................................... 117
7.10.4 Acrylic Adhesives .......................................... 92 8.6.4 Single-Inline Packages ................................. 117
7.10.5 Cyanoacrylates ............................................... 93 8.6.5 Ribbon-Lead Components ............................ 117
7.10.6 Electrically Conductive Adhesives ................ 93 8.6.6 Pin Grid Arrays ............................................ 118
7.10.7 Surface Mount Adhesives .............................. 94 8.6.7 Through-Hole Connectors ............................ 119
7.10.8 Thermally Conductive Adhesives .................. 94 8.6.8 Through-Hole Sockets ................................. 120
7.10.9 Cure Verification ............................................ 94 8.7 Assembly Sequence, Through-Hole ............ 121
7.10.10 Workmanship Verification .............................. 94 8.7.1 Process Steps ................................................ 121
8.7.2 Component Placement ................................. 131
7.11 Tin Whiskers .................................................. 94
8.7.3 Vertical Mounting ........................................ 132
7.11.1 Executive Summary ....................................... 94
8.7.4 Mixed Technology ........................................ 135
7.11.2 General Guidelines for Migrating to
RoHS Compliant Finishes ............................. 95 8.7.5 Manual Techniques ...................................... 135
7.11.3 Electronic Component Lead and 8.7.6 Automated Techniques ................................. 135
Terminal Finishes ........................................... 99 8.8 Temporary Masking Guidelines ................... 138
7.11.4 Separable Connectors ................................... 101 8.9 Surface Mount .............................................. 138
7.11.5 Bus Bars ....................................................... 102 8.9.1 Assembly Hierarchy ..................................... 138
7.11.6 Heat Sinks .................................................... 103 8.9.2 Manual Assembly Techniques ..................... 145
7.11.7 Printed Circuit Boards (PCB) ...................... 103 8.9.3 Automated Assembly Techniques ................ 145
7.11.8 How Can I Tell If A Component 9 SOLDERING .......................................................... 147
Contains A Tin-Finish? ................................ 104
9.1 Introduction .................................................. 147
7.11.9 Testing to Detect the Presence of
Various Metals that may, or may 9.1.1 The Process of Wetting ................................ 147
not be Present in a Component Lead/ 9.1.2 Wetting and Solderability ............................ 147
Termination Finish ....................................... 104 9.1.3 Solder ............................................................ 148
7.11.10 Energy Dispersive Spectroscopy ................. 104 9.2 Solder Alloys ................................................ 148
8 COMPONENT MOUNTING ................................... 107 9.2.1 Structure of the Solder Bond ....................... 148
8.1 Assembly Classifications ............................. 107 9.2.2 Intermetallic Growth Rates .......................... 149
8.1.1 Producibility Levels ..................................... 107 9.2.3 Factors Affecting Physical Properties
8.1.2 Printed Circuit Board Assembly Types ....... 107 of Solder Alloys ........................................... 149
8.2 General Guidelines ....................................... 108 9.2.4 Strain Rate Effects ....................................... 150
8.2.1 Design Options and Considerations ............ 108 9.2.5 ‘‘Grain Size’’ Effects .................................... 152
8.2.2 Assembly Considerations ............................. 109 9.2.6 Lead-Free Soldering: Process
Considerations: ............................................. 154
8.3 Other Mounting Structure Materials
and Considerations ....................................... 112 9.3 Gold Removal .............................................. 156
8.3.1 Heat Sinks .................................................... 112 9.3.1 Reason for Gold Removal ........................... 156
8.3.2 Spacers .......................................................... 112 9.4 Solder Purity ................................................ 157
8.3.3 Component-Lead Spreaders ......................... 113 9.4.1 Reasons for Testing ...................................... 157
8.3.4 Thermally Conductive Insulators ................. 113 9.4.2 Testing Frequency ........................................ 157
8.4 Assembly Design Cycle ............................... 113 9.4.3 Copper .......................................................... 157
8.5 Placement Guidelines ................................... 114 9.4.4 Gold .............................................................. 157
8.5.1 Construction Formats and Process 9.4.5 Cadmium ...................................................... 157
Sequences ..................................................... 114 9.4.6 Zinc ............................................................... 158
8.5.2 Automated Assembly ................................... 115 9.4.7 Aluminum ..................................................... 158

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9.4.8 Antimony ...................................................... 158 9.18.2 Meniscus in Solder ...................................... 168

9.4.9 Iron ............................................................... 158 9.18.3 Interfacial Connection Without
9.4.10 Arsenic .......................................................... 158 Lead - Vias ................................................... 168
9.4.11 Bismuth ........................................................ 158 9.18.4 Hole Obstruction .......................................... 168
9.4.12 Silver ............................................................ 158 9.19 Machine Soldering ....................................... 169
9.4.13 Nickel ........................................................... 159 9.19.1 Wave Soldering ............................................ 169
9.4.14 Solder Pot Contamination ............................ 159 9.19.2 Machine Controls ......................................... 169
9.4.15 Effect of Contamination on Solder 9.19.3 Fluxing .......................................................... 169
Process .......................................................... 159 9.19.4 Foam Fluxing ............................................... 169
9.4.16 Resolving Contamination Problems ............ 159 9.19.5 Wave Fluxing ............................................... 169
9.5 Tin Depletion ................................................ 159 9.19.6 Brush Fluxing ............................................... 170
9.6 Soldering Processes ...................................... 159 9.19.7 Spray Fluxing ............................................... 170
9.7 Manual/Hand Soldering ............................... 159
9.19.8 Preheating ..................................................... 170
9.7.1 Flux Application ........................................... 159
9.19.9 The Solder Wave .......................................... 170
9.8 Solder Application ........................................ 160
9.19.10 Parabolic Wave ............................................. 170
9.9 Hand Soldering ............................................ 160
9.19.11 Bi-Directional Wide Wave ........................... 170
9.9.1 Heat Transfer Considerations ...................... 161
9.19.12 Asymmetrical (Supported) Wave ................. 171
9.10 Temperature Control - Thermal
Considerations for Components 9.19.13 Special Provisions ........................................ 171
and Boards .................................................... 162 9.19.14 Printed Board Conveyors ............................. 171
9.10.1 Heat Sinks .................................................... 162 9.19.15 Pallet Conveyors .......................................... 171
9.11 Tip Selection ................................................ 162 9.19.16 Finger Conveyors ......................................... 171
9.11.1 Tip Materials ................................................ 162 9.19.17 Other Conveyors .......................................... 171
9.11.2 Soldering Iron Tip Selection ........................ 162 9.19.18 Conveyor Control ......................................... 171
9.11.3 Shape/Physical Configuration ...................... 162 9.19.19 Inert Atmospheres ........................................ 171
9.11.4 Tip Maintenance ........................................... 163 9.19.20 Preparation Fluids ........................................ 172
9.11.5 Soldering Iron Station Maintenance ............ 163 9.19.21 System Considerations ................................. 173
9.11.6 Extending Tip Life ....................................... 163 9.19.22 Design Considerations ................................. 173
9.12 Hand Soldering-Soldering Tools
9.19.23 Process Control ............................................ 173
and Equipment ............................................. 164
9.19.24 Maintenance ................................................. 173
9.13 Terminal Soldering ....................................... 165
9.13.1 Flared Flange Hardware ............................... 165 9.19.25 Solder Dross Reclamation and Recovery .... 175
9.13.2 Shank Discontinuities .................................. 165 9.19.26 Training ........................................................ 175
9.13.3 Flared Flange Angles ................................... 165 9.19.27 Safety ............................................................ 175
9.13.4 Terminal Mounting ....................................... 165 9.20 Flow-Well/Minipot ....................................... 175
9.13.5 General Requirements .................................. 166 9.21 Static Solder Pots ......................................... 176
9.14 Soldering To Terminals ................................ 166 9.22 Selective Soldering ...................................... 176
9.14.1 Turret and Hook Terminals .......................... 166 9.22.1 Key Process Elements .................................. 176
9.14.2 Bifurcated, Pierced or Perforated 9.22.2 Process Expectations .................................... 176
Terminals ...................................................... 166 9.22.3 Process Optimization and Control ............... 176
9.14.3 Cup and Hollow Cylindrical 9.23 Reflow Soldering .......................................... 176
Terminal Soldering ....................................... 167
9.23.1 The Test Assembly ....................................... 177
9.15 Unsupported Holes ....................................... 167
9.23.2 Attachment of Thermocouples ..................... 177
9.16 Supported Holes (PTH) ............................... 167
9.23.3 Baseline Profile ............................................ 178
9.17 Vertical Fill of Hole ..................................... 167
9.23.4 PIN-In-PASTE .............................................. 183
9.18 PTH Mounted Components -
Solder Conditions ......................................... 168 9.23.5 Hold Down of Surface Mount Leads .......... 183
9.18.1 Solder in Lead Bend .................................... 168 9.24 Other Reflow Soldering Methods ................ 183

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9.24.1 Hot Bar Reflow Soldering-Resistance 10.3.1 Component Mounting with Adhesives ........ 205
‘‘Hot Bar’’/Pulse soldering .......................... 183 10.3.2 Outer Lead Bonding with Anisotropic
9.24.2 Laser Reflow Soldering ............................... 184 Adhesives ..................................................... 205
9.24.3 Vapor Phase Soldering ................................. 186 10.3.3 Thermally-Conductive Adhesive Bonding .. 205
9.24.4 IR Soldering ................................................. 188 10.3.4 Adhesive Application ................................... 206
9.24.5 The IR Reflow Process ................................ 188 10.3.5 Curing ........................................................... 207
9.24.6 MVC Temperature Determination ............... 193 10.3.6 Heat Sink Materials and Processing ............ 207
9.24.7 Air/Atmosphere Quality ............................... 194 10.3.7 Adhesive Testing and Evaluation ................ 210
9.24.8 Monitoring and Control ............................... 194 10.4 Mechanical Pressure Connections ............... 212
9.24.9 Profiling Devices .......................................... 194 10.4.1 Solderless Backplane Contact
9.24.10 Temperature Control .................................... 194 Terminations ................................................. 212
9.24.11 Inert Atmosphere Operation ........................ 194 10.4.2 Solderless (Wire) Wrapping ......................... 213
9.24.12 No-Clean Processing .................................... 194 10.4.3 Conductive-Elastomer Pressure
Connections .................................................. 217
9.24.13 Processing Bare Copper ............................... 195
9.24.14 Inert Atmosphere Control ............................ 195 11 CLEANLINESS REQUIREMENTS ...................... 219
9.24.15 Machine Selection ........................................ 195 11.1 Definitions .................................................... 220
9.24.16 Conveyor Type ............................................. 195 11.1.1 Solvency ....................................................... 220
9.24.17 Wavelength ................................................... 196 11.1.2 Solvent Stability ........................................... 220
9.24.18 Longitudinal Process Temperature 11.1.3 Film Drying Characteristics ......................... 220
Profiles .......................................................... 196 11.1.4 Soil Capacity ................................................ 220
9.24.19 Lateral Temperature Profiles ........................ 196 11.1.5 Surface Tension or Solvent Wetting ............ 220
9.24.20 Other Concerns ............................................ 197 11.2 Historical Perspective on Cleaning ............. 221
9.24.21 Can the Equipment Do the Job? ................. 197 11.3 Toxicity ......................................................... 221
9.24.22 Critical Parameters for IR Process 11.4 Ultrasonic Cleaning ...................................... 222
Control .......................................................... 197
11.5 Forms of Cleaning ....................................... 222
9.25 SMT .............................................................. 197
11.5.1 Aqueous Cleaning ........................................ 222
9.25.1 Surface Mount Assemblies Acceptance
Requirements ................................................ 197 11.5.2 Semi-Aqueous Cleaning .............................. 223
9.25.2 High Voltage or High Power Applications .. 197 11.5.3 Solvent Cleaning .......................................... 223
9.25.3 Quality Assurance (Visual Inspection) ........ 197 11.6 Cleaning Agent Considerations ................... 223
9.26 Process Verification Inspection .................... 198 11.6.1 Types of Solvents ......................................... 223
9.26.1 Magnification Aids and Lighting ................. 198 11.6.2 Cleaning Agent Compatibility ..................... 224
9.26.2 Sampling Inspection - Process Control ....... 198 11.6.3 Vented Components ..................................... 224
9.26.3 Statistical Process Control (SPC) - 11.7 Cleaning Agent Delivery Considerations .... 224
Refer to IPC-9191. ....................................... 198 11.7.1 In-Line Cleaning .......................................... 224
9.3 References .................................................... 198 11.7.2 Batch Cleaning ............................................. 224
10 OTHER ASSEMBLY AND JOINING 11.7.3 Interim or Spot Cleaning ............................. 224
METHODS ........................................................... 199 11.7.4 Vapor Degreasing ......................................... 224
10.1 Wire Bonding (Chip and Wire) ................... 199 11.7.5 Ultrasonic Cleaning ...................................... 224
10.1.1 Thermocompression (TC) Bonding ............. 199 11.7.6 Cleaning Process Development ................... 225
10.1.2 Ultrasonic Bonding ...................................... 200 11.7.7 Removal of Contaminants from
10.1.3 Thermosonic (TS) Bonding ......................... 202 Underneath Parts .......................................... 225
10.1.4 Choice of Wire Bonding Method ................ 202 11.8 Cleaning requirements ................................. 225
10.2 Tape Automated Bonding (TAB) ................. 203 11.8.1 Pre-Soldering Cleanliness Requirements ..... 225
10.2.1 Inner Lead Bonding (ILB) ........................... 204 11.8.2 Post-Soldering Cleaning .............................. 225
10.2.2 Outer Lead Bonding (OLB) ........................ 204 11.8.3 Particulate Matter ......................................... 225
10.3 Polymer Bonding ......................................... 205 11.9 Cleanliness Verification ................................ 226

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11.9.1 Visual Inspection .......................................... 226 13.4.13 Hybrid ........................................................... 241

11.10 Post-Soldering Cleanliness Designator ........ 226 13.4.14 Hydrophopic-Oleophobic Encapsulations ... 241
11.11 Tests for Cleanliness .................................... 227 13.4.15 Inhibition ...................................................... 241
11.11.1 Residual Rosin ............................................. 227 13.4.16 Mealing ......................................................... 241
11.11.2 Ionic Cleanliness (ROSE) ............................ 227 13.4.17 Monomer ...................................................... 241
11.11.3 SIR Testing ................................................... 230 13.4.18 Multi-Layering ............................................. 241
11.11.4 Surface Organic Contaminants .................... 230 13.4.19 Oligomer ....................................................... 241
11.11.5 Other Residue Tests ..................................... 230 13.4.20 Photoresist .................................................... 241
11.11.6 UV-Vis Spectroscopy ................................... 230 13.4.21 Polymer ........................................................ 241
11.11.7 A General Caution on Extraction- 13.4.22 Polymerization .............................................. 241
Based Tests ................................................... 231 13.4.23 Polysiloxane ................................................. 241
11.11.8 Other Contamination .................................... 231 13.4.24 Pot Life ......................................................... 241
11.11.9 Other Analytical Tests .................................. 231 13.4.25 Priming ......................................................... 242
11.11.10 Cleanliness Testing for No Clean 13.4.26 Shadowing .................................................... 242
Assemblies .................................................... 233
13.4.27 Shrinkage ...................................................... 242
11.12 Other Guidance on Cleaning ....................... 234
13.4.28 Spectroscopy ................................................ 242
12 CONFORMAL COATING .................................... 234 13.4.29 Stripping ....................................................... 242
12.1 Function of Conformal Coating .................. 234 13.4.30 Surface Tension ............................................ 242
12.2 Conformal Coating Specifications ............... 234 13.4.31 Transfer Efficiency ....................................... 242
12.3 Kinds of Conformal Coating ....................... 235 13.4.32 Wetting ......................................................... 242
12.4 Finding a Qualified Conformal Coating ...... 235 13.4.33 Young’s Modulus ......................................... 242
12.5 Advantage and Disadvantages ..................... 235 13.5 Environmental, Health and Safety
12.6 Storage and Shelf Life ................................. 236 Considerations .............................................. 242
12.7 Surface Preparation ...................................... 236 13.5.1 Emissions ...................................................... 242
12.8 Application Methods .................................... 237 13.5.2 Disposal of Hazardous Waste ...................... 242
12.9 Curing Methods ............................................ 237 13.5.3 Governmental Regulations ........................... 242
12.10 Process Control ............................................ 238 13.6 Types of Encapsulation ................................ 242
12.11 Coating Defects ............................................ 239 13.6.1 Acrylic .......................................................... 243
12.12 Coating Rework ........................................... 239 13.6.2 Epoxy ............................................................ 243
13.6.3 Silicone ......................................................... 243
13 POTTING AND ENCAPSULATION .................... 240
13.6.4 Polyurethane & Polysulfide ......................... 243
13.1 Introduction .................................................. 240
13.6.5 UV and Solvent Cure ................................... 243
13.2 Purpose ......................................................... 240
13.7 Design for Encapsulation Application ......... 244
13.3 Scope ............................................................ 240
13.7.1 Design Philosophy ....................................... 244
13.4 Terms and Definitions .................................. 240
13.7.2 PCBs ............................................................. 244
13.4.1 Adhesion Promotion .................................... 240
13.7.3 Component ................................................... 245
13.4.2 Adhesion Failure .......................................... 240
13.4.3 Anisotropic ................................................... 240 13.7.4 Electrical ....................................................... 246
13.4.4 ARUR ........................................................... 241 13.7.5 Encapsulation Coverage ............................... 247
13.4.5 Cross-Linking ............................................... 241 13.7.6 Masking ........................................................ 247
13.4.6 Cure .............................................................. 241 13.7.7 Drawings & Design Guidelines ................... 247
13.4.7 Delamination ................................................ 241 13.7.8 Reworkability/Repairability ......................... 248
13.4.8 Durometer ..................................................... 241 13.8 Raw Materials Characteristics ..................... 248
13.4.9 EMC ............................................................. 241 13.8.1 Viscosity ....................................................... 248
13.4.10 Filler ............................................................. 241 13.8.2 Viscosity vs. Rheology ................................ 248
13.4.11 Gel Time ....................................................... 241 13.8.3 Effect of Temperature on Viscosity ............. 248
13.4.12 Glass Transition Temperature Tg ................. 241 13.8.4 Surface Properties ........................................ 248

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13.9 Compatibility ................................................ 248 13.15.4 Environmental, Health and Safety

13.9.1 Compatibility with Process .......................... 248 Rework and Repair Considerations ............. 266
13.9.2 Inhibition ...................................................... 250 13.16 End Use Environment .................................. 267
13.10 Adhesion ....................................................... 251 13.16.1 Outdoor Environment .................................. 267
13.10.1 Solder Mask/Substrate ................................. 251 13.16.2 Automotive ................................................... 268
13.10.2 Components .................................................. 251 13.16.3 Avionics Environment .................................. 268
13.10.3 Surface Finishes ........................................... 252 13.16.4 Space Environment ...................................... 269
13.10.4 Cleanliness .................................................... 252 13.16.5 Medical Environment ................................... 269
13.10.5 Interlayer Adhesion ...................................... 252 13.16.6 Geothermal Environment ............................. 269
13.11 Methods of Assessing Compatibility 13.16.7 Nuclear Biological Chemical Warfare
and Performance .......................................... 252 Environment ................................................. 269
13.12 Processing ..................................................... 253 13.17 Long Term Reliability and Testing .............. 269
13.12.1 Cleanliness .................................................... 253 13.17.1 Failure Mechanism ....................................... 269
13.13 Processing Environment .............................. 254 13.17.2 Accelerated Testing ...................................... 271
13.13.1 Substrate Preparation ................................... 254 13.18 Bibliography ................................................. 271
13.13.2 Priming ......................................................... 254 14 REWORK AND REPAIR ..................................... 272
13.13.3 Plasma Treatment ......................................... 255 14.1 General Information and Common
13.13.4 Mechanical Etching ...................................... 255 Procedures .................................................... 272
13.13.5 Masking ........................................................ 255 14.1.1 Scope ............................................................ 272
14.1.2 Purpose ......................................................... 272
13.13.6 Manual vs. Automated Masking .................. 256
14.1.3 Background .................................................. 272
13.13.7 Recommended Coverage ............................. 257
14.1.4 Terms and Definitions .................................. 272
13.13.8 Application Methods .................................... 257
14.1.5 Applicability, Controls and Acceptability ... 274
13.13.9 Cure Mechanisms ......................................... 257
14.1.6 Basic Considerations .................................... 274
13.13.10 Cure Process Considerations ....................... 258
14.1.7 Workstations, Tools, Materials
13.13.11 Application Process Monitoring .................. 258 and Processes ............................................... 274
13.13.12 Inspection Guidelines ................................... 259 14.1.9 Lead Free ...................................................... 279
13.13.13 Environmental, Health and Safety 14.2 Handling Electronic Assemblies -
Processing Considerations ........................... 259 See Chapter 2 of this document. ................. 280
13.14 Encapsulation Properties .............................. 259 14.3 Cleaning - See Chapter 11 of
13.14.1 Appearance/Color ......................................... 260 this document. .............................................. 280
13.14.2 Dielectric Properties ..................................... 260 14.4 Coating Removal .......................................... 280
13.14.3 Thermal Properties ....................................... 260 14.4.1 Coating Removal, Identification of
Conformal Coating ........................................ 280
13.14.4 Flammability ................................................ 261
14.4.2 Coating Removal, Solvent Method............... 281
13.14.5 Flexibility ..................................................... 261
14.4.3 Coating Removal, Peeling Method............... 282
13.14.6 Abrasion Resistance ..................................... 262
14.4.4 Coating Removal, Thermal Method ............. 282
13.14.7 Hydrolytic Stability ...................................... 262
14.4.5 Coating Removal, Grinding/
13.14.8 Permeability .................................................. 262 Scraping Method ........................................... 283
13.14.9 Chemical Compatibility and Chemical 14.4.6 Coating Removal, Micro
Resistance ..................................................... 262 Blasting Method ............................................ 283
13.14.10 UV Stability ................................................. 263 14.5 Replacment of Conformal Coating .............. 283
13.14.11 Radiation Resistance .................................... 263 14.5.1 Coating Replacement, Solder Resist............. 283
13.14.12 Outgassing .................................................... 264 14.5.2 Coating Replacement, Conformal
13.15 Rework and Repair ...................................... 264 Coatings/Encapsulants ................................... 284
13.15.1 Removal Methods ........................................ 264 14.6 Conditioning – Baking and Preheating ........ 284
13.15.2 Cleaning after Stripping ............................... 266 14.7 Epoxy Mixing and Handling ........................ 284
13.15.3 Re-Encapsulation .......................................... 266 14.8 Legends/Markings ......................................... 285

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14.8.1 Stamping Method ......................................... 285 Figure 7-2 Tin allotropic crystallographic structure;
(left) tetragonal β-tin, (right) cubic α-tin .......... 69
14.8.2 Hand Lettering............................................... 285
Figure 7-3 Tin Pest Transformation from Sweatman
14.8.3 Stencil Method .............................................. 285 et al Investigation ........................................... 70
14.9 Tip Care and Maintenance ............................ 285 Figure 7-4 Solder Wire Core Flux Comparison ............... 76
14.10 IPC-7711 Rework Procedures....................... 286 Figure 7-5 Solder Alloy Solidification Example: Blue
14.11 IPC-7721 Modification and Repair............... 288 line - Eutectic, Red line - Non-Eutectic .......... 76
Figure 7-6 Solder Alloy Fracture Toughness
Testing Results ............................................... 77
Figures Figure 7-7 Solder Alloy Drop Shock Testing Results ....... 77
Figure 2-1 J-STD-075 Process Flow Diagram ................. 17 Figure 7-8 NASA Tin-Whisker Photograph .................... 105
Figure 3-1 Component Orientation with Respect to Figure 7-9 Tin Whiskers - Observed Problems
Boundaries and Mounting Accessibility .......... 22 Caused by Whiskers .................................... 105
Figure 3-2 Uncoated Printed Board Clearance ............... 23 Figure 7-10 Additional Tin Whisker Problems ................. 106
Figure 3-3 Lead Terminations .......................................... 24 Figure 8-1 Type 1 Printed Board Assembly ................... 107
Figure 3-4 Clinched Through Hole Leads ........................ 26 Figure 8-2 Type 2 Printed Board Assemblies ................ 108
Figure 3-5 Dual-Inline Package (DIP) Lead Bends ......... 26 Figure 8-3 Staggered Hole Pattern Mounting ‘‘MO’’
Flatpack Outline Drawing (Only Inches
Figure 3-6 Lead Forming and Stress Relief Shown) .......................................................... 110
Lead Bends .................................................... 27
Figure 8-4 Component Modifications for Surface
Figure 3-7 Component Mounting Configurations ............. 27 Mounting Applications ................................... 110
Figure 3-8 Through Hole Flat-Pack Mounting with Figure 8-5 Modifying DIP for Surface Mounting ............. 110
Staggered Plated Through Holes ................... 29
Figure 8-6 Mixed Assemblies ......................................... 111
Figure 3-9 Modified Fan-Out Lands, mm [in] ................... 30
Figure 8-7 Clip-Mounted Component ............................. 112
Figure 3-10 Custom-Grid Fan-out Land Pattern ................ 30
Figure 8-8 Strap Securing .............................................. 112
Figure 3-11 Gull Wing Flat Pack Surface Mounting .......... 31
Figure 8-9 Typical Spacers ............................................ 113
Figure 3-12 Flat-Pack Lead Forming for (Planar)
Figure 8-10 Transistor Mounting with Spacer .................. 113
Surface Mounting ........................................... 31
Figure 8-11 Multiple Lead Spreader ................................. 113
Figure 3-13 Surface-Mount Flat Ribbon Lead Features .... 31
Figure 8-12 Thermally Conductive Insulator .................... 113
Figure 3-14 Coined Round Leads ...................................... 32
Figure 8-13 Single-Sided Surface Mount Assembly,
Figure 4-1 HASL Surface Topology Comparison ............. 45 Reflow Only .................................................. 114
Figure 5-1 One-Part Printed Circuit Board Connector ..... 48 Figure 8-14 Single-Sided Surface Mount Assembly,
Figure 5-2 Printed Circuit Board with Edge-Board Immersion Only ............................................. 114
Contacts .......................................................... 48 Figure 8-15 Mixed Technology Assembly, Double-
Figure 5-3 Typical One-Part Connector with Bellows Sided, Reflow Only ....................................... 114
Contacts .......................................................... 48 Figure 8-16 Mixed Technology Assembly, Double-
Figure 5-4 Typical One-Part Connector Tuning-Fork Sided: Reflow and Immersion ....................... 115
Contacts .......................................................... 48 Figure 8-17 Mixed Technology Assembly, Double-
Figure 5-5 Typical One-Part Connector Cantilever Sided Reflow and Manual ............................. 115
Contacts .......................................................... 48 Figure 8-18 Mixed Technology Assembly, Double-
Figure 5-6 Typical One-Part Connector Readout Sided, Immersion Only ................................. 115
Configuration .................................................. 49 Figure 8-19 Panel Assembly Tooling Holes ..................... 116
Figure 5-7 Typical Two-Part Blade-and-Fork Contacts .... 49 Figure 8-20 Panel Assembly Tooling Holes ..................... 116
Figure 5-8 Typical Zero-insertion-Force (ZIF) Pin- Figure 8-21 Taped Axial-Leaded Components ................. 116
Grid Array Socket ........................................... 49
Figure 8-22 Polarized Axial Lead Component
Figure 5-9 Typical Printed Board Test Points .................. 49 (Typical Polarity Markings) ............................ 116
Figure 6-1 Dissolution of Selected Elements in Figure 8-23 16-Lead Dip .................................................. 117
Sn/Pb Solder .................................................. 55
Figure 8-24 Flatpack Outline Drawing .............................. 118
Figure 6-2 Intermetallic Growth Rates ............................. 55
Figure 8-25 Typical Ribbon Leaded Discrete
Figure 6-3 Comparison of Oxidized and Non-oxidized Device Outline Drawing (Flat Leads) ............ 118
Sn/Pb Surface Finish ...................................... 56
Figure 8-26 Pin Grid Array ............................................... 119
Figure 6-4 Schematic of the Wetting Balance Test ......... 58
Figure 8-27 I/O Density Versus Lead Count
Figure 6-5 Idealized Wetting Balance Curve ................... 59 (All Dimensions in Inches) ............................ 119
Figure 7-1 Tin Lead Phase Diagram ................................ 68 Figure 8-28 Connector with Press Fit Contacts ............... 119

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Figure 8-29 Surface Mount Clip Carrier Socket .............. 120 Figure 8-71 DIP Clearances ............................................ 137
Figure 8-30 Section Through Socket Solder Contact ...... 120 Figure 8-73 DIP Slide Magazines .................................... 138
Figure 8-31 Component Mounting Sequence .................. 122 Figure 8-74 No Bridging ................................................... 139
Figure 8-32 Thermal Shunt .............................................. 123 Figure 8-75 Lead Forming for Surface Mounting ............ 139
Figure 8-33 Termination Examples .................................. 123 Figure 8-76 Criteria for Lead Attachment to Leadless
Figure 8-34 Clinch Patterns ............................................. 125 Type A (Leaded Type B) ............................... 140
Figure 8-35 Semiclinched Lead ....................................... 125 Figure 8-77 SO-16 Package Drawings Typical
Dimension ..................................................... 140
Figure 8-36 Lead Diameter Versus Bend Radius ............ 126
Figure 8-78 Typical SOT Packages ................................. 141
Figure 8-37 Bend Configuration ....................................... 127
Figure 8-79 Modifying DIP for Surface Mounting ............ 141
Figure 8-38 Simple-Offset Preformed Lead ..................... 127
Figure 8-39 Dimple Preformed Leads .............................. 127 Figure 8-80 Gull-Wing Lead for SIP-Type Component .... 141

Figure 8-40 Compound Lead Form Examples ................ 127 Figure 8-81 Surface Mount Receptacle ........................... 142

Figure 8-41 Stress Relief Leads ...................................... 128 Figure 8-82 Surface Mount Connector ............................ 142
Figure 8-42 TO Can Lead Forming .................................. 128 Figure 8-83 D-Subminiature Surface Mount Connector .. 142
Figure 8-43 Dimple Preformed Leads .............................. 128 Figure 8-84 Box-Contact Surface Mount Connector ....... 142
Figure 8-44 Typical Mounting Pattern for 12-Lead Figure 8-85 Leadless Grid Array Socket .......................... 142
Cans with Clinched Leads Mounting ............ 128 Figure 8-86 Surface Mount Chip Carrier Socket ............. 142
Figure 8-45 Mechanical Mounting - Lead Forming .......... 128 Figure 8-87 High Speed Circuit Socket ........................... 143
Figure 8-46 Single-Inline Component .............................. 129 Figure 8-88 Screw Down Cover ....................................... 143
Figure 8-47 Lead Configuration (After Assembly) ........... 129
Figure 8-89 Pressure Mounted Socket ............................ 143
Figure 8-48 Resilient Spacer to Heat Sink Frame ........... 129
Figure 8-90 Preferred Mounting Orientations .................. 146
Figure 8-49 Staggered Hole Pattern Mounting
Figure 9-1 Structure of a Solder Bond ........................... 148
(Flatpack Outline Drawing) ........................... 130
Figure 8-50 Component Mounting - Lead Forming ......... 130 Figure 9-2 Property Changes as a Function
of Temperature ............................................. 150
Figure 8-51 Through-Hole Board Mounting with
Unclinched Leads ......................................... 130 Figure 9-3 Stress Relaxation with Time and
Temperature .................................................. 151
Figure 8-52 Through-Hole Mounting with Clinched
Leads and Circumscribing Land ................... 130 Figure 9-4 Cylindrical Deformation Leading to
Joint Failure .................................................. 151
Figure 8-53 Through-Hole Mounting with Offset Land .... 130
Figure 9-5 Property Change with Strain Rate ............... 151
Figure 8-54 Components Mounted Over Conductors ...... 131
Figure 9-6 Cyclic Shear Strain Range (Figure
Figure 8-55 Hardware Clearance ..................................... 132
Courtesy of J.P. Clech) ................................. 151
Figure 8-56 Component Alignment .................................. 132
Figure 9-7 Solder Joint Grain Size Structure
Figure 8-57 Component Alignment .................................. 132 (As Soldered) ................................................ 152
Figure 8-58 Horizontal Mounting of Radial Figure 9-8 Solder Joint Grain Size Structure
Leaded Component ...................................... 133 (After accelerated Cycling) ........................... 152
Figure 8-59 Horizontal Mounting of Radial Leaded Figure 9-9 Solder Joint Grain Size Structure
Component with Heat Sink ........................... 133 (After Field Failure) ....................................... 152
Figure 8-60 Horizontal TO Mounting ................................ 133 Figure 9-10 Schematic Diagrams of The Microstructure
Figure 8-61 Vertical Mounted Axial Lead Components ... 133 Formation in Lead-Free Paste - Lead-Free
Figure 8-62 Vertical Mounted Radial-Lead Components . 134 Solder Balls Under Reflow ........................... 153

Figure 8-63 Vertical Mounted Components Coating Figure 9-11 A Lead-free BGA Microstructure; Left - As
Meniscus ....................................................... 134 Reflowed, Right - After Thermal Cycling ...... 153
Figure 8-64 Radial Components Mounting Figure 9-12 Solder Alloy Microstructure Differences:
(Unsupported Holes) .................................... 134 Left - Tin/lead Solder Alloy, Right: SAC305
Solder Alloy ................................................... 153
Figure 8-65 Offset Lead Can Mounting ........................... 134
Figure 9-13 Lead-free Solder Alloy/Component Surface
Figure 8-66 Offset Lead Can Mounting ........................... 134
Finish Incompatibility Example (Reference:
Figure 8-67 Metal Power-Package Transistor D. Hillman and R. Wilcoxon, ‘‘JCAA/JG-PP
Mounted on Resilient Standoffs ................... 134 Lead-free Solder Testing for High Reliability
Figure 8-68 Dual-Inline Package Gripping Tools ............. 136 Applications: -55 °C to +125 °C Thermal
Cycle Testing,’’ SMTAI Conference, 2006) ... 154
Figure 8-69 Transistor Assembly Tools ............................ 136
Figure 9-14 left: Non-uniform Solder Joint Microstructure,
Figure 8-70 Taping Specifications (only inches shown) .. 137 right: Incomplete Solder Joint Reflow
Figure 8-72 DIP Layout in Rows and Columns ............... 137 (Head-on-Pillow) ........................................... 155

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Figure 9-15 Component Degradation Due to Lead-free Table 4-8 ENEPIG Surface Finish Advantages and
Soldering Process Incompatibility ................ 156 Disadvantages ................................................... 41
Figure 9-16 Lead-free Solder Alloy Attack of Wave Solder Table 4-9 Immersion Silver Surface Finish Advantages
Equipment (Photograph Reference: ‘‘Pb-free and Disadvantages ........................................... 42
Technology and the Necessary Changes in
Table 4-10 Immersion Tin Surface Finish Advantages
Soldering Process and Machine Technology,’’
and Disadvantages ........................................... 42
H. Schlessmann, APEX 2002 Conference
Proceedings) ................................................. 156 Table 4-11 OSP Surface Finish Advantages and
Limitations ......................................................... 43
Figure 9-17 Copper Erosion Due to Lead-free
Soldering Processes ..................................... 156 Table 6-1 Solderability of Some Common Surfaces ......... 53
Figure 9-18 Lead-free Soldering Iron Tip Damage Table 6-2 Flux Compositions ............................................. 60
(Courtesy of Hakko) ..................................... 163 Table 7-1 Types of Contaminants ..................................... 62
Figure 9-19 Thermal Profile of a Soldering Iron Tip ........ 164 Table 7-2 Flux Identification System ................................. 65
Figure 9-20 Properly Wrapped Wires .............................. 166 Table 7-3 Solder Alloys and Their Melting Points ............. 68
Figure 9-21 Soldering To Terminals ................................. 166 Table 7-4 Alloy Properties ................................................. 69
Figure 9-22 Acceptable Soldered Cup ............................. 167 Table 7-5 Indium-Based Solder Alloys .............................. 71
Figure 9-23 Wave Soldering Problems and Solutions Table 7-6 Bismuth-Based Solder Alloys ............................ 72
Reference Chart ........................................... 174
Table 7-7 Traditional Solder Alloys .................................... 73
Figure 9-24 Typical Tin-Lead Reflow Soldering
Thermal Profile ............................................. 189 Table 7-8 Lead-Free Solder Alloys .................................... 75
Figure 9-25 Typical Type RMA Flux Thermal Profile ....... 190 Table 7-9 Lead-Free Solder Alloys and Their Melting
Temperatures .................................................... 76
Figure 9-26 Typical Type OA Flux Thermal Profile .......... 191
Table 7-10 Hewlett Packard Proposed Test Protocol
Figure 9-27 Typical ‘‘No-Clean’’ Flux Thermal Profile ...... 191 for Pb-Free Solder Alloys .................................. 78
Figure 9-28 Typical Reactive Atmosphere Flux Table 7-11 Solder Powder Size Designations
Thermal Profile ............................................. 192 (J-STD-005) ....................................................... 88
Figure 9-29 Lateral Temperature Profiles ........................ 196 Table 7-12 Tin Whisker Mitigation ....................................... 95
Figure 10-1 Wire Bonding Variables ................................ 200 Table 7-13 Component Lead-Free Finishes (Tin
Figure 10-2 Mechanics of Thermocompression Wire Whisker Test Requirements) ........................... 100
Bonding. ........................................................ 200 Table 7-14 iNEMI Ratings for Whisker Risk on
Figure 10-3 Mechanics of Ultrasonic Wire Bonding ........ 201 Termination Finishes for Separable
Connectors ...................................................... 102
Figure 10-4 Solderless Wire Wrap ................................... 214
Table 7-15 Bus Bars - Tin Whisker Concerns .................. 103
Table 7-16 Heat Sink Finishes and Tin Whiskers ............. 103
Tables Table 7-17 Printed Circuit Boards ..................................... 104
Table 2-1 Typical Static Charge Sources .......................... 15 Table 8-1 Lead Clinch Length ......................................... 125
Table 2-2 Typical Static Voltage Generation ..................... 15 Table 9-1 Intermetallic Compounds and Diffusion
Table 2-3 General Rules for Handling Electronic Constants for Near-Eutectic SnPb Solders .... 149
Assemblies ........................................................ 15 Table 9-2 Common Physical Property Values for
Lead-Free Solder ............................................ 150
Table 2-4 Wave Solder PSL Classification ....................... 18
Table 9-3 Effect of Temperature on Lap Shear
Table 2-5 Reflow Solder PSL Classification ...................... 18
Strength PSI (Pa) ............................................ 150
Table 2-6 PSL 3rd Character ............................................ 19
Table 9-4 Maximum Limits of Solder Bath
Table 3-1 Integrated Circuit Packaging Technology Contaminant .................................................... 158
Comparison ....................................................... 22
Table 9-5 Soldering Process Comparison ...................... 160
Table 4-1 PCB Typical Material Properties ....................... 33
Table 9-6 Hand Soldering Tools ...................................... 161
Table 4-2 Cross Reference of Plastic Laminate
Table 9-7 Unsupported Holes with Component
Specifications .................................................... 35
Leads, Minimum Acceptable Conditions ......... 168
Table 4-3 Properties of Metallic Foils ................................ 36
Table 9-8 Supported Holes with Component Leads,
Table 4-4 Final Finish and Coating Requirements ........... 39 Minimum Acceptable Conditions Note ............ 168
Table 4-5 Gold Plating Uses ............................................. 40 Table 9-9 Problems and Solutions in Vapor Phase
Soldering ......................................................... 187
Table 4-6 ENIG Surface Finish Advantages and
Disadvantages ................................................... 40 Table 10−1 Wire Bonding Technologies ............................ 202
Table 4-7 ENIG/EG Surface Finish Advantages and Table 10-2 K Values for Common
Limitations ......................................................... 41 Materials (watts/meter-°C) .............................. 206

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Table 10-3 Methods of Mounting Power Devices to Heat Table 10-11 Solderless Wrap Wire/Terminal Size
Sinks ................................................................ 208 Relationships ................................................... 215
Table 10-4 Thermal Greases and Their Properties .......... 208 Table 10-12 Elastomeric Connector Troubleshooting
Table 10-5 Physical Properties of Compressible Pads ..... 209 Guide ............................................................... 219

Table 10-6 Performance Properties of Electrically Table 12-1 Comparison of Conformal Coating Materials .. 236
Insulating Epoxies and Acrylics ...................... 210 Table 13-1 Material Compatibility ...................................... 251
Table 10-7 Standard Joining Material ............................... 210 Table 13-2 Temperature Classifications of Automotive
Table 10-8 Alternate Joining Material Evaluation Industry ............................................................ 268
Test Method ..................................................... 210 Table 14-1 Conformal Coating Characteristics ................. 280
Table 10-9 Number of Solderless (Wire) Wrap Turns ...... 214 Table 14-2 Removal Method ............................................. 280
Table 10-10 Solderless (Wire) Wrap Strip Force ................ 215

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February 2012 IPC-AJ-820A

Assembly and Joining Handbook

IPC-AJ-820 OUTLINE
The purpose of this Assembly and Joining Handbook is to provide practical and useful information regarding various
approaches and techniques for the interconnection of electronic components. The table of contents is an indication of the
variety of data included in this document.
Chapter 1 Introduction
Chapter 2 Handling Electronic Assemblies
Chapter 3 Design Considerations
Chapter 4 Printed Boards
Chapter 5 Electronic Circuit Components
Chapter 6 Solderability
Chapter 7 Assembly and Joining Materials
Chapter 8 Component Mounting
Chapter 9 Solder Techniques and Connections
Chapter 10 Other Assembly and Joining Methods
Chapter 11 Cleaning and Cleanliness
Chapter 12 Conformal Coating (HDBK-830)
Chapter 13 Encapsulation and Potting
Chapter 14 Rework and Repair

1 SCOPE
This document provides guidelines and supporting information for manufacturing electronic assemblies. The intent is to
explain the ‘‘how-to’’ and ‘‘why’’ information, and fundamentals for these processes.
Additional detailed information can be found in documents referenced within each individual section. Users are encouraged
to use those referenced documents to better understand the applicable subject areas.
The words ‘‘shall,’’ ‘‘must,’’ etc., are used in various places within this handbook. However, nothing within this handbook
is considered mandatory unless otherwise specified in the design or contract documentation. In event of a conflict between
the content of this handbook and the requirements invoked by the design or contract documentation, the requirements of the
design or contract documentation shall take precedence.

1.1 Assembly and Joining Technology Selection of appropriate assembly and joining techniques for electronic circuits
should consider the requirements of the end product equipment and subassembly, including form, fit, function, cost effec-
tiveness, performance, and marketability. Other factors include packaging density, assembly profile height, development
time, development cost, circuit element factors, manufacturing costs, thermal considerations, reliability, and specific imple-
mentation details.
The assembly process steps differ according to the type of product being assembled, i.e., through-hole, surface mount, or
mixed technology. They also vary according to manufacturer expertise, experience, and preference.
The selection of a particular method for mounting and terminating a component will also depend on the type of component
(size, weight and shape), the equipment available for mounting and interconnecting, the connection method (e.g., soldering,
welding, or crimping), the reliability and maintainability (ease of replacement) required, and of course, cost.

1.2 Through-Hole Technology The most significant advantage of through-hole mounting is compatibility with conven-
tional mass soldering techniques, such as dip and wave soldering. One of the significant disadvantages is space. Through-
hole parts usually take up a much larger footprint on the PWA than a similar surface mount component. They also require
space on both sides of the board, as the leads protrude through to the opposite side.

1.3 Surface Mount Technology The most obvious benefits of surface mount technology (SMT) compared to older
through-hole (THT) technology are increased circuit density and improved electrical performance. Less obvious benefits
include lower process costs, higher product quality, reduced handling costs, and higher reliability.

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Some SMT package types also facilitate assembly automation, rework, and repair. Because of the complexity and density
of some assemblies (e.g., intermixed THT and SMT components on both sides of a printed board), proper design and pro-
cess control are necessary to control process costs and reduce rework and repair.
Improved electrical performance may include higher operating speed and frequency. SMT lowers the parasitic lead and trace
inductance, while improving capacitance, resistance, and other performance characteristics.
Increasing device complexity has been a primary driving factor for SMT. In order to keep component package size down,
typical lead spacing was initially decreased to 1.27mm [0.050 in]. Further increases in active elements in very-large-scale
integration (VLSI) required devices with more than 100 terminals and closer lead spacings of 0.64 and 0.50 mm [0.025 and
0.020 in]. Today, spacings of 0.38 and 0.25 mm [0.015 and 0.010 in] are becoming a reality. Packages with lead pitches of
0.65 millimeter or less are known as fine-pitch technology (FPT) packages. Because of the design flexibility of gate arrays
and standard cells, small companies can now do their own custom integrated circuit design around these technologies with-
out a heavy investment in personnel and equipment. The basic integrated circuit (IC) cell has already been designed for
them.
As the complexity of ICs continues to drive the adoption of SMT, the printed board will also change. With more of the cir-
cuit customization going into silicon, and with the component package size decreasing, the printed board may also get
smaller. However, the higher I/O demand will require multilayer designs with interconnection wiring for closely spaced
devices. Both sides of the printed board will be needed to place all the components. In many cases, power dissipation per
printed board will also increase.

1.4 Related Documents This section describes documents that are related to the subject matter included in this handbook.
The information here is for reference only.

1.4.1 Joint Industry Standards1 IPC-Association Connecting Electronics Industries develops standards and other publi-
cations that are designed to serve the public interest through the elimination of misunderstandings between manufacturers
and purchasers, to facilitate the interchangeability and improvement of products, and to assist the buyers in selecting and
obtaining the products that satisfy their needs.
IPC documents are sometimes developed unilaterally. However, when it best serves the interests of the Electronics Indus-
try, IPC jointly develops standards and specifications with other organizations. Sometimes these documents are identified
with a ‘‘J-STD’’ prefix. The following documents of this type are related to this handbook.

1.4.1.1 J-STD-001

Title: Requirements for Soldered Electrical and Electronic Assemblies

Department of Defense (DoD) Adoption: Yes
Abstract: The requirements of this document were written with the intention of superseding IPC-S-815 and MIL-STD-
2000. This standard defines the requirements for soldering electrical and electronic assemblies. It also defines the materials,
methods, and verification criteria for producing quality soldered interconnections and assemblies, including cleaning, coat-
ing, encapsulation, rework/repair, and verification.
It is not the intent of J-STD-001 to exclude any acceptable procedure for placing components, or for applying flux and sol-
der used to make electrical connections. However, the methods used must produce solder connections conforming to the
acceptability requirements in the standard.
Additional Associated documents:

1.4.1.1.1 J-STD-001 Space Addendum

Title: Space Applications Electronic Hardware Addendum to J-STD-001 Requirements for Soldered Electrical and Elec-
tronic Assemblies
Abstract: This addendum provides additional requirements over those published in IPC J-STD-001 to ensure the reliabil-
ity of soldered electrical and electronic assemblies that must survive the vibration and thermal cyclic environments getting
to and operating in space. When required by procurement documentation/drawings, this Addendum supplements or replaces
specifically identified requirements of J-STD-001, Revision D of February 2005.

1. www.ipc.org

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1.4.1.2 J-STD-002

Title: Solderability Tests for Component Leads, Terminations, Lugs, Terminals and Wires

Department of Defense (DoD) Adoption: Yes

Abstract: The requirements of this document were written to supersede IPC-S-805 and EIA-IS-49A. This standard pre-
scribes recommended test methods, defect definitions, acceptance criteria, and illustrations for assessing the solderability of
electronic component leads, terminations, solid wire, lugs, and tabs.

1.4.1.3 J-STD-003

Title: Solderability Tests for Printed Boards

Department of Defense (DoD) Adoption: Yes

Abstract: The requirements of this document were written to supersede IPC-S-804. This standard prescribes the recom-
mended test methods, defect definitions, and illustrations for assessing the solderability of printed board surface conductors,
attachment lands, and plated-through holes.

1.4.1.4 J-STD-004

Title: Requirements for Soldering Fluxes

Department of Defense (DoD) Adoption: Yes

Abstract: This document is one of a set of three Joint Industry Standards that also includes J-STD-005 and J-STD-006.
The set of standards prescribes general requirements and test methods for soldering materials used in the Electronics Indus-
try, and are a replacement for Mil-F-14256 and QQ-S-571. J-STD-004 covers classification and testing of soldering fluxes.

1.4.1.5 J-STD-005

Title: Requirements for Soldering Pastes

Department of Defense (DoD) Adoption: Yes

Abstract: This document is one of a set of three Joint Industry Standards for soldering materials that also includes J-STD-
004 and J-STD-006. J-STD-005 prescribes general requirements for the characterization and testing of solder pastes used to
make high quality interconnections. It is a quality control document and is not intended to relate directly to the material’s
performance in the manufacturing process.

1.4.1.6 J-STD-006

Title: Requirements for Electronic Grade Solder Alloys and Fluxed and Non-Fluxed Solid Solders for Electronic Solder-
ing Applications
Department of Defense (DoD) Adoption: Yes

Abstract: This document is one of a set of three Joint Industry Standards for soldering materials that also includes J-STD-
004 and J-STD-005. J-STD-006 prescribes the nomenclature, requirements, and test methods for electronic grade solder
alloys, for fluxed and non-fluxed bar, ribbon, and powder solders, and for ‘‘special’’ electronic grade solders. This is a qual-
ity control standard and is not intended to relate directly to the material’s performance in the manufacturing process.

1.4.1.7 J-STD-012

Title: Implementation of Flip Chip and Chip Scale Technology

Abstract: This document describes the implementation of flip chip and related chip scale semiconductor packaging tech-
nologies. The areas discussed include design considerations, assembly processes, technology choices, application, and reli-
ability data. Chip scale packaging variations include flip chip, High Density Interconnect (HDI), Micro Ball Grid Array,
Micro Surface Mount Technology (MSMT) and Slightly Larger than Integrated Circuit Carrier (SLICC).
J-STD-012 provides general information on implementing flip chip and chip scale technologies for creating single chip or
multichip modules (MCM), IC cards, memory cards, and very dense surface mount assemblies.

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1.4.1.8 J-STD-020

Title: Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices
Abstract: This standard may be used to determine what classification/preconditioning level should be used for SMD
package qualification. Passing the criteria in this test method is not sufficient by itself to provide assurance of long-term reli-
ability

1.4.1.9 J-STD-033

Title: Handling, Packing, Shipping and Use of Moisture/Reflow Sensitive Surface Mount Devices
Abstract: The purpose of this document is to provide SMD manufacturers and users with standardized methods for han-
dling, packing, shipping, and use of moisture/reflow sensitive SMD packages that have been classified to the levels defined
in J-STD-020. These methods are provided to avoid damage from moisture absorption and exposure to solder reflow tem-
peratures that can result in yield and reliability degradation. By using these procedures, safe and damage-free reflow can be
achieved, with the dry packing process, providing a minimum shelf life capability in sealed dry-bags of 12 months from the
seal date.

1.4.1.10 J-STD-075

Title: Classification of Non-IC Electronic Components for Assembly Processes

Abstract: The purpose of this specification is to establish an agreed set of worst case solder process limits (SnPb and
Pb-free) which can safely be used for assembling non-semiconductor electronic components on common substrates, e.g.,
FR4, ceramic, polyimide, etc., along with documenting unique commodity specific exceptions.

1.4.1.11 JESD22-B111

Title: Board Level Drop Test Method of Components for Handheld Electronic Products
Abstract: This Board Level Drop Test Method is intended to evaluate and compare drop performance of surface mount
electronic components for handheld electronic product applications in an accelerated test environment, where excessive
flexure of a circuit board causes product failure.

1.4.1.12 JESD201

Title: Environmental Acceptance Requirements for Tin Whisker Susceptibility of Tin and Tin Alloy Surface Finishes
Abstract: This standard was generated under the auspices of the JEDEC JC14.3 Subcommittee on Silicon Device Reli-
ability Qualification and Monitoring and the iNEMI Tin Whisker User Group. It is intended to provide a uniform environ-
mental acceptance testing and reporting methodology for tin whisker susceptibility of tin and tin alloy surface finishes used
in the Electronics Industry.

1.4.1.13 J-STD-609

Title: Marking and Labeling of Components, PCBs and PCBAs to Identify Lead (Pb), Lead-Free (Pb-Free) and Other
Attributes
Abstract: This standard applies to components and assemblies that contain Pb-free and Pb-containing solders and finishes.
This standard describes the marking of components and the labeling of their shipping containers to identify their 2nd level
terminal finish or material, and applies to components that are intended to be attached to boards or assemblies with solder
or mechanical clamping or are press fit. This standard also applies to 2nd level terminal materials for bumped die that are
used for direct board attach.

1.4.2 IPC - Association Connecting Electronics Industries Documents2 The IPC develops and publishes specifications,
standards, and guideline documents to help establish common terminology and promote best practices for printed boards and
related products and assemblies.

1.4.2.1 IPC-DRM-18

Title: Component Identification Training and Reference Guide

2. www.ipc.org

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Abstract: The Component Identification Training & Reference Guide is a valuable tool for employee training and quick
reference. This comprehensive component identification resource for electronics assembly operators and inspectors contains
color photographs, computer graphics, schematic symbols and detailed descriptions of more than 50 common through-hole
and surface mount components used in electronics assembly today.

1.4.2.2 IPC-T-50

Title: Terms and Definitions for Interconnecting and Packaging Electronic Circuits
Department of Defense (DoD) Adoption: Yes
Abstract: This document includes definitions of common industry terms developed by the IPC Committee on Terms and
Definitions. The Committee meets regularly to add new terms and definitions.

1.4.2.3 IPC-CH-65

Title: Guidelines for Cleaning on Printed Boards and Assemblies

Abstract: The purpose of this document is to collect and update all the pertinent information on printed wiring assembly
(PWA) cleaning in a single, easy to revise/updated document.

1.4.2.4 IPC-FA-251

Title: Assembly Guidelines for Single-Sided and Double-Sided Flexible Printed Circuits
Abstract: This document provides information for design and manufacturing engineers on flexible printed circuit assem-
bly techniques. These guidelines include the types of parts available, techniques and processes for their proper use, advan-
tages, disadvantages, problems, implementation, and where to find additional information.

1.4.2.5 IPC-D-279

Title: Design Guidelines for Reliable Surface Mount Technology Printed Board Assemblies
Abstract: This document establishes design concepts, guidelines, and procedures to promote ‘‘Design for Reliability’’
(DfR) of printed wiring assemblies (PWAs). The focus is directed toward PWAs with surface mount (SMT) components,
alone or intermixed with through-hole components, mounted on one or both sides of the board.

1.4.2.6 IPC-D-355

Title: Printed Board Assembly Description in Digital Form

Abstract: This standard is used to describe the relationship between components (electronic, electro-mechanical, and
mechanical) and the printed boards used as the major form of interconnection. Included in these descriptions are the physi-
cal characteristics of components and boards required as input to an automated assembly system.
The physical characteristics used in the electronic design process are described in digital form to enable data exchange and
archiving between systems that support design, fabrication, assembly, and testing.
This structure provides the capability to describe all elements in their final form after completion of manufacturing. It may
be used for component preparation (sequencing, lead bonding, etc.), component insertion, adhesive application, or compo-
nent placement.

1.4.2.7 IPC-C-406

Title: Design and Application Guidelines for Surface Mount Connectors

Abstract: The growing popularity of surface mount technology has fostered a need for surface mount connectors to pro-
vide a common packaging approach. This document provides guidelines for the design, selection, and application of sol-
dered surface mount connectors for all types of printed boards including rigid, rigidflex, and backplanes. It does not cover
solderless interconnections, such as those that employ conductive elastomers.

1.4.2.8 IPC-D-422

Title: Design Guide for Press Fit Rigid Printed Board Backplanes
Abstract: This design guide assumes that the user possesses basic knowledge of the various types of interconnection sys-
tems, including electrical and mechanical properties.

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The purpose of this document is to enlarge upon the user’s analysis, and approach the design from the fabricator’s and
assembler’s perspective with respect to design optimization. This design optimization can dramatically improve life cycle
cost of the equipment. Major topics include:
• Design and Documentation
• Fabrication, Assembly and Repair
• Inspection, Testing and Shipping

1.4.2.9 IPC-DW-426

Title: Specification for Assembly of Discrete Wiring

Abstract: This specification covers the acceptance and test requirements of conformally coated and non-coated discrete
wiring assemblies consisting of discrete wiring boards manufactured in accordance with IPC-DW-425 on which separately
manufactured electrical and/or mechanical components are mounted.

1.4.2.10 IPC-A-610

Title: Acceptability of Electronic Assemblies

Department of Defense (DoD) Adoption: Yes
Abstract: This standard is a collection of visual quality acceptability requirements for electronic assemblies. It presents
acceptance requirements for the manufacture of electrical and electronic assemblies. The criteria in this standard are not
intended to define processes to accomplish assembly operations, nor are they intended to authorize repair/modification or
changes to the design.

1.4.2.11 IPC-OI-645

Title: Standard for Visual Optical Inspection Aids

Abstract: This standard establishes the requirements, definitions, and certification provisions for optical inspection aids,
and defines inspection grades for inspection using magnification.

1.4.2.12 IPC-TM-650

Title: Test Methods Manual

Abstract: This manual contains information on various test methods for printed boards, hybrid circuits, discrete wiring,
and flat cable. These methods can be utilized by test laboratories, manufacturers, and users of these products.
This document also provides an organized reference source of test methods that can be utilized by the Technical Commit-
tees of the IPC as they develop new standards and specifications. The following test methods are referenced in this
document.
2.3.25 Detection and Measurement of Ionizable Surface Contaminants by Resistivity of Solvent Extract
2.3.25.1 Ionic Cleanliness Testing of Bare PWBs
2.3.26 Ionizable Detection of Surface Contaminants (Dynamic Method)
2.3.26.1 Ionizable Detection of Surface Contaminants (Static Method)
2.3.27 Cleanliness Test - Residual Rosin
2.3.27.1 Rosin Flux Residue Analysis-HPLC Method
2.3.28 Ionic Analysis of Circuit Boards, Ion Chromatography Method
2.3.38 Surface Organic Contaminant Detection Test
2.3.39 Surface Organic Contaminant Identification Test (Infrared Analytical Method)
2.4.37.2 Evaluation of Hand Soldering Tools on Heavy Thermal Loads
2.6.1.1 Fungus Resistance - Encapsulation
2.6.3 Moisture and Insulation Resistance, Printed Boards
2.6.3.1 Moisture and Insulation Resistance-Polymeric Solder Masks and Encapsulation
2.6.7.1 Thermal Shock - Encapsulation
2.6.9.1 Test to Determine Sensitivity of Electronic Assemblies to Ultrasonic Energy
2.6.9.2 Test to Determine Sensitivity of Electronic Components to Ultrasonic Energy
2.6.11.1 Hydrolytic Stability - Encapsulation

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1.4.2.13 IPC-CM-770

Title: Guidelines for Printed Board Component Mounting

Abstract: This document contains a review of some pertinent design criteria, impacts, and issues, covers preparation of
components for assembly to printed boards, techniques of general interest for assembly (both manual and machines), and
discusses considerations of, and impacts upon, subsequent soldering, cleaning, and coating processes. The information in the
document consists of compiled data representing commercial and industrial applications.

1.4.2.14 IPC-SM-780

Title: Component Packaging and Interconnecting with Emphasis on Surface Mounting

Abstract: This document provides guidelines for the surface mounting of electronic parts on printed boards and for the
intermixing of surface mount and through-the-board components. It includes types of materials, interconnection substrates,
land pattern designs, solder-joint configurations, rework, and repair. The intent is to aid in designing a producible product
by providing information on processing and on various types of substrates and joining materials. The substrate’s physical
and electrical characteristics and their compatibility for surface mounting are discussed.

1.4.2.15 IPC-SM-784

Title: Guidelines for Chip-on-Board Technology Implementation

Abstract: This document provides guidelines for the use of Chip-on-Board (COB) Technology including:
• Design Guidelines
• Manufacturing Information
• Assembly Guidelines
• Testing Guidelines
• Bibliographic References

1.4.2.16 IPC-SM-785

Title: Guidelines for Accelerated Reliability Testing of Surface Mount Solder Attachments
Abstract: This document provides guidelines for the accelerated reliability testing of surface mount solder joint attach-
ments. Particular attention is given to evaluating and extrapolating the results of these tests towards actual use environments
for electronic assemblies. The intent is to:
• Allow comparison of results from different test programs.
• Provide technical understanding of design for adequate reliability.
• Permit analytic predictions of reliability based on the use of a generic database and associated technical understanding.
• Reduce cost and avoid time-consuming testing of every design iteration.
• Establish practical alternatives to long duration tests for products that are subject to severe use environments or with low
failure tolerances.

1.4.2.17 IPC-S-816

Title: SMT Process Guidelines and Checklist

Abstract: This document provides guidelines and troubleshooting for surface mount attachment of components. Each sec-
tion includes a list of common problems observed during a specific part of the surface mount assembly process. The list of
observed symptoms is matched by a description of possible causes and suggestions for corrective action. These suggestions
may be related to the equipment, materials, or design so some may not be applicable to the shop floor.

1.4.2.18 IPC-SM-817

Title: General Requirements for Dielectric Surface Mounting Adhesives

Abstract: This document defines dielectric surface mount adhesives through the specification of test methods and inspec-
tion criteria. Particular attention is given to adhesives that are applied by pin transfer, syringe, or screening/stenciling. Cur-
ing methods covered include ultraviolet (UV) light, visible light, heat, or ambient conditions.

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1.4.2.19 IPC-CC-830

Title: Qualification and Performance of Electrical Insulating Compound for Printed Board Assemblies
Abstract: This standard establishes qualification and conformance requirements for conformal coatings. It has been
designed to provide maximum confidence in the materials with minimum test redundancy and covers:
• The qualification and qualification retention of the conformal coating material.
• The quality conformance of conformal coating material properties.

1.4.2.20 IPC-HDBK-830

Title: Guidelines for Design, Selection and Application of Conformal Coatings

Abstract: The purpose of this handbook is to assist the individuals who either make choices regarding conformal coating
or who work in coating operations.

1.4.2.21 IPC-SM-839

Title: Pre and Post Solder Mask Application Cleaning Guidelines

Abstract: This document covers all aspects of cleaning processes associated with the application of a permanent polymer
coating (solder mask) to printed boards. This includes maintaining cleanliness of coated boards during the storage and han-
dling prior to component assembly and during the coating application and cure processes. It also covers cleanliness that is
consistent with the end-product application.

1.4.2.22 IPC-SM-840

Title: Qualification and Performance of Permanent Polymer Solder Mask

Department of Defense (DoD) Adoption: Yes
Abstract: This standard is intended to provide the user with the maximum information about and confidence in the solder
mask material under evaluation with the minimum of test redundancy. It covers:
• The evaluation and conformance of permanent polymer coatings (solder masks) and material properties.
• The qualification of the solder mask with the standard IPC-B-25 test board.
• The qualification assessment of the solder mask/production board system.
• The quality conformance of the solder mask/production board system.

1.4.2.23 IPC-1601

Title: Printed Board Handling and Storage Guidelines

Abstract: This document provides suggestions for proper handling, packaging materials and methods, environmental con-
ditions, and storage for printed boards. These guidelines are intended to protect printed boards from contamination, physi-
cal damage, solderability degradation, electrostatic discharge (ESD) (when necessary), and moisture uptake.

1.4.2.24 IPC-2221

Title: Generic Standard on Printed Board Design

Department of Defense (DoD) Adoption: Yes
Abstract: This standard covers generic requirements for printed board design. All aspects and details of the design
requirements are addressed, to the extent that they can be applied to the broad spectrum of designs, including organic or
inorganic board materials in combination with inorganic metal, glass, ceramic, etc. The decision on the choice of product
type should be made as early as possible. Once a component mounting and interconnecting technology has been selected,
the user should obtain the sectional document (described below) that provides the specific focus on the chosen technology.

1.4.2.25 IPC-2222

Title: Sectional Design Standard for Rigid Organic Printed Boards

Department of Defense (DoD) Adoption: Yes

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Abstract: This standard establishes the specific requirements for the design of rigid organic printed boards and other forms
of component mounting and interconnecting structures. The organic materials may be homogeneous, reinforced, or used in
combination with inorganic materials. The interconnections may be single, double, or multilayered.

1.4.2.26 IPC-2223

Title: Sectional Design Standard for Flexible Printed Boards

Department of Defense (DoD) Adoption: Yes
Abstract: This standard establishes the specific requirements for the design of flexible printed circuit applications, includ-
ing forms of component mounting and interconnecting structures. The flexible materials used in these structures include
insulating films (reinforced or non-reinforced dielectric) in combination with metallic layers. These interconnecting boards
may contain single, double, multilayer, or multiple conductive layers and can be composed wholly of flex or a combination
of flex and rigid.

1.4.2.27 IPC-6012

Title: Qualification and Performance Specification for Rigid Printed Boards

Abstract: This specification establishes and defines the qualification and performance requirements for the fabrication of
rigid printed boards.

1.4.2.28 IPC-7093

Title: Design and Assembly Process Implementation for Bottom Termination Components
Abstract: This document describes the design and assembly challenges for implementing bottom termination surface
mount components (BTCs), whose external connections consist of metallized terminations that are an integral part of the
component body. These include components designated in industry as DFN (Dual Flat No-lead), QFN (Quad Flat No-Lead
package), LGA (Land Grid Array), SON (Small Outline No-Lead - leads on two sides), PQFN (Plastic Quad Flat No-Lead),
MLFP (Micro Leadframe Plastic Package), and MLP (Micro Leadframe Package) which utilize surface-to-surface intercon-
nections without solder balls. The focus is on critical design, assembly, inspection, repair, and reliability issues associated
with BTCs.

1.4.2.29 IPC-7094

Title: Design and Assembly Process Implementation For Flip Chip and Die Size Components
Abstract: This document describes the design and assembly challenges for implementing flip chip technology in a direct
chip attach (DCA) assembly. The effect of bare die or die size components in a flip chip format has an impact on current
component characteristics and dictates the appropriate assembly methodology. The focus is on design, assembly methodol-
ogy, critical inspection, repair, and reliability issues associated with flip chip and die size package technologies (including
wafer level BGA).

1.4.2.30 IPC-7095

Title: Design and Assembly Process Implementation for BGAs

Abstract: This document describes the design and assembly challenges for implementing Ball Grid Array (BGA) and Fine
Pitch BGA (FBGA) technology. The effect of BGA and FBGA on current technology and component types are addressed,
as is the move to lead-free assembly processes. The focus is on critical inspection, repair, and reliability issues associated
with BGAs.

1.4.2.31 IPC-7711/7721

Title: Rework of Electronic Assemblies/Repair and Modification of Printed Boards and Electronic Assemblies
Abstract: This document prescribes the procedural requirements, tools, materials and methods to be used in the modifica-
tion, rework, repair, overhaul or restoration of electronic products. Although this document is based in large part on the
Product Class definitions used in IPC documents such as J-STD-001 or IPC-A-610, this document should be considered
applicable to any type of electronic equipment.

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IPC has identified the most common equipment and process in order to make a specific repair or rework. It is possible that
alternate equipment and processes can be used to make the same repair. If alternate equipment is used, it is up to the user
to determine that the resultant assembly is good and undamaged.

1.4.2.32 IPC-9191

Title: General Guidelines for Implementation of Statistical Process Control (SPC)

Abstract: This document describes the general requirements for the implementation of Statistical Process Control (SPC).
It is intended for use by individuals in electronics and other industries that are involved in the planning, implementation,
and evaluation of an SPC system. It outlines SPC philosophy and different implementation strategies, tools, and techniques
that may be applied depending on end-product requirements.

1.4.3 United States Government Documents3 The United States Government develops design, fabrication, assembly and
testing standards and specifications for a wide range of electrical and electronic products and materials. These consist basi-
cally of Department of Defense (Military) and Federal documents.
Military documents are identified by a ‘‘MIL-’’ or ‘‘DOD-’’ prefix. The ‘‘DOD’’ prefix usually indicates that the document
primarily uses metric units. Federal documents are identified by a multiple letter prefix, e.g., ‘‘QQ-.’’
If the document is a specification, the prefix is followed by a letter that is representative of the subject of the document, e.g.,
‘‘C-’’ for a ‘‘Connector’’ specification. The prefix is followed by ‘‘STD-’’ if the document is a standard.

1.4.3.1 MIL-STD-202

Title: Test Method Standard Electronic and Electrical Component Parts

Abstract: This standard establishes uniform methods for testing electronic and electrical component parts and assemblies,
including basic environmental tests to determine resistance to deleterious effects of natural elements and conditions sur-
rounding military operations, and physical and electrical tests. For the purpose of this standard, the term ‘‘component parts’’
includes such items as capacitors, resistors, switches, relays, transformers, and jacks.
This standard is intended to apply only to small parts, such as transformers and inductors, weighing up to 300 pounds, or
having a root mean square test voltage up to 50,000 volts, unless otherwise specifically invoked.

1.4.3.2 AMS-QQ-N-290

Title: Nickel Plating (Electrodeposited)

Abstract: This specification covers the requirements for electrodeposited nickel plating on steel, copper and copper alloys,
and zinc and zinc alloys, but usage is not limited to such applications. It covers 2 classes:
Class 1 - Corrosion protective plating
Class 2 - Engineering plating
The Class 1 plating can be further classified into plating thicknesses that range from 0.0002 inches to 0.0016 inches.

1.4.3.3 MIL-HDBK-454

Title: General Guidelines for Electronic Equipment

Abstract: This handbook is the technical baseline for the design and construction of electronic equipment for the Depart-
ment of Defense. It captures in one document, under suitable subject headings, fundamental design guidelines for multiple
general electronic specifications.
The opportunity to focus on a single document, afforded to contractors, results in substantial savings to the Government.
This handbook was prepared by and is regularly updated through the cooperative efforts of Government and industry.

1.4.3.4 MIL-A-1130

Title: Connections, Electrical, Solderless, Wrapped

3. https://assist.daps.dla.mil/quicksearch/

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Abstract: This standard establishes the requirements to produce mechanically and electrically stable, solderless wrapped,
electrical connections made with single, solid, round wire and appropriately designed wrap posts (terminals).

1.4.3.5 MIL-STD-1686

Title: Electrostatic Discharge Control Program for Protection of Electrical and Electronic Parts, Assemblies and Equipment
Abstract: This standard covers the requirements for an Electrostatic Discharge (ESD) control program for electrical and
electronic parts, assemblies, and equipment containing these parts, excluding electrically-initiated explosive devices.
‘‘Parts,’’ as used herein, applies to electrical and electronic parts. ‘‘Assemblies,’’ as used in the document, applies to subas-
semblies and all higher assemblies up to but not including the equipment level.
This standard covers ESD sensitive (ESDS) items, design criteria, protected work areas, handling procedures, training,
marking of documentation and hardware, intra-plant protective covering, packaging for delivery, installations, quality assur-
ance provisions, audits and reviews.

1.4.3.6 MIL-A-28870

Title: Assemblies, Electrical Backplane, Printed Wiring, General Specification for

Abstract: This specification covers the general requirements for printed wiring electrical backplane assemblies consisting
of rigid printed wiring boards on which separately manufactured component parts have been added.

1.4.4 American Society of Mechanical Engineers4 ASME codes and standards, publications, conferences, continuing
education and professional development programs provide a foundation for advancing technical knowledge.

1.4.4.1 ASME Y14.5-2009

Title: Dimensioning and Tolerance Standard

Department of Defense (DoD) Adoption: Yes
Abstract: This standard covers dimensioning, tolerancing, and related practices for use on engineering drawings and in
related documents. It also establishes uniform practices for stating and interpreting these requirements.

1.4.5 ASTM International5 ASTM International, formerly known as the American Society for Testing and Materials
(ASTM), is a globally recognized leader in the development and delivery of international voluntary consensus standards.
Today, some 12,000 ASTM standards are used around the world to improve product quality, enhance safety, facilitate mar-
ket access and trade, and build consumer confidence.
The following ASTMs are referenced in this document:
1875-00 D-1458
B193-02 D-2196
B-488 D-2214
B-579 D-2240
C-408 D-2556
D-149 D-3359
D-150 D-3418
D-257 D-3482
D-570 D-3833
D-571 D-4065
D-595 E92-82(2003)e2
D-635 E-96
D-638 E-595
D-709 E794-06
D-751 E831-06
D-1002 F1249

4. www.asme.org
5. www.astm.org

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1.4.6 SAE International6 SAE International is a global association of more than 128,000 engineers and related technical
experts in the aerospace, automotive and commercial-vehicle industries. SAE International’s core competencies are life-long
learning and voluntary consensus standards development. SAE International’s charitable arm is the SAE Foundation, which
supports many programs, including A World in Motion and the Collegiate Design Series.

1.4.6.1 SAE AS5553

Title: Counterfeit Electronic Parts; Avoidance, Detection, Mitigation, and Disposition

Abstract: This document is intended for use in aviation, space, defense, and other high performance/reliability electronic
equipment applications. This standard is recommended for use by all contracting organizations that procure electronic parts,
whether such parts are procured directly or integrated into electronic assemblies or equipment. The requirements of this
standard are generic and intended to be applied/flowed down to all organizations that procure electronic parts, regardless of
type, size, and product provided.

1.4.6.2 SAE AS6174

Title: Counterfeit Materiel; Detection, Mitigation, and Disposition

Abstract: This SAE Standard standardizes practices to: a) maximize availability of authentic materiel (made from the
proper materials using the proper processes with required testing), b) procure materiel from reliable sources, c) assure
authenticity and conformance of procured materiel, d) control materiel identified as counterfeit and e) report counterfeit
materiel to other potential users and government investigative authorities.

1.4.7 Federal Aviation Regulations (FARs)7

1.4.7.1 FAR §25.853 and Appendix F

Title: Flammability Requirements for Seat Cushions

1.4.8 Underwriters Laboratories8

1.4.8.1 UL94 Tests for Flammability of Plastic Materials for Parts in Devices and Appliances

1.4.8.2 UL746C Polymeric Materials - Use in Electrical Equipment Evaluations

1.4.9 IEC Standards9

1.4.9.1 IEC 60664

Title: Insulation coordination for equipment within low-voltage systems

Abstract: This standard applies to assemblies protected against pollution by the use of coating, potting or molding, thus
allowing a reduction of clearance and creepage distances as described in Part 1 or Part 5.

1.4.9.2 IEC 61086

Title: Coatings for loaded Printed Wire boards (Conformal Coatings)

Abstract: Gives the definitions, classification and general requirements for electrical insulating materials suitable for
application as coatings for loaded printed wire boards (conformal coatings).

1.4.10 Independent Distributors of Electronics Association (IDEA)10

1.4.10.1 IDEA-QMS-9090

Title: Quality Management System

6. www.sae.org
7. www.faa.gov
8. www.ul.com
9. www.iec.ch
10. www.idofea.org

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Abstract: This document layers on top of ISO 9001, AS9120 and ANSI/ESD S20.20 certification, with specific compo-
nents talking about supplier selection, inventory posting, customer provision and the inspection protocol.

1.4.11 Electrostatic Discharge Association11 ESD Association standards and specifications provide the guidance com-
panies need to get their ESD Control Programs off and running.

1.4.11.1 ANSI/ESD S20.20

Title: Protection of Electrical and Electronic Parts, Assemblies and Equipment (Excluding Electrically Initiated Explosive
Devices)
Abstract: This standard provides administrative and technical requirements for establishing, implementing, and maintain-
ing an ESD Control Program to protect electrical or electronic parts, assemblies, and equipment susceptible to ESD dam-
age from Human Body Model (HBM) discharges greater than or equal to 100 volts.

2 HANDLING ELECTRONIC ASSEMBLIES

It is important that electronic assemblies are properly handled during all operations from incoming inspection of component
parts to final delivery of product.
Proper handling is required to prevent damage due to:
1. Electrostatic discharge
2. High temperatures experienced during reflow
3. To non-hermitically sealed components that are not maintained in a moisture free environment or otherwise baked prior
to reflow soldering.
Improper handling can also introduce contamination that may prevent formation of acceptable solder connections. This sec-
tion addresses the more common issues pertaining to handling of electronic assemblies.

The following topics are addressed in this section of the handbook:

2.1 Definitions

2.1.1 Electrostatic Discharge (ESD) Electrostatic Discharge (ESD) is the rapid discharge of electrical energy that was
created from static sources.
When the electrical energy is allowed to come in contact with or even close to a sensitive component it can cause damage
to the component.

2.1.2 Electrostatic Discharge Sensitive Components (ESDS) Electrostatic Discharge Sensitive (ESDS) components are
those components that are affected by high energy surges. The relative sensitivity of a component to ESD is dependent upon
its construction and materials. As components become smaller and operate faster, the sensitivity increases.

2.1.3 Electrical Overstress (EOS) Electrical Overstress (EOS) is the internal result of an unwanted application of electri-
cal energy that results in damaged components. This damage can be from many different sources, such as electrically pow-
ered process equipment or ESD occurring during handling or processing.

2.2 Handling of ESDS Items (Components and/or Assemblies) When components or boards are removed from their pro-
tective wrappings, handle them with great care. Touch only the edges away from any edge connector tabs. Where a firm grip
on the board is required due to any mechanical assembly procedure, gloves should be worn. Any gloves used should meet
EOS/ESD requirements. These principles are especially critical when no-clean processes are employed.
ESDS components can fail to operate or change in value as a result of improper handling or processing. These failures can
be immediate or latent. The result of immediate failure can be additional testing and rework or scrap. However the conse-
quences of latent failure are the most serious. Even though the product may have passed inspection and functional test, it
may fail after it has been delivered to the customer.

11. www.esda.org

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Even if no ESDS markings are on an assembly, it still should be handled as if it were an ESDS assembly. Normally, ESDS
components and electronic assemblies are identified by suitable EOS/ESD labels or marking. Some components may be
marked with one or more triangles to designate the level of sensitivity to EOS. Many sensitive assemblies will also be
marked on the assembly itself.
To prevent ESD and EOS damage to sensitive components all handling, unpacking, assembly and testing is performed at a
static controlled work station. The manufacturer should implement and maintain an ESD Control Program to a recognized
methodology such as ANSI/ESD S20.20. (This document is also invoked in J-STD-001.)
It’s important to build protection for ESDS components into circuit designs and packaging. However, in the manufacturing
and assembly areas, we often work with unprotected electronic assemblies that are attached to the ESDS components. The
following paragraphs are dedicated to safe handling of these unprotected electronic assemblies.

2.2.1 Electrical Overstress (EOS) Damage Prevention Electrical components can be damaged by unwanted electrical
energy from many different sources. This unwanted electrical energy can be the result of ESD potentials or the result of
electrical spikes caused by the tools we work with, such as soldering irons, soldering extractors, testing instruments, or other
electrically operated process equipment. Some devices are more sensitive than others. The degree of sensitivity is a func-
tion of the design of the device. Generally speaking higher speed and smaller devices are more susceptible than their slower,
larger predecessors. The purpose or family of the device also plays an important part in component sensitivity. This is
because the design of the component can allow it to react to smaller electrical sources or wider frequency ranges. With
today’s products in mind, we can see that EOS is a more serious problem than it was even a few years ago. It will be even
more critical in the future.
When considering the susceptibility of the product we should keep in mind the susceptibility of the most sensitive compo-
nent in the assembly. Applied unwanted electrical energy can be processed or conducted just as an applied signal would be
during circuit performance.
Before handling or processing sensitive components, tools and equipment should be tested to ensure that they do not gen-
erate damaging energy including spike voltages. Current research indicates that voltages and spikes less than 0.5 volts are
acceptable. However, an increasing number of extremely sensitive components require that soldering irons, solder extrac-
tors, test instruments, and other equipment not generate spikes greater than 0.3 volts.
Periodic testing may be warranted to preclude damage as equipment performance may degrade with use over time (See
ANSI/ESD S20.20). Maintenance programs should be established for process equipment to ensure the continued ability to
not cause EOS damage. EOS damage is certainly similar in nature to ESD damage, since damage is the result of undesir-
able electrical energy.

2.2.2 Electrostatic Discharge (ESD) Damage Prevention The best ESD damage prevention is a combination of prevent-
ing static charges and eliminating static charges if they do occur. All ESD protection techniques and products address one
or both of the two issues.
ESD damage is the result of electrical energy that was generated from static sources either being applied or in close prox-
imity to ESDS devices. Static sources are all around us. The degree of static generated is relative to the characteristics of
the source. To generate energy relative motion is required. This could be contacting, separation, or rubbing of the material.
Most of the serious offenders are insulators since they concentrate energy where it was generated or applied rather than
allowing it to spread across the surface of the material.
Common materials such as plastic bags or Styrofoam containers are serious static generators and should not be allowed in
processing areas especially static safe areas. Peeling adhesive tape from a roll can generate 20,000 volts. Even compressed
air nozzles which move air over insulating surfaces generate charges.
Table 2-1 identifies typical static charge sources.
Destructive static charges are often induced on nearby conductors, such as human skin, and discharged into conductors. This
can happen when a printed board assembly is touched by a person having a static charge potential. The electronic assem-
bly can be damaged as the discharge passes through the conductive pattern to a static sensitive component. Static discharges
may be too low to be felt by humans (less than 3500 volts), and still damage ESDS components. Typical static voltage gen-
eration is included in Table 2-2.

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Table 2-1 Typical Static Charge Sources

Work surfaces Waxed, painted or varnished surfaces; untreated vinyl and plastics; glass
Floors Sealed concrete; waxed or finished wood; floor tile and carpeting
Clothes and personnel Non-ESD smocks; synthetic materials; non-ESD shoes; hair
Chairs Finished wood; vinyl fiberglass; non-conductive wheels
Packaging and handling Plastic bags, wraps, envelopes; bubble-wrap, foam; Styrofoam; non-ESD totes, trays, boxes,
materials parts bins
Assembly tools and materials Pressure sprays; compressed air; synthetic brushes; heat guns, blowers; copiers, printers

Table 2-2 Typical Static Voltage Generation

Source 10-20% Humidity 65-90% Humidity
Walking on carpet 35,000 volts 1,500 volts
Walking on vinyl flooring 12,000 volts 250 volts
Worker at a bench 6,000 volts 100 volts
Vinyl envelopes (Work Instructions) 7,000 volts 600 volts
Plastic bag picked up from the bench 20,000 volts 1,200 volts
Work chair with foam pad 18,000 volts 1,500 volts

2.3 Physical Handling Care should be taken during all operations (e.g., manufacturing, inspection, testing) to ensure
product integrity at all times. Table 2-3 provides general guidance. Improper handling can readily damage components and
assemblies (e.g., cracked, chipped, or broken components and connectors, bent or broken terminals, badly scratched board
surfaces, and conductor lands). Physical damage of this type can ruin the entire assembly or attached components.
Table 2-3 General Rules for Handling Electronic Assemblies
1 Keep work stations clean and neat. There should not be any eating, drinking, or use of tobacco products in the work area.
2 Minimize the handling of electronic assemblies and components to prevent damage.
3 When gloves are used, they should be changed as frequently as necessary to prevent contamination from dirty gloves.
4 Solderable surfaces should not be handled with bare hands or fingers. Body oils and salts reduce solderability, promote
corrosion and dendritic growth. They can also cause poor adhesion of subsequent coatings or encapsulates.
5 Hand creams or lotions containing silicone should be avoided since they can cause solderability and conformal coating
adhesion problems.
6 Never stack electronic assemblies on each other or physical damage may occur. Special racks should be provided in
assembly areas for temporary storage.
7 Always assume the items are ESDS even if they are not marked.
8 Personnel should be trained and follow appropriate ESD practices and procedures.
9 Never transport ESDS devices unless proper packaging is applied.

2.3.1 Handling after Soldering After soldering and cleaning operations, the handling of electronic assemblies still requires
great care. Finger prints are extremely hard to remove and will often show up in conformally coated boards after humidity
or environmental testing. Gloves or other protective handling devices should be used to prevent such contamination. Use
mechanical racking or baskets with full ESD protection when handling during cleaning operations.

2.4 Contamination Contamination by handling with bare hands or fingers without some form of protection causes solder-
ing and coating problems; body salts and oils, and unauthorized hand creams are typical contaminants. Body oils and acids
reduce solderability and promote corrosion and dendritic growth. They can also cause poor adhesion of subsequent coatings
or encapsulates. Normal cleaning procedures will not always remove such contaminants. Lotion formulated specifically for
use in solder assembly areas is available. The best solution is to prevent contamination.

2.5 Processing Moisture Sensitive Components The acronym MSD stands for moisture sensitive devices. These devices
include everything from the bare PCB to the components placed on them.
Some PCB laminates and many plastic bodied components absorb moisture. This absorption of moisture can create defects
during the solder reflow process. In the reflow process, when heat is applied to the board and components, pressure from
the entrapped moisture builds up. This pressure can cause damage to the bare PCB in the form of delamination. For parts
that are sealed, it can cause delamination to the packaging materials of the part or delamination of the lead frame from the

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internal die substrate. It can also cause internal cracks that do not extend to the outside of the package, bond damage, wire
necking, bond lifting, die lifting, thin film cracking, and/or cratering beneath the bonds.
To prevent damage from moisture exposure bare PCBs should not be left to sit in the open ambient air for and extended
amount of time. They should be placed in a nitrogen environment/dry cabinet or used within a limited period of time after
being removed from a vacuum bag. If the level of moisture is unknown, bare PCB cards should be slow baked to remove
any moisture from them. Polyimide laminate boards are particularly susceptible to moisture absorption. For more recom-
mendations on baking of substrates refer to IPC-1601 - Printed Board Handling and Storage Guidelines.
Plastic components are in the same situation. J-STD-020 discusses the Moisture/Reflow sensitivity classification for Non-
hermetic solid state devices and the process of baking. J-STD-033 discusses the handling, packing, and shipping of mois-
ture sensitive SMD parts. Moisture sensitive components (as classified by IPC/JEDEC J-STD-020 or other documented
classification procedure) should be handled in a manner consistent with IPC/JEDEC J-STD-033 or other documented pro-
cedure to prevent this component damage.
Certain new technology components such as ‘‘flip-chip’’ field programmable gate arrays (FPGA) with Ball Grid Array
(BGA) terminations may have been manufactured with built-in vents. The purpose of these vents is to allow for escape of
gasses or moisture during the FPGA manufacturing process. However, these vents can also allow the entry of cleaning sol-
vents and/or de-ionized water during the post reflow soldering process.
Lessons learned have shown that the entrapped cleaning solvents and/or DI water have resulted in corrosion of components
within the FPGA (e.g., by-pass capacitor). This corrosion has caused open or short circuits of the by-pass capacitor and
depending on the failure mode, it may cause operational failure of the FPGA.
The assembly manufacturer should take appropriate precautions for any ‘‘vented’’ component to ensure the cleaning process
does not cause damage to the component.

2.6 Classification of Non-IC Electronic Components for Assembly Processes (ECA/IPC/JEDEC J-STD-075) Paragraph
2.5 above addressed process controls for dealing with moisture sensitive semiconductors. However, there are other types of
components such as, but not limited to, capacitors that can be damaged when subjected to the higher temperatures that occur
during soldering processes. The J-STD-075 document outlines a process to classify and label a non-semiconductor compo-
nent’s Process Sensitivity Level (PSL) and Moisture Sensitivity Level (MSL) consistent with the semiconductor industry’s
classification levels (See 2.5). The specification does not establish re-work conditions.
The purpose of J-STD-075 is to establish an agreed set of worst case solder process limits (SnPb and Pb-free) which can
safely be used for assembling non-semiconductor electronic components on common substrates (e.g., FR4, ceramic, poly-
imide, etc.) along with documenting unique community specific exceptions. The document process conditions are used to
evaluate a non-semiconductor component’s PSL and MSL. It is important for all users of J-STD-075 to be highly familiar
with the document’s information and processes to insure optimal product quality and reliability.
Figure 2-1 describes the J-STD-075 process for classifying non-semiconductor devices.

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February 2012 IPC-AJ-820A

Start

A
Classify PSL, MSL and solder
process compatibility.

Component meets base No Review J-STD-075 commodity base

solder process conditions? solder process exception listings.

Yes

Yes Component meets a specific

J-STD-075 solder process
exception condition?

No

Determine component unique solder process

exception condition and document.

Evaluate component MSL per J-STD-020 using the

base or exception solder process conditions as applicable.

Evaluate and determine any other unique component solder

process compatibility issues, e.g., cleaning, etc., and document.
Use the Standard Improvement Form in J-STD-075 to request update or
addition to the commodity exception listings at the next document revision.

Document component PSL, MSL and other unique

solder process compatibility issues to users.
Label per J-STD-075.
Label MSL and pack per J-STD-033.

No action No Component, J-STD-075 or Yes

required. J-STD-020 changes?
A

IPC-820a-02-01

Figure 2-1 J-STD-075 Process Flow Diagram

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Table 2-4 describes the J-STD-075 Wave Solder PSL Classification.

Table 2-4 Wave Solder PSL Classification
PSL Classification Is the component process sensitive? Classification Temp (Tc)
W0 No –
275 °C (User maximum
W1 Yes1
and Supplier Minimum)
W2 Yes1 270 °C
W3 Yes1 265 °C
W4 Yes1 260 °C
1
W5 Yes 255 °C
W6 Yes1 250 °C
1
W7 Yes 245 °C
W8 Yes1 240 °C
1,2
W9 Yes –
Note 1: See Table 5-3 (J-STD-075) if a 3rd PSL character is specified.
Note 2: The component has been determined to be process sensitive but this standard does not specify the process sensitivity exceptions. The Supplier should
be contacted for recommended solder process conditions.

Table 2-5 describes the J-STD-075 Reflow Solder PSL Classification.

Table 2-5 Reflow Solder PSL Classification
PSL Classification Is the component process sensitive? Classification Temp (Tc)
R0 No –
1
R1 Yes N/A
R2 Yes1 N/A
1
R3 Yes N/A
1 260 °C (User maximum
R4 Yes
and Supplier Minimum)
R5 Yes1 255 °C
R6 Yes1 250 °C
1
R7 Yes 245 °C
R8 Yes1 240 °C
1,2
R9 Yes –
Note 1: See Table 5-3 (J-STD-075) if a 3rd PSL character is specified.
Note 2: The component has been determined to be process sensitive but this standard does not specify the process sensitivity exceptions. The Supplier should
be contacted for recommended solder process conditions.

Table 2-6 defines the limitations indicated by the optional PSL 3rd character. There are also several other process limitations
that are important to certain types of components such as preheat limitation, thermal spike limitation, time in wave limita-
tion, ramp down rate limitation, etc. These are described using the 3rd character of the PSL description as noted in Table
2-6.
The standard also includes various tables that describe the recommended process parameters for soldering specific types of
non-semiconductor components.

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Table 2-6 PSL 3rd Character

PSL 3rd
Character Definition
(Blank) Component has no additional process limitations beyond the Classification Temperatures listed in Tables 5-1 or 5-2.
A Component has a Thermal Spike limitation.
C Component has a Preheat limitation.
E Component has a Time in Wave limitation.
F Component has a Time (tL) Above 217 °C liquidus temperature (TL) limitation.
G Component has a Time Within 5 °C of Tc limitation.
H Component has a Ramp Down Rate limitation.
J Component has a Number of Passes / Reflows limitation.
K Component has a Flux limitation.
M Component has a Cleaning limitation.
N Component has limitations: C; F; G and J.
P Component has limitations: C; F; G and H.
R Component has limitations C; F and G.
Component has additional limitations but the combination has not been assigned a code. Details of these unique
Y
limitations will need to be obtained from the Supplier.

3 DESIGN CONSIDERATIONS
This Section of the Assembly and Joining Handbook provides general assembly and joining information that pertains to the
design of printed circuit assemblies (PCA).

3.1 Background and Theory In most of today’s companies there is no coordination in the advancement of technology
throughout the different disciplines and departments. Even the most sophisticated automated soldering system available can-
not cope with PCAs that have been designed without an input from a manufacturing engineer on how to best utilize the
system.
Design of an efficient and integrated design team will give all disciplines the visibility needed to best utilize the equipment
and talents available within a company. A typical team will involve the Project Manager, Design Engineering, Components
Engineering, Process Engineering, Reliability, Manufacturing Engineering, Tooling Design, Quality, and Material.

3.2 Basic Considerations The mounting, attachment of components, and the assembly materials (e.g., adhesives, fluxes,
solder alloys) play important roles in the design of a PCA. These factors also affect component density and conductor rout-
ing which further impact assembly, solder joint integrity, reparability, and testing. Therefore, it is important that the design
reflect appropriate tradeoffs that recognize these and other manufacturing considerations.
The variety of components available and the complexity of the components demand that proper component layout and
placement procedures are followed to ensure economical designs for PCA production.
Parts to be mounted should meet the storage and operating conditions specified for the equipment. Parts should also main-
tain their integrity after having been subjected to the rigors of assembly processing, forming, placement, insertion, heating,
cooling, and cleaning.
As a minimum, component mounting and attachment should be based on the guidelines presented in IPC-CM-770, IPC-222x
series of Design Standards and J-STD-001 Requirements for Soldered Electrical and Electronic Assemblies.

3.2.1 End-Product Usage The success or failure of a board design depends on many interrelated considerations. As a
minimum, the impact of design on the following parameters should be considered:
a. Equipment environmental conditions, such as ambient temperature, heat generated by the components, and ventilation.
b. Maintenance philosophy during the service life of the equipment, especially with respect to component placement that
affects component accessibility.
c. Spacing between boards that might limit lead protrusions and affect the placement of brackets and hardware.

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d. Testing/fault location requirements that might affect component placement, conductor routing, connector contact alloca-
tions, etc.
e. If an assembly is designated as repairable, consideration should be given to component/circuit density and the selection
of board/conformal coating materials. In general, rework and repair criteria should be in accordance with the guidelines
of IPC-7711/7721.

3.2.2 Performance and Reliability A circuit design is measured by three factors. The first of these three factors is the
ability of the circuit to perform the functions required of it. While a great deal of evaluation can be done at the circuit level,
the ability to meet system and operational specifications is the true proof of performance acceptability. Second is the abil-
ity of the circuit to perform without interruption for the operational life of the system. The circuit reliability is measured at
the system level as Mean-Time-Between-Failures (MTBF).
Third is producibility, which is impossible to assess independent of the other two factors. Producibility is too often given a
low priority, resulting in a system which is difficult or expensive to produce. Specific manufacturing processes may further
complicate the problem of designing a producible system.
System reliability is critical. The system should be designed to meet the end item requirements, including life cycle, envi-
ronment (e.g., shock, vibration, temperature) and function. The most crucial reliability problems are plated through hole
(PTH) cracking and solder joint fatigue. Both failures can be caused by the cyclic temperature strains, induced warpage of
the printed board/packaging, and interconnecting (P&I) structure and the attached components. For components with leads,
the cyclic strains are accommodated to some degree by the compliancy for the component leads so solder joint reliability
is normally a less important issue.
Leadless components, on the other hand, are fully subjected to these cyclic strains and the reliability of their solder joints
should be carefully considered in conjunction with the other design requirements. Solder joint reliability is complicated.
While the effects of some parameters are fairly well modeled, other influences are poorly understood and so solder joint
reliability remains difficult to predict.

3.2.3 Designing for Producibility Risk management and obsolescence management of materials are areas that should also
be implemented during the design process. These can be managed using a value engineering and manufacturing affordabil-
ity approach that ensures the producibility and maintenance philosophy during the service life of the equipment.
Developmental and operational testing needs should also be identified early in the design activity. The earlier these test pro-
cesses are applied, the larger the realized benefit in terms of cost, schedule, and information gained.

3.2.3.1 Soldering and Cleaning When considering soldering and cleaning, the part materials and finishes will be driven
by the choice of soldering method and the use of lead or lead free solder. The board and component chemical resistance and
temperature ratings make these choices more critical than before. The choice of flux that is compatible with the solder
method and solder will itself determine the cleaning methods used. Final cleanliness will be determined by the end environ-
ment and in some cases the contract requirements.
When design restrictions mandate mounting components incapable of withstanding soldering temperatures, such components
should be mounted and hand soldered to the assembly as a separate operation or should be processed using localized reflow
technology.
Some components (e.g., Flip Chip Ball-Grid-Arrays, etc.) may have built-in vent holes into which cleaning solvents (e.g.,
deionized water and saponifier) can enter and cause internal capacitors in the component to corrode and ultimately fail. The
cleaning process needs to address the use of such parts. It may be necessary to mask the vent holes prior to cleaning, or
eliminate the use of a saponifier, if possible, since the saponifier can lower the surface tension of the water, as compared to
DI water alone such that the saponifier can enter the vent holes and may not be removed by the cleaning process. See Sec-
tion 11 for cleaning considerations.

3.2.3.2 Printed Circuit Board (PCB) The design of the printed circuit board is of prime consideration and has the most
effect on producibility. The type and grouping of the components will drive the soldering and placement methods. For wave
soldered assemblies the direction of the components will also affect the producibility. Board finish, e.g., tin fuse, solder fuse,
nickel plate, Organic Surface Preservative (OSP), has an effect on the way solder will wet the board. Finish will influence
solder joint appearance, the type of solder used, and long term joint reliability.

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In multilayer board design, the use of heavy ground and voltage planes can often severely hinder the soldering process by
affecting the heat dispersion throughout the board. Additionally, location of holes and vias in or near mounting lands are a
great concern. For example a via placed in a land intended to receive a Surface Mount Technology (SMT) component may
generate process results that do not conform to the requirements of IPC-A-610, and J-STD-001. Design guidelines for proper
P&I Structures can be found in the IPC-2221 series documents. Failure to consider process requirements may complicate
assembly or result in defect conditions when IPC-A-610 or J-STD-001 requirements are applied. The IPC-6010 series (e.g.,
IPC-6011, 6012, and 6013) standards and IPC-A-600 provide accept and reject criteria for unpopulated PCBs. Additionally,
MIL-PRF-31032 (with applicable detail slash sheets) may be specified by the customer, in lieu of use of the IPC documents.
As a final step in manufacturing of a PCB, solder masking is used to mitigate the amount of solder that gets placed on a
board, as well as to provide additional dielectric insulation between components and the board conductor paths. Selection
and use of solder mask is addressed in IPC-SM-840.

3.2.3.3 Component Selection The material properties and mounting method of each component should be evaluated for
compatibility with the manufacturing process. The lead finish, initial soldering process, subsequent hand soldering opera-
tions, plus exposure to cleaning chemicals constitute a major portion of the selection process after electrical consideration.
The sensitivity of parts to the environment to which they will be exposed should be considered during the manufacturing
process.

3.2.3.4 Design for Rework and Test Given the problems inherent in the manufacture and assembly of PCBs, care should
be taken in designing a PCB that may be repaired and tested without resulting damage. It is possible to design an assem-
bly that can be fabricated but not successfully reworked.

3.3 Packaged-Component Assembly Considerations The selection of an appropriate packaged-component assembly

technique should initially include the requirements of the end product equipment and subassemblies from the viewpoint of
form, fit, and function with respect to cost effectiveness, performance, and marketability issues. After characterizing the
assembly in this manner, an implementation technique should be selected and should be based on specific electrical and
mechanical functions.
Determining factors will include packaging density, assembly profile height, development time, development cost, circuit
element factors, manufacturing costs, thermal considerations, reliability, etc., and specific related implementation details,
Table 3-1.

3.3.1 Component Orientation Another consideration for manufacturing is alignment of components on a PCB. Similar
types of components should be aligned in the same orientation for ease of component placement, inspection, and soldering.
In wave soldering, proper alignment is necessary to prevent solder skips or bridging. On any printed circuit assembly where
the secondary side is wave soldered, the preferred orientation of devices on that side should be such as to optimize the
resulting solder joint quality as the assembly exits the solder wave.
Thus:
a. Components should be mounted parallel to the edges of the printed board.
b. All passive components should be mounted parallel or perpendicular to one another as shown in Figure 3-1.
c. The longer axis of SOICs and of passive components should be perpendicular to each other.
d. The long axis of passive components should be perpendicular to the direction of travel of the printed board along the
conveyor of the wave soldering machine.
e. When appropriate, the component should be mounted in such a manner as to optimize the flow of cooling air.
f. When selective wave soldering, components should be mounted with 2.54 mm [0.1 in] between Through Hole and SMT
components for fixture wall.
In addition, orienting similar components in the same direction is very desirable for automated assembly equipment because
not all machines have head rotational capability. Uniform orientation is also desirable for visual inspection. More detailed
information is available in IPC-CM-770.

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IPC-AJ-820A February 2012

Table 3-1 Integrated Circuit Packaging Technology Comparison

Leaded Leadless Area
Surface Perimeter Array
Characteristics Through Hole Mount Packages Packages Direct Deposit Bare Chip
Packaging Density low moderate good high good high
Standardization very good good good good good limited
Thermal Performance moderate good very good good good fair
Substrate Choices very good very good good good fair limited
Fab Investment low low moderate moderate moderate high
Assembly Investment high low moderate moderate moderate high
Support Investment low moderate moderate moderate high high
External Assembly Services very high high high moderate moderate limited
Maintenance Skills low moderate moderate moderate high high
Change Risk very low low low moderate moderate high
Assembly Test very easy easy moderate complex moderate complex
Documentation easy easy moderate moderate complex complex
Logistics Support field change field change field change factory only field change factory only
Component Burn-In easy easy easy easy easy impractical
Pretest very easy very easy easy easy easy impractical
Change & Repair easy easy depends easy easy difficult
Chip Availability excellent very good good good good limited
Multiple Sourcing excellent very good good good good limited
Footprint Commonality excellent very good good good good poor
Profile high high moderate moderate low low

Mounting Hole

R7

R7
R7

C106
C106 C106

CR101 R101 CR101 R101

Not recommended Acceptable Preferred

IPC-820a-03-01

Figure 3-1 Component Orientation with Respect to Boundaries and Mounting Accessibility

3.3.2 Accessibility Electronic components should be located and spaced so that the lands for each component are not
obscured by any other component, or by any other permanently installed parts. Each component should be capable of being
removed from the assembly without having to remove any other component. These guidelines do not apply to non-repairable
assemblies or to the use of bus bars.

3.3.3 Design Envelope The projection of the component, other than connectors on the board should not extend over the
edge of the printed board or interfere with board mounting. Preferably there should be a minimum of 1.5 mm [0.06 in] from
the edge of the printed board and board guide or mounting hardware. This clearance from the board edges is also recom-
mended to allow for machine conveyors and soldering and test fixtures, as shown in Figure 3-1.

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Unless otherwise detailed on the assembly drawing, the board edge should be regarded as the extreme perimeter of the
assembly, beyond which no portion of the component, other than a connector, is allowed to extend. The designer should
prescribe the perimeter with regard for maximum part body dimensions and the mounting provisions dictated by the board
and assembly documentation.

3.3.4 Clearances Spacing between noncommon conductors

should not violate specified minimum electrical clearance (3). 1 2
This is shown in Figure 3-2 as the distances between (1) & (2)
and (1) & (5). In general, uncoated conducting areas should
provide for a clearance of approximately 0.75 mm [0.03 in] as
shown in Figure 3-2, but not less than the minimum allowable
electrical conductor spacing.
4
The minimum electrical spacing should be determined based
of the worst case circuit voltage/amperage rating, and the
ambient environment (e.g., closed versus open construction). 3
This dimension should be referenced on the manufacturing
drawings. 1
5 3
IPC-820a-03-02
3.3.5 Physical Support Dependent upon weight and heat
Figure 3-2 Uncoated Printed Board Clearance
generation characteristics, components weighing less than 5 1. Metallic hardware
grams [0.18 ounces] per lead, that dissipate less than one watt, 2. Conductive pattern
and are not clamped or otherwise supported, should be 3. Specified minimum electrical clearance
4. Mounted component
mounted with the component body as close to the printed
5. Conductor
board as is practical unless otherwise specified.

3.4 Design for Automated Assembly With few exceptions, automated techniques and equipment are now available for
most component types and assemblies. This equipment ranges from dedicated devices for specific component types (radial
leaded, axial leaded, chip carriers, discrete chips, sockets, etc.) to flexible ‘‘robotic’’ equipment programmed to handle a
range of parts.
Clearance for tooling ‘‘footprints (fiducial marks)’’ should be provided. Hole tolerances for through hole components and
land size tolerances for surface mounted components are important and are generally smaller than those necessary with
manual techniques. Sequence of component assembly is of more concern with automated techniques as is clearance from
substrate edges. Layout of traces to prevent bridging as a result of clinching should be considered.
When automatic component insertion and attachment is employed, the following printed board design parameters should be
taken into consideration. These parameters are not applicable when manual assembly techniques are used.

3.4.1 Fiducial Marks A fiducial mark is a printed artwork feature that is created in the same process as the circuit artwork
for optical recognition systems. The fiducial and a circuit pattern artwork are etched in the same step. The fiducial marks
provide common datum points for all steps in the assembly process. This allows each piece of equipment used for assem-
bly to accurately locate the circuit pattern. There are two types of fiducial marks, Global and Local.
Global fiducial marks are used to locate the position of all circuit features on an individual board, and Local fiducial marks
are used to locate the position of an individual component requiring more precise placement. Common industry practice is
to use local fiducial marks for any components with <0.635 mm [<25 mil] pitch.
For additional guidance on fiducials, see IPC-2614 and IPC-7351.

3.4.2 Automated Through Hole Assembly For automatic assembly of printed boards with components whose leads pass
through the printed board, specific consideration should be given to providing allowable clearances for the insertion and
clinching of the component leads.

3.4.3 Automated Surface Mount Assembly Automatic assembly considerations for surface mounted components include
pick-and-place machines used to place or position chip components, discrete chip carriers, small outline packages, and flat
packs. Design restrictions should maintain appropriate clearances for the automatic pick-and-place equipment to position the
parts in their proper orientation and allow sufficient clearances for the placement heads.

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Special orientation symbols should be incorporated into the design to allow for ease of inspection of the assembled surface
mounted part. Techniques may include special symbols, or special land configurations to identify such characteristics as a
lead of an integrated circuit package.

3.4.4 Automated Mixed-Technology Assembly The automatic processing of assemblies that use both through hole and
surface mounted components require special design considerations in order that the components assembled during the first
phase of the process do not interfere with component placement heads during the second phase. Such component placement
should also consider the stresses that are put on the printed board with assembly equipment, by isolating parts wherever
possible to specific areas so that the second phase component placement stresses do not impact previously soldered connec-
tions.

3.5 Through Hole Assembly Through hole assembly technology is based on the use of packaged components such as
dual-inline packages (DIPs), single-inline packages (SIPs), and other leaded device configurations. As the name implies,
through hole mounted components are assembled with their leads through holes in the printed board.
Advantages – As compared to the other processing technologies, the advantages of using through hole mounting technolo-
gies include:
a. The technology is very mature.
b. There is excellent component availability.
c. Computer-aided tools are available to support design, fabrication, assembly, and testing operations.
d. End-product reliability is well established.
e. Electrical test needs are well understood.
f. There are existing assembly test procedures.
g. Rework capabilities exist. TERMINATION LEAD
ATTACHMENT
Disadvantages – Disadvantages pertain specifi-
CLINCHING LEADS STRAIGHT THROUGH LEADS
cally to:
a. Component mounting density is minimal. A F
b. End-product weight is increased.
c. Component lead count is limited (except
PLATED-THROUGH HOLE PLATED-THROUGH HOLE
with pin-grid array packages).
d. Component mounting holes minimize inter- B G
connecting conductor routing density.

3.5.1 Lead Configuration The objectives of NONPLATED-THROUGH HOLE NONPLATED-THROUGH HOLE

lead termination are to form the lead and elec- C TERMINALS
trically connect it to the conductors in such a
manner that the required circuit continuity is
DOUBLE LAPPED PLATED-
provided through the life of the equipment CLINCH CLINCH THROUGH
regardless of the environments to which the HOLE
D INTER-
assembly may be subjected. See Figure 3-3 for CONNECTION
the most frequently used methods.
Leads should be attached to unsupported CLINCHED
RIBBON LEAD LAPPED
printed board lands by clinching. Leads should
be terminated in such a manner that they do not PLANAR MOUNTED LEADS
exert a lifting force on the copper foil land or NONPLATED-THROUGH HOLE
E INTERCONNECTION
conductor. The attachment should be com-
pleted by soldering. Requirements are
RIBBON AXIAL
described in IPC-A-610. The main purpose of LEAD LEAD
lead clinching is to secure the components dur- IPC-820a-03-03
ing subsequent processing.
Figure 3-3 Lead Terminations

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Component attachment to printed boards should have the lead or terminal pass through the printed board and be soldered
to the conductor pattern on the opposite side of the printed board. Though heat maybe applied simultaneously to both sides
of the assembly, solder should be applied to only one side of the board, unless the application is Pin-in-Paste.
Each functional lead should have an associated land. There should be no more than one lead in any lead mounting hole.

3.5.1.1 Straight-Through Leads The most direct method for mounting components to the printed board is the straight
through method with un-clinched leads.
The use of straight through leads requires minimal device handling, including a straightening of the component leads and
cutting the leads to length before or after insertion.
Disadvantages – Associated with this approach are:
a. The device is subject to movement both before and during the soldering operation. This makes it difficult to control the
component height off the mounting surface. This movement can be a source of solder joint problems.
b. It is difficult to maintain a suitable clearance between the body of the component and the printed board surface for flux
removal and, when applicable, conformal coating of the assembly. This is greatly minimized when multiple lead cans with
integral standoffs are used creating a component seating plane below the surface of the can from which the leads emerge.
c. Supported holes are preferred in the printed board for the component lead holes to enhance the mechanical strength of
the solder joint. Otherwise the clearance between the component lead, the hole, and the circumscribing land must con-
sider the lead-to-hole ratio and the hole-to-land difference that would allow sufficient remaining conductor to promote
solderability.
d. The automatic insertion of the device leads in limited space can present problems.
The mounting of multi-lead component cans with plastic spacers has been used to overcome some of the disadvantages for
the more conventional straight-through lead mounting techniques. Spacers with protrusions on one side should be mounted
with the protrusions against the printed board.

Advantages – In addition to the considerations common to the straight-through mounting techniques, the mounting of com-
ponent with spacers has the advantages of:
a. A suitable-clearance between the component body and the printed board can be maintained to facilitate soldering flux
removal and conformal coating and can preclude damage to the component due to heat from the wave soldering process.
b. A bearing surface for the body is provided if the component leads are to be clinched.
c. The extension of un-clinched leads beyond the printed board surface can be more accurately controlled.
d. The height of the component body above the printed board surface can be more accurately controlled; this is especially
important when the printed board assemblies are closely spaced.
e. The spacer helps to reduce the magnitude of mechanical stresses that are transmitted to the lead/body interface seal.

3.5.1.2 Full-Clinched Leads Clinching of leads prior to soldering is commonplace, either as part of machine insertion or
following hand insertion. The substrate land configuration and spacing to adjacent lands should be considered. Clinching in
line with traces and trimming of leads before clinching is recommended where clinch direction may cause shorting to adja-
cent lands. It is preferred not to clinch all leads of a multi-leaded device, The lead is passed through-the-board and is
clinched to make contact with the land or conductor and is then soldered. The lead or terminal should make contact with
the conductor pattern before soldering.
Leads should not extend beyond the edge of their lands, however, if overlap does occur, the lead should not violate electri-
cal spacing requirements. The lead termination hole may be supported by eyelets or plated-through holes or it may be
unsupported.
Advantages – In addition to the considerations common to all straight-through mounting methods, this method has the fol-
lowing advantages:
a. A reinforced mounting hole is not required; tear drop and offset lands can be used.
Disadvantages – This method has some of the disadvantages mentioned for un-clinched straight-through mounting, in
addition:
a. Care must be taken when cutting the lead to length and forming the clinch to assure that minimum conductor clearances
are provided when the clinched lead overhangs the land.

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b. The lead clinching operation, if not controlled properly, can unduly stress the component lead-to-can body seal.
Clinched leads should be bent between 75 and 90 degrees from a vertical line perpendicular to the printed board. When
maximum mechanical retention of a lead or terminal is required by design, the lead or terminal should be clinched. The
component holes may be supported holes (plated through holes), unsupported holes (non-plated through holes), or eyeleted
holes.
Clinching requirements should be defined on the assembly drawing. The lead end should not extend beyond the edge of its
land or beyond its electrically connected conductor pattern, in violation of the minimum spacing requirements. Partial
clinching of leads for part retention should be considered under the requirements for partially-clinched lead termination.
Full-clinched lead clinching is not applicable to leads of dual-in-line packages (DIPs) or pins, other type modules, tempered
pins, or leads over 1.3 mm [0.05 in].
For printed boards with non-plated-through holes, leads should be clinched.

3.5.1.3 Partially-Clinched Leads Partially-clinched leads should be bent between 15 to 75 degrees as measured from a
vertical line perpendicular to the printed board surface. Lead length should be 1.0 ± 0.5 mm [0.04 ± 0.02 in] as measured
from the conductor surface for the plated-through hole. See Figure 3-4.
Do not clinch leads which are tempered, or are over 1.3 mm [0.05 in] in diameter.
Dual-inline package (DIP) component leads may be bent, rather than clinched, toward the termination area to retain parts
during soldering operations. It is preferred to bend only one lead outward on opposite corners of the device unless required
by the customer and/or equipment class. However, such bent leads should conform to all requirements applicable to
un-clinched straight-through leads.
Bends should be limited to 30 degrees maximum outward from the axis of the hole; see Figure 3-5, and to a maximum of
four leads per component, with not more than two leads on one side.

90°
75°
75°
15° 0° 15° 0° 0°

STRAIGHT-THROUGH PARTIAL CLINCH FULL CLINCH

CONFIGURATION CONFIGURATION CONFIGURATION
(0° TO 15°) (15° TO 75°) (75° TO 90°) IPC-820a-03-04

Figure 3-4 Clinched Through Hole Leads

Axis of Hole
30° Max. IPC-820a-03-05

Figure 3-5 Dual-Inline Package (DIP) Lead Bends

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3.5.1.4 Lead Bends and Stress Relief Lands and terminals should be located by design so that components can be
mounted or provided with stress relief bends in such a manner that the leads cannot over stress the part lead interface when
subjected to the anticipated environments of temperature, vibration, and shock. Where the lead bend radius cannot be in
accordance with Figure 3-6 in order to achieve design goals, the bends should be detailed on the assembly drawing.
The leads of components mounted horizontally with their bodies in direct contact with the printed board should be mounted
with a method that ensures that stress relief is not reduced or negated by solder in the lead bends. Leads should not be bent
at the body of the component or between the body of the component and any lead weld. The lead should extend straight
from the component body seal or lead weld before starting the bend radius as shown in Figure 3-6.
Typical stress relief bends are shown in Figure 3-7. The criteria of Figures 3-6 and 3-7 should be fully implemented to pre-
vent possible component package damage, particularly glass-bodied parts.

Straight for 1 Straight for 1

diameter, but not diameter, but not
less than 0.8 less than 0.8

R R Weld

Dia Dia

A. Standard Bend B. Welded Bend

Note: Measurement shall be made from the end of the part. The span for components mounted with a conventional
(The end of the part is defined to include any coating lead form is 7.6 mm minimum, and 33 mm maximum.
meniscus, solder seal, solder or weld bead, or any
other extension.
Max. Lead Diameter Minimum Radius (R)

Up to 0.8 0.8
From 0.8 to 1.2 1.5 diameters
Larger than 1.2 2 diameters
IPC-820a-03-06

Figure 3-6 Lead Forming and Stress Relief Lead Bends

Typical Optional Method

A B C

Plastic Cup
Spacer
material Plastic
attached Block
D to board E F IPC-820a-03-07

Figure 3-7 Component Mounting Configurations

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3.5.2 Lead/Hole Relationships The lead to hole clearance should be such as to provide for good soldering conditions.
Generally 0.25 to 0.5 mm [0.010 to 0.020 in] clearance in diameter is used. If the clearance is too small or too large,
adequate wicking of solder does not result. A minimum protrusion through the substrate is often specified. The maximum
is dependent on specific later process equipment used and end product design clearances. For rectangular leads the dimen-
sion across the diagonal should be considered as being the lead diameter.

3.5.2.1 Unsupported Holes In determining the difference between the diameter of an unsupported hole and that of the
lead to be placed in the hole, the hole should be from 0.25 to 0.5 mm [0.010 to 0.020 in] larger than the lead diameter.

3.5.2.2 Supported Holes In determining the difference between the diameter of a supported hole and that of the lead to
be placed in the hole, the hole should be from 0.25 to 0.7 mm [0.010 to 0.028 in] larger than the lead diameter.

3.5.2.3 Leads in Holes Component leads, jumper wires, and other leads should be mounted such that there is only one
lead in any one hole, except when bus bars are used. The preferred method for component leads in unsupported holes are
that they are clinched, but if installed straight through they should be required to extend a minimum of 0.5 mm [0.02 in]
and a maximum of 1.5 mm [0.06 in] from the surface of the printed board plating or foil. Component leads in plated-through
holes should be required to extend a minimum of being flush to a maximum of 1.5 mm [0.06 in] from the surface of the
printed board plating.
The straight-through leads on connectors or other devices with tempered leads should extend from 0.25 mm [0.01 in] to
2.0 mm [0.08 in], provided there is no electrical or mechanical interference.

3.5.3 Through Hole Land Patterns Land patterns for through hole mounted components should consider minimum/
maximum lead spacing requirements. Standard land spacing patterns should be established for the purpose of uniformity of
assemblies and the practical use of assembly tools and equipment. Spacing(s) should be located to accommodate automatic
assembly, ‘‘bed-of-nails’’ type or ‘‘Flying Probe’’ types of testing equipment, usually in 2.5 mm [0.100 in] increments, e.g.,
7.5, 10, 12.5 mm [0.300, 0.400, 0.500 in], etc.
Land patterns for unsupported holes should have more solderable area than supported holes for a stronger joint after solder-
ing. The optimum dimension is dependent on the device and its mounting characteristics.
The most common geometry is the round land with a centered hole. Square lands with centered holes are sometimes used
to indicate polarity for polarized components.

3.5.3.1 Axial-Lead Component Mounting Centers The leads of axial-lead components should extend approximately one
lead diameter or thickness, but not less than 0.8 mm, straight out from the body of the component. The end of the body in
this application is defined to include any coating meniscus, solder seal, solder or weld bead, or any other extension.
Thus, the minimum component center-to-center printed board lead spacing, can be represented by the equation below.
L = Bmax + 3D* + 2FA
For lead diameters up to 0.7 mm [0.027 in]; 4D for lead diameters between 0.7 mm [0.27 in] and 1.2 mm [0.048 in]; and
5D for lead diameters over 1.2 mm [0.048 in].
L = Center-to-center lead spacing
B = Body length
D = Nominal lead diameter
FA = Forming allowance (lead should not be disturbed within this distance from the body)
The value of ‘‘L’’ is usually adjusted upward to coincide with the grid used. The total length of both leads should not exceed
25 mm [1 in] in length unless this component is mechanically supported to the mounting base.
Properly formed leads on axial leaded components normally afford adequate stress relief when formed as shown in Figure
3-6. Mechanically sensitive components, such as glass diodes, may require additional stress relief and have one or more
leads formed with a stress relief loop. Whenever the possibility exists of solder wicking into the stress relief bend, usually
as a result of a small diameter component, stress relief loops or spacers should be provided as the stiffened lead defeats the
purpose of the stress relief.

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3.5.3.2 Flat-Pack Components When flat pack components

are through hole mounted they are usually terminated in a
staggered grid of plated-through holes, Figure 3-8. In these
instances, proper forming of the leads is required to prevent
stressing the lead interface with the component body. An off-
board clearance of 0.25 mm [0.01 in] minimum is generally
required for cleaning purposes.
The body of the flat pack should not cover vias unless the vias
have a protective coating. The leads should extend from the
base of the component body a minimum of one lead diameter/ IPC-820a-03-08

thickness, but not less than 0.8 mm [0.03 in] before the bend
Figure 3-8 Through Hole Flat-Pack Mounting with
begins. Staggered Plated Through Holes

3.6 Surface Mount Assembly Surface mount technology (SMT) presents distinct advantages to the manufacturer who
needs to reduce the size of the product or to increase the functionality of the product. However, without adhering to proper
design rules, this advantage is quickly lost in assembly, rework, quality assurance, and testing. Thus, the printed board
designer should work closely with engineering, manufacturing, purchasing, testing, and quality assurance. Together this
team, with a good foundation in surface-mount technology design and manufacturing techniques, can eliminate most assem-
bly problems including tomb stoning, component shifting, or component cracking during the reflow process.

3.6.1 Basic Printed Board Features In general, the basic printed board features for surface mount design are smaller than
those for through hole technology. Additionally, more vias are often used to connect layers. These vias also are smaller than
the holes used to hold component leads. Thus, for surface-mount technology the use of smaller conductors, spaces and vias
complicate the design and printed board fabrication process.
The selection of the design and positioning of the land geometry, in relation to the part, may significantly impact the sol-
der joint. The possibility of ‘‘heat thieving’’ is reduced by necking down the conductor near the soldering area. Thus, the
printed board designer should understand the capabilities and limitations of the manufacturing and assembly operation (see
IPC-7351).

3.6.2 Manufacturing Allowances The design of all land patterns should consider the manufacturing allowances; specifi-
cally those relating to conductor width and spacing. In order to have land patterns that are commensurate with reliable sol-
der joint formation, only IPC-222x series Productivity Level B and C conductor width tolerances should be used on the end
product conductor configuration.

3.6.2.1 Design for Testability It is recommended that chip carrier sites be located on a fixed grid for optimized testing.
This grid should be compatible with assembly and testing equipment, so as to minimize the amount of specialized and com-
plex equipment. In Figure 3-9 land extensions are designed such that the PCB can be electrically tested with a general pur-
pose 2.54 mm [0.100 in] grid bed-of-nails fixture.
For designs where fan-out patterns are not on 2.54 mm [0.100 in] grids, Figure 3-10, a specialized fixture would be required
for electrical testing.
Testing on the primary side of an assembly is only recommended for unpopulated PCAs. Thus, designing a chip carrier site
for primary side testing does not require dedicated through vias and permits more efficient routing. This is usually only used
with designs using blind or buried vias or where the secondary side is not accessible. Testing on a 2.54 mm [0.100 in] grid
is suitable on an ‘‘IL,’’ modified ‘‘IL,’’ or staggered fan-out pattern, Figure 3-10.
Any crystals and clocks included in the assembly may need to be disabled to improve the overall testability of the assembly.

3.6.3 SMT Land Pattern Details The IPC-7351 provides generic requirements on land pattern geometries used for the
surface attachment of electronic components, as well as surface mount design recommendations for achieving the best pos-
sible solder joints to the devices assembled. The intent of the information it presents is to provide the appropriate size, shape
and tolerance of surface mount land patterns to insure sufficient area for the appropriate solder fillet and to also allow for
inspection and testing of those solder joints. In many instances, the land pattern geometries can be slightly different based
on the type of soldering used to attach the electronic part.

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IPC-AJ-820A February 2012

0.4
[0.016]
max 0.75 [0.030]
0.75
[0.030] 5.0 0.75 [0.030]
[0.200]
0.25 [0.010]
1.75
[0.070]
Ref. 1.75 0.75
[0.070] [0.030]
Ref.

1.25
[0.050]
A. 2.5 B.
[0.100]
IPC-820a-03-09

Figure 3-9 Modified Fan-Out Lands, mm [in]

Designers should be able to use the information contained

therein to establish standard configurations not only for 2.0
manual designs but also for computer-aided design systems. [0.080]
Whether parts are mounted on one or both sides of the printed
board, subjected to wave, reflow, or other type of soldering,
the land pattern and part dimensions should be optimized to
insure proper solder joint and inspection criteria.

3.6.4 SMT Assembly Processing There are several differ-

ent ways to process surface mount assemblies. Basically, the
differences pertain to the use of SMT components on one
(single-sided) or both (double-sided) sides of the assembly,
whether there is a mixed SMT/through hole configuration, and
whether or not special components must be mounted and/or
soldered manually.

IPC-820a-03-10
3.6.4.1 SMT Substrate Preparation The use of a solder
paste (cream) is an important part of surface mount substrate Figure 3-10 Custom-Grid Fan-out Land Pattern
preparation prior to reflow soldering. The solder paste acts
partially as an adhesive before reflow and its surface tension can help to align skewed parts during soldering. It contains the
flux, solvent, suspending agent, and solder alloy that is traditionally supplied by the wave soldering machine. Therefore, the
selection of a particular solder paste involves optimizing its rheology characteristics such as viscosity, flow and spread. Sus-
ceptibility to solder ball formation and wetting characteristics must also be considered.
The solder paste is generally applied on the lands of the substrate by screening, stenciling, or syringe dispensing. The use
of stencils is preferred for high-volume applications because they are more durable, easier to align, and can be used to apply
a thicker layer of solder than the screening process. However, because they are usually more expensive than screens, the use
of stencils may not be suitable for low-volume production runs. See IPC-7525 for additional information on stencils.
Solder pre-forms (doughnuts) are sometimes used for the through hole components in mixed-technology applications to
facilitate reflow soldering (intrusive soldering, Pin-in-Paste) instead of wave soldering for these applications. The use of
preforms and reflow soldering is particularly suitable for assemblies that consist predominantly of surface mount compo-
nents. In addition, modified stencil apertures can be used to facilitate intrusive/Pin-in-Paste soldering.

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3.6.4.2 Component Preparation The requirements and considerations for mounting components over conductive patterns
apply to the surface mounting of components which have leads. Lead forming is a major design consideration and should
be described on the assembly drawing. Formed leads should provide stress relief, ensure fit to the land pattern, allow under-
body clearance for cleaning, and provide any designed-in provisions for thermal transfer (see Figure 3-11 and J-STD-001).
When flat packs are planar mounted (Figure 3-11) the leads of the flat pack should be configured as shown in Figure 3-12.
An off-board clearance of 0.27 mm [0.010 in] minimum should be maintained for cleaning purposes.

Flat Pack Lead Solder

3T Maximum
Lead Thickness (T)

Land
Laminate

Tinned Lead
Flat Pack Lead
Reflowed
Land Solder

IPC-820a-03-11

Figure 3-11 Gull Wing Flat Pack Surface Mounting

0.38 mm min. No Bend at Seal

[0.015 in]

W: Ribbon
R Lead Width
L MIN : 1 1/2W
L R MIN : 1T
T R
45° min.
90° max. IPC-820a-03-12

Figure 3-12 Flat-Pack Lead Forming for (Planar) Surface Mounting

Flat-wire ribbon leads may be attached to lands on the printed

board, see Figure 3-13. Connections made in this manner may Knee
W
include the deposition of an adhesive under the body of the
component when wave soldering is used to make the solder
connection.
One of the most significant departures from through hole tech-
nology is the need for a solder-deposition process for solder- Heel
ing only. In some instances, components with round leads may
be attached to the surface lands without first passing through
Toe
a hole. The lands should be designed with the proper shape Foot
and spacing to be compatible with the surface-mount solder- IPC-820a-03-13
ing termination techniques. Axial-leaded components with
Figure 3-13 Surface-Mount Flat Ribbon Lead Features
round leads may have their leads coined or otherwise flattened
to provide a positive mounting surface, see Figure 3-14.

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Straight for 1 D but not less than 0.8 mm

0.25 mm Min.
Foot 2.0 mm Max.

Conductor
Flush to 0.635 mm [0.25] Max
IPC-820a-03-14

Figure 3-14 Coined Round Leads

3.6.4.3 Component Placement The component placement accuracy requirements for surface mounting, especially with
fine-pitch component packages, often necessitates the use of automated assembly machines that are often referred to as
‘‘pick-and-place’’ equipment.
The selection of these machines is generally based on the rate at which components are most cost-effectively assembled and
their suitability for use with the appropriate variety of surface mount component package delivery formats such as tape,
stick, belt, matrix tray, and cassette feeders.

3.6.4.4 Soldering The selection of a soldering process depends upon the type of components being assembled and, as
previously mentioned, whether or not a mixed technology or all surface mount assembly is being manufactured. Depending
on the component mix, the candidate technologies are wave soldering and a variety of reflow soldering techniques. Each
process has a corresponding set of manufacturing parameters for which it is best suited. Another consideration is for the use
of a low-volume batch processing unit or a high-volume inline machine.

3.6.4.5 Cleaning The cleaning of surface mount assemblies is harder to perform than the cleaning of through hole tech-
nology assemblies because of the higher density nature of the assembly; especially with respect to removing flux that has
been entrapped under the component packages.
Flux entrapment may cause potential reliability problems if the assembly is not properly cleaned. However, new solder paste
formulations are being developed that might result in the use of ‘‘no-clean,’’ ‘‘no flux,’’ or low-solids flux soldering tech-
nologies in order to minimize these problems.

3.6.4.6 Repairing/Reworking The repair or rework of surface mount assemblies is generally easier than with through hole
assemblies due to the absence of component mounting holes. However, because of the high-density nature of the assembly,
special tools are used for this purpose that carefully direct the reflow soldering energy so as to minimize the amount of heat
applied to the assembly during this operation.
The manual component removal/replacement tools include the use of fork-like soldering iron tips and resistance-heated
tweezers. Various types of hot-air devices are also available for this purpose.
For additional information see chapter 14.

4 PRINTED CIRCUIT BOARDS

This Section of the Assembly and Joining Handbook provides general information that pertains to all types of Printed Cir-
cuit Boards (PCB), i.e., single, double and multi-layer rigid and flexible structures that are used as the basic substrates of
electronic assemblies.

4.1 General Considerations The basic function of printed boards is to provide support for circuit components and to
interconnect them electrically. To achieve this, numerous PCB structure types varying in base dielectric material, conductor
type, number of conductor planes, rigidity, etc., have been developed.
Familiarity with these variations will allow assembly and joining process engineers and support staff to participate in opti-
mizing the system being developed.

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A PCB should be selected for optimum thermal, mechanical, and electrical systems reliability. However, each candidate
structure has particular advantages and disadvantages when compared to the others. Thus, no one PCB will satisfy all of the
needs of an application. The designer seeks a compromise of properties best tailored for component attachment and circuit
reliability.
PCBs vary from basic printed boards to very sophisticated supporting-core structures. However, some selection criteria are
common to all structures. To aid in the selection process, Table 4-1 lists design parameters and material properties which
affect system performance, regardless of PCB type. Also, Table 4-1 lists the properties of materials most common for these
applications.
In general, PCBs fit into one of four basic types of construction: organic base material, non-organic base material, support-
ing plane, and constraining core.
A PCB should be designed in accordance with the requirements of IPC-2220 Series of Design Guidelines,
The qualification and performance of a PCB should be in accordance with the appropriate requirements of IPC-6010 Series
of Performance Standards or in accordance with MIL-PRF-31032 (with applicable detail slash sheets) when specified.
IPC-4101 Specification for Base Materials for Rigid and Multilayer Printed Boards and IPC-4103 Specification for Base
Materials for High Speed/High Frequency Applications contain material information that may be important for assembly and
joining. Current versions should be referenced when establishing process parameters for soldering, cleaning, storage, and
handling.
There are probably less than ten material properties that concern the assembler; Tg, Td, CTE in the X-Y plane, CTE in the
Z axis, rate of water vapor is absorbed into the material, and the thermal mass of the material. Other properties of interest
might include sensitivity to solvents and storage effects on the metal surfaces and coatings applied to protect the metal. Table
4-1 provides typical values for a few common base materials. Values shown in the table are for comparison. They can vary
depending on the method used to establish the value. In addition, they can be modified by the material supplier for specific
applications.
Table 4-1 PCB Typical Material Properties
Glass Resin X/Y axis Z axis
Transition Decomposition Coefficient Coefficient
Temperature Temperature Thermal Thermal Thermal Moisture
Material (Tg) (Td) Expansion Expansion Conductivity Absorption
(Weight
Type (°C) (°C) (PPM/°C) (PPM/°C) (W/M°C)
Percent)
FR-4 (Epoxy E-glass) 110-140 310-330 16-19 50-85 0.16 0.5
Multifunctional Epoxy 130-160 320-350 14-18 44-80 0.16 0.1
High Performance Epoxy 165-190 330-400 14-18 44 0.16 0.3
Bismaleimide Triazine/Epoxy 175-200 334 15 70 NA 1.3
Polyimide Fiberglass 220-280 376 8-18 35-70 0.35 1.3
Epoxy Aramid Fiber 125 NA 6-8 NA 0.12 0.85
Polyimide Aramid Fiber 250 NA 3-7 NA 0.15 1.50
Polyimide Quartz 250 NA 6-8 NA 0.30 0.50
Cyanate Ester 180-260 376 15 81 NA 0.8
Fiberglass/Teflon 75 NA 15 - 20 NA 0.26 1.10
Kapton (Flex) 360-410 NA 20 NA 0.12 4.0
Alumina NA NA 5-7 5-7 44.0 NA
Aluminum (6061 T-6) NA NA 23.6 23.6 200 NA
Copper (CDA101) NA NA 17.3 17.3 400 NA
Copper-Clad Invar NA NA 3-6 NA 150XY/20Z NA

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4.2 Design Issues

4.2.1 Structures PCB structures for harsh environment applications may differ significantly from those for the typical
commercial applications. Harsh environment systems must operate over a wide temperature range (typically from -65 to
+125 °C), severe shock and vibration, and chemical attack. Weight and volume are other key issues for such products.
The predominant approach in these instances involves the use of single-chip packages mounted on multilayer printed boards
that are interconnected by a multilayer printed board backplane system. Both organic and inorganic base materials are used
in PCB structures designed for harsh environment.

4.2.2 Leaded vs. Leadless Components The requirement for hermeticity in harsh environment products may dictate the
use of component packages having all ceramic/glass dielectrics with both leaded and leadless terminations. The use of lead-
less components creates a special set of considerations that relate to matching the coefficients of thermal expansion (CTE)
of the PWB substrate and the component packages.
Leaded ceramic parts can be used on organic-base harsh environment printed boards in much the same way they are used
in commercial products. In these instances the preferred lead shape for Kovar™ leads is the ‘‘gull wing.’’

4.2.3 CTE Issues Leadless ceramic component packages and organic-base PCB structures have a large difference in CTE.
One must be aware of the CTE mismatch between components and substrate in order to achieve low solder joint residual
stress.

4.3 PCB Materials Printed board substrate materials may be classified by a military, industry, or appropriate specification.
Additionally, some substrate materials may be sub-classed according to their flame-retarding and heat-resisting characteris-
tics. Table 4-2 lists various classifications of material in cross-referenced form, i.e., from NEMA (National Electrical Manu-
facturer’s Association) grade to Military type.
Some assembly process steps may expose the PCB materials to temperatures that exceed the intended service environment.
Generally the high temperature limit of the material is determined by the temperature of decomposition (Td) of the resin
system. If the Td is exceeded, properties, particularly mechanical properties, will degrade rapidly. These properties, along
with the thermal stability of any dielectric employed, also greatly affect the survival of the board through any subsequent
assembly, cleaning or rework operations.
The Td represents the degradation temperature of the specific resin system. Raising a PCB to this temperature will induce
rapid degradation and damage to the structure. Lead Free compatible materials are designed to perform in temperatures at
or below 300 °C which is well below typical Td values of 340 °C. It is advisable that a user evaluate all downstream pro-
cessing temperatures to ensure the material selected has a performance capability well above the assembly temperatures to
ensure the resin does not degrade in any way.
Thermal excursions in assembly processes may be high enough to cause a phase change to water absorbed into the board.
The change from water to vapor may cause material failure, usually in the form of delamination. It may be necessary to dry
the PCB at a temperature exceeding 100 degree C but lower than Tg prior to exposing the assembly to reflow processing.

4.3.1 Thermosetting Base Resins Most commonly used thermosetting resins are phenolics, epoxies, polyimides, sili-
cones, and melamines. Certain polyesters in supported form may also find applications in limited areas for rigid printed
boards, although they are technically thermoplastic resins. See Table 4-2 for cross references.

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Table 4-2 Cross Reference of Plastic Laminate Specifications

Classification
IPC Specification NEMA grade MIL type Military (MIL) specification
Sheets
Epoxy:
MIL-P-18177 (Cancelled)
Glass cloth IPC-4101/20 G-10 GEE
Use: MIL-I-24768/2,3
MIL-P-18177 (Cancelled)
Glass cloth IPC-4101/22 G-11 GEB
Use: MIL-I-24768/2,3
MIL-P-3115 (Cancelled)
Paper IPC-4101/04 FR-3 PEE
Use: L-P-513 (See ASTM D 709 )
MIL-P-13949 (Cancelled)
Superseded by:
MIL-S-13949 (Cancelled),
Glass (copper-clad) IPC-4101/20 G-10,G-11 GE, GB
MIL-P-55617 (Cancelled)
Superseded by:
MIL-S-13949 (Cancelled)
IPC-4101/21, 24,
26, 27, 82, 83, 92, FR-4
Glass (copper-clad) GF, GH MIL-P-13949, MIL-P-55617 (Cancelled)
93, 94, 95, 97, 98 FR-5
IPC-4101/23
Melamine:
MIL-P-78
Paper IPC-4101 ES-1, ES-3 NDP Superseded by: L-MIL-P-387
(See ASTM D 709)
MIL-P-15037 (Cancelled)
Glass cloth IPC-4101 G-5, G-9 GMG
Use: MIL-I-24768/1
Glass (copper-clad) IPC-4101 G-5 GM
Phenolic:
MIL-P-79 (Cancelled)
Paper IPC-4101 X,P PBM
Use: MIL-I-24768/10,11,12,13,14,16,8
MIL-P-78 (Cancelled)
Paper IPC-4101 XP HSP Superseded by: L-P-387
(See ASTM D 709)
Paper IPC-4101/00 XPC
MIL-P-3115 (Cancelled)
Paper IPC-4101 XX PBG Use: L-P-513
(See ASTM D 709)
MIL-P-3115 (Cancelled)
Paper IPC-4101 XXX, XXP PBE, PBE-P Use: L-P-513
(See ASTM D 709)
MIL-P-3115 (Cancelled)
Paper IPC-4101/01 XXXP, XXXPC PBE-P Use: L-P-513
(See ASTM D 709)
MIL-P-3115 (Cancelled)
IPC-4101/
Paper FR-2 PBE-P Use: L-P-513
03, 05
(See ASTM D 709)
MIL-P-8655 (Cancelled)
Cotton fabric IPC-4101 CF FBG
Use: L-P-511 Notice 2
MIL-P-15035 (Cancelled)
Cotton fabric IPC-4101 LE FBE
Use: MIL-I-24768/13,14,15,16
Asbestos paper IPC-4101 A, AA PBA, FBA MIL-P-8059 (Cancelled)
Glass fiber IPC-4101 G-2
Glass cloth IPC-4101 G-3
MIL-P-15047 (Cancelled)
Nylon cloth IPC-4101 N-1 NPG
Use: MIL-I-24768/9
Glass (copper-clad) IPC-4101 XXXP, XXXPC PP

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Classification
IPC Specification NEMA grade MIL type Military (MIL) specification
Polyester:
Glass fiber IPC-4101 GPO-1
MIL-P-8013 (Cancelled)
Glass fiber IPC-4101 GPO-2 1, 2, 3
Superseded by: L-P-30
PTFE:
MIL-P-19161 (Cancelled)
Glass cloth IPC-4101 GTE GTE
Use: MIL-I-24768/7
MIL-P-13949 (Cancelled)
Glass cloth (copper-clad) IPC-4101 GTE GD, GR, TC, GX Superseded by:
MIL-S-13949/4 (Cancelled)
Silicone:
MIL-P-997 (Cancelled)
Glass cloth IPC-4101 G-6, G-7 GSG
Use: MIL-I-24768/17
Glass (copper-clad) IPC-4101 G-6 GS

4.4 Printed Boards with Non-Metallic Constraining Cores A constraining fiber resin composite internal plane in a con-
ventional printed board can modify thermal expansion in the X and Y axes, improve rigidity, and improve thermal conduc-
tivity, depending on the properties of the supporting plane and its location within the PCB structure. These constraining
fibers can be aramid fiber, quartz, etc. The very high modulus of these materials requires a balanced construction to prevent
bowing or twisting. Some of these materials, such as the aramid and quartz fibers, require modified fabrication techniques
due to their mechanical properties.

4.5 Base Conductors Conductive materials for printed board applications may be divided into a few basic types:
• Metallic Foils that are usually bonded to substrate materials as a clad raw material.
• Metallic Platings that are added to printed board to provide necessary conductive material thickness, form interconnections,
provide protective coating over conductor areas, and enhance subsequent assembly soldering/welding.
• Solder coatings that are added to the printed board for the process of joining discrete wires, components, and connectors.

4.5.1 Metallic Foils Essentially all metallic foils for printed board use are copper, although other foils such as aluminum,
silver, bronze, nickel, stainless steel, Kovar™ and magnetic alloys are potentially available for special purposes. However,
only copper will be considered in this handbook. Other materials and their properties are tabulated in Table 4-3 for com-
parison purposes.
Table 4-3 Properties of Metallic Foils
Electrical Resistance Thermal Conductivity Brinell Thermal Coeff. of Electromotive
Material ohms Cm@ 20 °C cal/sec/cm3/ °C @18 °C Hardness No. Expansion 10-5 in./in/ °F Potential (volts)
Aluminum 2.8 X 106 0.504 15 1.33 +1.67
6
Copper 1.7 X 10 0.918 42 0.91 -0.34
Gold 2.4 X 106 0.700 28 0.80 -1.68
6
Nickel 7.8 X 10 0.142 110 0.76 +0.25
Silver 1.7 X 106 0.974 95 1.05 -0.80

Copper foil is available in electronically deposited (ED) or rolled-annealed forms. IPC-MF-150 defines properties for these
types. Both types of foil are at least 99.5 percent pure copper (plus silver) with resistivities of not more than 0.16 ohm/meter
gram at +20 °C.
Very thin foils are now becoming available (ED type) for use with semi-additive processing, or as an aid in improved pro-
cessibility and reduced copper usage. These ultra-thin foils may be in the 0.005 to 0.01 mm [0.0002-0.0004 in] thickness
range.
The basic properties of metal foils that influence their selection for specific applications, particularly those which affect sol-
derability and bondability, are:
• Thermal properties that must be taken into account because of their effect on joining operations and because the foil pro-
vides conductive heat transfer.

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• Coefficient of thermal expansion (CTE) that might affect differences between substrate expansion and component expan-
sion under service temperature excursions.
• Chemical properties that must be viewed in light of the many facets of materials in manufacture, processing service life
environment protection requirements, and circuit performance.
• Physical characteristics, such as density, microstructure and finish, which bear a relationship to chemical properties.
• Mechanical properties, such as tensile strength, yield strength, ductility and fatigue (stress reversal) resistance, which can
affect end-product performance. Fatigue strength is of considerable importance in flexible printed board applications where
repeated movement is involved. However, although not as obvious, stress reversals in thermally-cycled rigid printed board
applications can be as severe due to substrate expansion and contraction differences.
• The profile of the matte side can affect the bonding strength between the metal foil and base material. It can also affect the
minimum line width or spacing achievable on the PCB.

4.5.2 Electrodeposited Copper Foil The production of electrodeposited (ED) foil starts with the preparation of an elec-
trolyte or plating solution. In the case of acid sulfate, probably the most widely used bath for this purpose, the solution is
made by dissolving secondary copper of suitable purity in a sulfuric acid and water solution.
Tensile strength, ductility, hardness, stress resistance, density, electrical resistivity and structure may be affected by changes
in copper sulfate concentration, sulfuric acid concentration, temperature or current density, as well as by periodic current
reversal or by the use of various additive agents. For printed board applications, care must be taken in the use of organic
additions for grain refinement and/or leveling since these tend to co-deposit with the copper and can result in solder
dewetting.
High-ductility ED foil (Grade 2) is obtained by varying the plating and annealing treatments. These techniques are propri-
etary with various foil producers. The resulting ductility values approach those of rolled-annealed foil. However, tensile
strengths are maintained at a higher level.

4.5.3 Rolled-Annealed Copper Foil Rolled-annealed foil is produced by successive reductions in thickness of highly-
refined copper ingots. Since the chemical composition is unchanged by this type of processing, the purity of the ingots must
be monitored closely.
IPC-MF-150 (Metal Foil for Printed Wiring Applications) provides engineering information and the necessary background
information to assist in the choice of a copper foil for a given application.

4.5.4 Additive Circuit Plating Additive circuitry technology is based upon the reduction of copper from an aqueous solu-
tion in a selective manner without the use of external energy. The reduction initially takes place at the surface of a catalyst
and continues autocatalytically, i.e., upon itself, until the desired conductor thickness is reached.

4.6 Plating and Surface Finishes A variety of plating and surface finishes are available for use in printed board applica-
tions. In addition to helping to maintain the electrical properties of the printed board, such metals can be used to provide
surface protection, provide or maintain solderability, and enhance hardness, abrasion resistance, stress resistance, tensile
strength, ductility, and fatigue properties.

4.6.1 Electroless Copper Plating Electroless copper is deposited on the surface and through holes of the printed board as
a result of processing the drilled panel through a series of chemical solutions. Typically, this is the first step in the plating
process and is usually 0.6 to 2.5 µm [24 to 98.4 µin] thick. Electroless copper can also be used to fully build the required
copper thickness, which is referred to as additive plating.

4.6.2 Semi-Conductive Coatings Semi-conductive coatings for direct metallization are used as a conductive starter coat-
ing prior to electrolytic copper plating and are applied to the hole wall. The coating should be of sufficient quality for sub-
sequent metallic deposition and should be non-migrating. This process is typically fabricator dependent and is not specified
on the master drawing. Palladium and tin are commonly used materials. A thin layer is deposited on exposed surfaces, espe-
cially inside drilled holes. This provides a surface for auto-catalyzing the electroless copper deposition.

4.6.3 Electrolytic Copper Plating Electrolytic copper can be deposited from several different electrolytes, including cop-
per fluoroborate, copper cyanide, copper sulfate, and copper pyrophosphate. Copper sulfate and copper pyrophosphate are
the most commonly used electrolytes for building the copper deposition on the surface and through the holes to the required
thickness. This type of plating usually produces the final copper thickness requirement.

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4.6.4 Gold Plating A variety of gold platings are available for depositions on printed boards. These may be electrolytic,
electroless, or immersion deposits. The electrolytic deposition may come in 24k soft gold, 23+k hard gold (hardening uses
trace amounts of cobalt, nickel, or iron which are co-deposited with the gold), or the plating may be a lower karat alloy (14
- 20k) for some applications. Gold plating serves several purposes:
1. To act as a self-lubricating and tarnish resistant contact for edge printed board connectors (see Table 4-4). Hard electro-
lytic gold plating is most often used for this application.
2. To prevent oxidation of an underlying plating such as nickel and electroless nickel to enhance solderability and extend
storage life. Electrolytic, immersion and electroless gold are most often used for this purpose (see Table 4-4 for thick-
ness).
3. To provide a wire bonding surface. This application employs a soft 24k electrolytic gold, see Table 4-4 for thickness.
4. To provide an electrically conductive surface on printed boards when electrically conductive adhesives are used. A mini-
mum thickness of 0.25 µm [9.84 µin] is recommended.
5. To act as an etch resist during printed board fabrication, a minimum thickness of 0.13 µm [5.12 µin] is recommended.
Electrolytically deposited gold is often specified as required to meet ASTM-B-488 with the type and grade selected to sat-
isfy the different applications. A low-stress nickel or electroless nickel should be used between the gold overplating and the
basis metal when gold finish is to be used for electrical or wire bonding.

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Table 4-4 Final Finish and Coating Requirements

Applicable
Acceptability Marking
Code Finish Thickness Specification Code1
J-STD-003
S Solder Coating over Bare Copper Coverage & Solderable2 b0
J-STD-006
J-STD-003
b1 Lead-Free Solder Coating over Bare Copper Coverage & Solderable2 b1
J-STD-006
J-STD-003
T Electrodeposited Tin-Lead (fused) - minimum Coverage & Solderable b3
J-STD-006
X Either Type S or T As indicated by code
J-STD-003
TLU Electrodeposited Tin-Lead Unfused - minimum 8.0 µm [315 µin] b3
J-STD-006
Class 1 and Class 2
Gold for edge printed board connectors and 0.8 µm [31.5 µin]
G None b4
areas not to be soldered - minimum Class 3
1.25 µm [49.21 µin]
GS Gold Electroplate on areas to be soldered - maximum3 0.45 µm [17.72 µin] None b4
Gold Electroplate for areas to be wire
0.05 µm [1.97 µin] None b4
bonded (ultrasonic) - minimum
GWB-1
Electrolytic nickel under gold for areas to
3 µm [118 µin] None b4
be wire bonded (ultrasonic) - minimum
Class 1 and Class 2
Gold Electroplate for areas to be wire 0.3 µm [11.8 µin]
None
bonded (thermosonic) - minimum Class 3
GWB-2 b4
0.8 µm [31.5 µin]
Electrolytic nickel under gold for areas to
3 µm [118 µin] None
be wire bonded (thermosonic) - minimum
Class 1
Nickel-Electroplate for edge printed 2 µm [78.7 µin]
N None N/A
board connectors - minimum Class 2 and Class 3
2.5 µm [98.4 µin]
NB Nickel-Electroplate as a barrier4 - minimum 1.3 µm [51.2 µin] None N/A
5
OSP Organic Solderability Preservative Solderable None b6
HT OSP High Temperature OSP Solderable5 None b6
Electroless Nickel - minimum 3 µm [118 µin]
ENIG IPC-4552 b4
Immersion Gold - minimum 0.05 µm [1.97 µin]6
Electroless Nickel - minimum 3 µm [118 µin] IPC-4552 b4
ENEPIG Electroless Palladium - minimum 0.05 µm [2.0 µin] ASTM-B-679 N/A
Immersion Gold - minimum Coverage and Solderable6 None b4
6
DIG Direct Immersion Gold (Solderable Surface) Solderable None b4
IAg Immersion Silver Solderable7 IPC-4553 b2
ISn Immersion Tin Solderable8 IPC-4554 b3
C Bare Copper AABUS AABUS N/A
Note 1. These marking and labeleing codes represent the codes for surface finish categories established in IPC/JEDEC-J-STD-609.
Note 2. No finish thickness requirement is needed to be specified on drawing. See also 4.4.10.1 of IPC-2221.
Note 3. Industry investigations have shown that a gold-tin intermetallic phase forms under normal soldering process parameters when the weight percent of
gold in the solder joint reaches the 3-4% range. Refer to J-STD-001 and IPC-HDBK-001 for further information on gold removal to prevent the
formation of brittle solder joints resulting from high concentrations of gold dissolving into the solder joint.
Note 4. Nickel plating used under the tin-lead or solder coating for high temperature operating environments act as a barrier to prevent the formation of
copper-tin compounds.
Note 5. See 4.6.7.
Note 6. See 4.6.4.1 through 4.6.4.3.
Note 7. See 4.6.5.
Note 8. See 4.6.6.

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Table 4-5 will help clarify some of the uses for the various alloys.
Table 4-5 Gold Plating Uses
Minimum Purity Knoop Hardness Contacts Wire Bonding Soldering
99.0 130-200 S C* C**
99.0 90 max NR S C**
S - Suitable use NR - Not recommended C - Conditional use
* May be used, but will depend on type of wire bonding being used. Run test prior to wire bonding.
** More than 0.8 µm [31 µin] gold on boards or leads may cause embrittled solder joints.

4.6.4.1 Electroless Nickel/Immersion Gold (ENIG) ENIG (Electroless Nickel/Immersion Gold) is widely used as a sur-
face finish for high density SMT designs. The surface is coplanar and is compatible with eutectic and lead-free solders. It
is widely considered an ideal contacting surface. It is also aluminum wire bondable and its shelf life can exceed 12 months.
The thickness of the deposit should comply with IPC-4552 which specifies Ni between 3-6 µm [118 - 236 µin] and a gold
thickness of 0.05 µm [1.97 µin] minimum. Attempting to put more than 0.125 µm [4.92 µin] of gold using the ENIG pro-
cess could result in corrosion and loss of solderability of the underlying Ni and give rise to the phenomenon of ‘‘Black Pad.’’
Black pad is a deterioration of the pad surface finish. See IPC-4552 for a complete discussion.
The bare printed board requirements for deposit thickness of the ENIG should be verified using X-Ray Fluorescence (XRF),
or similar, measurement. Class 1 and Class 2 products require, as a minimum, five measurements per lot. Class 3 product
measurements are AABUS, and the procurement documentation should specify the minimum frequency of thickness verifi-
cation. For consistency, all measured pad sizes should have an area approximately 1.5 x 1.5 mm [0.060 x 0.060 in]. The
advantages and limitations of ENIG are outlined in Table 4-6.
Table 4-6 ENIG Surface Finish Advantages and Disadvantages
Advantages Limitations
Uniform coplanar surface Moderately higher cost to OSP or HASL
Excellent wettability, with eutectic and Pb-free solder Multi-step process
Multiple Pb-free reflow cycles Requires good process control
Ideal contacting surface Poor process control may lead to Black Pad
Aluminum wire bondable Not recommended for gold wire bonding
Shelf-Life - capable of J-STD-003 Category 3 durability Limited re-workability at the bare printed board level
Improved PTH reliability Solder mark must be fully cured before ENIG
Nickel barried reduces copper dissolution during Pb free solder
assembly and/or rework.
NOTE: In spite of ENIG‘s potential for to ‘‘black pad’’ or nickel corrosion, it remains a widely used surface finish, particularly after the onset of Pb-free soldering.
Nickel corrosion occurs during the gold deposition step. It only occurs on a compromised Ni deposit coupled with extended dwell in an aggressive gold bath,
focus on ENIG pre-treatment and control of the Ni bath will produce the desired nickel deposit that is not susceptible to corrosion. Limiting the gold thickness
and hence dwell time in the gold deposition step has come a long way in eliminating the defect.

4.6.4.2 Electroless Nickel/Immersion Gold/Electroless Gold (ENIG/EG) The finish is used for gold wire bonding and in
compression connections. Some gold wire bonding requires a thicker gold than ENIG or ENEPIG can supply. The immer-
sion gold serves as an initiator for electroless gold deposition, as electroless gold does not initiate directly on electroless
nickel. The surface is coplanar and has excellent shelf life, in excess of 12 months.
The thickness of the deposit is designed to meet the requirements of the intended use. For gold wire bonding, a minimum
thickness of 20 µin would be sufficient to ensure proper bonding and shelf life stability. Thicker gold in the order of 40 µin
may be needed for compression connections.
ENIG/EG is not ideal for soldering, as the thicker gold layer may embrittle the solder joint, depending on the volume of
solder used in the joint.
The bare printed board requirements for deposit thickness of the nickel and gold should be verified with an appropriate
instrument, such as, X-Ray Fluorescence (XRF) Spectrometry.
The advantages and limitations of ENIG/EG are outlined in Table 4-7.

4.6.4.3 Electroless Nickel/Electroless Palladium/Immersion Gold (ENEPIG) ENEPIG is a very versatile surface finish
with a wide range of applications. It has gained popularity as a surface finish for high density SMT designs. The surface is

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Table 4-7 ENIG/EG Surface Finish Advantages and Limitations

Advantages Limitations
Uniform coplanar surface Limited applicability for soldering
Gold wire bondable Multi-step process
Compression connection surface More stringent process control of electroless gold required
Improved PTH reliability Moderately higher cost to OSP or HASL
Shelf-Life - capable of J-STD-003 Category 3 durability Limited re-workability at the bare printed board level
No copper sidewalls, no overhang or slivers, pad completely
encapsulated

coplanar and is compatible with eutectic and lead-free solders. ENEPIG forms a very robust solder joint with copper bear-
ing lead-free solders, such as, SAC alloys. It is a surface finish that is both aluminum and gold wire bondable with a shelf
life that can exceed 12 months. ENEPIG is suitable to replace multiple finishes used for soldering, wire bonding and/or con-
tact surfaces on the same printed board.
An IPC specification for ENEPIG is under development. Most users specify nickel thickness between 3 - 6 µm, palladium
thickness in the range of 0.05 - 1.0 µm and immersion gold layer should have coverage and be solderable. (Common gold
plating results in a thickness from 0.025 to 0.1 µm.) If the finish is going to be used for both soldering and wire bonding,
then, the thinner palladium thickness (0.1 µm) is recommended. If the finish will not be used for soldering, a higher palla-
dium thickness may be specified. The bare printed board requirements for deposit thickness of the nickel and palladium
should be verified with an appropriate instrument, such as, X-Ray Fluorescence (XRF) Spectrometry. For consistent data, all
measured land sizes should have an area approximately 1.52 x 1.52 mm [0.060 x 0.060 in]. Class 1 and Class 2 products
require, as a minimum, five measurements per lot. Class 3 product measurements are AABUS. It is, therefore, recommended
that an inspection plan be established for the quantity and extent of XRF measurements for Class 3 product. A pull test may
be desirable for some wire bond applications. A custom coupon may be utilized.
The advantages and limitations of ENEPIG are outlined in Table 4-8.
Table 4-8 ENEPIG Surface Finish Advantages and Disadvantages
Advantages Limitations
Uniform coplanar surface Moderately higher cost to OSP or HASL
Excellent wettability, with eutectic and lead-free solder Multi-step process
Multiple lead-free reflow cycles Requires good process control
Ideal contacting surface Limited re-workability at the bare printed board level
Shelf-Life - capable of J-STD-003 Category 3 durability Solder mask must be fully cured before ENEPIG is plated
Aluminum and gold wire bondable Difficult to build thicker good finishes over palladium
Improved PTH reliability
No probability of ‘‘Black Pad’’
Alleviates copper dissolution from hole walls

4.6.5 Immersion Silver Immersion silver is a viable solderable surface finish for all categories of printed boards. The sur-
face is coplanar and is compatible with eutectic and lead-free solders. It may be the preferred finish for very high frequency
RF applications because it avoids the skin effect problem that may arise with nickel-gold finishes. The immersion silver
coating consists of pure silver and a small amount of organic additives. At assembly, the silver is dissolved in the solder and
a Cu/Sn intermetallic (IMC) is formed.
As this surface finish has established itself in the marketplace, its advantages and weaknesses have become better under-
stood. Instances of interfacial voiding reported by early users have been resolved. Immersion silver is susceptible to creep
corrosion in humid environments that contain sulfur compounds. Solder mask defined lands are more susceptible to creep
corrosion, as compared to pattern defined lands.
The IPC immersion silver specification, IPC-4553, specifies a thickness of 0.12 - 4.0 µm [5 -16 µin] typically 0.2 - 0.3 µm
[8 - 12 µin]. For consistency, a land approximately 1.5 x 1.5 x 0.060 x 0.060 in] should be used.
Appropriate packaging and storage of immersion silver finishes is important to preserve solderability. See IPC-4553.
The advantages and limitations of Immersion Silver Surface Finish are outlined in Table 4-9.

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Table 4-9 Immersion Silver Surface Finish Advantages and Disadvantages

Advantages Limitations
Uniform coplanar surface Limited re-workability at the bare printed board level
Excellent wettability, with eutectic and lead-free solder Solder mark \ must be fully cured before Immersion silver
Reduced Shelf Life - in environments containing sulfur
Low loss finish compatible with RF design requirements
compounds or chlorides
Excessive thickness of IAg combined with lead-free silver
bearing solder, has the potential to create an embrittled solder
joint
No nickel barrier allows copper dissolution during lead-free
solder assembly and/or rework.

4.6.6 Immersion Tin Immersion tin is a viable solderable surface finish for all categories of printed boards. The surface
is coplanar and is compatible with eutectic and lead-free solders. It has been used for very high frequency RF applications
because it avoids the skin effect problem that may arise with nickel-gold finishes.
The immersion tin coating consists of pure tin, some formulations contain small quantities of silver for whisker mitigation
and a small amount of organic additives. At assembly, the deposit is dissolved in the solder and a Cu/Sn intermetallic (IMC)
is formed
IPC-4554 covers this surface finish and it is the one finish currently that has been broken into 3 categories of coating dura-
bility - this is a function of copper migration through the deposit and the number of thermal cycles in assembly the deposit
will see. Thicknesses should be specified as a function of coating durability categories, in accordance with J-STD-003, may
be found in IPC-4554. It is imperative that the correct thickness of tin, devoid of copper, be specified for a particular assem-
bly process. Failure to do so, or receiving product that does not meet the specified requirements, will result in solderability
defects. The same 1.5 mm x 1.5 mm (60 mil x 60 mil) pad size is used for XRF measurements, as this is the standard pad
size for all surface finish measurements.
Appropriate packaging and storage of immersion tin finishes is important to preserve solderability. See IPC-4554 and IPC-
1601. Unlike other finishes, heat is a key driver in the degradation of performance of this finish. Heat facilitates the migra-
tion of copper through the tin finish to the surface, resulting in oxidation and loss of solderability.
The advantages and limitations of Immersion Tin Surface Finish are outlined in Table 4-10.
Table 4-10 Immersion Tin Surface Finish Advantages and Disadvantages
Advantages Limitations
Rapid diffusion of copper through the deposit can impact shelf
Uniform coplanar surface
life - specify coating durability
Forms CuSn IMC’s - predicable solder joints Deposit is ‘‘dirity’’ requiring special cleaning post plating
Easy to measure by XRF Deposit is soft and mars easily
Very aggressive chemistry on solder masks, especially around
Low loss finish compatible with RF design requirements
annular rings
Tin whiskers have been reported in some instances - some
Excellent wettability with eutectic and lead-free solder
chemistries offer mitigation strategies (i.e., silver)
No nickel barrier allows copper dissolution during lead-free
solder assembly and/or rework.
Limited re-workability at the bare printed board level
Not suitable as a surface finish for either aluminum or gold wire
bonding due to the instability and metallurgical incompatibility of
the deposit

4.6.7 Organic Solderability Preservative (OSP) OSP is a general term that describes a variety of water based surface
treatments containing organic compounds that are designed to serve the same function. They coat the copper surface by
forming an organo-metallic complex, whose thickness and chemical composition may range from a molecular monolayer, to
complex films with thicknesses up to 0.5 µm. OSPs are copper surface specific and are often designed specifically to mini-
mize film formation on gold or other surfaces. The coatings protect the underlying copper from oxidation, thus preserving
its solderability.
Some examples of classes of organic compounds used in OSPs are benzotriazoles, imidazoles and benzimidazoles. The abil-
ity of a particular OSP to withstand thermal excursions at assembly can be affected by a variety of formulation factors

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including the choice of organic compound. The simpler types may only withstand a single eutectic thermal excursion, while
the more sophisticated ones can withstand multiple thermal excursions even at lead-free soldering temperatures, with or
without a nitrogen atmosphere.
When selecting OSP as a surface finish, it is advisable to work with the assembler to confirm that the assembly conditions
(for example, number and type of reflow cycles, in-process hold times) are compatible. Some designs are not suitable for
OSP. Fabricators often process a single OSP proprietary product, so specifying an OSP may limit the choice of suppliers.
If the paste print screen openings are smaller than the land, there may appear to be exposed copper after assembly, because
OSP finishes provide only limited solder spread.
During assembly, the OSP coating is removed when it comes in contact with soldering flux. The intermetallic formed at the
solder joint/land interface is a Cu/Sn compound. The OSP coating, itself, does not become part of the solder joint.
Shelf life of OSP coated printed boards may be as high as 12 months, but will vary depending on the type of OSP, the pack-
aging and storage conditions and the application/assembly process conditions. Printed boards that have exceeded their shelf
life may be oxidized and then reworked by stripping and recoating.
The advantages and limitations of OSP are outlined in Table 4-11.
Table 4-11 OSP Surface Finish Advantages and Limitations
Advantages Limitations
Uniform coplanar surface
Some OSPs do not deposit on gold May require an aggressive flux
Reworkable, aqueous process Boards with OSP coating requires careful handling
Controllable, automated process Not easy to inspect or measure
No process thermal shock during application Exposed copper areas may be vulnerable to corrosion
Preferentially coats copper Not a suitable contact surface
Consistent compliant pin insertion and rework Class 3 solder of holes with aspect ratios greater than 10:1 are not achieveable
Least expensive of all final finishes
May have limited in-process hold times
As there is no nicket barrier, copper dissolution may occur during lead-free
solder assembly and/or rework
OSPs may be damaged by baking prior to soldering

4.6.8 Nickel Plating Nickel plating serves a dual function in contact plating: 1) It provides an anvil effect under the
gold providing an essential extra hardness to the gold; 2) It is an effective barrier layer (when its thickness exceeds 2.5 µm
[98.4 µin]) which prevents the diffusion of copper into gold. This diffusion process can result in a room temperature alloy-
ing of the gold, degrading the electrical and corrosion resistance characteristics of the contact.
All electrolytically deposited nickel plating should be low-stress and conform to AMS-QQ-N-290, Class 2, except that the
thickness should be as specified in Table 4-4.
Reasons for using a nickel underplate include:
Diffusion Barrier:
a. To inhibit diffusion of copper from the basis metal (and of zinc from brass) to the surface of the precious metal plating.
b. To inhibit interdiffusion between the basis metal and the gold top coat (for example, silver and copper), which might pro-
duce a weak alloy or intermetallic compound at the interface.
Leveling Layer:
a. To produce a smoother surface than the basis metal in order to ensure a lower porosity gold top plate (for example, lev-
eling nickel over a rough substrate).
Pore Corrosion Inhibitor:
a. A nickel underplate under the gold top coat will form passive oxides at the base of pores in humid air, provided the envi-
ronment does not contain significant amounts of acidic pollutants (such as SO2 or HCI).
Tarnish Creepage Inhibitor for Gold:
a. Non-copper base metals will inhibit creepage of copper tarnish films over the gold—where the tarnish originates from
pores and bare copper edges.

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Load-Bearing Underlayer for Contacting Surfaces:

a. A hard nickel underplate can serve as a load-bearing foundation for the gold top coat to prevent cracking of hard golds
and reduce the wear of the precious metal during sliding of the contacting surfaces.
For all these purposes, the nickel underplating must be intact (that is, not cracked) and must have sufficient thickness
to achieve the particular function for which it was intended. As a general rule, the minimum thickness should be 1.2 µm
[47.2 µin], preferably greater. For some leveling purposes, a far greater thickness may be required.

4.6.9 Tin/Lead Plating Tin/Lead Plating is applied in the subtractive fabrication process to provide a copper etch resist
and a solderable coating, when required. Typical thickness sufficient for etch resist on 2 oz. copper is 8.0 µm, but it is a
fabrication process parameter, not a design requirement. The electrodeposit is generally fused by one of several techniques
(hot oil immersion, infrared exposure, exposure to hot vapors or inert liquids). The fusing operation results in the formation
of a true alloy on the surface and in the through holes of the printed board. Fusing is required unless the unfused option is
selected to maintain flatness. It also promotes improved long-term solderability. Tin lead plating does not apply to buried
PTHs which are internal to the printed board and do not extend to the surface. Tin-lead plating should meet the composi-
tion requirements of ASTM-B-579.

4.6.9.1 Tin Plating Tin Plating is applied in the subtractive fabrication process to provide a copper etch resist.

4.6.10 Solder Coating Solder coating is generally applied by immersing the printed board into molten solder and remov-
ing the excess by blowing hot, pressurized air, fluid or vapors over the surface of the printed board in a specially designed
machine. Solder coating does not apply to buried or tented PTHs which are internal to the printed board and do not extend
to the surface.
Unless otherwise specified on the master drawing, the solder used for solder coating should be in accordance with J-STD-
006. Solder coating thickness may be specified for particular applications. The performance of solder coating is evaluated
not by a mechanical thickness measurement but by the ability of the printed board to pass solderability testing per J-STD-
003 (see Table 4-3). The user has the responsibility to determine if steam aging, prior to solderability testing, is required.

4.6.10.1 Hot Air Solder Leveling (HASL) The current surface finish of long standing is hot air solder leveling (HASL). In
this process, the finished circuit board is dipped either vertically or horizontally into a molten solder bath and the excess
solder is blown away and leveled with hot air, giving the process its name. The HASL process is the first soldering stress
that the printed board experiences. Some material combinations may be prone to delamination or reduced product life cycle
due to multiple thermal excursions exposures.
When done properly, the HASL finish process generates visual assurance of solderability. The quality of the product regard-
ing solderability can be confirmed using an approved test method as specified in J-STD-003. Any evidence of non-wetting
or dewetting is immediately apparent as the board exits the process.
HASL finish has good solderability and has limited shelf life. It can withstand multiple thermal excursions for double sided
assembly. HASL processes, however, are considered to have a degree of difficulty in their control. This, coupled with pad
sizes and geometries placing additional challenges on such processes, places the creation of a practical minimum thickness
outside the scope of this handbook.

4.6.10.1.1 Tin Lead HASL Although the tin lead surface finish was the main solution for printed boards, one concern with
the HASL process is coating thickness uniformity. Often in the process, the solder thickness varies widely from 0.75 µm to
35 µm. Thinner solder finishes, such as <1.2 mm (30 µin), reduce shelf life due to formation of intermetallics. As a result,
acceptance criteria for the solderability of printed boards should include or be entirely based on functional testing of sample
boards or coupons.
The wide variation seen in solder thickness in HASL affects the coplanarity of solder termination on the printed board and
hence the coplanarity of SMT components, and uniform solder paste stencil contact.
The increase in the use of thin printed boards (<0.5 mm in thickness) may preclude the use of HASL because of warping
of the printed boards during processing.

4.6.10.1.2 Lead-Free HASL The lead-free hot air solder leveling process can provide both quality and reliability of the
surface finish in providing long shelf life solderability. Like most of lead-free technology, the process for lead-free HASL
is maturing as more printed board fabrication facilities implement its use.

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The most likely candidates for lead-free HASL are Sn-Cu eutectic (227 °C melting point), or Sn-Ag-Cu eutectic (217 °C
melting point). The Sn-Ag-Cu alloy has a lower melting point, but the tin-copper is lowest cost. The Sn-Cu solder pool is
easy to manage and recycle, because there are only two constituents. The solder bath is not too aggressive, has low copper
dissolution, and is relatively tolerant of common impurities. In contrast, the Sn-Ag-Cu has a much higher copper dissolu-
tion rate.
Thicker boards require higher processing temperatures and/or dwell times. This can affect finish material choices at the board
level, since board materials have temperature limits.
Lead-free HASL finishes are more expensive because tin and
silver cost more than lead. The finish is smooth and bright and
less domed than eutectic tin/leadHASL (see Figure 4-1).
In situations where large boards (>250 x 250 mm) are used
with large BGAs (>25 x 25 mm), it may be a good idea to
increase printed board thickness to at least 2.0 mm to mini-
mize board bending and flexing. This will reduce or eliminate
interfacial failures due to mechanical stress that is caused by Figure 4-1 HASL Surface Topology Comparison
bending and flexing of the printed board.
Some proprietary formulas have application for specific uses, such as, carbon paste.

4.6.11 Other Metallic Coatings for Edge Printed Board Contacts In addition to the coatings cited previously, there are
several other options that the designer may want to consider:
a. Rhodium – a low resistance contact coating for flush circuits, switches or where a high number of insertions is expected.
Expense has precluded its general use.
b. Tin/Nickel Alloy – an abrasion resistant coating.
c. Palladium/Nickel Alloy – a low resistance contact coating. May be particularly useful for flush circuits.

4.7 Printed Board Handling and Storage Guidelines Historically, the printed board industry has relied on military speci-
fications and guidelines to define packaging methods to preserve the quality and reliability of printed boards during ship-
ment and storage. However, many of these documents are obsolete, incomplete, do not address lead-free assembly processes,
or do not cover newer laminates or final finishes. Additionally, the proliferation of alternative final finishes has produced
concerns and requirements for printed board packaging and handling to preserve the finish and assure good solderability.
IPC-1601 provides suggestions for proper handling, packaging materials and methods, environmental conditions, and stor-
age for printed boards. These guidelines are intended to protect printed boards from contamination, physical damage, sol-
derability degradation, electrostatic discharge (ESD) (when necessary), and moisture uptake. Moisture absorbed in printed
board laminates expands at soldering temperatures, and in some cases, the resulting vapor pressure can cause internal
delamination or excessive strain on plated-hole walls and other structures. This is especially challenging with the higher
temperatures used for lead-free soldering.
This document covers all phases from the manufacture of the bare printed board, through delivery, receiving, stocking,
assembly, and soldering. As a guideline, this information should be used with, and is secondary to, the established require-
ments in such documents as the IPC-4550 series for alternate final finishes.

5 ELECTRONIC CIRCUIT COMPONENTS

This Section of the Assembly and Joining Handbook provides general information that pertains to electronic circuit compo-
nents and terminations with respect to their impact on the assembly and joining of electronic printed board assemblies.
The package dimensions, heat-dissipation capability, manufacturability, yield, number of interconnections, complexity, and
testability all limit the number of components that can be put onto one printed board.
Components are usually selected for electrical, thermal, and mechanical characteristics as determined by the requirements of
the package. The material composition, finish, and configuration of both the body and the leads/terminations of a component
affect the choice of assembly methods.
All components should be compatible with the assembly processes used. The physical dimensions of the component should
adequately mate with the physical handling devices of the placement equipment. The components/part should not be

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degraded, physically or electrically, by soldering or other processes such as high temperature or chemical exposure. For
classification of moisture sensitive devices, see J-STD-020. For handling and packaging of moisture sensitive devices, see
J-STD-033. The components/parts should also be able to withstand exposure to all the chemicals used in the manufacturing
process such as adhesive bonding, soldering, cleaning, and any other chemistries used in the process.
Component selection depends upon:
• Electrical Characteristics
• Electrical Performance
• Manufacturing Processes (e.g., Placement/Attachment Equipment)
IPC-DRM-18 Component Identification Training and Reference Guide is a companion document to this handbook. It pro-
vides reference designators, schematic symbols and color representations of commonly used components and supplements
the information in this chapter.

5.1 Lead/Termination Finishes The finishes on the leads of leaded component packages and on the metallized termina-
tions of leadless packages should preserve and assure the solderability of the interconnection surfaces without decreasing
the assembly yield or the attachment reliability. Frequently, all solder connections cannot adequately be visually inspected
because of their sheer quantities or are visually inaccessible. The large quantities of solder connections make it imperative
that the solderability of the component I/Os be positively assured prior to assembly. The typical lead finish to preserve sol-
derability is fused or reflowed tin or solder. The solder coating can be obtained either by solder dipping or tin/lead plating
with a subsequent fusing process. Specifications may require the removal of excess gold, which can form brittle intermetal-
lics with the tin depending upon the amount by weight causing solder connection reliability problems. It is important to
know the thickness of precious metal plating on the leads provided by the supplier as it may be necessary to remove the
gold through a subsequent tinning operation to assure reliability of the connection. Caution should also be used when leads
are coated with tin or tin/lead plating without reflowing prior to assembly because the plating does not always assure sol-
derability. Organic materials co-deposited during the plating process can also cause poor solderability. Additionally, some
users specifications require fusing of the tin electroplate to eliminate the possibility of tin whisker growth.

5.2 Moisture Sensitivity Some components (especially those with plastic bodies) are susceptible to absorption and reten-
tion of moisture. Component manufacturers categorize components to a moisture sensitivity level with J-STD-020 Moister/
Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices. This level of sensitivity determines
the methods of preservation required to assure that the components do not crack or delaminate (popcorn) in the manufac-
turing process. Other applicable moisture sensitive handling documents are:
• J-STD-035 Acoustic Microscopy for Nonhermetic Encapsulate Electronic Components provides a test method for deter-
mining if damage has occurred during the manufacturing process.
• IPC-9501, 9502, 9503 and 9504 provide guidance on conditioning of components prior to assembly.
• J-STD-033 Standard for Handling, Packing, Shipping, and Use of Moister Reflow Sensitive Surface Mount Devices pro-
vides detailed instructions for handling and storage of moisture sensitive devices.
• J-STD-075 Classification of Non-IC Electronic Components for Assembly Processes

5.3 Components An electronic component is any device that handles electricity. These devices come in many different
shapes and sizes. Different components have different electrical functions and are used for a great variety of purposes.

5.3.1 Active versus Passive Components Some components are active - meaning they can manipulate an electrical sig-
nal. Active components include diodes, transistors, and integrated circuits, also called ICs. Other components are passive -
meaning that they cannot change an electrical signal - except to reduce it in size or delay it. Passive components include
resistors, capacitors, and inductors.

5.3.2 Discrete versus Integrated Components When a component is packaged with only one or two functional elements,
it is called a discrete component. An example of a discrete component is a resistor that performs the simple function of lim-
iting the electrical current that flows through it. On the other hand, an integrated circuit is a group of interconnected ele-
ments assembled into a single package that performs multiple functions. A well-known example of a complex IC is the
microprocessor found in computers.

5.4 Through Hole versus Surface Mount Components There are two primary ways of mounting components, the differ-
ence being how they are attached to the circuit board.

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One group is called through hole. Through hole components have leads that are inserted through mounting holes in the cir-
cuit board.
The other type is called surface mount. Surface mount components are placed directly onto lands that serve as mounting
points on the surface of the board.

5.4.1 Through Hole Lead Components Through hole components have leads that extend from the component body that
are subsequently inserted through holes in the circuit board.

5.4.2 Surface Mount - Leadless Components Leadless means there are no metal leads exiting the component body.
These types of components are attached to a circuit board using some type of metallized termination. This category includes
BGAs and Bottom Terminated Components (BTCs).

5.4.3 Surface Mount - Leaded Components Leaded surface mount components usually have one of six styles of leads:
gull wings, J-leads, L-leads, flat leads, castellations, or spheres.

5.5 Electronic Assemblies When a group of components are placed together on a printed circuit board to perform some
electrical function, it’s called an electronic assembly. Circuit board assemblies are typically created by attaching and solder-
ing the components by hand or by machine.

5.6 Packaging of Component Through hole and surface mount components are packaged in one of several ways includ-
ing tape and reel, tubes, ammo packs, waffle/matrix trays, or bulk. The packaging method depends on the component type
and whether the component will be assembled onto the circuit board by machine or by hand. Most component packages are
made to protect the components from electrostatic discharge (ESD) which could damage the electrical properties or perfor-
mance. See Introduction to Electronics Assembly, IPC-DRM-53, for more about the assembly process.

5.7 Printed Circuit Board Connectors Printed circuit board connectors form a major part of the overall family of elec-
tronic connectors. They are specifically designed for use as interconnection devices between printed circuit boards or
between boards and discrete wiring.
The growing popularity of surface mount technology for packaging electronic assemblies has raised a need for surface mount
connectors to provide a common packaging and single process approach.
Printed circuit board connectors can be divided into one-part (edge-board) and two-part (plug-and-receptacle) categories.
Each category can be further subdivided into various styles or designs that vary mainly in contact configuration, the man-
ner in which the contacts are retained, contact spacing, board thickness, and the manner in which the contacts are termi-
nated.

5.7.1 Printed Circuit Board Connector Selection Connector manufacturers recognize many ways in which the printed
circuit board designer can improve assembly performance through the selection of a connector system. A few of these ways
stand out as the most important. They are:
• Plan for these interconnections early in the design of the circuit.
• Define the performance expected of the connector system and provide potential connector sources with this information.
• Become familiar with the design variables of the required type of connector system.
The connector manufacturer and supplier know from experience that it takes time to evaluate a customer’s requirements,
make hardware recommendations, and obtain approval for even an off-the-shelf connector. Thus, the sooner the connector
supplier is brought into the picture, the better.

5.7.1.1 Connector Selection Factors The printed circuit board designer also needs time for the many decisions involved
in connector selection. The common selection factors for printed board connectors can be summarized to include:
• Contact Termination, i.e., soldered through hole or surface mount, solderless (wire) wrap, solderless press-fit, crimped, or
solderless insulation displacement connections (IDCs);
• Number of Contacts, usually a maximum of 100 for edge-board connectors, with several hundred in two-part versions;
• Contact Spacing, usually 2.54 mm [0.100 in] with some two-part versions having closer spacings;
• Rows of Contacts, one or two for edge-board and up to four for two-part connectors;
• Insertion and Withdrawal Force, in special applications zero insertion forces (ZIF) edge-board connectors and low-insertion
force (LIF) two-part connectors are available (See Figure 5-8).

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• Plug-in Printed Board Thickness, usually 1.6 mm [0.062 in]

for edge-board connectors
• Mating Connector Mounting, free-standing or backplane.
• Mechanical support for the connector performance require-
ment.
Figure 5-1 One-Part Printed Circuit Board Connector
5.7.1.2 One-Part Edge-Board Connectors The traditional,
most familiar type of backplane connector is the edge-board
type, Figure 5-1. This is categorized as a ‘‘one-part’’ design
where plated conductor contacts on the edge of the printed
circuit board, Figure 5-2, mate with the contacts of the edge-
board connector.
(NOTE: Edge-board connectors should not be used in Class
3 military assemblies.)
By nature, though, the edge-board connector arrangement is Figure 5-2 Printed Circuit Board with Edge-Board Contacts
limited in interconnection capacity by the size of the board
edge and the spacing between contacts. Because the printed
wiring board acts as the ‘‘male’’ half of the interconnection
system, the insertion and withdrawal forces can be unaccept-
ably high if the board is bowed and/or if the board edge is too
long. Also, the normal variations in printed wiring board
thickness can significantly affect the mating and reliability of
the interconnection.
a. One-Part Connector Contact Types – The most common
type of one part connectors are based on the use of either
bellows, tuning-fork, and cantilever contacts, Figures 5-3,
5-4 and 5-5, respectively.
b. One-Part Connector Readout – One-part edge-board con-
IPC-820a-05-03
nectors are also distinguished as being either dual readout
or single readout, Figure 5-6. Dual-read out connectors are Figure 5-3 Typical One-Part Connector with Bellows Contacts
designed primarily for use with double-sided or multilayer
printed boards. Single-readout connectors are for use with
either single-sided printed boards or double-sided printed
boards with redundant terminations.
c. Post-and-Box Contacts – The use of two-part connectors
with male ‘‘post’’ and female ‘‘box’’ contacts may be as
simple as the blade-and-fork type (Figure 5-7) and has
been very popular, especially in DIN (Deutsches Institut
für Normung, in English, the German Institute for Stan- Figure 5-4 Typical One-Part Connector Tuning-Fork Contacts
dardization) standard applications, Figure 5-8. The original
DIN connectors had the conventional arrangement of the
male contacts on the daughterboard and the female contacts
on the motherboard.
5.8 Sockets Sockets are sometimes used to mount indi-
vidual components or as a means of mounting a ‘‘piggy-back’’
printed wiring board to another printed wiring board. Sockets
may also be used to facilitate ease of upgrade of software by
providing a new ‘‘firm-ware’’ component. Sockets are some-
times used during the design/development phase as a method
for evaluating design parameters that cannot readily be
changed at the production stage.
Sockets are not recommended for military equipment for the
Figure 5-5 Typical One-Part Connector Cantilever Contacts
following reasons:

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a. They add extra interconnects which can reduce reliability.

b. They add extra cost and manufacturing steps (e.g., masking
free from conformal coating).
c. Socket contacts can easily be spread during component
insertion resulting in intermittent electrical circuits.
d. Dissimilar metal concerns exist if the socket contact is
gold-plated and the component lead is tin or tin-lead plated.
e. Component leads can bend under the component body dur-
ing insertion into a socket. In some cases, such as the
body-less socket, the component pin may not even enter
the socket contact.
f. Special manufacturing fixtures may be required to ensure Figure 5-6 Typical One-Part Connector Readout Configuration
full insertion of large pin-out devices such as pin grid
arrays (PGAs).
g. Inserting PGAs having shorter round leads (shorter than
standard dual inline planar, DIP leads) into a standard
socket designed for DIP type leads can be a problem.
h. Components can easily disconnect from their socket during
a shock and vibration environment. This is especially true
for low pin-out devices (e.g., 8-pin components).
i. Components can tilt and not be fully inserted in their
sockets.
j. If conformal coating is applied to the printed wiring board
via automated spray methods, the coating can enter the
socket cavity via capillary action in the space between the
component socket and socket plastic.

5.9 Test Points and Test Jacks A test point is a printed

board component that, unlike most others, does not perform
an electrical circuit function. However, test points do serve an
important electrical test function. NOTE: Test points and test
jacks can result in unwanted parasitic circuit attenuation.
Figure 5-7 Typical Two-Part Blade-and-Fork Contacts
These types of printed board components, Figure 5-9, can be
of the right-angle edge-board type or straight-through type for
local access.
Test points and/or test jacks should be installed to facilitate
the following:
a. Easy access for troubleshooting.
b. Selected for use with standard instrument test equipment.
c. Preclude the potential for shorting to adjacent conductors,
mounting brackets/hardware or ground during use of the
test probes.
d. Be free of non-conductive coatings such as solder mask,
Figure 5-8 Typical Zero-insertion-Force (ZIF) Pin-Grid Array Socket
conformal coating, etc.
e. Spaced far enough apart (usually a minimum of 19.05 mm
[0.75 in] on center) to facilitate the use of a standard test
probe having built in safety collars; or otherwise stagger
the measurement points.

Figure 5-9 Typical Printed Board Test Points

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5.10 Design and Assembly Process Implementation for BGAs (IPC-7095) Because of the design and assembly chal-
lenges for implementing Ball Grid Array (BGA) and Fine Pitch BGA (FBGA) technology, the IPC Task Group created a
major stand-alone document, IPC-7095 that provides significant design and assembly process information pertaining to
BGAs.

5.10.1 Scope The effect of BGA and FBGA on current technology and component types are addressed in IPC-7095, as
is the move to lead-free assembly processes. The focus on the information contained in IPC-7095 is on critical inspection,
repair, and reliability issues associated with BGAs. Throughout IPC-7095, the word ‘‘BGA’’ can mean all types and forms
of ball/column grid array packages.

5.10.2 Purpose The target audiences for IPC-7095 are managers, design and process engineers, and operators and tech-
nicians who deal with the electronic assembly, inspection, and repair processes. The intent is to provide useful and practi-
cal information to those who are using BGAs, those who are considering BGA implementation and companies who are in
the process of transition from the standard tin/lead reflow processes to those that use lead-free materials in the assembly of
BGA type components.

5.11 Design and Assembly Process Implementation for Bottom Termination Components (BTC) (IPC-7093) An IPC
Task Group has created a major stand-alone document, IPC-7093 that provides significant design and assembly process
information pertaining to BTCs. Consult this document for appropriate guidance on the use of these components.

5.12 Design and Assembly Process Implementation for Flip Chips (IPC-7094) An IPC Task Group has created a major
stand-alone document, IPC-7094 that provides significant design and assembly process information pertaining to Flip Chip
Components. Consult this document for appropriate guidance on the use of these components.

5.13 Counterfeit Electronic Components and/or Counterfeit Mechanical Fasteners In the 1980s, industry was exposed
to numerous instances of counterfeit fasteners; most of which applied to fasteners used for mechanical equipment rather than
electronic equipment. However, electrical equipment that used high strength fasteners, such as Grade 5 or Grade 8 bolts also
was found to have used counterfeit fasteners. This prompted the US Government to issue the Fastener Quality Act (FQA)
which has been instrumental in reducing the risk of counterfeit fasteners. The discussion below provides some background
information on counterfeit mechanical fasteners.
A more recent counterfeit issue pertains to counterfeit electronic components. Many commercial, industrial, defense, and
aerospace, original equipment manufacturers (OEM), have been impacted by counterfeit electronic components they pur-
chased from various sources; primarily from sources that are not the original manufacturer of the component. The potential
use of suspect counterfeit electronic components in high reliability equipment applications continues to be a high risk to the
OEMs and their ultimate customers. The discussion below provides detailed information on counterfeit electronic compo-
nents and the steps recommended to reduce the risk of using counterfeit electronic components, as well as suspect counter-
feit mechanical parts and/or counterfeit raw materials.

5.13.1 Counterfeit Mechanical Fasteners In the late 1980s, a great deal of concern and publicity about counterfeit fas-
teners was raised. The counterfeit case with the most documentation was the deliberate marking of Grade 8.2 Boron bolts
as Grade 8 bolts.
Grade 8.2 bolts are a low-carbon (0.22 percent C) Boron alloy steel that can be heat treated to the same room temperature
hardness as Grade 8 medium-carbon (0.37 percent C) steel. However, the room and elevated-temperature strengths of the
Grade 8.2 bolts drop drastically if they are exposed to temperatures above 500 °F. Grade 8 bolts can be used to 800 °F with
little loss of room-temperature strength.
Other fasteners marked as MS and NAS, but not up to the respective MS or NAS specification have shown up; however,
documentation is not readily available. Since these fasteners are imported and have no manufacturer’s identification mark
on them, it is not possible to trace them back to the guilty manufacturer, and U.S. Customs inspections have not been effec-
tive in intercepting counterfeit fasteners.
Another problem with fasteners has been the substitution of zinc coating for cadmium coating. If a dye is used with the
zinc, the only way to detect the difference in coatings is by chemical testing.
As a consequence of the above incidents, the U.S. Fastener Quality Act was created and is discussed in 5.13.1.1. Any pro-
curement of fasteners used in applications where specified material properties are required, should assure that such fasten-
ers are only supplied by manufacturers or distributors who are known to comply with the Fastener Quality Act.

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5.13.1.1 U.S. Fastener Quality Act The Fastener Quality Act (FQA) was originally enacted in 1990 to protect the public
safety by: (1) Requiring that certain fasteners which are sold in commerce conform to the specifications to which they are
represented to be manufactured, (2) providing for accreditation of laboratories engaged in fastener testing; and (3) requir-
ing inspection, testing and certification, in accordance with standardized methods, of fasteners covered by the Act.
Since its enactment, the FQA has been amended three times (Pub. L 104-113, Pub. L 102-234 and Pub. L. 106-34). The
Department of Commerce published final implementing regulations for the original FQA on September 26, 1996 and for the
FQA as amended by Pub. L. 104-113 on September 8, 1998.
On June 8, 1999, the Fastener Quality Act Amendments of 1999 (the Act) (Pub. L. 106-34, 113 Stat. 118) were enacted ‘‘to
amend the Fastener Quality Act to strengthen the protection against the sale of mismarked, misrepresented, and counterfeit
fasteners and eliminate unnecessary requirements, and for other purposes.’’ The Act made significant changes to the FQA.
Under the Act, the Secretary retains his enforcement functions and the responsibility for establishing and maintaining an
insignia recordation program, and the National Institute of Standards and Technology (NIST) must continue its fastener
laboratory accreditation program established under the National Voluntary Laboratory Accreditation Program (15 CFR part
285). In addition, the Act creates new responsibilities for NIST, including: acting upon petitions requesting approval of
documents setting forth guidance/requirements for certification of manufacturing systems as fastener quality assurance sys-
tems by accredited third parties; acting upon petitions requesting approval of documents setting forth guidance/requirements
for accreditation of laboratories; and acting upon petitions requesting approval of documents setting forth guidance/
requirements for approval of accreditation bodies to accredit laboratories. NIST also must accept affirmations, in the form
of self-declarations that the accreditation bodies meet the requirements of the applicable Guide, from accreditation bodies
accrediting third parties who certify manufacturing systems as fastener quality assurance systems and from accreditation
bodies accrediting laboratories.
The Act eliminates many of the responsibilities delegated by the Secretary of Commerce to NIST under the FQA, includ-
ing: establishing procedures for private entities (domestic and foreign) to accredit laboratories; establishing conditions for
recognizing foreign laboratories accredited by their governments or organizations; establishing the size, selection, and integ-
rity of samples of fasteners to be inspected if not provided in the standards and specifications to which the fasteners are
manufactured; establishing a required form for written inspection and testing reports; establishing which entities must retain
custody of laboratory testing reports and certificates of conformance and for what period of time.

5.13.2 Counterfeit Electronic Components Counterfeit electronic components continue to be a major concern for the
OEMs and their ultimate customers. A 2006 news publication1 reported the following information:
‘‘A police raid in China’s Guangdong province turned up US $1.2M in fake computer parts and documents - enough to pro-
duce not only complete servers and personal computers but also the packaging material, labels, and even the warranty cards
to go with them; all neatly labeled with the logo of Compaq Computer Corp.’’
‘‘Capacitors manufactured with electrolyte made from a stolen and defective formula finds its way into thousands of PC
motherboards, causing the components to burst and leak and the computers to fail, costing >$100 million to rectify.’’
‘‘Dozens of consumers worldwide were injured, or merely surprised, when their cell phones exploded, the result of coun-
terfeit batteries that short-circuited and suddenly overheated.’’
In some cases, external visual inspection of a component may provide an indication of a suspect counterfeit component. In
other cases, only X-Ray inspection along with destructive de-lid inspection, X-ray fluorescence (XFR), C-mode scanning
acoustic microscopy (CSAM), dye penetrant, or a scanning electron microscope (SEM) may be needed to uncover a suspect
counterfeit component. Final acceptance testing of a circuit card assembly (CCA) by an OEM noted functional failures that
were determined to be caused by a non-conforming Operational Amplifier. The components all had passed the MIL-STD-
883, Class B electrical screening testing. The OEM also mandated 100% X-Ray inspection of the components. The X-Ray
inspection report identified that the production lot of components contained mixed internal die sizes which was unexpected
since all of the components were marked with the same date code indicating they were all made at the same time. Subse-
quent de-lid inspection of a sample of components identified the internal die was not manufactured by the required compo-
nent manufacturer. Evidence confirmed the component was counterfeit.
Most instances of counterfeit electronic components are being reported by the OEMs issuing Government Industry Data
Exchange Program (GIDEP) Problem Advisories.

5.13.2.1 SAE AS5553, Counterfeit Electronic Components/Parts; Avoidance, Detection, Mitigation, and Disposition
Because of the critical nature of aerospace equipment, and the impact of use of counterfeit electronic components, the SAE

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Aerospace International Group developed the SAE AS5553 standard to reduce the risk of use of counterfeit electronic com-
ponents. This document consists of Section 4 mandatory requirements, and optional Appendix A-G criteria to support the
Section 4 requirements.
An overview of the SAE AS5553 Section 4 requirements is as follows:
a. The organization must develop and implement a counterfeit electronic components/parts control plan that documents its
processes used for risk mitigation.
b. The processes should maximize availability of authentic, originally designed and/or qualified components/parts through-
out the product’s life cycle, including management of components/parts obsolescence. Guidance is provided in Appendix
A.
c. Controls are invoked for the purchasing process. Guidance is provided in Appendix B, C and D.
d. Controls are provided for verification of purchased product. Guidance is provided in Appendix E.
e. The documented processes must address the detection, verification, and control of in-process (post acceptance) and
in-service suspect or confirmed counterfeit components/parts.
f. Requirements are invoked for material control. Guidance is provided in Appendix F.
g. Suspect or known counterfeit components must be reported to appropriate authorities. Guidance is provided in Appendix
G.
Although SAE AS5553 was initially developed for use by aerospace OEMs, it is being used by other OEMs who manufac-
ture product where the risk of use of a counterfeit electronic component cannot be tolerated.
SAE AS5553 revision original is the current issue of the standard as of the release date of IPC-HDBK-820. However, the
G-19 SAE Committee is developing a revision A of the standard and the main thrust of this revision is to make the stan-
dard suitable for international use.

5.13.2.2 SAE AS6174, Counterfeit Material, Avoidance, Detection, Mitigation, and Disposition The SAE G-21 Com-
mittee is developing a new SAE Standard, SAE AS6174, to address risk mitigation for mechanical parts and raw materials.
The new standard is being developed using the concepts outlined in SAE AS5553.

5.13.2.3 SAE AS6081 Fraudulent/Counterfeit Electronic Parts: Avoidance, Detection, Mitigation, and Disposition -
Distributors The SAE G-19D Committee is developing a new Standard, SAE AS6081 that applies to Open Market type
Distributors of electronic parts. The Standard is based on the concepts of SAE AS5553, except that it is tailored to Distribu-
tors rather than to Original Equipment Manufacturers (OEM).

5.13.2.4 IDEA-QMS-9090, is a quality management system (QMS) written specifically for the Independent Distribution
Industry. IDEA-QMS-9090 will layer on top of ISO 9001, AS9120 and ANSI/ESD S20.20 certification, with specific com-
ponents talking about supplier selection, inventory posting, customer provision and the inspection protocol.
References:
1. Article from SiliconXpert & Calce; Counterfeit Electronic Component Detection & Avoidance provided by Pecht, M. and
Tiku, S., Bogus: ‘‘Electronic Manufacturing and Consumers Confront a Rising Tide of Counterfeit Electronics,’’ IEEE
Spectrum, Vol 43, No. 5, pp. 37-46, May 2006

6 SOLDERABILITY

6.1 Introduction Solderability is the ability of a metal to be wetted by molten solder. The solderability of printed wiring
boards and components is a critical parameter for obtaining high yield soldering process results. Solderability assessments
can be conducted for the following goals:
• Assessment of the impact of different component and/or printed wiring board fabrication processes on surface finish quality
• Assessment of incoming component and/or printed wiring board surface finish quality
• Assessment of the impact of storage conditions on component and/or printed wiring board surface finishes
• Assessment of component and/or printed wiring board surfaced finish prior to assembly operations as part of a ‘‘Just In
Time’’ (JIT) protocol

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When component quantities are insufficient to support sample testing of solderability characteristics due to cost, complex-
ity or production schedules, a pre-tinning process may be employed instead of destructive testing as a methodology of deter-
mining surface finish quality. It is recommended that components and/or printed wiring boards that have either been stored
for an extended period prior to assembly or have stored under questionable conditions be solderability tested.
Solderability testing is a current time assessment of the continuous degradation of surface finish as a function of the nature
of the ambient environment, the time between deposition of the solderable finish, and the time of product assembly. For pur-
poses of correlation, the method and procedure of conducting solderability tests must be consistent. J-STD-002 and J-STD-
003 should be consulted for information on the type of flux, type of solder, and temperature to be used for solderability test-
ing. Not all soldering defects have a root cause of poor solderability. The ability to produce acceptable solder connections
may be inhibited or denied by design of the PCB. For instance, adequate solder fill of PTHs may be inhibited or denied by
a PCB with internal power, ground, or thermal planes or by a PTH with an incorrect lead to PTH ratio (aspect ratio). IPC
J-STD-002 and 003 establish solderability thresholds to insure that proper storage will have no adverse effect on the ability
to solder the component.

6.2 Inherent Solderability It is recognized that all practical soldering operations involve the formation of an intermetallic
compound (IMC) or compounds. An IMC is developed at the interface between the solder and the surfaces joined. The pres-
ence of the IMC’s at the interface lowers the system energy, eases, and speeds solder spreading. Therefore, the inherent sol-
derability of a surface tends to reflect the kinetics with which the surface forms an IMC (typically with copper or nickel).
Table 6-1 shows the inherent solderability of a number of common surface finishes. Keep in mind that the underlying
assumption is that these surfaces are reasonably clean when tested. Surface finishes rated in Table 6-1 as being ‘‘excellent’’
and ‘‘good’’ are usually acceptable for electronics soldering applications. The lower-rated surfaces will usually have to be
coated with an additional finish exhibiting improved solderability. Typically the non-solderable/marginally solderable sur-
faces listed in Table 6-1 will be plated with a barrier coating of nickel, which will then be over plated with a finish that has
excellent solderability characteristics.
It is also normal that some delay will occur before soldering is actually attempted. Even components for a JIT manufactur-
ing process may have been stored for some time at the supplier’s location. A clean surface may be subject to oxidation or
corrosive attack during this storage period. Thus, a common practice is to protect this surface with a more robust solderable
finish so that a complete cleaning is not required prior to soldering.
Table 6−1 Solderability of Some Common Surfaces
Material Relative Solderability
Tin Excellent
Gold
Cadium (unpassivated)
Silver Palladium
Copper Good
Bronze
Brass
Lead
Nickel silver
Beryllium copper
Zinc Fair
Nickel
Nickel-iron alloys
Aluminum Difficult
Aluminum bronze
High alloy steels
Cast iron Must be plated
Chromium
Titanium
Tungsten
Molybdenum
Magnesium
Ceramics

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6.3 Surface Finishes Protective surface finishes are available in several forms such as organic, fusible, or soluble. Each
type has advantages and disadvantages that vary with respect to satisfying specific requirements. Often the prime consider-
ation is the need for acceptable solderability with extended shelf life, although cost and convenience can be factors. Usu-
ally all other factors become insignificant when soldering is found to be impossible at the time the component or printed
wiring board is processed. Correcting the problem ends up being far more expensive in terms of cost and reliability than it
is to assure solderability prior to assembly.

6.3.1 Organic Surface Finishes Non-metallic finishes are generally limited to short term protection because they are more
susceptible to atmospheric interactions. Flux lacquer or varnish-type finishes are meant as inert barriers to protect the sur-
face. If oxygen or another corrodent penetrates the finish down to the protected surface, the corrosive product will probably
not be removed by the flux. It will then interfere with the soldering operation. When properly applied and stored, these fin-
ishes will be dissolved or react with the flux and offer the advantages of low cost and easy application.
On the other hand, non-metallic finishes lack the durability of a metallic finish. Therefore, their use on component leads is
less practical due to the fact that the leads may need handling and forming before they are soldered. A protective non-
metallic finish is one based on imidazole, benzotriazole or other similar chemicals that will react with a clean copper sur-
face. This reaction keeps the copper from oxidizing, but may itself present some difficulty in being removed. These are
commonly referred to as organic soldering preservatives (OSP).

6.3.2 Soluble Finishes Soluble finishes are usually precious metals. They are called soluble because they dissolve rapidly
during normal soldering operations while they provide excellent surface protection up to that point.

6.3.2.1 Gold Finishes Gold possesses excellent corrosion resistance when used as a surface finish. However, gold is rela-
tively expensive and may embrittle a solder joint if it is present in excess of about four percent by weight. It may also cause
voids if it is a bright-gold deposit. Gold is typically plated over other solderable surface plating such as nickel. The solder
connection should wet to the nickel once the gold goes into solution with the solder fillet. Experience has shown that elec-
troplated gold coatings as thin as 0.0005 mm [0.000020 in] provide the required surface protection for fairly short storage
times. Immersion gold coatings in the range of 0.00005 mm - 0.0001 mm [0.000002 - 0.000004 in] also provide the required
surfaced protection. Thin coatings will usually not need removal because the gold content in the finished solder joint will
be less than the four percent limit. There is a delicate balance between having enough gold protection and having too much
gold, creating solder embrittlement.

6.3.2.2 Silver Finishes Silver coatings may also be used as soluble finishes, especially where they may provide compat-
ibility with silver-containing microelectronic components. Silver also dissolves quickly in solder. Silver is less protective of
the underlying surface than gold and may exhibit tarnishing, especially in sulfide-containing atmospheres. Electroplated sil-
ver surface finishes on component leads have been shown to have adverse corrosion reactions in some end-use environment
applications. Current printed wiring board immersion silver surface finishes have been shown to be robust to a wide vari-
ety of end-use environment applications.

6.3.3 Fusible Finishes Probably the best general finishes are the fusible finishes, i.e., primarily tin and tin-lead. As one
expert put it ‘‘Nothing solders like solder.’’ Tin melts at 232 °C, a eutectic tin-lead alloy melts at 183 °C and the eutectic
tin-silver-copper alloy melts at 217 °C so these finishes melt or fuse at soldering temperatures. They then mix with the
applied solder and allow wetting of the base metal. If the coating was applied by hot-dipping or by reflow plating, then wet-
ting will have already occurred and the solder and coating will simply combine to form the joint. Tin or tin-rich finishes are
moderate in material costs, but are easily applied in most instances. Because these coatings will be cathodic to most metal-
lic substrates, it is important that the coverage be as complete as possible. Otherwise, a very rapid attack at pores will result.

6.3.4 Barrier Underplate Barrier Underplate are materials that may be plated on less solderable base materials. An
example of this type of finish is the coating for brass. Even when they have a high-quality tin-lead finish, there is short shelf
life due to zinc migration through the finish to the surface where the zinc oxidizes and prevents soldering with mild
electronics-type fluxes. Therefore, most specifications will require that the brass be plated with 0.0025 mm [0.0001 in] mini-
mum of either copper or nickel before a tin or tin-lead finish. Of course, this layer of copper or nickel will not melt during
the soldering operation and will not completely dissolve. Therefore, soldering is actually done to this layer and not to the
brass base metal.

6.4 Degradation of Solderability Surface finishes will degrade over time. The soluble finishes (precious metals) serve pri-
marily as oxidation barriers. If the finish thickness is too thin, the base metal can become corroded at the pores. Solderabil-
ity failure is then likely to occur. With the exception of the tarnishing of silver in certain atmospheres, the thicker soluble

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finishes are seldom degraded in storage. This makes gold an excellent choice for long term storage. Although they degrade
slowly during storage, the tin and tin-rich fusible finishes can be excellent choices for storage.
There is a popular misconception that these finishes lose their
solderability due to oxidation. While this concept is techni-
cally true, it is a small part of the failure mechanism. In truth,
oxidation studies have shown that in atmospheres of normal
quality and humidity, tin and tin-lead coatings produce a thin,
adherent, and self-limiting layer of oxides. Tin, for example,
can be stored indoors for a number of years before the oxide
layer becomes thick enough to be visible.
Any lead content will cause rapid darkening of the surface
layer. However, in the absence or oxidation or organic
corrosives, there will be no significant increase in oxidation.
These thin oxide layers on tin or tin-lead are friable (easily
broken up). Thus, when soldering, the heat of the soldering
process causes the underlying finish to melt (or fuse) and the
oxide layer is no longer supported. The oxide breaks up and
floats away with the flux, which also chemically attacks the
oxides. These oxides, therefore, present few problems in sol-
dering and oxidation per se, is not a significant degradation
mechanism.
Solderability is normally degraded because of the growth of
intermetallic compounds, mentioned above, as a vital require-
ment for practical soldering. Intermetallic compounds begin to
grow at ordinary temperatures whenever tin and copper come
into intimate, metallurgical contact. The growth seems to be
Figure 6-1 Dissolution of Selected Elements in Sn/Pb
diffusion controlled, with thickness increasing in proportion to
Solder
the square root of storage time. The growth rate also increases
with increased storage temperature, (see Figures 6-1 and 6-2).

Figure 6-2 Intermetallic Growth Rates

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Solderability problems come about when these intermetallic compounds grow thick enough to become oxidized at or near
the free surface of the finish. As the intermetallic compounds grow, tin is consumed from the finish and the finish therefore
becomes enriched in lead. Failure occurs when the intermetallic compounds (IMCs) become oxidized and lose their solder-
ability (causing wetting problems) or when all the tin has been consumed by the IMCs which leaves a pure lead coating that
is too sluggish to melt or dissolve (causing wetting problems). Lead rich coatings can also be porous, thereby allowing pas-
sivation of the underlying intermetallic compounds.
It has been found that the solderability of a surface at the end of its shelf life goes from solderable to un-solderable in a very
short period of time. This is the reason that solderability testing by itself will not give an indication of future solderability,
only of solderability at the actual time of testing. Thus, accelerated conditioning techniques must be used to simulate stor-
age and the degradation of solderability that might result from storage. It is the unfortunate nature of solderability degrada-
tion that a ranking of surface solderability made today may change dramatically in 30 days (Figure 6-3).

Figure 6-3 Comparison of Oxidized and Non-oxidized Sn/Pb Surface Finish

6.5 Accelerated Conditioning To help predict the effect of storage time on solderability, it is necessary to add an accel-
erated conditioning procedure to the testing. Storage at an elevated temperature is an obvious choice to accelerated degra-
dation. The danger is that too high a temperature will introduce a new mechanism of degradation that is unimportant during
normal storage. There remains some controversy over steam conditioning. Studies show strong variations in coupon weight
gain depending on exact (steam) conditioning temperature. This effect is an oxidation rate difference. Because oxidation is
felt to be no more than a secondary degradation mechanism behind intermetallic compound growth, this effect may not be
an absolute predictor of long term solderability. Other studies have shown that the type of oxide formed is different than that
found for heat conditioning or samples stored in normal conditions for long periods of time. This does not negate the use-
fulness of steam conditioning as a method of predicting solderability performance after storage. The use of any accelerated
conditioning methodology must be done with an understanding of how the resulting surface finish condition relates to natu-
ral aging reactions.

6.6 Printed Wiring Board Weak Knee Phenomena If a plated-through hole is coated with solder by hot air leveling, or
plating followed by reflowing, surface tension forces cause the molten solder to recede from the edges of the holes leaving
a thin (or nonexistent) coating over the thickened intermetallic compound. After a few hours of steam conditioning, the sol-
derability test fails when using an approved flux because of this thin layer. During a wave soldering or float test, as expected,
the solder may rise up the barrel of the plated hole by capillary action. However, it will not bridge over this thin layer onto
the upper lands. It has also been demonstrated using a stronger flux than the flux used in the solderability test, that the higher
activity of the flux will improve the probability of having solder wetting out onto the topside lands. Additionally, having
vibration energy in the solder wave at a frequency of 50 to 60 cycles per second has been shown to add additional force to
the normal capillary and wetting forces that are involved.

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6.7 Troubleshooting a Solderability Problem The first step in troubleshooting is to determine whether or not the problem
is truly a solderability failure.
Non-wetting on a surface or in a plated-through hole may have been caused by the presence of a solder resist (mask) coat-
ing that is out of place because of misregistration or bleed out. Because the use of a solder mask is intended to prevent sol-
der wetting, it can create defects.
Another unusual case is when a thin gold or silver layer on a non-wetting substrate dissolves too quickly in solder expos-
ing the non-wetting substrate to oxidation. Then, the solder will not wet the surface. This problem is one of design or pro-
cess control, as the layer needs to be thicker or of a less soluble metal.
When these unusual circumstances are not present and the problem is truly solderability, then non-wetting or de-wetting has
undoubtedly occurred and this points to a contamination problem at the solder-substrate interface. Inadequate cleaning may
be the source of the contamination.
Wetting may be restored by treating the surface with a ‘‘solder cleaner’’ or ‘‘solder brightener.’’ This solution is a mild acid
etch which may be sufficient to clean the contamination.
A more drastic measure is to tin or dip the surface by fluxing in an organic acid type flux and dipping the surface into a
solder pot, or by hot air leveling (in the case of printed boards). This technique exposes the component to an additional ther-
mal cycle which may cause accelerated degradation of quality.
The most drastic measure that can be taken to salvage non-solderable parts is to strip off the finish and reapply the finish.
The important consideration is to be certain that the source of solderability failure is known so as to be able to correct the
problem.
If the contamination is from excessive organic co-deposition in a tin or tin-lead surface finish, stripping and refinishing may
correct solderability. If the contamination comes from excessive organics in a copper under layer, replacing just the surface
finish would be a waste of effort. Every effort should be made to use modern surface analysis techniques to identify the con-
taminant and its source. Microsectioning can provide information necessary to determine intermetallic growth that degrades
solderability. The intermetallic, while necessary for a connection, is not a solderable surface.
The best measure is to design and build solderability into the component during its original manufacture. A surface finish
should be selected to give the necessary solderability shelf life and then it should be applied with care. Preventing solder-
ability failures is the least expensive option.

6.8 Solderability Tests

6.8.1 IPC J-STD-002 The J-STD-002 standard prescribes test methods, defect definitions, acceptance criteria, and illus-
trations for assessing the solderability of electronic component leads, terminations, solid wires, stranded wires, lugs, and
tabs. This standard also includes a test method for the Resistance to Dissolution/Dewetting of Metallization.
The purpose of the solderability evaluations is to verify that the solderability of component leads and terminations meets the
requirements established in this standard and to determine that storage has had no adverse effect on the ability to solder
components to an interconnecting substrate. Determination of solderability can be made at the time of manufacture, at receipt
of the components by the user, or just before assembly and soldering. The resistance to dissolution of metallization deter-
mination is made to verify that metalized terminations will remain intact throughout the assembly soldering processes.

6.8.1.1 Visual Acceptance Criteria Tests The solderability test methods contained in the J-STD-002 are:

Test A – Solder Bath/Dip and Look Test (Leaded Components and Stranded Wires) Tin/Lead Solder
Test B – Solder Bath/Dip and Look Test (Leadless Components) Tin/Lead Solder
Test C – Wrapped Wires Test (Lugs, Tabs, Hooked Leads, and Turrets) Tin/Lead Solder
Test D – Resistance to Dissolution/Dewetting of Metallization Test Tin/Lead Solder and Lead-free Solder
Test S – Surface Mount Process Simulation Test Tin/Lead Solder
Test A1 – Solder Bath/Dip and Look Test (Leaded Components and Stranded Wires) Lead-free Solder
Test B1 – Solder Bath/Dip and Look Test (Leadless Components) Lead-free Solder
Test C1 – Wrapped Wires Test (Lugs, Tabs, Hooked Leads, and Turrets) Lead-free Solder
Test S1 – Surface Mount Process Simulation Test Lead-free Solder

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Force Measurement Tests

Test E – Wetting Balance Solder Pot Test (Leaded Components) Tin/Lead Solder
Test F – Wetting Balance Solder Pot Test (Leadless Components) Tin/Lead Solder
Test G – Wetting Balance Globule Test Tin/Lead Solder
Test E1 – Wetting Balance Solder Pot Test (Leaded Components) Lead-free Solder
Test F1 – Wetting Balance Solder Pot Test (Leadless Components) Lead-free Solder
Test G1 – Wetting Balance Globule Test Lead-free Solder

6.8.1.2 Coating Durability The J-STD-002 contains the following information to aid the component user in understand-
ing the durable (aka how solderable) level of a component surface finish:
Category 1 – Minimum Coating Durability Intended for surfaces that will be soldered within a short period of time (e.g.,
up to six months) from the time of testing and are likely to experience a minimum of thermal exposures before soldering
Category 2 – Typical Coating Durability Intended for surfaces that will be soldered after an extended time from the time of
testing and which may see limited thermal exposures before soldering
Category 3 – Enhanced Coating Durability (default for tin-based finishes) Intended for surfaces whose solderability may
become degraded from storage of longer than six months or from multiple thermal exposures

6.8.2 Force Measurement Solderability force measurements use what’s known as a wetting balance that measures force
to an extremely high level of accuracy (milli-Newtons). Some instruments even measure to levels of better than 0.1 µN/BIT.
Although the type of Wetting Balance used for plated through-hole (PTH) and surface mount (SM) components differs, both
are based on the same physical principles.
When a metallic body is dipped into molten solder, the measured force and speed with which the solder meniscus climbs
upwards on the body’s immersed surface indicates how well the solder wets it and thus its solderability. The greater the sol-
derability, the greater the perimeter of the meniscus and the higher the meniscus will climb which can be measured as a
change in the vertical force action on the suspended specimen. For certain TH components and circuit board coupons, the
specimen device is immersed in a bath of molten solder and the forces of buoyancy and surface tension action upon it are
measured. For smaller SMDs, a higher resolution method is required. The Micro-wetting Balance (Figure 6-4) procedure
employs a solder globule. Here the solder bath is replaced by a globule block allowing individual leads to be evaluated on
a multi-leaded component.
A number of parameters can be read from the force curve and specifications typically require that the curve to cross the
zero-force axis within a short period of time and that a high value of wetting force be achieved within another specified
time (Figure 6-5).

Figure 6-4 Schematic of the Wetting Balance Test

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Figure 6-5 Idealized Wetting Balance Curve

Assemblers need to know for sure that they are using boards and components of known good solderability. Force-based sol-
derability testing is intended to quantitatively measure the solderability of a given surface finish and remove any opinion or
‘‘manual’’ judgment calls that typically occur with dip-and-look evaluations.

6.9 IPC J-STD-003 J-STD-003 prescribes the recommended test methods, defect definitions and illustrations for assessing
the solderability of printed board surface conductors, attachment lands, and plated through holes. This standard is intended
for use by both vendor and user.
The solderability determination is made to verify that the printed board fabrication processes and subsequent storage have
had no adverse effect on the solderability of those portions of the printed wiring board intended to be soldered. This is
determined by evaluation of the solderability specimen portion of a board or representative coupon which has been processed
as part of the panel of boards and subsequently removed for testing per the method selected.
The objective of the solderability test methods described in this standard is to determine the ability of printed board surface
conductors, attachment lands, and plated through-holes to wet easily with solder and to withstand the rigors of the printed
board assembly processes. Additionally, solderability tests can predict the performance of the PCB or component after it has
been in storage.
The solderability test methods contained in the J-STD-003 are:

Tin Lead Solder Alloy

Test A – Edge Dip Test For surface conductors and attachment lands only
Test B – Rotary Dip Test For plated-through holes, surface conductors and attachment lands, solder source side
Test C – Solder Float Test For plated-through holes, surface conductors and attachment lands, solder source side
Test D – Wave Solder Test For plated-through holes, surface conductors and attachment lands, solder source side
Test E – Surface Mount Simulation Test For surface conductors and attachment lands

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Lead Free Solder Alloy

Test A1 – Edge Dip Test For surface conductors and attachment lands only
Test B1 – Rotary Dip Test For plated-through holes, surface conductors and attachment lands, solder source side
Test C1 – Solder Float Test For plated-through holes, surface conductors and attachment lands, solder source side
Test D1 – Wave Solder Test For plated-through holes, surface conductors and attachment lands, solder source side
Test E1 – Surface Mount Simulation Test For surface conductors and attachment lands
Force Measurement Criteria Tests
Tin Lead Solder Alloy
Test F – Wetting Balance Test For plated-through holes, surface conductors and attachment lands

Lead Free Solder Alloy

Test F1 – Wetting Balance Test For plated-through holes, surface conductors and attachment lands

Coating Durability
The JSTD-003 contains the following information to aid the printed wiring board user in understanding the durable (aka
how solderable) level of a printed wiring board surface finish:
Category 1 – Minimum Coating Durability
Intended for printed boards which will be soldered within 30 days at the time of PCB manufacturing and are likely to expe-
rience minimum-to-moderate thermal exposures.
Category 2 – Average Coating Durability
Intended for printed boards likely to experience up to 180 days storage at the time of PCB manufacturing and minimum-
to-moderate thermal exposures.
Category 3 – Maximum Coating Durability
Intended for printed boards likely to experience long storage (greater than six months) at the time of manufacture and/or
severe thermal or solder processing steps. It should be noted that while the storage duration is specified greater than six
months it is not implied to be solderable forever and that some common sense be used if excessive long term storage has
been applied to the PCBs.
6.10 The Importance of Flux Material in Solderability Testing The current J-STD-002/J-STD-003 specification includes
a departure in the test flux methodology used in past solderability testing. Table 6-2 is from paragraph 3.2.2 of J-STD-003:
Table 6-2 Flux Compositions
Composition by
Weight Percent
Constituent Flux #1 Flux #2
Colophony 25 ± 0.5 25 ± 0.5
Diethylammonium hydrochloride 0.15 ± 0.01 0.39 ± 0.01
Isopropyl Alcohol (IPA) Balance Balance
Weight of Chlorine as % of solids 0.2 0.5

The J-STD-002/J-STD-003 committees understood that any proposed change to the use of ROL0 (formerly designated type
R) would be heavily scrutinized and would require test data showing the applicability of using a standard activated flux
composition. The committees have spent significant resources working this flux change issue, discussing the chemistry
details and conducting multi-company Design of Experiment (DoE) investigations. The four rationales supporting the flux
change are summarized below:

1. A Proactive Solderability Testing Approach To The Implementation of Non-Tin Finishes

A number of industry studies (1996 NEMI Surface Finishes Task Group Report, 1997 NCMS Lead-Free Solder Project,
2000 National Physical Laboratory CMMT (A) 284 Report) have shown an incompatibility of ‘‘R type’’ flux with non-
tin surface finishes such as palladium, organic solderability preservatives (OSPs), and immersion gold. The introduction
of these various surface finishes on components and printed wiring boards is no longer the exception but is quickly
becoming the norm. The use of a ‘‘R type’’ flux containing only naturally occurring activators has resulted in producing
‘‘false negative’’ solderability test results which impact both the component/board fabricator and the assembler negatively
in terms of cost and schedule.

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2. Reduced Solderability Test Variability

The J-STD-002/003 solderability committees enlisted the assistance of Dr. Carol Handwerker and the resources of the
National Institute of Standards & Technology (NIST) to investigate/compare a standard activated flux composition ver-
sus the ‘‘R type’’ flux composition. A detailed statistical analysis by Bill Russell, Raytheon Systems, and NIST statisti-
cians revealed the use of a standard activated flux composition greatly reduced the amount of solderability test variation.
One of the major goals of the J-STD-002/003 solderability committees is to develop test methods and standards which
promote consistency across the industry.

3. Concerns of A Loss of Solderability Assessment Safety Margin

The two major historical rationale for using an ‘‘R type’’ flux are: 1) colophony or rosin contains only naturally occur-
ring flux activator constituents and thus is not subjected to the problems/complications of chemistry formulas by the flux
supplier and; 2) it was an accepted industry acknowledged fact that if a component or printed wiring board surface was
found to have acceptable solderability test results using ‘‘R type’’ flux then the more active flux formulations used in the
assembly process would produce acceptable solder process results. This solderability assessment safety margin was a
self-imposed, industry consensus decision. The J-STD-002/003 committees understood the historical relevance behind the
decision to use ‘‘R type’’ flux and had an equally strong desire to maintain a solderability assessment safety cushion.
However, committees fielded a number of industry inputs to reassess the solderability flux composition based on the
technology improvements in surface finishes, improvements in the flux chemistry formulations from flux suppliers, and
the desire to avoid an excessive safety margin which would impact cost and schedule in an non-value added manner. The
committees conducted a number of tests (Wenger, Kwoka, ACI) which demonstrated that using a specific standard level
of activation on real world, industry supplied component and printed wiring board cases, that the occurrence of a ‘‘false
acceptable’’ solderability test result was extremely low. There was no case that exhibited a ‘‘pass ROL1 test - fail ROL0
test - Fail during board assembly sequence.

4. Standardization of Solderability Test Flux Composition On A Global Scale

A second major goal of the J-STD-002/003 solderability committees is to develop test methods and standards which pro-
mote global standardization for the electronics industry. The standard activated flux composition selected and tested by
the committees has been utilized in the International Electrotechnical Commission (IEC) 60068-2-20 Soldering specifi-
cation. The IEC specification is successfully utilized for solderability testing. Having compatibility of flux composition
requirements between the J-STD-002/003 specification and the IEC specifications is a win-win situation for electronics
assemblers and component/printed wiring board fabricators.

7 ASSEMBLY AND JOINING MATERIALS

This Section of the Assembly and Joining Handbook provides selection guidance information that pertains to the materials
used for the assembly and joining of components to electronic assemblies.

7.1 Introduction The development and growth of printed board technology was greatly assisted by the ease with which a
soldered connection is completed. As electronic packaging developed from hand wired circuits and discrete components to
modern surface mounted devices on multilayered printed boards, the soldering equipment and materials have become more
technically advanced. High production soldering equipment has improved other joining methods and it allows the simulta-
neous joining of hundreds of electrical terminations. Many connections could be made with other methods, but soldering
continues to be the most reliable and least costly means of joining metals in the electronics industry.
Field failures of expensive electronic equipment can often be traced to the improper selection and misuse of soldering mate-
rials. A thorough knowledge of the nature of soldering materials and the requirements for reliable soldering is a good basis
for a scientific approach to solving soldering problems.
Soldering is a total system concept involving the joining of two or more metal surfaces using the proper flux and solder
with the correct amount of heat and time. Since the key to efficient soldering is surface preparation, much emphasis is placed
on the solderability of surfaces. A clean surface can be preserved with a solderable or protective coating. Fluxing and sol-
dering after minimal storage time is best. With our growing technology, solder joints may be subjected to a variety of envi-
ronmental service requirements.
It is important to understand the composition and properties of the flux and its residue after soldering. A soldering flux may
be formulated for ease of removal or may be left on the electronic assembly, if insulating properties are acceptable.
The condition of the metal and nonmetal surfaces directly relates to flux selection, residue removal, and associated prob-
lems. For this reason there is a need to discuss the surface treatment and materials which affect the flux performance.

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7.2 Presoldering Chemicals The reliability of soldered connections is directly related to the solderability of the surfaces
being joined. The primary requirement for soldering is that the molten solder comes into direct contact with the metal sur-
face being soldered. Every effort should be made to assure that the surfaces of printed boards, component leads, and other
devices are completely free of contamination.
7.2.1 Metal Surface Activating Solutions The condition of the metal surface is most critical with high speed automated
soldering machines. Since the solder may only contact the surfaces from one to two seconds as in the case of wave solder-
ing, selective soldering, etc., the performance of the equipment and the reliability of the soldered assembly is directly related
to the degree of cleanliness of the printed boards, component leads, terminals, jumpers, and other solderable devices. Any
discussion related to the cleanliness and solderability of printed boards would also apply to these other surfaces.
Other soldering methods, such as dip-soldering in a pot, hot air soldering, reflow soldering, or hand soldering with irons are
slower and may take better advantage of the cleaning ability of the flux to provide reliably soldered connections.
Contamination on the surfaces may be organic or inorganic, and may be on or in the metal or insulating materials. The
impurities may be present as particulate matter or a surface-covering film in a non-ionizable state. The ionizable residues,
which are salts, acids, and bases, are particularly problematic. They could cause additional corrosion problems as the metal
surface ages resulting in solderability and cleaning difficulties.
Table 7-1 lists some typical types of contaminating dirt which may affect the solderability of metal surfaces.
Incomplete cleaning, as well as improper cleaning methods, can be sources of reduced solderability. Mechanical cleaning of
printed boards may imbed particulate matter, such as pumice, in the surface of the soft copper and cause poor solder wet-
ting. Abrasion or dry scrubbing of, for example, a copper surface with aluminum oxide grit, wire or glass brushes, or steel
wool can also imbed the abrasive material or copper oxide in the surface, unless a significant amount of copper metal is
removed. Any cleaning method resulting in surface contamination should be avoided or, at least, followed by chemical etch-
ing of the copper.
Table 7−1 Types of Contaminants
Contamination Type Source
Ground-in pumice Inorganic, particulate Dry pumice, cleaning
Photo resist scum Organic Incomplete removal of resist
Co-deposited brighteners Organic Excessive amount in plating solution
Resin smear Organic laminate Incomplete cure of glass epoxy
Oil and grease Organic Contaminated rinse water
Passive film Inorganic Alkaline etchant residue
Oil and salt Organic, Ionic Perspiration from handling
Etching salts in holes Inorganic, Ionic Inefficient rinsing
Dust Particulate Airborne, drilling residue
Oxides, sulfides, carbonates Inorganic Air, cardboard packaging

Organic contamination, such as resins, oil and grease may or may not dissolve in the flux solvent system. Contamination on
the metal surface can interfere with the fluxing process and result in poor soldering. It is good practice to determine where
the organic contamination is introduced and eliminate that source of potential soldering problems. For example, the bright-
eners or leveling agents that are added to the printed wiring board fabrication plating bath solutions usually co-deposit with
the solder and tin plating. These organic materials, such as peptone, glue, molasses, or other proprietary additives, improve
the appearance of the plated surface, but inhibit complete contact between the solder and the metallic surface. When solder
is used as resist for alkaline etchants, the tin-lead surface will be covered with a passive alkaline film which will act as a
barrier against the flux and solder. Residual salts from etching, such as chlorides and sulfates, are potentially corrosive and
usually not compatible with the fluxes. Handling the printed board can also leave salt and oil deposits.
Prior to every printed wiring board fabrication plating step, it is essential that the metal surface be perfectly clean for proper
plating. Unfortunately, for the person trying to do the soldering, coatings such as tin and solder often are plated over a con-
taminated copper surface. Silver, gold, tin or solder can be plated onto dirty, unsolderable component lead materials such as
nickel or nickel-iron alloy. During the printed wiring board assembly soldering operation the dirty, contaminated surface will
not solder properly when the tin or tin-lead plating melts or the gold and silver dissolve into the molten solder.
The presoldering cleaning procedure should be established with one goal in mind: removing all contamination which may
interfere with the soldering process. Degreasers remove oil and grease. Some salt residues wash away in water. Most salt

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residues (alkaline film, oxides, sulfides, and carbonates) can easily be removed in a number of proprietary surface-
conditioning cleaning solutions which are usually a mixture of acidic chelating agents. These solutions remove the non-oily
contamination without etching away valuable base metal. Strong mineral acids, on the other hand, clean by etching away
the surface metal and may expose base metal or plating layers. Etched or pitted surfaces oxidize faster, can trap impurities,
and, in the case of copper, dissolve faster in molten solder.
The secret of success when using most soldering materials, whether it is flux, solder, or solder mask (mask), is a clean metal
surface. The only time a contaminated surface can be allowed into the process is when using a precleaning solution, the
surface in question will not affect the process and is removed afterwards or if the post-soldering residue will not cause cor-
rosion or interfere with electrical connections or application of post soldering materials.

7.2.2 Solder Mask If a solder mask is used, it should be applied immediately after cleaning the printed board surface. A
solder mask, also known as solder resist or solder stop-off, is a coating which acts as a barrier to prevent solder bonding.
There are many types of masking materials and each has its own specific applications, advantages, and disadvantages.
The simplest type of solder mask is a special type of masking tape, primarily used to mask contact fingers and holes which
should not be soldered. Care should be taken to use tape which can withstand the high soldering temperature without leav-
ing gummy residue when removed. Another temporary solder mask is liquid masking material. Usually based on latex or
clay formulations, these masking solutions can be applied by dispensing, dipping, brushing, or screening. After soldering,
the mask is peeled from the surface, if it is the latex type, or it washes away in water or flux removing solvent. Before
designing this type of material into the process, tests should be made on the desired temporary solder mask, since most of
these materials experience some difficulty withstanding soldering temperatures or have short shelf life\.
The more commonly used solder mask is the permanent epoxy type. There are formulations available in both single com-
ponent and two part systems. Dry film types are also available. The most durable are usually heat cured or ultraviolet cured.
Since there are a variety of brands to choose from, it is important to follow carefully the manufacturer’s curing instructions
for maximum efficiency. This permanent solder mask is usually screened onto the printed board to cover everything but the
pads around the holes. There are several advantages, mostly for wave soldering, to using solder mask, including:
• Reduces solder consumption by as much as 40%
• Reduces metallic contamination of solder in pots
• Controls solder flow on uneven lands
• Reduces bridging between adjacent conductors
• Reduces time to inspect for defects
• Can act as an insulator.
The extra cost of applying a solder mask should be weighed carefully against these material savings, labor savings, and per-
formance characteristics. A permanent solder mask is best applied over a copper surface. Obviously, applying solder mask
over a solder or tin-plated surface should be avoided because the heat of soldering will melt the surface, causing the solder
mask to wrinkle and even fall off.
The dry film type of solder resist remains intact over solder or tin-plated conductors and lands.
It is recommended that the mask height not exceed pad height in order to prevent loss of gasketing around the pad during
the paste printing process.

7.2.3 Protective Coatings To solder reliably, a clean, active surface must contact molten solder. Ideally, soldering should
be done immediately after cleaning the surface before it becomes contaminated. Since this is not always practical with nor-
mal production requirements, it is possible to preserve the clean surface, to maintain solderability, by applying a protective
coating over the metal surface. One effective coating is the rosin type.
After cleaning the printed board and rinsing it in water, the wet printed board is immersed into the water-displacing rosin
protective coating. This coating is nearly pure rosin and is compatible with most rosin fluxes. Be careful not to cure
the rosin coating beyond the manufacturer’s recommendation since it may polymerize, become like epoxy, and prevent
soldering.
Rosin protective coating is not compatible with water-soluble organic fluxes. Alcohol solvent in the flux may help dissolve
the rosin coating to allow soldering. However, after soldering, the water wash cannot remove the rosin residue (which turns
white) or the ionizable flux residue, which may be mixed with the rosin. This method is little used today.

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7.3 Solder Fluxes Soldering flux provides the environment in which molten solder must work. It changes the surface by
removing and preventing contamination. Fluxing is only a part of the total soldering operation, but the choice of the proper
flux and the correct use of that flux can directly determine the reliability of the completed assembly. Solder is not glue and
does not simply fill up a gap between parts or stick to a surface. Since molten solder will only flow out and bond to a clean
metal surface the flux must prepare the surface by providing a clean metal contact.
When solder is melted on a tarnished or oxidized surface the internal cohesive forces in the solder cause it to pull into a ball
much as water balls up on a waxed surface. Only when the surface is clean (free from oxide and dirt) will the bonding forces
between the solder and metallic surface overcome the solder cohesive force and flow out over the surface.
Techniques such as mechanical abrasion, soldering with ultrasonics, using reducing gases such as hydrogen, using inert gases
such as nitrogen, or soldering in a vacuum, have all been effective means for preparing the surfaces for solder. However, the
use of soldering flux is preferred, because of easy application, low cost, and reliability.
The following lists the requirements for choosing the correct soldering flux:
• Must remove oxide and penetrate films
• Must be thermally stable
• Prevent oxidation at soldering temperatures
• Lower interfacial surface tension
• Be easily displaced by the molten solder
• Be non-injurious to components
• Be easily removed, if desired
• Must not affect performance if left on assembly
Flux should, at the very least, remove oxides. The secondary task of flux is to prevent oxidation of the surfaces during heat-
ing and to promote wetting and spreading of the solder by lowering the surface tension. Reducing oxidation is the only type
of ‘‘cleaning’’ that a flux is designed to do. Too often the flux is expected to remove other types of contamination such as
oil, grease, dirt and fingerprints.
Especially with the very low solids content fluxes, heat stability is a critical factor as the thin film of flux has to withstand
whatever part of the entire heating process required.

7.3.1 Choosing the Proper Flux Sometimes the scientific approach is totally neglected and there are attempts to try every
flux made, hoping to find that one magic formula which accomplishes the ideal soldered connection. The proper method to
approach any soldering application, whether the heating is done with an iron, pot, flame, wave solder machine, or air reflow
is to consider the entire soldering system.
The temperature and types of heating methods, time of soldering, and the condition of the surfaces being soldered all deter-
mine the type of flux which must be used. The amount of oxide reduction required by a flux determines the strength or
activity necessary, and therefore, the type of flux. Table 7-2 lists the various solderable metals according to their relative
solderabilty as pure materials.
The solderability of plated metal coatings is affected also by the bath purity and processing conditions. The nature of the
oxide coating is dependent not only on the metal selected, but also on the environmental and thermal history.

7.3.2 Flux Types There are basically only two types of fluxes: organic and inorganic. Each of these types has many varia-
tions. Fluxes of all types are available as liquids, pastes, or in flux-cored wire solder. When using a cored solder in conjunc-
tion with a liquid flux, it is good practice to use compatible fluxes so that removal of the residues is a simple matter.
With very few exceptions, fluxes are acids. Acids reduce oxides on metals. The acids can be water soluble, such as the inor-
ganic and most organic fluxes, or non-water soluble, such as rosin or certain other carboxylic acids, or only solvent soluble,
such as the SA (Synthetic Activated) type fluxes.
The J-STD-004: Requirements for Soldering Fluxes specification defines the industry classification system used to distin-
guish the different flux chemistries available for industry use. Table 7-2 also lists the flux classifications.
The historic flux classifications of R, RMA, and RA have been replaced by a new class system that provides a more detailed
characterization of the flux material in terms of base chemistry, flux activity level, and halide content. The following chap-
ter sections provide further detail of the different base flux chemistries.

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Table 7-2 Flux Identification System1

Flux/Flux Residue
Flux Composition Activity Levels % Halide1 (by weight) Flux Type2 Flux Designator
<0.05% L0 ROL0
Low
<0.5% L1 ROL1
Rosin <0.05% M0 ROM0
Moderate
(RO) 0.5-2.0% M1 ROM1
<0.05% H0 ROH0
High
>2.0% H1 ROH1
<0.05% L0 REL0
Low
<0.5% L1 REL1
Resin <0.05% M0 REM0
Moderate
(RE) 0.5-2.0% M1 REM1
<0.05% H0 REH0
High
>2.0% H1 REH1
<0.05% L0 ORL0
Low
<0.5% L1 ORL1
Organic <0.05% M0 ORM0
Moderate
(OR) 0.5-2.0% M1 ORM1
<0.05% H0 ORH0
High
>2.0% H1 ORH1
<0.05% L0 INL0
Low
<0.5% L1 INL1
Inorganic <0.05% M0 INM0
Moderate
(IN) 0.5-2.0% M1 INM1
<0.05% H0 INH0
High
>2.0% H1 INH1
1. Fluxes are available in S (Solid), P (Paste/Cream) or L (Liquid) forms.
2. See J-STD-004, 5.2 and 5.3 for comparisons of RO, RE, OR and IN composition classes and L, M and H activity levels with the traditional classes such as
R, RMA, RA, water soluble and low solids ‘‘no-clean.’’
3. The 0 and 1 indicate absence (<0.05% by weight in flux solids) and presence of halides, respectively. See J-STD-004, 3.2.2 for flux type nomenclature.

7.3.3 Rosin/Resin Fluxes (RO or RE Classification) The mildest fluxes are those derived from rosin. Rosin is a mixture
of resin acids which occur naturally in the oleoresin or sap of trees. The resin acids are three-ring, isomeric monocarboxylic
acids with a hydrophenanthrene nucleus. Consisting of primarily abietic, primaric acids and other similar acids, rosin was
long acclaimed as the best flux for electronics soldering because of its neutral insulating nature at room temperature.
Rosin itself is a rather poor flux, since its oxide reduction ability is minimal. The use of rosin as a flux requires careful con-
trol over temperature. Rosin begins to melt at about 70 °C, but does not react with copper oxide until 100 °C forming cop-
per abietate. This green, soapy reaction product often has been mistaken for corrosion, but is actually an insulator itself.
At about 260 °C rosin begins to decompose and form reducing gases to function at peak fluxing ability. Too high a tem-
perature (exceeding 340 °C) will rapidly render rosin inactive and cause polymerization, leaving a residue that is difficult
to remove.
Due to the minimal oxide reduction character of pure rosin, most fluxes contain activation additives that leave residues with
the neutral properties of plain rosin. The first step came nearly 60 years ago when organic acids and organic acid chloride
derivatives were added to the rosin to improve the fluxing action. Other activating agents, such as amine hydrohalides, have
been used successfully in fluxes for decades.
Problems arise with today’s electronics. When only flux cored wire solder was being used, all of the activated rosin flux was
heated to soldering temperature, which resulted in an effective decomposition of the organic activators, leaving a relatively
inert residue. The introduction of automated methods for soldering printed board assemblies promoted an increased use of
liquid activated rosin fluxes. J-STD-004 details specific tests for distinguishing between the various types of rosin fluxes.
Activated rosin/resin fluxes, in an unheated condition, can dissolve several hundred angstroms of copper in a temperature
humidity test. The amount of activating agent used in the activated rosin fluxes is usually less than one percent, but this can

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cause electrical problems if the operating temperature of the solder assembly exceeds 70 °C, the point where rosin begins
to melt. To avoid the potential problems which may arise when using activated fluxes, flux technology has developed along
several different paths.
Even with the understanding that activated rosin fluxes have the potential to cause electrical conductivity problems at
elevated temperatures, or corrosion problems if only the rosin portion is removed, the majority of companies using rosin
flux still prefer activated rosin flux. Many millions of electronic assemblies since 1950 have been soldered using this most
popular of flux types. The reason was simple, printed boards and component parts were not always solderable enough for
milder fluxes to produce reliably soldered connections.
The good insulating property of the rosin residue protected the circuitry from the environment. When necessary, because of
high voltage requirements or when the assembly would operate at higher than room temperature, the rosin and activator
residue can be removed with solvents containing alcohol or with water saponifier (detergent) cleaning. The objective is reli-
able soldering without knowing the solderability of parts, and the necessary removal of residue afterwards.

7.3.4 ‘‘No Clean’’ Fluxes There are four factors resulting in the development and use of very low residue fluxes. First,
there was a natural progression of the activated rosin fluxes to lower solids. This was driven by the desire to have less resi-
due remaining, whether or not it was removed. Concurrently, as the solids content was being reduced, the electrical require-
ments on the printed board assembly were becoming more stringent, and fully activated fluxes with lower rosin content were
leaving deleterious residues.
The second factor leading to the development of ‘‘no clean’’ fluxes was the improved solderability of printed boards and
components, somewhat driven by the introduction of improved solderability test equipment. With the advent of statistical
process controls in component production and more ‘‘just-in-time’’ deliveries, the need for chloride (or bromide) activated
fluxes diminished.
The third factor was economics; it costs a lot of money to remove flux residue. Solvents and cleaning equipment are expen-
sive. Disposal of waste solvent is expensive. Surface mounted components trap flux residue which is very difficult to remove.
So, the activated rosin fluxes may not be completely removed and could possibly cause electrical problems depending on
the flux used and degree of removal.
The fourth factor was environmental. With revelations that chlorinated solvents are affecting the protective ozone layer in
the upper atmosphere, and with a greater awareness of the toxicity of solvents, there is increased interest in fluxes which
can be left on the printed board assembly. At the same time, automation often requires electrical testing with ‘‘bed-of-nails’’
probes or ‘‘flying-probe’’ testers, so minimal residue was a requirement.
This type of flux can be rosin based and is activated mainly with non-water soluble organic acids. The solids content was
in the 2-5% range and is now more in the lower end of this range. Some fluxes which are still noncorrosive and non-
conductive do not contain rosin. It is most important to have excellent solderability of the parts being soldered since such
a mild flux has a very low level of activity. Much test data is available from the flux manufacturers on the corrosion and
electrical insulation resistance of the residue. It should be noted that the term ‘‘no clean’’ fluxes is an industry process
descriptive term and does not necessarily reflect the flux chemistry character, i.e., ‘‘no clean’’ doesn’t mean that the residue
doesn’t need to be cleaned. J-STD-004 provides the appropriate flux identification and characterization. In addition, J-STD-
001 addresses cleaning of assemblies to remove flux residues

7.3.5 Organic Fluxes (OR Classification) Though the OR type of flux has been used for several decades, only in the
1980’s did the general use of organic flux dramatically increase.
The organic water soluble fluxes are complex mixtures of organic acids, halide salts of organics acids and amines, wetting
agents and solvents. All this salt has an effect on the insulation resistance of porous printed boards, such as paper-based phe-
nolic. Glass/epoxy printed boards have been used successfully with or without plated-through holes. The assembly must be
designed for water removal of the flux residue. Any areas where flux can be trapped should be avoided, such as stranded
wiring, porous components, and open relays or transformers.
One of the most dangerous properties of these organic fluxes is the ability of the residue to absorb water from the environ-
ment, greatly increasing its quantity and mobility. There is no such thing as self-neutralizing flux since neutralization
requires heating to soldering temperature; a feat which is never completely accomplished.
The advantages for organic water soluble fluxes center on efficiency and ease of cleaning. Since the organic fluxes are very
active, very little precleaning is necessary, except to remove oil and dirt other than oxide. Reliability is greatly increased

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with the decrease in expensive rework. The time and temperature of the soldering process can be reduced since less heat is
required to activate the flux. Post cleaning in a water solution also removes other ionic residues which may be on the printed
board assembly from previous handling during processing.
This advantage of cleaning with water can also be a disadvantage. The very active fluxes contain hydrochloric acid which
can attack Copper and Lead resulting in rinse water which can be an environmental problem. Either neutral pH or halide-
free fluxes are available to avoid the dissolution of metal in the rinse water. Soldering activity is reduced but so also is the
attack on metals, laminates, and solder mask.

7.3.6 Inorganic Fluxes (IN classification) These flux materials find very limited use for electrical connections. This type
of flux consists of metal chloride salts primarily zinc and stannous chlorides.
The strongest fluxes, the so-called stainless steel fluxes, usually contain a considerable amount of hydrochloric or phosphoric
acids. These fluxes are highly corrosive and not completely removable with a water rinse. Unfortunately, most companies
that have been in existence from at least 1990 have stories of corrosive soldering paste (e.g., zinc chloride in petroleum jelly)
being used on the assembly line due to soldering difficulties when using milder fluxes. The results can be disastrous,
although ‘‘everything solders great!’’

7.3.7 Topping Oils Many wave soldering machines are set up to incorporate oil either on top of the solder in the pot or
injected into the wave to assist soldering. Essentially, these proprietary oils are an extension of the flux system. With the
purpose of lowering interfacial surface tensions between the solder and metal surface being soldered, the topping oil also
reduces oxides on the solder pot. Most oils are composed of mineral oil, fatty acid, and anti-oxidizing agents.
This type of oil is compatible with the rosin flux and solvent removal system. Organic water soluble fluxes require a water
soluble type of topping oil such as glycols, wetting agents, or other high temperature water soluble liquids.

7.4 Solder The word ‘‘solder’’ is derived from the Latin solidare which means ‘‘to make firm.’’ Soft soldering refers to
joining metals at temperatures below 370 °C. In the printed circuit industry solder was used not only to join metals but also
to act as a protective coating on printed boards and component leads. The most important property of solder in any metal
working industry is the ability to wet metal surfaces. Wetting the surface means dissolving a small amount of the metal sur-
face and forming an intermetallic layer between the solder and the metal being soldered.

7.4.1 Solder Alloy Selection

7.4.1.1 Standard Solder Nomenclatures Solder is available in a variety of forms and alloys to accommodate different
applications. There is no longer a standardized nomenclature for solder materials such as used in older solder standards like
QQ-S-571. J-STD-006 solder alloys and forms states that the description of a solid solder product should identify all appro-
priate characteristics, such as alloy composition and impurity level, solder form, flux classification, flux percentage, product
dimensions, and product unit size. Complete description of special solid solder products usually requires a tabular or narra-
tive format, because the number of possible variations in characteristics cannot be easily coded into a concise description
format.

7.4.1.2 Eutectic and Near Eutectic Solders Traditionally solder alloys utilized in the electronics industry are typically
eutectic or near-eutectic alloys. For tin lead solder, the eutectic composition is 63% tin by weight and 37% lead by weight,
and is referred to as Sn63Pb37. In Figure 7-1, the area above line identified by points A-B-C is always liquid (this line being
referred to as the liquidus), and the area below line identified by points A-D-E-C is always solid (this line being the soli-
dus). The area between these two lines is a mixture of solid and liquid phases, often referred to as the plastic region. The
selection of the near eutectic composition is to promote rapid solidification of the solder connection, which minimizes grain
growth during solidification, yielding a ‘‘shinier’’ solder connection.
Another important point is that the 183 °C initial melting point exists for all tin-lead alloys for 20-98% tin. There is no ben-
efit of service temperature unless the tin content is less than 20%. These standard tin/lead alloys can be varied by adding
other metals such as bismuth and indium to lower the melting temperature, or antimony and silver to increase the hardness.
As mentioned earlier, the choice of the soldering flux is dependent primarily on the solderability of the base material. With
a few exceptions the solder alloy is selected for other reasons.
The choice of solder alloys may be based on temperature. The initial melting point of the alloy should be considered when
seeking an alloy for high temperature applications or for multiple step soldering applications. Table 7-3 is a list of some of
common historical solder alloys, some of the more popular newer ones and their melting temperatures.

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Figure 7-1 Tin Lead Phase Diagram

Table 7−3 Solder Alloys and Their Melting Points

Alloy Melting Temperature°C
67/37 tin/lead 183 eutectic
60/40 tin/lead 183-190
50/50 tin/lead 183-214
40/60 tin/lead 183-238
62/36/2 tin/lead/silver 179
95/5/3.5 tin/silver 221
95/5 tin/antimony 221-245
10/88/2 tin/lead/silver 268-299
1/97.5/1.5 tin/lead/silver 309

7.4.2 Economics The cost of tin is many times that of lead. This fact may encourage the use of lower cost alloys con-
taining less tin. The cost of the solder alloy alone is not the only factor to consider. There are many instances where the
decision to change to a cheaper alloy has resulted in more overall expense.
When the tin content is lowered below the eutectic 63/37 alloy, three factors affect the real dollar savings per soldered con-
nection. First, product damage may occur because of the higher melting temperature of the solder. Second, there is a sig-
nificant difference in the densities of tin and lead. Table 7-4 shows how the properties of the various tin/lead alloys com-
pare. If a substitution of 55/45 alloy is made for 60/40, the savings in solder metal cost may be lost if the greater plastic
melting range resulted in applying 8-10% more volume of solder.

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Table 7−4 Alloy Properties

Electrical Bulk
Conductivity Tensile
Alloy Tin/Lead Density g/cc % of Copper Strength psi
25/75 9095 9.4 5770
30/70 9.70 9.8 6140
35/65 9.50 10.1 6230
40/60 9.30 10.5 6320
45/55 9.10 10.8 6380
50/50 8.89 11.3 6450
55/45 8.70 11.6 6520
60/40 8.50 12.0 6620
63/37 8.45 12.5 6700

7.4.3 Processing and Application When soldering to printed boards there are no precise rules for the choice of solder
alloys. Generally 60/40 has been used for hand soldering, or for wave or dip soldering single-sided printed boards.
Printed boards with plated-through holes, properly matched to the diameters of component leads, and printed boards with
surface mount will solder best with 63/37 solder because of the better capillary action of the eutectic alloy.
The surface that is being soldered may determine the choice of solder alloy. The coinage metals (silver, copper and gold)
all dissolve rapidly in molten solder. Silver can be added to tin/lead alloys to prevent leaching of silver from plated parts
such as silver, palladium/silver, or platinum/silver coated ceramic devices or microcircuits.
The most common alloy for this application is 62Sn/36Pb/2Ag, which has a melting temperature similar to 60Sn/40Pb alloy
(See Table 7-3). Soldering to silver coatings is also temperature-dependent. At only 250 °C it is possible to dissolve 4%
silver in the 60Sn/40Pb alloy. So, even with 2% silver in the Sn62 alloy, soldering must be done at low temperature and in
a minimum of time.
Copper can be added to solder used in wire form for hand soldering fine copper wires. The best thing to do for gold disso-
lution is to specify the thinnest gold coating for boards and parts that will do the intended job and still allow for reasonable
shelf life.
7.4.4 Solder Specifications The original intention of issuing specifications on the contamination levels in solder alloys
was to provide a basis for ordering a quality solder.
J-STD-006 prescribes the nomenclature, requirements, and test methods for electronic grade solder alloys for fluxed and
non-fluxed bar, ribbon, and powder solders for electronic soldering applications and for ‘‘special’’ electronic grade solders.
It is a quality control standard and is not intended to relate directly to the material’s performance in the manufacturing pro-
cess. Section 9 of this handbook provides information about the effects of alloy variations and contaminants.
Antimony was added to the military specification in 1960 to help prevent ‘‘tin pest’’ at extremely low temperatures. This
change of allotropic form from a metal to a powder is also prevented by lead so antimony is not really necessary for tin-
lead solders. In fact, in 1990, the antimony addition requirement was eliminated in QQ-S-571 as it was in the ASTM speci-
fication in 1983.
The elimination of lead from solder alloys has raised the tech-
nical question ‘‘Will there be an issue with tin pest and lead-
free solder?’’ Tin pest is caused by an allotropic transforma-
tion which is the occurrence of an element in two or more
crystalline forms. There are six elements that exhibit allo-
tropic transformations at one atmosphere of pressure and in
the temperature range of -40 °C to +60 °C: carbon, cerium,
phosphorus, sulfur, yttrium, and tin. The tin allotropic trans-
formation is from β-tin (‘‘white’’ tin, metallic, body centered
tetragonal crystallographic lattice) into α-tin (‘‘gray’’ tin,
semiconducting, diamond cubic lattice) and occurs at 13.2 °C. Figure 7-2 Tin allotropic crystallographic structure; (left)
Figure 7-2 illustrates the crystallographic structure differences tetragonal β-tin, (right) cubic α-tin
between the tetragonal β-tin and the cubic α-tin.

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As tetragonal β-tin transforms to cubic α-tin, there is a 27%

increase in volume in crystal structure. This large volume
change causes the naturally brittle gray tin to transform into a
powder. Figure 7-3 illustrates the tin pest phenomena during
an investigation conducted by Sweatman et al. Tin’s maxi-
mum allotropic transformation rate occurs around -40 °C.
Published industry investigations have documented that the tin
pest reaction can be suppressed by very small percentage
additions of lead (Pb), antimony (Sb), and/or bismuth (Bi)
Industrial grade solder alloys have traditionally contained
small percentage additions of all three of these elements, thus
preventing the tin pest phenomena. However, the introduction
of high percentage tin solder alloys that are lead-free due to
the RoHS legislative pressures, has reintroduced tin pest ques-
tions and concerns. Current industry studies have shown that
the threat of tin pest is low on the risk scale for the majority
of electronic products. However, electronic products that are
placed in use environments below 0 °C would potentially be
at a greater risk for the occurrence of the tin pest phenom-
enon. Additional industry investigations are underway to pro-
vide a greater understanding of the risk of the tin pest phe-
nomenon.

7.4.4.1 Reclaimed Solder The use of the highest purity bar

solder will help dilute impurities in the solder pot and extend
the useful life of the solder. The introduction of fine pitch sur-
face mount components and passive surface mount compo-
nents styles such as 0201s and 01005s has resulted in the
impact of elemental impurities on the properties of the solder Figure 7-3 Tin Pest Transformation from Sweatman et al
joint and the soldering process wetting characteristics no lon- Investigation
ger being negligible. The J-STD-001 specification contains a
table of the maximum allowable elemental contamination limits determined by the electronics industry as applicable for sol-
dering processes. A number of companies offer solder reclamation equipment which can be used within a facility to reduce
the amount of soldering process byproducts sold to industry recycling firms as solder containing waste. Additional informa-
tion can be found in Section 9 of this document regarding solder reclamation process equipment. The reintroduction of
reclaimed solder into a wave soldering process is acceptable provided the J-STD-001 specification maximum allowable
elemental contamination limits are not exceeded. A regular analytical schedule should be established to determine the usable
life of the solder in a solder pot.
Additional information on the impact of elemental impurities on the properties of solder can be found in Section 9 of this
document.

7.5 Low Temperature Solder Alloys The following addresses the use of low-melting temperature solders, i.e., solders that
melt below the tin/lead eutectic temperature of 183 °C for joining applications. These solders generally fall into two gen-
eral groups: indium-based solders and bismuth-based solders.
7.5.1 Applications

7.5.1.1 Indium Based Alloys The indium-based solders listed in Table 7-5 are, in general, considered to be specialty sol-
ders. They possess special properties which make them valuable for specific applications. Among them are the following:
A. Glass-to-Metal Seals – Pure indium, the 52% indium/48% tin, and 97% indium/3% silver alloys will wet glass, quartz,
and many ceramics. These alloys are used in glass-to-metals seals. They retain their plasticity down to liquid-helium
temperatures, and are useful as seals in vacuum systems. They are also useful as seals in cryogenic systems.
B. Thermal Fatigue Consideration – Indium/lead/silver alloys listed have greatly improved resistance to thermal fatigue as
compared to the conventional lead/tin solder. This coupled with their marked reduction in the scavenging and leaching
of gold surfaces, has led to their use in some specialized electronic assemblies.

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C. Silver/Palladium Compatibility – Conventional tin/lead solders cannot be used in soldering to silver/palladium metal-
lizations when high service temperatures are required, due to the formation of the palladium/tin (PdSn) intermetallic. At
150 °C, a significant reduction in adhesion strength can occur in a few hundred hours, leading to ultimate failure of the
solder bond. Lead/silver/indium solders are compatible with silver/palladium conductors at service temperatures up to
200 °C.
D. Large Temperature Differentials – The lead/indium system is a solid solution system (non-eutectic) with an available
range from the melting point of indium (156.6 °C) to the melting point of lead (327 °C). This permits a choice of alloys
with temperature differentials large enough for step soldering.
E. Corrosion Resistance – Indium based solders have good resistance to alkaline corrosion. However, corrosion resistance
in the presence of traces of halide ions is not satisfactory, thus necessitating the use of hermetic packages or conformal
coatings.
Table 7−5 Indium-Based Solder Alloys
Melting Temperatures
Composition (Weight %) Solidus Liquidus
In Pb Sn Cd Other °C °F °C °F
44 — 42 14 — 93 200 93 200
52 — 48 — — 118 244 118 244
74 — — 26 — 123 253 123 253
70 9.6 15 5.4 — 125 257 *M.P. only determined
40 20 40 — — 121 218 130 266
80 15 — — 5 Ag 149 301 142 288
97 — — — 3 Ag 143 290 143 290
20 26 54 — — 135 275 144 291
95 — — — 5 Bi 125 257 150 302
100 — — — — 157 313 157 313
12 18 70 — — 162 324 *M.P. only determined
70 30 — — — 160 320 174 345
25 37.5 37.5 — — 134 274 181 358

7.5.1.2 Bismuth Based Alloys A selection of bismuth based alloys is listed in Table 7-6. Alloys rich in bismuth are not,
in general, considered to be good solders for a number of use environments.

When using the traditional halide activated fluxes at the low soldering temperatures required with these alloys, the flux often
does not reach its activation temperature. Consequently, fluxing activity is inefficient and wetting can be poor. In these
instances, fluxes with other activation mechanisms should be used to improve soldering quality, e.g., those with organic acids
and/or chelation agents.

Typically, bismuth-based solder alloys are used in the following applications:

• Soldering heat-treated surfaces when a higher soldering temperature would result in a softening of the part
• Soldering joints where the adjacent material is heat sensitive and deterioration would occur at a higher soldering tempera-
ture
• Step-soldering operations where a low temperature is necessary to protect a nearby solder joint
• Construction of temperature-overload devices, i.e., safety links, fuses and plugs, where positive pressure contact is too
variable or inconsistent for assembly operation
• Soldering low temperature alloys such as pewter
• In machine-soldering operations for through-holes in very thick multilayer printed boards
• In assembly operations, such as surface mount, where the integrated circuit packages would be vulnerable to thermal dam-
age at the temperatures required for tin/lead soldering
• In assembly operations using injection-molded printed boards where the glass transition temperature is too low for the use
of tin/lead alloys

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Table 7−6 Bismuth-Based Solder Alloys

Melting Temperatures
Composition (Weight %) Solidus Liquidus
Bi Pb Sn Cd In °C °F °C °F
44.7 22.6 8.3 5.3 19.1 47 117 47 117
49 18 12 — 21 58 136 58 136
32.5 — 16.5 _ 51.0 60 140 60 140
48 25.63 12.77 9.6 4.0 61 142 65 149
50 26.7 13.3 10.0 _ 70 158 70 158
57 — 17 — 26 79 174 79 174
42.5 37.7 11.3 8.5 — 71 160 85 190
52.5 32.0 15.5 — — 95 203 95 203
46 20 34 — — 100 212 100 212
67 — — — 33 109 229 109 229
55.5 44.5 — — — 124 255 124 255
57.42 1.00 41.58 — — 135 275 135 275
58 — 42 — — 138 281 138 281
14 43 43 — — 144 291 163 325
40 — 60 — — 138 281 170 338
12.6 47.47 39.93 — — 146 294 176 349

7.5.2 Forms and Techniques

7.5.2.1 Indium-Based Alloys The alloys listed in Table 7-5 are, in general, easy to fabricate. They are available as pre-
forms (discs, squares, rectangles, washers, and spheres) and as wire, ribbon, and foil. They are also available in solder pastes
of either dispensing or screen-printing quality.
The application techniques for indium-based alloys are similar to those used for the conventional tin/lead solders. In the case
of preforms, oven heating is used for short runs and conveyor-type furnaces for larger runs.
In special cases the use of induction heating, heat guns, or reducing atmospheres is recommended. Also, the use of vapor-
phase soldering with these alloys has been used, particularly for joining backplane connector pins to printed boards. With
respect to wave soldering, the use of indium-based alloys has been satisfactory bearing in mind the tendency of indium-
based alloys to dross slightly more than tin/lead alloys.

7.5.2.2 Bismuth-Based Alloys These alloys tend to be more difficult to fabricate than indium-based alloys, so there is not
a wide range of preforms available. Preforms can be supplied as wire, rods, sheet and ingots. Solder pastes are available in
the 42%Sn/58%Bi eutectic alloy and in the 43%Sn/43%Pb/l4%Bi composition as well as in 57.42%Bi/41.58%Sn/l.00%Pb.
Solder pastes are also possible in most of the other listed alloys although in some cases they would have to be compounded
just prior to usage due to the aggressive fluxes required.
Soldering using preforms, wire, rod, and sheet requires an aggressive flux (as a minimum an organic-acid flux) and usually
a water soluble flux containing zinc chloride/ammonium chloride. Complete flux removal is essential.

7.5.3 Wave Soldering The need for low temperature wave soldering is required to eliminate thermal damage in some spe-
cialized circuit packs. The general objective has been to perform wave soldering operations in the 150-170 °C temperature
range compared to the 240-250 °C required for conventional tin/lead solders.

7.5.3.1 Bismuth-Based Alloys Several bismuth-based alloys are being used with major emphasis on the 42%Sn/58%Bi
eutectic alloy (melting point 138 °C). A modified wave soldering system called ‘‘Immersion Wave Soldering’’ is used in
which the solder wave is continuously flooded with a flux layer. Still another process uses a wave of tin bismuth completely
submerged in flux that provides board preheat as the assembly goes through the flux prior to contacting the solder wave.
The solder bath is operated at 150 °C-165 °C which allows topside heating for complete through-hole filling in very thick
multilayer printed boards, thus avoiding printed board damage and reducing thermal strain to less than half the value with
tin/lead solders.

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Typically the printed boards soldered were up to 5 mm [0.200 in] thick with very small diameter holes. Excellent joints were
obtained which, in some aspects, are superior to tin/lead solder joints (fatigue strength and dissolution of copper) although
ductility is substantially less. Other bismuth-based alloys that have been considered for wave soldering include the 52.2%Bi/
32.0%Pb/15.5%Sn eutectic alloy (melting point 95 °C) and the 55.5%Bi/44.5%Pb eutectic alloy (melting point 124 °C).

7.5.3.2 Indium-Based Alloys There has been some wave soldering with the 52%In/48%Sn eutectic alloy (melting point
118 °C) using a water soluble organic flux. This method has produced satisfactory solder joints which, although lower in
tensile strength than tin/lead solder joints, are adequately strong. There may also be reduced printed board and component
damage as well as easier rework.
Another indium-containing alloy that was considered for wave soldering was the composition 20%In/26%Pb/54%Sn (melt-
ing point 135-144 °C).

7.5.4 Special Considerations There is an alternative application for the bismuth-based alloy. In this application 49%Bi/
l8%Pb/l2%Sn/21%In eutectic alloy, melting at 58 °C, is used as a metal solvent in hot tinning, component removal, and sol-
der leveling. In this application the 32.5%Bi/51%In/16.5Sn eutectic alloy melting at 60 °C is used to bond semiconductor
chips to Pd/Au deposited on niobium pads. A water soluble flux is used with indium standoffs to prevent chip collapse and
solder joint bridging. Notably the solder joints show no loss in strength after thermal cycling between room temperature and
liquid helium temperature (an extreme reversal of the temperature ranges usually used in thermal cycling).

7.6 Traditional Solder Alloys For most traditional soldering applications the common alloys consist of tin and lead, such
as 60/40-tin/lead solder. Other metals, such as silver, bismuth, cadmium and indium are added to lower the melting tem-
perature of the solder. There are applications for solder, however, which require a solder that can withstand high service
temperatures or which are used for soldering at elevated temperatures.
Table 7-7 shows the common solder alloys, listed in order of increasing melting-point temperature.
Table 7-7 Traditional Solder Alloys
Alloy Weight Percentage Melting Temperature
Sn Pb Ag Sb °C °F
60 40 183-190 361-374
62 36 2 179 354
63 37 183 361
50 50 183-214 361-420
40 60 183-238 361-460
30 70 183-257 361-496
23 75 2 186-262 366-503
20 80 183-280 361-536
96.5 3.5 221 430
95 5 221-245 430-473
100 232 450
95 5 232-240 450-464
10 88 2 268-299 514-570
10 90 268-302 514-576
5 93.5 1.5 296-301 565-574
5 95 301-314 574-597
1 97.5 1.5 309 588
100 327 621

The first thing to consider when selecting an alloy is the melting range of the solder alloy. Quite often an error is made by
only looking at the liquidus temperature: i.e., that temperature at which the solder alloy is completely molten. An alloy such
as 30Sn/70Pb may appear to be a higher temperature solder than 60Sn/40Pb if only the liquidus temperature was consid-
ered. Actually all tin-lead alloys with between 20 and 98 percent tin begin to melt at the same temperature (183 °C). Most
alloys start to melt at a lower solidus temperature and exhibit a plastic melting range. The exceptions are those few eutectic
alloys that melt at a single temperature.

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The main application for alloys of zinc, aluminum, copper, and cadmium that melt between 340 and 430 °C, is for bond-
ing aluminum. Stainless steel is difficult to solder with high-temperature solders, since the alloys melting over 260 °C con-
tain very little of the tin that does the wetting of metal surfaces during the soldering process. For soldering most other met-
als, the high temperature alloys are combinations of tin, lead, silver, and antimony.
Where service conditions permit, the best wetting alloys are the medium temperature combinations of tin and silver or tin
and antimony. Adding silver or antimony to tin considerably increases the tensile and creep strengths without greatly affect-
ing the melting point.
For example, the 95Sn/5Ag alloy is twice as strong as 60Sn/40Pb. These tin-silver and tin-antimony alloys are used in
plumbing applications where high operating temperatures result in failure if they were made with ordinary tin-lead solder
alloys. Many electronic uses have been found for these alloys, particularly for soldering components, which will subse-
quently be reheated to solder the component to a printed board assembly. It must be noted that room temperature, low speed
shear or pull should not be chosen as the only consideration of the properties of solder that is needed to qualify specific use
conditions for the solder.
For higher temperature applications, there are several alloys that melt and flow above 260 °C. It is important to note that
any of the alloys that melt above 205 °C have a tensile strength at 205 °C less than 500 psi.
As at lower operating temperatures, but particularly at elevated temperatures, solder should not be expected to provide the
only means of mechanical support. The solder bond should be made to provide electrical continuity or to seal the gap
between two surfaces. Therefore, the solder alloys melting above 260 °C are generally selected for their wetting ability and
flow properties.
As the tin content is reduced, the wetting ability decreases. The 10Sn/90Pb alloy is the best wetting solder melting above
260 °C. The addition of 2% silver to this alloy improves the strength, slows surface oxidation and permits soldering of sil-
ver or silver-alloy surfaces without dissolving the silver.
The 5Sn/95Pb is a higher-melting temperature solder but it tends to tarnish rapidly. Once again, the addition of 1.5% silver
improves the performance.
The highest temperature soft solder listed in Table 7-7 is the 1.5Ag/1.0Sn/97.5Pb solder that melts at 309 °C. The wetting
properties of this alloy are not as good as those of the alloy containing 5% tin, but its melting temperature is slightly higher.
By selecting the right combination of alloys a two or three step soldering process is possible. In these processes, each suc-
cessive solder joint is made without affecting the connections made with a higher-melting temperature solder alloy previ-
ously used.
All of the solder alloys listed are used in tinning pots, wave soldering, with soldering irons, or as solder preforms, and in
solder paste. The only requirement for such soldering is that enough heat be supplied to completely melt the solder on the
part being soldered.
7.6.1 High Temperature Soldering Flux Consideration should be given to the flux being used for high-temperature sol-
dering. Fluxes are selected according to the type of metal being soldered and the heating method. Soldering fluxes of all
types can be used with high-temperature solders if the heating is rapid enough to prevent decomposition of the flux before
the solder melts and flows. Extended high-temperature heating such as in oven soldering applications can be done only if a
heat-stable zinc-chloride flux is used.
For wire tinning, the rosin fluxes are preferred, since they do not leave a corrosive residue.
Rosin fluxes with high-boiling temperature solvents, such as turpentine or glycol ether, are more heat stable since the sol-
vent boils away slowly, but the ignition temperature is only about 215 °C. Alcohol, on the other hand, is not as heat stable,
but the ignition temperature is over 370 °C.
Any high temperature wire tinning process should have enough air moving across the soldering area to remove solvent
vapors and to minimize the fire hazard.
7.6.2 High Temperature Stripping and Tinning One common use for solders at high temperatures is stripping and tinning
thermally-strippable insulation on wires. Insulations such as urethane and nylon can be burned off and the wire tinned by
immersing the fluxed wire in solder heated at 370-480 °C. Proper fume extraction is essential for worker safety.
For this application the most common solder alloys, 60Sn/40Pb or 50Sn/50Pb, would be heated way beyond their melting
points. As a consequence, excessive drossing (oxidation of the solder) occurs and soldering the wires is difficult.

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For this type of application the use of a higher melting alloy, such as 30Sn/70Pb, results in considerably less dross. Even
though 60Sn/40Pb and 30Sn/70Pb solders begin to melt at the same temperature, the liquidus temperature for 30/70 is over
55 °C higher than that of the 60Sn/40Pb solder.
The best solder alloy for this high-temperature strip/tinning application is 23Sn/2Sb/75Pb. Though melting very similar to
30/70, the antimony content reduces the oxidation rate. This results in less drossing on the solder pot and a shinier solder
coating on the stripped wire or solder joint.
Another factor to consider when stripping insulation by dipping in solder is the solubility of copper contained in the solder.
Small copper wire may dissolve in higher-tin-content solder alloys, especially if high temperatures are used for tinning.
Since copper does not dissolve in lead, the alloys with low tin content should be used and the solder temperature should be
only as high as required to do the stripping and tinning.
7.7 Lead-Free Solder Alloys Environmental legislation has had an enormous impact on the solder alloys used for elec-
tronics assembly. The European Union Restriction of Hazardous Substances (RoHS) directive officially went into effect on
July 1, 2006, but a significant portion of the electronics supply chain began a wide variety of transition actions in the years
prior to that implementation deadline in an effort to understand material issues and fabrication concerns. The RoHS direc-
tive contained a requirement that the maximum concentration of lead in a solder alloy was 0.1%, which effectively resulted
in the extinction of lead bearing solder alloys, except for specialized applications. The electronics industry has initially
focused on one non-lead solder alloy family, Tin (Sn)/Silver (Ag)/Copper (Cu) - (SAC), for a variety of criteria which
includes (but not limited to) cost, metallurgical complexity, melting point, surface tension, availability and process-ability.
Three solder alloys - SAC405, SAC305, and SAC105 - have received the most industry attention. Further industry resources
have been expended in the characterization of Tin (Sn)/Copper (Cu) ‘‘modified’’ solder alloys such as Sn/Cu/Ni/Ge or
Sn/Cu/Ni/Bi. The rationale for considering the Sn/Cu ‘‘modified’’ solder alloys is improvements in drop shock properties,
lower copper dissolution properties and alloy cost. Table 7-8 illustrates a variety of lead-free solder alloys and their elemen-
tal compositions. Table 7-9 lists a variety of lead-free solder alloys and their melting temperatures.
Table 7-8 Lead-Free Solder Alloys
Alloys Investigators Reference
Pandher (Cookson), H. Kim & D. Kim (Intel), Kobayashi (Nippon
Sn4.0Ag0.05Cu (SAC405) ECTC 2007
Steel), Darveaux (Amkor/ASU)
Pandher (Cookson), Syed (Amkor), Kobayashi (Nippon Steel),
Sn3.0Ag0.5Cu (SAC 305) ECTC 2007
Darveaux (Amkor/ASU)
Pandher (Cookson), H. Kim & D. Kim (Intel), Syed (Amkor),
Sn1.0Ag0.5Cu (SAC 105) ECTC 2007
Kobayashi (Nippon Steel)
Sn0.3Ag0.7Cu+Bi (SACX0307) Pandher (Cookson) ECTC 2007
Sn0.3Ag0.7Cu+Bi+Ni+Cr Pandher (Cookson) ECTC 2007
SAC 305+0.05Ni+0.5In Syed (Amkor) ECTC 2007
SAC 255+0.5Co Syed (Amkor) ECTC 2007
SAC 107+0.5Ge Syed (Amkor) ECTC 2007
Syed (Amkor), D. Kim (Intel), Kobayashi (Nippon Steel), Darveaux
SAC 125+0.05-0.5Ni (LF35) ECTC 2007
(Amkor/ASU)
SAC 101+0.02Ni+0.05In Syed (Amkor) ECTC 2007
Sn-3.5Ag Cavasin (AMD), Darveaux (Amkor/ASU) ECTC 2007
Sn-3.5Ag+0.05-0.25La Pei & Qu (Ga. Tech) ECTC 2007
Sn-0.7Cu Darveaux (Amkor/ASU) ECTC 2007
Sn0-4Ag0.05Cu+Al+Ni Huang (Indium) ECTC 2007
Sn0.7Cu0.05Ni+Ge (SN100C) Sweatman, Miyaoka, Seki, Suenaga, Nishimura (Nihon Superior) ICS&R Toronto 2008

The use of lead-free solder alloys result in the soldering process engineer having to address two primary issues due to the
differences from the traditional tin/lead solder alloys: (1) solder alloy initial melting point; (2) solder alloy solidification
characteristics. The traditional tin/lead solders have melting points beginning at 183 °C. The melting point of the SAC sol-
der alloy family is 217 °C, 34 °C higher. This increase in solder alloy temperature causes a domino effect as the soldering
flux, the printed wiring laminate, the components, and the soldering process equipment must all be compatible for the higher
temperature. Several industry studies have shown that a small increase in the amount of flux contained in a solder wire core,
as shown in Figure 7-4, can be beneficial due to the increased soldering process temperatures caused by the lead-free sol-
der alloy melting point.

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Table 7-9 Lead-Free Solder Alloys and Their Melting Temperatures

Composition Solidus (°C) Liquidus (°C)
95.5Sn/3.8Ag/0.7Cu 217 220
95.5Sn/4.0Ag/0.5Cu 217 225
95.5Sn/3.9Ag/0.6Cu 217 225
96.5Sn/3.0Ag/0.5Cu 217 220
93.6Sn/4.7Ag/1.7Cu 217 244
91.8Sn/3.4Ag/4.8Bi 211 213
96.5Sn/3.5Ag 221 (eutectic)
99.3Sn/0.7Cu 227 (eutectic)
99Sn/1Sb 232 235
97Sn/3Sb 232 238
95Sn/5Sb 235 240
65Sn/25Ag/10Sb 233 (melting point)

Secondly, relatively few of the lead-free soldering alloys are

eutectic alloys as described in Section 7.4.1.2. An eutectic
solder alloy solidification behavior of changing from a liquid
to a solid at a specific temperature provides the soldering pro-
cess engineer a number of process control advantages in com-
parison to the non-eutectic solidification behavior of changing
from a liquid + solid to a solid. Figure 7-5 shows an example
of a eutectic solder alloy versus a non-eutectic solder alloy.
Figure 7-4 Solder Wire Core Flux Comparison

Figure 7-5 Solder Alloy Solidification Example: Blue line - Eutectic, Red line - Non-Eutectic

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Caution should be exercised in selecting a lead-free solder alloy for a soldering process as these new alloys constitute a
change in the form/fit/function of an electronic assembly. The diverse compositional ranges of the lead-free solder alloys,
combined with product functional requirements and product use environment interactions, results in a wide range of solder
alloy thermal and mechanical characteristic responses. Figure 7-6 illustrates how a sampling of lead-free solder alloys com-
pares to the traditional tin/lead solder alloys in fracture toughness testing. Figure 7-7 shows a similar response for drop shock
testing.

Figure 7-6 Solder Alloy Fracture Toughness Testing Results

Figure 7-7 Solder Alloy Drop Shock Testing Results8

Figure 7-6 and Figure 7-7 illustrate the trend of lead-free solder alloy proliferation that the electronics industry has experi-
enced. Solder alloy proliferation has resulted in a number of industry consortia and individual companies working to create
a ‘‘standardized’’ lead-free solder alloy protocol. A standardized protocol resulting in a solder alloy characteristic/data set

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useable by a wide range of people would be an asset to the electronics industry. Such a data set would help bridge the gap
between the specialized data generated on materials optimized for particular attributes and the data required for assessing
the suitability of alloys for general use. Hewlett Packard has published proposed protocol for industry consideration, a core
framework of tests that can be used to evaluate and compare alternative Pb-free alloys based on the reliability, manufactur-
ability, and material properties of the alloys, Table 7-10. The following graphs are excerpts of that proposed protocol and
are included in this handbook is one example of how to assess a lead-free solder alloy for potential implementation.

Table 7-10 Hewlett Packard Proposed Test Protocol for Pb-Free Solder Alloys
Reliability Column 1 Column 2 Column 3 Column 4
Contamination
Test and Method Test Parameters Control(s) Report Report?
Accelerated Thermal Test Condition: TC1 (0 °C to SnPb,SAC 305, Weibull curves for each alloy Y
Cycling 100 °C) with 10 minute ramps SAC 105 combination
IPC-9701-A and 10 minute dwells, 6000 Tabulated failure data for
Solder paste and BGA/CSP cycles or failure of all compo- each alloy combination
ball alloys nents, whichever occurs first Thermal profile used for
PCB: HP standardized test testing
board, 0.093 inches thick, six
layers, 1⁄2 oz. copper foil,
OSP surface finish, non-
solder-mask defined (metal-
defined) pads for area array
components
Components: Standardized
BOM with BGAs and TSOPs,
with silicon die and daisy
chains as per IPC-9701-A
c Type II TSOPs with Fe-Ni
Alloy 42 leads
c BGAs with 1.27 mm or 1.0
mm pitch
c BGAs in the following com-
binations:
1) SnPb ball alloy and SnPb
paste
2) SAC 305 ball alloy and
SAC 305 paste
3) New alloy ball and new
alloy paste
4) Different combinations
depending on material:
a) If evaluating solder
paste alloy, test combi-
nation of SAC 105 alloy
ball and new alloy
paste
b) If evaluating BGA/CSP
ball alloy, test combina-
tion of new alloy ball
and SAC 105 paste
Samples: 32 of each alloy
combination
Preconditioning: Test boards
must be placed in an oven
within 24 hours of assembly
and baked in air at 125 °C for
48 hours for lead-free and 24
hours for the tin-lead boards,
and then tested within one
week.

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Reliability Column 1 Column 2 Column 3 Column 4

Contamination
Test and Method Test Parameters Control(s) Report Report?
Mechanical Shock Test Condition: B, 1500 G, SnPb,SAC 405 Report as per Section 8 of Y
JESD22-B111 0.5 ms duration, half-sine JESD22-B111 for all test
Solder paste and BGA/CSP pulse conditions, including eight
ball alloys PCB: HP standardized test Weibull curves (one for each
board as per Section 5.2, surface finish and alloy com-
1 mm thick, eight layers, bination) Tabulated failure
1+6+1 build-up, both OSP data for all four alloy combi-
and electrolytic Ni/Au (not nations for both surface fin-
ENIG), non-solder-mask ishes, as specified in Section
defined (metal-defined) pads 7 of JESD22-B111 Reflow
Components: Standardized profile from the test vehicle
BOM with area arrays with assembly
silicon die and daisy chains
as per JESD22-B111, no PTH
or lead frame components,
package surface finish OSP
or SOP, two types of compo-
nents: 0.50 mm and 1.0 mm
pitch (no larger than 15 mm x
15 mm), BGAs/CSPs in the
following combinations:
1) SnPb ball alloy and SnPb
paste
2) SAC 405 ball alloy and
SAC 405 paste
3) New alloy ball and new
alloy paste
4) Different combinations
depending on material:
a) If evaluating solder
paste alloy, test combi-
nation of SAC 405 ball
and new alloy paste
b) If evaluating BGA/CSP
ball alloy, test combina-
tion of new ball alloy
and SAC 405 paste
Samples: Test 32 compo-
nents for each combination
of finish, pitch, ball and paste
alloy PCB finish (OSP and
Ni/Au) and for each of the
four combinations of reflow
alloy and ball alloy, for a total
of 512 components. Four
components on each test
board, each combination of
PCB finish, pitch, and alloy
require eight boards, for a
total of 128 boards.
Preconditioning: Test boards
must be placed in an oven
within 24 hours of assembly
and baked in air at 125 °C for
48 hours for lead-free and 24
hours for the tin-lead boards,
and then tested within one
week.

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Reliability Column 1 Column 2 Column 3 Column 4

Contamination
Test and Method Test Parameters Control(s) Report Report?
Vibration Test Condition: Method 2, SnPb,SAC 405 Report for all test conditions, Y
IEC 60068-2-64 with sweeps for the discovery as per IEC 60068-2-64,
Solder paste and BGA/CSP of resonant points including:
ball alloys PCB: Same as mechanical c Initial inspection results
shock test board, 1 mm thick, c Response graphs indicating
eight layers, 1+6+1 build-up, the stress applied (power
both OSP and electrolytic density charts)
Ni/Au (not ENIG), non-solder- c Resonant frequencies
mask defined (metal-defined) c Dwell time at each resonant
pads frequency
Components: Same as c Results from final inspection
mechanical shock, area c Test observations
arrays with silicon die and c Photographs of failed
daisy chains as per JESD22- samples
B111, no PTH or lead frame c Comparison of performance
components, package surface found between new alloy
finish OSP or SOP, two types and controls
of components: 0.50 mm and c Photographs of the test set-
1.0 mm pitch (no larger than up, with details indicating
15 mm x 15 mm), BGAs/ the mounting of the test
CSPs in the following combi- vehicle to the vibration table
nations: c Location of accelerometers
1) SnPb ball alloy and SnPb c Type of test equipment used
paste (hardware and software)
2) SAC 405 ball alloy and c Calibration records of the
SAC 405 paste test equipment
3) New alloy ball and new
alloy paste
4) Different combinations
depending on material:
a) If evaluating solder
paste alloy, test combi-
nation of SAC 405 ball
and new alloy paste
b) If evaluating BGA/CSP
ball alloy, test combina-
tion of new alloy ball
and SAC 405 paste
Samples: Test 32 compo-
nents for each combination
of finish, pitch, ball and paste
alloy PCB finish (OSP and
Ni/Au) and for each of the
four combinations of reflow
alloy and ball alloy, for a total
of 512 components. Four
components on each test
board, each combination of
PCB finish, pitch, and alloy
require eight boards, for a
total of 128 boards.
Preconditioning: Test boards
must be placed in an oven
within 24 hours of assembly
and baked in air at 125 °C for
48 hours for lead-free and 24
hours for the tin-lead boards,
and then tested within one
week.

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Reliability Column 1 Column 2 Column 3 Column 4

Contamination
Test and Method Test Parameters Control(s) Report Report?
Four-Point Bend Test Condition: as per IPC- SnPb,SAC 405 For each combination of PCB Y
IPC-9702 9702, support span at least finish (OSP and Ni/Au) and
Solder paste and BGA/CSP 20 mm longer than the load for each paste or ball alloy
ball alloys span; select the exact value combination, provide the
to obtain a strain rate of 5000 strain [µε] at which failure
µε/s (IPC-9702, Figure A.1) occurs. Report support span
PCB: HP standardized test used
board conforming to IPC-
9702, Section 8.3, 1 mm
thick, eight layers, 1+6+1
build-up, both OSP and elec-
trolytic Ni/Au (not ENIG),non
solder-mask defined (metal-
defined) pads, Isola 408,
Components: same as
mechanical shock samples,
area arrays with silicon die
and daisy chains as per IPC-
9702, Section 8.7, no PTH
or lead frame components,
package surface finish OSP
or SOP, one type of compo-
nents (no larger than 15 mm
x 15 mm), BGAs/CSPs in the
following combinations:
1) SnPb ball alloy and SnPb
paste
2) SAC 405 ball alloy and
SAC 405 paste
3) New alloy ball and new
alloy paste
4) Different combinations
depending on material:
a) If evaluating solder
paste alloy, test combi-
nation of SAC 405 ball
and new alloy paste
b) If evaluating BGA/CSP
ball alloy, test combina-
tion of new alloy ball
and SAC 405 paste
Samples: Eight boards for
each surface finish and solder
alloy combination should be
used (a total of 64 boards).
Four components should be
mounted on each board, as
described in IPC-9702.
Strain Gauge Locations:
Six strain gauges attached
to each board, as specified
in IPC-9702, Figure 8-4.
Failure Criterion: 20%
increase in daisy-chain
resistance

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Reliability Column 1 Column 2 Column 3 Column 4

Contamination
Test and Method Test Parameters Control(s) Report Report?
TH Joint Strength Test Condition: pin pull/push SAC 305 Plot force vs pin-wetted Y
Pin pull test as described in rate of 1 mm/min length for both the new alloy
‘‘Reliability of Partially-Filled PCB: Culebra test board, and SAC 305 control on the
SAC 305 Through-Hole 0.130 inches thick, 16 layers, same graph
Joints,’’ Holder, et al, APEX Isola 408, OSP Enthone
2006 Wave and minipot alloys Entek 106HT, three boards
only per pin finish, assembled in
nominal process
Components: DIMMs
Samples: Pull or push pins
from two DIMM components
per board, fifteen pins per
component (90 pins per alloy)
Preconditioning: 400 g
shock performed once per
axis (or random vibration
9 Grms), as per IEC 60068-
2-64
c Followed by 1000 cycles
0 °C to 100 °C thermal
cycle, as described in
IPC-9701A

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Reliability Column 1 Column 2 Column 3 Column 4

Contamination
Test and Method Test Parameters Control(s) Report Report?
Manufacturing
Design of Experiment (DOE) Variables and Test Condi- SAC 305 Provide data for new alloy Y (before and
for Wave Solder Alloy tions: Pot temperature (°C): and controls: after)
HP wave process character- 240, 255, 270, 285, 300 c Through hole fill results for
ization test method (validated by thermocouple all noted locations for all
Wave solder alloy only for each temperature) conditions
c Contact time (sec): 3, 5, 7 c Copper dissolution results
(measured using a Lev- for all noted locations for all
Check) conditions
c Lambda wave only c Wetting angle for all noted
PCB: Culebra test board, locations for all conditions
0.130 inches thick, 16 layers, c IMC thickness for all noted
Isola 408 laminate, OSP locations for all conditions
Enthone Entek 106HT, c Hot tearing evaluation for all
variation in hole sizes noted locations for all condi-
embedded in design tions
Components: DIMMs, c Laminate defect evaluation
headers, delay lines, all and copper via cracking
fully loaded except J2 which evaluation for all noted loca-
is covered with tape (for cop- tions for all conditions
per dissolution evaluation) Report equipment and pro-
Flux: Cookson RF800, cess parameters:
datasheet recommended c Flux amount applied
amount c Flux application method
Replicates: minimum of c Air knife used
twice per new and control c Conveyor angle
alloy (five pot temperatures c Solder level (height)
and three contact times, for c Pump speed
a total of 30 runs per alloy) c Preheat time and tempera-
Preconditioning: PCBs ture, and how determined
preconditioned with two
nominal Pb-free reflow cycles Report yield and visual
Locations for TH Fill inspection results:
Measurement: J3, DL1, c Number of shorts at 10x
DL2,DL5, DL6, DL7, DL8, mag
DL9, DL10 c Results of yield and visual
TH Fill Measurement: Mea- inspection as per IPC-610
sure on cross-sectioned joints
(or 5DX) as an actual mea-
surement in millimeters
expressed as pin-wetted
length
Locations for Copper Dis-
solution Measurements:
DL3, DL4, DL11, and DL12
Copper Dissolution
Measurement: Measure
the remaining copper of the
TH pad and knee in cross-
sections. J2 is the unpopu-
lated sites for determination
of the ‘‘original’’ thicknesses.
Locations for Wetting Angle
Measurement, IMC Thick-
ness Measurement, Hot
Tearing Evaluation, and
Laminate Evaluations: DL
line (cross section one row),
pin one at J3

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Reliability Column 1 Column 2 Column 3 Column 4

Contamination
Test and Method Test Parameters Control(s) Report Report?
Manufacturing
Design of Experiment (DOE) Variables: SAC 305 Report: Y
for Reflow Solder Alloy c Time above liquidus (TAL) c Results and example photos
HP reflow process character- (sec): 30, 65, 100 of visual inspection to IPC-
ization test method c Peak temperature (Tp) (°C): 610
Solder paste alloy only 230, 245, 260, 275,290 c Representative wetting
PCB: HP standardized test angles at toe and heel fillet
boards, 0.093 inches thick, (averaged at three locations)
Isola 408, 14 layers, OSP c Results and example photos
surface finish, non solder- of X-ray inspection (either
mask defined (metal-defined) transmission or x-ray
pads for area array compo- laminography) of BGAs
nents to IPC-7095
Components: Standardized c Cross-section images
BOM with BGAs with SAC c IMC thickness
305 and SAC 105, TSOPs c Copper dissolution
with Ni/Pd/Au, Sn, and SnPb Process parameters:
finishes; BOM selected to c Solder paste volume
ensure the following combina- c Flux used in both pastes
tions: c Reflow profiles as verified
c SAC 305 ball alloy and SAC by thermocouples in joints
305 paste
c new alloy ball and new
paste alloy
c SAC 305 ball alloy and new
alloy paste
c SAC 105 ball alloy and new
alloy paste
Flux: same for both SAC 305
and new alloy, optimize pre-
heat temperature to flux
Replicates: twice (with three
TAL levels and five Tp levels,
total of thirty runs for each
alloy)
Copper Dissolution
Measurement: On a cross-
sectioned sample, measure
the remaining Cu on the SMT
pad

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Reliability Column 1 Column 2 Column 3 Column 4

Contamination
Test and Method Test Parameters Control(s) Report Report?
Manufacturing
Design of Experiment Variables and Test SAC 305 Report: Y (before and
(DOE) for Minipot Conditions: c Through hole fill results and after)
Rework Alloys and Copper c Pot temperature ( °C): 240 , example photos of visual
Dissolution Assessment 270, 300 (validated by a inspection to IPC-610 for J3
HP rework process thermocouple at the test c Cross-section images for pin
characterization test setup) 1, 56, 128, 129, 185, and
method c Contact time (sec): 20, 40, 256 of J3
Wave and minipot rework 60, 80, 100 (measured with c Copper dissolution measure-
solder alloys only a stopwatch and validated ments on cross-sectioned
against the machine setting) joint samples of J3 as com-
Samples: Culebra PCAs pared to J2 (at pins above)
from nominal wave c IMC thickness measure-
process(see wave DOE ments on cross-sectioned
above), all components joint samples of J3 (at pins
loaded EXCEPT J2, which is above)
taped to protect from solder- c Laminate defect evaluation
ing in wave, 60 new alloy and copper via cracking
boards and 60 SAC 305 evaluation for J3 (at pins
boards above)
Preconditioning: prior to Equipment and process
wave, precondition PCBs parameters:
with two nominal Pb-free c Nozzle
reflow cycles c Flow rate
Rework component: J3 c Sample run order
256 pin DIMM, remove and c Thermal profile
replace the J3 connector
during a single heat cycle
within the ‘‘Contact Time’’
variable
Flux: Cookson OM338PT
paste flux, applied immedi-
ately before preheat, also
applied to new connector
pins
Replicates: two replicates
of the 15 conditions for each
of the following combina-
tions:
c SAC 305 wave and SAC
305 rework
c new alloy wave and SAC
305 rework
c new alloy wave and new
alloy rework
c SAC 305 wave and new
alloy rework

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Reliability Column 1 Column 2 Column 3 Column 4

Contamination
Test and Method Test Parameters Control(s) Report Report?
Manufacturing
Equipment: AirVAC
PCBRM15 system with
computer-controlled time and
pre-heater, board support fix-
tures, and support fixtures
that extend into the preheat
area
Flow rate: characterized
before the experiment with
low and high knob settings
at a nominal temperature and
time (270 °C, 60 sec), then
fixed (this requires laminar
flow and constant pot [full]
level, 1⁄4 inch from the
lip of the pot)
Preheat Time and Tempera-
ture: Flux before preheat.
Board must reach a tempera-
ture between 120 °C and
130 °C. Use instrumented,
board-monitoring, board tem-
perature techniques (calibrate
using an instrumented
assembly with thermocouples
on both top and bottom sides)
for verification. Using an
instrumented board placed
over the pot, monitor and
record a profile for at least
one specific pin using three
different thermal energies
(profiles at high temperature
and time, low temperature
and time, and medium tem-
perature and time). If pos-
sible, try to find the coolest
node.
TH Fill Measurement:
Measure cross-sectioned
joints (or 5DX) on J3 as an
actual measurement in milli-
meters expressed as pin-
wetted length
Copper Dissolution Mea-
surement: Measure the
remaining copper of the TH
pad and knee in cross-
sections on J3. J2 is the
unpopulated sites for determi-
nation of the ‘‘original’’ thick-
nesses.

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Reliability Column 1 Column 2 Column 3 Column 4

Contamination
Test and Method Test Parameters Control(s) Report Report?
Manufacturing
Wetting Balance Test: F1 - Wetting Balance SAC 305 Provide data for the new alloy Y
J-STD-003 Test: Lead-free Solder and SAC 305 controls:
Pot Temperature: 255 °C, c Wetting balance curves
as per standard for Pb-free showing individual coupon
alloys results (not averaged) for
Flux: standard activated rosin each alloy
flux #2 for Pb-free alloys c Contamination reports
Samples: 10 new alloy and before and after test for both
10 SAC 305 control the new alloy and SAC 305
Precondition: 8 hours at control
72C/85% R.H. followed by c Test board thickness and
1 hour bake at 105 °C features
Test Conditions: Parts
immersed at 45 degrees inci-
dent to solder pot to a depth
of 0.4 mm at 2 mm/sec
Material Properties
Liquidus and Solidus As per test method SAC 305 T L and T S in °C, and Y
Temperature graph of heat flow versus
DTA or DSC by ASTM temperature
E794-06
Electrical Resistivity Test at 293°K None Electrical resistivity (ρ) in N
µΩ-cm
ASTM B193-02
Thermal Conductivity Measured or calculated from None Thermal conductivity (k) in N
electrical resistivity Test at W/(m-K)
293 °K
Young’s Modulus, Shear Sample must be a rectangu- SnPb Measured E and G in GPa, Y
Modulus, and Poisson’s lar bar with a length to thick- and calculated Poisson’s ratio
Ratio ness ratio of 20:1 to 25:1 and (ν) Report geometry of test
Ultrasonic stress wave a width to thickness ratio of at sample
propagation technique by least 5:1. Use equations (2)
ASTM 1875-00 and (4) to determine the elas-
tic modulus (E), equation (8)
to determine the shear modu-
lus (G), and equation (15) to
determine Poisson’s ratio (ν).
Stress-Strain Curve, 0.2% Test Conditions: SAC 305 Plot the engineering stress Y
Yield Strength, Ultimate c Temperature (°C): -25 vs. engineering strain (to fail-
Tensile Strength, and (optional), 25, 75, 125, 160 ure), measured by conven-
Elongation c Rate: 3 mm/min (resulting in tional tensile testing for both
Tensile testing strain rate of 10-3 s -1 ) alloys at each temperature.
Samples: Three samples of Average the three samples at
each alloy; bulk solder each temperature and provide
samples with round gauge all eight graphs. Report
sections between 2 mm to sample gauge diameter in
5 mm in diameter and gauge mm
length of 50 mm. Geometry
and testing conditions must
be identical for all samples.
Density Direct measurement of vol- None Density (ρ) in g/cm3 N
ume and mass
Vickers Hardness As per test method None HV [dimensionless] N
ASTM E92-82(2003)e2

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Reliability Column 1 Column 2 Column 3 Column 4

Contamination
Test and Method Test Parameters Control(s) Report Report?
Coefficient of Thermal Test Condition: Measure- SAC 305 Graph of thermal expansion N
Expansion (CTE) ments taken every 25 °C from (ppm/°C) versus temperature
TMA as per ASTM E831-06 -50 °C to 200 °C, averaged (°C) for new alloy and SAC
for the three tests of each 305. Provide the standard
solder alloy deviation for each data point
Samples: Three samples of (as error bars), along with
each alloy, 10 mm in length, the averaged values a teach
lateral dimensions not to temperature. Report average
exceed 5 mm. CTE between -50 °C to
Ramp Rate: 10 °C/min. 200 °C in ppm/°C for each
alloy Report sample shape
and dimensions

7.8 Solder Paste Solder paste is a suspension of pre-alloyed solder powder particles in a flux vehicle to which special
agents have been added to enable the solder powder to remain in stable suspension.
Most solder pastes contain 75-92 mass percent of solder metal (equivalent to approximately 24-45 percent by volume). The
agents which are added to prevent the separation of the metal from the light flux vehicle also provide certain rheological
properties which are necessary for the methods of application.
Solder paste, as a convenient mixture of solder and flux, is used to join metals in a wide variety of applications; anything
from automobile fuel tanks, copper tubing, and sheet metal, to electronic devices, hybrid microcircuits, and surface mounted
component soldering.
What resulted in the increased importance in the use of solder pastes in the electronics industry is the ability to apply small
quantities accurately to those areas where solder joints need to be formed. Also, the inherent tackiness of the paste enables
components and hybrids to be temporarily connected to the board during the handling processes up to the time of the melt-
ing of the alloy to form the joint.

7.8.1 Solder Paste Alloys Most solder alloys are available in the form of solder paste. The selection of alloy is determined
by the product applications, melting temperature, and strength. The most commonly used lead-containing alloys are 63/37
tin/lead and 62/36/2 tin/lead/silver. The most common lead-free solder alloy is SAC 305, however, the industry is still
undergoing solder alloy evolution/selection and it is yet to be determined if one or several lead-free solder alloys will
become the industry ‘‘norm.’’

The solder powder, which is incorporated in the paste, is specified in terms of sizes determined by sieve analysis. The selec-
tion of the appropriate shape and size of the powder will be determined by the method of application and of any other
essential requirements such as stencil thickness and slump characteristics.

For reference purposes a list of comparative size designations is shown in Table 7-11.
Table 7-11 Solder Powder Size Designations (J-STD-005)
Type Mesh None Larger Than Less Than 1% Larger Than 80% Minimum Between 10% Maximum Less Than
1 -100 160 Microns 150 Microns 150-75 Microns 20 Microns
2 -200 +325 80 Microns 75 Microns 75-45 Microns 20 Microns
3 -325 +500 50 Microns 45 Microns 45-25 Microns 20 Microns
4 -400 +6350 450 Microns 38 Microns 38-20 Microns 20 Microns
5 -500 +635 320 Microns 25 Microns 25-15 Microns 15 Microns
6 -635 20 Microns 15 Microns 15-5 Microns 5 Microns

Typical solder powder size designations would be -200 +325 (75-45 microns), which means all particles are smaller than a
200-mesh screen and larger than a 325 mesh screen.
The shape, size, and size distribution of the solder powder in the paste are very important in most applications because they
affect both the rheological behavior and the wetting efficiency. Generally, solder particles with a spherical shape are pre-
ferred over irregularly shaped particles.

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Particles are accepted as spherical if the length is no larger than 1.5 times the width. Particles which are too large may clog
screens used for application of the paste, resulting in a deterioration of the screened pattern. When dispensing through a
needle, large particles can create blockages.
Determination of solder volume is important if a new batch of paste has to be applied or if the volume of the soldered joints
is to have a specific value.
When solder paste is heated above the melting point of the solder alloy it contains, the alloy particles should coalesce to
form one volume of metal. The flux, which is incorporated, must have sufficient fluxing action to secure the complete
coalescence of the solder particles and to enable the molten solder to wet the substrate area. It is therefore important that
the solder surface be as free from oxide as possible so as to obtain the maximum efficiency of the flux, which preferably
should have as low aggressiveness as possible, yet can get the job done.

7.8.2 Test Methods to Evaluate Solder Paste Properties In J-STD-004, J-STD-005, J-STD-005 Handbook, and other
international standards describing the requirements for solder paste, the various test methods are a guide for evaluating the
properties of a solder paste. The main tests include the following:

7.8.2.1 Solder Balling Test This test gives a general indication of the properties of the solder powder in the solder paste.
It is recommended that this test is performed if a new batch of paste is brought into use, or there is some doubt about the
quality of the paste (e.g., paste that has been stored for a long time). The test is easily done within the manufacturing
departments concerned, and is a good guide as to whether the paste is likely to produce solder balls during the reflow opera-
tion.

7.8.2.2 Solder Wetting Test The Solder Wetting Test is an evaluation of the flux that assesses the wetting capability of
the solder paste. This capability depends on the kind of metal to be wetted. Tests may need to be performed on the actual
surfaces that are to be soldered; this gives a quick indication as to whether it is feasible to use the paste in the process. For
reference purposes, the test is normally performed on copper or brass.

7.8.2.3 Viscosity The viscosity of a paste is an important property with respect to the application method. It is, therefore,
desirable to know how the viscosity of the paste varies over a wide range of shear rates. One measuring instrument is the
rotational viscometer, which can be used by the manufacturer to study the solder paste viscosity. Blanket viscosity values
should not be specified; there are different solder paste products functioning properly that may have different viscosities. For
incoming inspection or batch control, a spiral pump viscometer, or a rotational T-bar type viscometer are the main methods
for determining viscosity.

7.8.2.4 Tackiness Test The Tackiness Test is used to provide information on the ability of the paste to hold mounted
components in position to the substrate during processing. The duration of the adhesiveness indicates how long the paste
might be applied before components are placed.

7.8.2.5 Slump Test The Slump Test provides an assessment of the spreading of the paste after application and during dry-
ing before the melting or reflow process. Too much slump can result in component displacement, or to short circuiting, or
to unwanted solder balls. An acceptable solder paste should not slump or spread more than 10%.

7.8.2.6 Corrosion The corrosive properties of the paste are determined according to the effect on a copper surface and
also in terms of surface insulation resistance testing. The removal of the flux from the solder medium is a means of under-
taking this work, although it is more desirable for the complete solder paste formula to be used on comb patterns in order
to be sure that the complete paste is reliable.

7.8.3 Solder Paste Application The main methods of application are by dispensing through a syringe, needle, by screen,
or stencil equipment. After application it is usually necessary to have a preheat process to evaporate volatiles which may be
present in the solder paste. This is incorporated into the reflow oven thermal profile. The presence of excess low boiling
solvent can lead to flux spitting and/or solder balling. Reflow soldering can be accomplished with vapor phase, infra-red or
convection equipment.

7.9 Solder Preforms Solder can be manufactured into specific, pre-formed shapes for use in automated assembly and sol-
dering applications, or when precise amounts of solder and flux are required. Solder preforms are stamped from flat ribbon,
formed from wire, cast from melted metal, or made with compacted powdered solder.

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A. Advantages
1. Precise amounts of solder and flux for each solder joint.
2. Soldering not dependent on an operator’s judgment.
3. Placement can be automated, eliminating the need for manual assembly and touchup.
4. Inaccessible soldered joints can be made.
5. Highly skilled operators are not required.
B. Disadvantages. The disadvantages of using solder preforms include:
1. As a manufactured part, the price per unit weight of solder is higher for solder preforms.
2. Short run quantities of special shapes may preclude recouping tooling costs.
3. Solder preforms are sometimes viewed as a custom made, non-stock part because of small quantities, limited geom-
etries, and minimum sources of supply.
Selection of solder preforms includes considerations of the solder alloy, a determination of the proper percentage and type
of flux required, and choosing dimensions which deliver the correct amount of solder to the solder joint.
7.9.1 Solder Preform Alloys Solder preforms are made of most solder alloys melting from 93 to 315 °C. The selection of
alloy is dependent on the physical properties, such as melting point, strength, the wetting ability, and price.
Solder preforms can be produced with a specified percentage of flux contained either internally (as a core) or externally (as
a coating). This eliminates the need for adding liquid flux and assures that a consistent amount of flux and solder is deliv-
ered to the correct area.
Selection of the proper flux depends on how difficult these metal oxides are to remove and how sensitive are the materials
being soldered.
Except for the inorganic type flux, nearly any liquid flux types can be used with solder preforms. The most common fluxes
are the rosin types which include plain rosin, mildly activated rosin, fully activated rosin, and halogen-free activated rosin.
Water soluble flux can also be included in core type solder preforms.
Flux percentage is the weight ratio of the flux to the solder metal. Since rosin fluxes have a low specific gravity compared
to solder metal, a considerable volume of solder is lost for every weight percent of flux core used. This should be consid-
ered when determining the dimensions of the solder preform. Often some experimentation is required to determine the cor-
rect amount of flux to include for forming a good solder joint without leaving excessive flux residue.
Typical applications require only about 1.5% flux by weight for proper soldering. Larger amounts of flux may be required
where the solder must wick long distances, as with some multilayer printed boards when heavily oxidized parts are being
soldered, or when using slow heating. Even for these examples 2.5% flux by weight is generally sufficient.
Flux coated solder preforms often are preferred for applications where very low flux percentages are required. The flux
coating is better located at the interface where metallurgical bonding occurs and there is minimal residue to remove.
Solder preforms can be color coded to provide for easy inspection of correct placement, identification of similar preforms,
as well as those with different alloys or flux percentages. The color coding itself may also include flux.
7.9.2 Designing Solder Preforms Consideration should be given to the method of placing solder preforms before speci-
fying the dimensions. A common problem is to use a solder preform which is easy to handle, load, and melt that delivers
an incorrect amount of solder to the joint area. It is important to know exactly how much solder is needed to make the best
possible solder joint.
The easiest method to determine the correct amount of solder is to weigh the parts prior to soldering, hand solder them to
create good solder joints, remove the flux residue, and reweigh the assembly. The difference is the mass amount of solder
used. From this weight and the specific gravity of the solder, the volume of the solder preform can be calculated. Then,
dimensions can be determined.
Though solder will wick into small capillary spaces to create a solder joint, there is an optimum gap or space between the
surfaces which will promote the best penetration. The ideal capillary space is somewhat dependent on the solder alloy and
the flux.
In a low surface tension system (high tin alloy, clean solderable parts, and active flux) the preferred gap has been found to
be 0.8-0.15 mm [0.003-0.006 in]. A system using a high lead alloy and a low activity flux would have a high inherent sur-
face tension and require a space of 0.15-0.3 mm [0.006-0.012 in] between surfaces.

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The type of preform to use depends on the solder joint configuration, placement technique, and availability. Basically, sol-
der preforms can be grouped into three categories describing the material from which they are produced.

7.9.2.1 Wire Preforms Solder is extruded and drawn to a particular diameter in a continuous wire strand having a con-
sistent circular cross-section. The wire can be solid or contain a flux core of a specified weight percentage. Wire solder can
be used to produce solder pellets, rings, and wire forms of many different shapes.

7.9.2.2 Ribbon Preforms Solder ribbon or foil, solid or containing one or more cores of a specified percentage of flux, is
available as a continuous length with a rectangular cross-section with the thickness relatively small compared to the width.
The ribbon can be cut into short lengths or stamped with special dies to produce washers, discs or other custom shapes.
Solid ribbon solder can also be formed into collars or sleeves.

7.8.2.3 Cast Preforms Solder can be cast into molds or produced as small diameter spheres as small as 0.25 mm
[0.010 in]. For some special solders such as low melting bismuth alloys, powdered solder can be compacted into a mold and
sintered (heated to just below the melting point and pressed into a shape) to form discs or washers.

7.9.3 Preform Heating The solder preform is assembled with the parts being soldered. It may be positioned between the
parts or adjacent to the capillary space where the melted solder is to flow.
The method of heating is selected based on the best compatibility with the assembly. All types of heating equipment have
been used with solder preforms. Hot air, gas flame, induction, conduction, resistance, infrared, hot plates, heated liquids, and
vapor condensation are among the many possible heat sources.
The entire assembly should be heated evenly so the solder will flow and bond equally to all surfaces being soldered. Sol-
der is attracted to heat. Therefore, uneven heating may cause the solder preform to melt and flow away from the solder joint
toward the heat source.
Best results can be achieved by avoiding designs which naturally tend to entrap flux. Though flux is lighter and more vola-
tile than solder at soldering temperatures, it can still be entrapped by the high surface tension occurring in most systems.
Insufficient heating or time of heating and excessive flux can all result in flux entrapment in the solder joint. Entrapped flux
may not be corrosive but this void in the solder joint can cause weaknesses and hot spots at the assembly operating tem-
perature.

7.10 Adhesive Materials Adhesives are used extensively in board assemblies to bond or stake components to circuit
boards and/or heat sinks. The adhesives serve many functions - electrical, thermal, or mechanical depending on the adhe-
sive properties. The adhesives can be thermoplastic, thermosetting, or a combination of both depending on the polymer
types. Typical adhesive materials used in electronic assemblies are epoxy, urethane, silicone, acrylic, and cyanoacrylate in
a liquid paste, or sheet form. The paste adhesives can be formulated into one component or two component materials. One
component adhesives are preferred in most applications because no mixing is required. However, their shelf life is limited
and they need to be refrigerated or frozen to prolong shelf life.
Adhesives are either nonconductive or conductive. Most adhesives are nonconductive. However, metallic or nonmetallic
filler can be added into the adhesives to make them electrically or thermally conductive. Filler can also be added to increase
viscosity (thickener), to prevent slumping, or to provide ease of application.
Depending on the applications, designers can choose a variety of materials to meet the design service life and temperature.
Typical properties that designers need to consider is the temperature capability, ease of application, strength (lap shear or
tensile strength), coefficient of thermal expansion (CTE), modulus , thermal conductivity, electrical conductivity, glass tran-
sition temperature, and out gassing for space application. In addition to the material consideration, bonding surface prepa-
ration is critical in achieving the desired material properties.

7.10.1 Epoxy Adhesives Epoxy adhesive is based on the epoxy resin and the curing agent (hardener). Curing is caused
by the reaction of a curing agent and the epoxy base resulting in the formation of a cross linked polymer. The longer the
cross linked polymer chain, the harder the epoxy adhesive is. Some epoxy can be formulated to be flexible by changing the
ratio of the base resin to the hardener. Epoxy adhesive is usually packaged as a 2 component system (resin and hardener).
Sometimes the supplier combines the curing agent and epoxy resin in the same syringe as a one component epoxy. One-part
epoxies require refrigerated storage to prevent hardening in the package.

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Epoxy resins are the most widely used adhesives because of their versatility, reliability, excellent adhesion, and good physi-
cal and electrical properties. Many suppliers of epoxy adhesives offer products for surface mount device bonding. Epoxies
are about the strongest adhesives available compared to other adhesives. They can be heat cured or room temperature cured.
The major disadvantage of epoxies is that removal of devices for rework may be difficult. In addition, the high modulus and
thermal coefficient of expansion of typical epoxies may stress components and solder joints during thermal cycling. Epoxy
adhesives should not be used to bond to glass components due to component cracking during thermal cycling.
Two-part epoxy systems generally have better performance superiority to one part systems. Epoxies generally require heat
to cure in a practical time frame. A one-part system eliminates the inconvenience of having to weigh and mix components.
However, a longer cure time is required compared with a two-part system. Epoxy adhesives can be classified as structural
or non-structural. Structural adhesives are stronger than non-structural adhesives. Typical peel strength of epoxy material
ranges from 1000 psi to 4000 psi depending on the formulation. Metallic and nonmetallic filler might be added to the epoxy
adhesives to make them either electrically conductive or thermally conductive.

7.10.2 Silicone Adhesives Silicone polymers consist of a backbone of alternate silicone and oxygen atoms. The proper-
ties of the final cured silicone are affected by a variety of different groups attaching to the polymer backbone. Silicone for-
mulation can be based on the condensation reaction (using tin catalyst) or the addition reaction (using Platinum catalyst). In
general silicone adhesives require moisture for curing. Silicones can be heat cured or room temperature cured. Room tem-
perature cured is preferred because there is no dedicated oven required. Some materials might poison the platinum cured
silicone resulting in uncured condition (tacky). Users should always consult the supplier’s recommendation regarding clean-
ing and curing.
Another type of silicone adhesive is room-temperature-vulcanizing (RTV) adhesive. Some RTV silicone adhesives generate
acetic acid during cure and should not be used with electronic parts due to corrosion and high out gassing concerns. RTV
silicones cure relatively slowly, but can withstand both low and high temperature exposure. Silicone adhesive is also an
excellent electrical insulation. Some silicones are susceptible to reversion under certain conditions and should be used with
caution. Silicone adhesives may be used for bonding unsupported silicone sheet without primer. When bonding with other
substrates, silicone adhesives require primer to promote adhesion, otherwise, the adhesive strength is low resulting in
debond. Typical lap shear strength of silicone adhesive is approximately 200-500 psi.
Silicone resins are the materials of choice in applications requiring flexibility over a wide temperature range, high tempera-
ture stability, and/or excellent electrical properties over a wide range of temperature, humidity, and frequencies. Silicone
adhesives are easy to apply but extreme care should be taken to prevent silicone cross contamination or surface contamina-
tion during handling, cure and removal. Silicone can spread without the operator’s knowledge. As with other adhesives,
metallic and nonmetallic filler might be added to the silicone adhesives to make them either electrically conductive or ther-
mally conductive.

7.10.3 Polyurethane Polyurethane polymers are long chain thermoplastics. They come in a 2 part system with the base
resin and the isocyanate curing agent. Mechanical properties of the urethane materials such as modulus, hardness, etc.,
depend on the polymer chain length. Some polyurethane materials are very flexible while others are quite hard. Polyure-
thane materials are used quite extensively in aerospace application for bonding and staking of electronic components because
they are non-silicone and yet quite flexible, easy to apply, and relatively easy to remove without contaminating the bond-
ing surfaces. The lap shear strength of polyurethane adhesives is generally better than silicones, approximately 300-800 psi.
Some polyurethane adhesives are susceptible to reversion (i.e., becomes liquid). For this reason, these adhesives should be
avoided.

7.10.4 Acrylic Adhesives Formulations of various acrylics allow the final polymer to be more flexible while promoting
adhesion to a variety of dry substrates. Acrylic adhesives cure by a polymerization reaction with radicals produced from the
reaction of the acrylic resins with ultraviolet light or heat. Acrylic adhesives have good bond strength. While they may not
be as strong as epoxies, acrylics are easier to repair and have longer shelf life. Most acrylics are designed to take advantage
of accelerated ultraviolet (UV) curing or cure by UV and heat and require more heat to cure than epoxies; however, the
initial UV cure allows nearly instantaneous tacking of the component.
Acrylic adhesives can be made more thermally conductive by adding inorganic fillers. Such adhesives are designed for use
with components that need heat for removal.
Filled acrylic adhesives are one-part, activator cured systems which cure rapidly at room temperature and bond to a wide
variety of surfaces. These adhesives are available in different strengths and are offered with or without electrical insulation.

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The products can be mechanically dispensed or stenciled onto the substrate. Because they are one-part no mix systems, pot
life is not a concern. Cure occurs at room temperature when the adhesives come into contact with the opposite substrate to
which an activator has been applied.
While the adhesive is a 100% reactive formulation, the activator is solvent-based, therefore, ventilation should be provided.
The activator may be applied up to two hours before assembly. The activators are low viscosity liquids which can be brush,
roller, spray, or transfer applied. Acrylics are typically one of the lowest cost options but have significant thermal and hydro-
lytic stability limitation. They are normally used in electronics as Pressure Sensitive Adhesives (PSAs).

7.10.5 Cyanoacrylates Cyanoacrylate adhesives (super glues) can be bonded to a wide variety of surfaces to give a very
fast and strong bond. They have limited thermal stability, are brittle and can leave a white residue on nearby surfaces. The
adhesion to metal can also be poor due to moisture absorption.

7.10.6 Electrically Conductive Adhesives Electrically conductive adhesives are usually adhesives filled with metallic
particles. Silver filled adhesive is the most common electrically conductive material. Since the particles are mixed with the
adhesive binder, the electrical conductivity of the adhesive is not as good as the conductivity of a metal. Typically they are
used for mechanical hardware attachments requiring electrical connectivity (e.g., grounding lugs) and not for standard elec-
trical connections for electrical signals. In some hybrid application, anisotropic (i.e., one direction) conductive adhesive is
used to connect components to the board instead of soldering. However, this type of attachment is not recommended for
high reliability connection.

7.10.6.1 Conductive Liquid Thermoset (e.g., epoxy) Thermosets are typically silver filled epoxy resins that are hardened
by the addition of catalyst or by the energy activation of a latent catalyst already present.
Silver is the most common filler because of numerous ideal properties, especially the ability to remain conductive even under
oxidizing conditions. Most electrically conductive epoxy adhesives are conductive in all directions, so they must be applied
selectively. It is possible to connect low density chips directly to circuitry by precisely applying conductive adhesive to
mounting pads. Care should be taken when using electrically conductive adhesives to prevent unwanted shorts due to smear
or contamination.

7.10.6.2 Conductive Inks A range of conductive inks are available which can also be used to produce polymer bonds.
Bonding is usually achieved by re-melting the dry ink while pressing the circuit or device to be connected against the ink.
The inks are composed of conductive metal or carbon particles in a thermoplastic binder, along with solvent to permit the
ink to be printed. This type of ink is used mostly in the chip scale processing.

7.10.6.3 Pressure Sensitive Conductive Adhesives (PSA) Pressure Sensitive Conductive Adhesives are basically acrylic
or rubber-based PSA’s filled with conductive metal particles. They are usually available in the form of a sheet of 0.002 in
to 0.005 in with liner to protect the adhesive. PSAs can be used to bond components to the board or to connect TAB outer
leads to printed boards by the use of pressure only; however, this type of bonding produces unstable electrical connections.
A key problem is the tendency of PSAs to creep, resulting in electrical opens over a period of time.

7.10.6.4 Anisotropic Conductive Adhesives Anisotropic conductive adhesive conducts electrically only in one direction
(z direction), preventing accidental shorting in other directions (x, y). Anisotropic adhesives are filled with small conductive
particles and require a heat seal system for application. The adhesive can be applied as a foil with a protection film or as a
paste by screen printing. Depending on the type of polymers the adhesive can be a thermoplastic, thermosetting or a com-
bination of both. In order to bring the conductive particles together, heat and pressure are applied. The process of heating
and pressing together in hot condition is called heat sealing. Configurations and dimensions of the particles in the adhesive
are part of the characteristics of that adhesive and may vary depending on the manufacturer and type of adhesive.

7.10.6.4.1 Liquid Thermosets Anisotropic electrically conductive materials permit current to flow in a single direction.
These products achieve directional conductivity by spherical, conductive materials dispersed in a dielectric medium. Since
conductive particles are electrically insulated from one another, current cannot flow in X or Y directions. By placing such
material between two conductors and then applying heat and pressure, electrical paths are formed in the Z direction only.
An important characteristic of anisotropic materials is that they do not have to be applied selectively. In fact an entire printed
board can be coated without producing shorts between conductors. A special feature of liquid material is screen print-ability.

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7.10.6.4.2 Dry-Film Thermoplastics Hot melt adhesive films incorporating anisotropic properties are used in commercial
products to connect liquid-crystal displays and other difficult to bond devices to circuitry. These hot melt films are made up
of conductive metal particles, carbon particles or metal-coated plastic spheres dispersed in a dielectric adhesive matrix.
The small particle size of the conductor makes possible to bond geometries below 0.05 mm [0.002 in]. The theoretical spac-
ing restriction is only limited by the size of the conductive particle, which can approach atomic dimensions.

7.10.6.4.3 Dry-Film Thermosets Anisotropic films using thermoset adhesive as the dielectric provide quite reliable con-
nections for commercial applications. The dielectric materials are similar to laminating adhesives used in printed board
manufacturing. Although very high bond strengths are possible, considerable bonding time and higher temperatures are
needed to set the adhesive.

7.10.7 Surface Mount Adhesives A number of different adhesives are available for component attachment such as chip
components, and flatpacks for either mechanical or thermal purposes. Most heavy components require bonding to make sure
that the component leads would not be broken during vibration. Some components require both mechanical attachment and
thermal dissipation. For those cases, thermally conductive epoxy should be used if the components can withstand the ther-
mal stress. If not, either thermally conductive silicone or polyurethane should be used. Bonding provides better strength than
staking due to the available surface area.
Small chip components normally do not require bonding if the assembly is reflowed. However, chip components are bonded
to the board if the assembly is wave soldered to make sure that the components would not fall into the solder pot. The most
common types of SMT adhesives are epoxy and acrylic. These SMT adhesives are selected based on ease of application and
fast cure.

7.10.8 Thermally Conductive Adhesives Thermally conductive adhesives are formulated by adding thermally conductive
filler such as aluminum oxide, aluminum nitride, boron nitride, or diamond, etc. Those fillers are nonconductive compared
with silver filler. Electrically conductive adhesive is also thermally conductive (See Section 7.10.6 for electrically conduc-
tive adhesive). A thermally conductive, electrically insulating hot melt adhesive is offered as sheet stock or in precut sizes.
Parts are assembled with this product by clamping them together with the sheet adhesive in between and heating up to the
melt temperature. Since the adhesive functions merely by melting, lengthy exposure to an elevated temperature, e.g., for
cure, is not necessary. Thermally conductive pressure sensitive adhesives are available as an option on many coated fabric
compressible pads. The adhesives are either acrylic or silicone based. They function as an assembly aid and promote inti-
mate surface contact, maximizing thermal transfer. Solvent resistance is generally good and inventory shelf life is approxi-
mately one year.
Thermally conductive adhesives are used to bond heat sink to PCB with heat and pressure or vacuum. Adhesives for heat
sink bonding can be either in the paste or the film form. For paste adhesive, the paste can be applied on the heat sink or the
board. For the film adhesive, the film is usually applied onto the heat sink. Cutout in the film matching the cutout in the heat
sink can be cut before or after joining the heat sink and the board.

7.10.9 Cure Verification Properly cured adhesives are tack free and provide mechanical as well as other properties. Tack
free is the easiest way of cure verification. However, tack free might not be an indication of a properly cured adhesive. Most
aerospace specifications require hardness verification when two-part adhesive is used. The same adhesive mixture used in
the hardware is poured onto an aluminum cup and allowed to cure with the hardware. The hardness is then measured after
completing the cure. The hardness result is in unit of shore A or shore D scale depending on whether it is soft or hard. The
hardness result is a reflection of the adhesive property whether it is within shelf life or if it is mixed and cured properly.
Improperly mixed 2-part adhesives will result in lower hardness. Also out of date adhesive might not produce acceptable
hardness results.

7.10.10 Workmanship Verification Two-part adhesives are usually required to degas to prevent bubbles after cure. Exces-
sive bubbles should be avoided. There should be no flux or other contamination in the adhesive. The adhesives should be
applied to the board in accordance with the engineering drawing. Refer to J-STD-001, J-STD-001 space addendum and
IPC-A-610 for workmanship standards for bonding and staking.

7.11 Tin Whiskers

7.11.1 Executive Summary Tin (Sn) whiskers are highly conductive ‘‘hair-like’’ protrusions of tin that can grow from the
surface of pure tin plated parts (parts having <3% lead (Pb)) due in part to compressive stress from the tin plating process

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or from other sources of compressive stress (e.g., tightening of a fastener). Tin whiskers have been known to result in equip-
ment operating problems due to an electrical short-circuit resulting from a tin whisker bridging the gap between conductors
or between conductors and ground. This section provides an overview of the overall issue of tin whiskers, the possible
impact for electronics equipment, and recommendations to minimize, but not completely eliminate, risks pertaining to tin
whisker growth.

Various equipment operating problems with, and/or damage to, industrial, aerospace, and commercial nuclear power plant
equipment have been caused by tin whiskers. See Figures 7-8, 7-9, and 7-10 for examples of various tin whisker experi-
ences that NASA has documented on their web site.

Although whiskers can form on items that are plated with other metals such as cadmium, zinc, gold, silver, etc., the most
recognized concern is with tin whiskers because tin is the primary element used in most solders for electronics, and is widely
used as a finish for component leads (second level interconnect). The risk of tin whisker growth can be significantly reduced
or eliminated by alloying with lead (Pb). However, because of environmental concerns (e.g., the European mandate Reduc-
tion of Hazardous Substances - RoHS - initiative) to phase-out lead (Pb) from electronic assemblies by July 1, 2006, com-
ponent manufacturers are eliminating lead (Pb) from their component leads in favor of alternative finishes. Many compo-
nent manufacturers are transitioning to a pure tin finish (usually matte-tin). However, not all component manufacturers have
changed their component part numbers when switching from a SnPb finish to a Pb-free-Sn finish. It is estimated that only
50% of component manufacturers are changing part numbers. Consequently, equipment manufacturers are vulnerable to
unknowingly using components having lead-free tin finishes, unless steps are taken to mitigate the risk of growing tin-
whiskers.

The best method for preventing tin whiskers in a design is not to use any component with a tin plated finish whenever pos-
sible (e.g., Class 3 product). However, if a tin plated component finish must be used because no other technically accept-
able component finish is available, then there should be some form of tin whisker mitigation method employed by the com-
ponent manufacturer, or by others, as applicable.

Industry has developed recommendations for mitigating tin whiskers.

Most of the following information was extracted from International Electronics Manufacturing Initiative (iNEMI) Recom-
mendations on lead-Free Finishes for Components Used in High-Reliability Products, Version 4 dated December 1, 2006.
Readers should consult the iNEMI web site for the most current information on tin whiskers.

The references cited provide a good overview of tin whiskers, as well as a large bibliography of additional reference mate-
rial.

7.11.2 General Guidelines for Migrating to RoHS Compliant Finishes Table 7-12 provides discussions on tin whisker
mitigation.
Table 7-12 Tin Whisker Mitigation
Comments
A. Commonly Available Mitigation Practices (in order of preference)
1. Non-tin (Sn) plating. Nickel-palladium-gold (or just plain nickel-palladium) should be strongly considered for
lead-frame applications. This plating has a long history (1992-present) of field application.
Early solderability issues have been resolved. In addition, NiPdAu is not prone to whisker
growth in most environments. The iNEMI User Group strongly recommends this plating for
most lead-frame applications to retard whisker growth. However, users should be aware
that molding compounds do not adhere as well to noble metals, such as Pd and Au, as
they do to copper. As such, it may be more difficult for NiPdAu packages to achieve MSL
1 and 2 performance at the higher temperatures associated with SnAgCu Pb-free assem-
bly. NiPdAu has also exhibited corrosion in accelerated tests using high hydrocarbon and
sulfur atmospheres. Such corrosion has not been noted in actual field conditions.
2. Add lead (Pb) to tin plating. Adding Pb to Sn plating mitigates whisker formation. Although not viable for many prod-
ucts due to legislation restricting the use of Pb, there are numerous exemptions and ‘‘out-
of-scope’’ products that may still use SnPb finishes. This has been the primary means of
tin whisker mitigation for over 50 years and has an excellent field history. The iNEMI User
Group strongly recommends the continued use of SnPb plating in exempted applications.
Suppliers are encouraged to continue manufacturing SnPb finished components for these
applications.

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Comments
3. Add a nickel (Ni) underlay Adding a nickel (Ni) underlay between tin plating and a copper (Cu) base metal mitigates
between tin-plating and a whisker formation (this is a key User Group recommendation). The under layer plating
copper (Cu) base metal. may alleviate the compressive stress in the tin film, which is thought to be one of the driv-
ing forces for tin whisker growth. The thickness, porosity and ductility of the nickel plating
are also very important to ensure an effective barrier layer for the copper. It is important to
ensure that the appropriate values for these parameters are met even after lead forming.
If the nickel layer is cracked or damaged during subsequent forming or other operations, it
has been demonstrated to be an ineffective mitigation technique. Similarly, the control of
the tin bath impurities, particularly copper, is important to make this under layer effective.
Additionally, thin Sn films (up to 3 µm) plated over a Ni barrier layer may benefit from ten-
sile stress generated in the Sn film from the NiSn intermetallic formation to partially com-
pensate for compressive stresses generated from various other sources, such as thermal
cycling.
4. Perform annealing at 150 °C The User Group accepts the use of a 150 °C for 1 hour anneal within 24 hours of electro-
for one hour within 24 hours of plating as a generally effective mitigation technique for tin-plated copper alloy lead-frames.
electroplating. Annealing/heat treating has been an accepted tin whisker mitigation technique since 1962.
Published authors generally recognize that annealing will increase the incubation time for
whisker formation but delay times vary widely, from months to many years. Annealing may
also reduce whisker lengths in comparison to non-annealed parts but the data is very
sparse. Recent data indicates that annealing changes the morphology of the intermetallic
from an irregular Cu6Sn5 to a more uniform bilayer intermetallic compound consisting of
Cu3Sn and Cu6Sn5. Due to the variability in results it is recommended that annealing be
accepted only when accompanied by supporting test data.
B. Other Viable Mitigation Practices, Less Commonly Available (roughly in order of preference)
5. Hot dip tin. Hot dip tin is a molten tin bath process that is not prevalent in lead-frame construction
intended for electronic components, but it has been used for structural steel parts, con-
nectors and devices such as relays. There is evidence that this mitigation process may
not be effective with pure tin. Hot dipping with Sn-4% Ag or SnAgCu is generally an effec-
tive mitigation practice. Hot dipping with SnCu alloy may or may not be effective. When
plated tin finishes are dipped following plating as a mitigation strategy, there may be areas
of the termination that are not covered because of part geometry. These areas will have a
greater risk of tin whisker growth than coated areas.
6. Fusing tin shortly after plating. Fusing tin plating shortly after plating mitigates whisker formation. Fusing is a reflowing
operation usually done by dipping the tin-plated surfaces into a hot oil bath. Some User
Group members recommend fused tin based on excellent field history.
7. Plated SnAg (2-4% Ag) Plated SnAg (2-4% Ag) alloys in limited testing have shown promise in reducing tin whis-
ker growth. The User Group encourages further investigation of this finish as a possible
tin whisker mitigation practice.
8. Add Bismuth(Bi) (2-4% by weight) When added to tin in amounts of 2-4% by weight, bismuth may aid in suppressing whisker
to tin. growth and can be a viable mitigation practice. Users should be aware that SnBi finishes
used on Alloy 42 lead frames and soldered with SnPb will result in reduction of the solder
joint fatigue life compared to a SnPb finished lead soldered with SnPb. This should be
evaluated by the user relative to the acceptability in the given use environment. Concerns
about tin-bismuth (SnBi) alloy finishes with low Bi concentrations in conjunction with
eutectic SnPb solder forming SnPbBi ternary eutectics are unfounded. There is a low
melting point ternary eutectic formed between tin-lead-bismuth with a melting point at
96 °C. However, it is not thermodynamically possible to form this ternary eutectic with
small (1-5% by weight) additions of Bi to Sn finishes when soldered with SnPb37. There
is a ternary SnPbBi peritectic that is thermodynamically viable for Bi above 6% by weight
in the component finish, and this peritectic has a melting point of 135 °C. As long as the
Bi concentration on the lead is less than 6%, the peritectic should not be an issue. With
eutectic tin-lead solder, it is necessary to control the bismuth content of the finish between
3-5% so as to have enough bismuth to suppress whisker formation without getting into
the compositional range of the ternary eutectic. In addition, keeping the Bi content low is
required to retain solderability of formed leads.
C. Finishes that Should Generally be Avoided (in no particular order)
9. Silver. Silver finishes are not prone to whisker growth in most environments. However, rapid
growth of silver dendrites or, in some cases, silver whiskers may form in the presence of
H2S (found in some cases where the environmental air pollution contains SO2). Addition-
ally, users sometimes avoid silver finishes due to potential issues with electromigration
and solderability shelf life.

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Comments
10. Plated tin-copper alloys. Plated tin-copper alloys are not satisfactory finishes because copper enhances whisker
formation and growth when included as an alloying element in tin plating. See item 6 for
dipped SnCu finishes.
11. Tin-plating over brass. The User Group strongly recommends against the use of tin plating over brass without a
copper or nickel diffusion barrier plating. If a copper underlayer plating is used, additional
mitigation practices for tin on copper are recommended. The minimum thickness for the
copper or nickel diffusion barrier should be 1.27 µm.
12. Bright tin-plating. In general, bright tin plating is not recommended. However, there may be specific applica-
tions where bright tin is a viable solution. Bright tin plating is not recommended without a
nickel barrier layer or for soldered applications (ICs, passives, etc.). For non-soldered
applications, some recent studies show that whisker growth from bright tin may be sup-
pressed when a Ni underlayer and newer, lower carbon content bright tin platings are
used. Note that not all references agree. Given this, users may choose to evaluate bright
tin over a Ni barrier for non-solderable applications. The nickel must be continuous and
non-porous on all surfaces of the component. For components with internal cavities (e.g.,
BNC connectors) verification of the nickel plating thickness and coverage on the internal
surfaces is critical. Historically, bright tin plating has been considered to be worse for
whisker growth than matte tin plating. Bright tins have typically had more than 0.8% car-
bon content and higher, as plated, compressive stress levels than matte tins. Traditional
matte tin platings had larger grains and lower carbon content than bright tins. However,
new bright tin platings that have low carbon content and purportedly low stress are com-
mercially available. The carbon content can be as low as that of matte tin. However, it is
important to understand that this is a relatively new development and further investigation
is encouraged. Controversy exists regarding the role of grain size and carbon content in
promoting whisker formation. Each of these may contribute to the promulgation of com-
pressive stress in the tin plating. Regardless of the selection of matte or bright finish, a tin
whisker test (as defined by JESD201) should be performed to assess performance of the
tin plating. The grain structure (see guideline 14) and data on the stress level of the tin
film over time may be useful in evaluating the suitability of this finish. Additional investiga-
tion of these new low carbon content bright tins is encouraged. For the purposes of this
document, matte and bright tin finishes are defined by the following:
Carbon Content: 0.005%-0.050% for Matte Sn and 0.005%-1.0% for Bright Sn
Grain Size: 1 µm-5 µm for Matte Sn and less than 1 µm for Bright Sn.
D. Mitigation Practices with Further Study Needed (in no particular order)
13. Adding a silver (Ag) underlay Adding a silver (Ag) underlay between tin plating and copper base metal has been pro-
between tin plating and copper posed as a method to mitigate whisker formation, similar to Ni as noted above. However,
base metal. there is limited whisker test data supporting the effectiveness of an Ag underlay for whis-
ker mitigation. The User Group acknowledges the potential for this mitigation practice to
be effective, and encourages further investigation of this technique.
14. A non-columnar grain structure A non-columnar grain structure with a significant number of horizontal and oblique grain
with a significant number of hori- boundaries (ideally an equiaxial grain structure) in a tin finish may reduce or eliminate
zontal and oblique grain bound- whisker growth by facilitating reduction of compressive stress by diffusion (rather than
aries (ideally an equiaxial grain whisker growth). The data confirming this mitigation technique is still very limited. The
structure) in a tin finish may User Group encourages further investigation of this technique as a possible tin whisker
reduce or eliminate whisker mitigation practice. It is strongly recommended that the stress levels of tin deposits utiliz-
growth by facilitating a reduction ing this technique be tracked over time and be confirmed to not build up in compressive
of compressive stress by diffu- stress over time.
sion (rather than whisker
growth).
15. Surface chemical etching prior to Surface chemical etching prior to plating of copper-based alloys in limited testing has
plating of Cu-based alloys. shown promise in reducing tin whisker growth when the etching depth is in the range
of 3 to 4 µm. The User Group encourages further investigation of this technique as a
possible tin whisker mitigation practice.

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Comments
E. Applications of Concern
16. Corrosion (severe oxidation typi- Corrosion (severe oxidation typically due to condensation of water) of Sn finishes has
cally due to condensation of been theorized to be a significant source of compressive stress in Sn films and can drive
water) of Sn finishes has been whisker growth. For applications where corrosion is a significant concern additional pre-
theorized to be a significant cautions, such as conformal coating or non-Sn finishes, should be considered in order to
source of compressive stress in reduce the risk of tin whisker related failures.
Sn films and can drive whisker
growth.
17. Applications where a continuous Applications where a continuous mechanical compressive stress is applied to a tin finish
mechanical compressive stress (e.g., zero insertion force connectors on a flex cable interconnect) are particularly at risk
is applied. for tin whisker growth and should be evaluated carefully by the user to determine if whis-
ker growth in this application will result in reliability problems. Users should work with sup-
pliers to find appropriate solutions in these applications.
18. Applications where significant Applications where significant thermal cycling occurs, such as power cycles, outdoor
thermal cycling occurs. applications, etc., can create compressive stress in Sn finishes associated with the CTE
mismatch of the Sn and base materials. Mitigation practices such as under layer platings
or annealing that address only the stress created by intermetallic formation are not effec-
tive for mitigating tin whisker growth in these applications.
19. Alloy 42. Users should be cautious in using tin finishes on alloy 42 (Fe-42Ni) lead-frames in appli-
cations where there is significant thermal cycling. Sn(1-4%)Bi plating has shown promise
in reducing whisker growth in this application. Additionally, low-porosity NiPdAu is avail-
able for this application from at least one lead-frame supplier.
20. Immersion tin. Immersion tin is a chemical displacement process that results in a relatively thin (<40
micro-inches or 1 µm) and stress-free tin film. Whiskers have been grown on immersion
tin by iNEMI team members, but the whisker lengths are typically limited to <20 microns.
For some applications, immersion tin is a suitable minimum risk selection that has been
successfully used by some of the iNEMI User Group companies. Solderability shelf life
considerations generally make this finish inappropriate for electronic components. It is,
however, one of the lead-free finish options for printed circuit boards.
21. Sn plated over steel. When Sn is plated over steel, mitigation practices should be used to lessen tin whisker
risk. Recommendations for mitigation include using matte tin greater than 5 µm thick in
conjunction with annealing at 180 °C for 1 hour. (Other annealing times and temperatures
may also be viable.) This can be done with or without a copper strike under layer plating
between the steel and Sn. Nickel under layer plating has also been reported to be effec-
tive on steel substrates. The User Group also recognizes the applicability of annealing for
tin plated on steel and brass as reported during the 1960s, 70s, and 80s. Annealing tem-
peratures ranged from 100-190 °C and annealing times ranged from 9 hours (at 100 °C)
to 1 hour (at 190 °C).
F. Other Considerations and Recommendations
22. Circuit board reflow process. The User Group does not recognize the circuit board assembly reflow process as a miti-
gation practice. There is no consensus in the open literature to support assembly reflow
as an effective process for mitigating tin whisker growth. There has been some data pub-
lished that suggests that the assembly reflow process can result in an increase in whisker
growth on loose components. Some whisker growth has also been seen on soldered com-
ponents. Partially reflowing plating on a given surface may increase whisker growth. This
mechanism is not understood at this time, but factors such as part geometry and reflow
solder coverage are likely to confound the observed data. There is also some limited data
that suggests assembly reflow can reduce whisker growth on Alloy 42 base materials.
23. Thicker tin finishes. Industry data indicates that thicker tin finishes show a lower propensity for tin whiskers
and/or a greater incubation time before tin whiskers occur. The User Group recommends
tin thickness for components without a nickel or silver under-layer be at least 10 µm nomi-
nal or thicker (8 µm minimum preferred). When a nickel or silver under-layer plating is
used, the minimum tin thickness should be 2 µm to ensure solderability shelf life. Compo-
nents that use nickel under-plating should have a porosity-free nickel thickness of a mini-
mum of 0.5 µm. Components using silver under-plating should have a minimum silver
thickness of 2 µm.
24. Conformal coating. The use of conformal coating after assembly has shown some promise in reducing the
rate of whisker growth. The effectiveness of this approach appears to be specific to the
material types used and the environment. Data does not support conformal coating to be
a cure for whisker growth. However, it does add an insulation barrier that may prevent
shorting should long whisker growth occur.

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Comments
25. Macro stress level. The macro stress level of the tin deposit has an impact on tin whisker growth. Tin depos-
its that have tensile stress as plated and remain tensile with aging are preferred. Tin
deposits that are compressive during service life are not preferred.
26. The effect of bias voltage and/or The effect of bias voltage and/or current on whisker growth is not well understood. In lim-
current. ited testing, there have been mixed results on the effect of bias on tin whisker growth.
Bright tin has shown a significant bias effect on whisker growth in one test, but none on
matte tin in the same test. One field failure for whisker growth on a bright tin also sug-
gests that bias has an effect on whisker growth. However, in a number of unpublished
tests on matte tin finishes, no effect of bias has been seen. Given the data currently avail-
able, the User Group does not believe that the effect of electrical bias on whisker growth
is a significant concern, and does not recommend any additional testing of tin finishes for
whisker growth with either electrical bias or current.
27. JESD22A121.01 Since a full understanding of the tin whisker growth mechanism is still lacking, collecting
data on the characteristics of tin plating is critical to help increase the knowledge level on
parameters affecting tin whisker growth. JESD22A121.01, Measuring Whisker Growth on
Tin and Tin Alloy Surface Finishes, defines data collection requirements for tin finishes.
The User Group recommends data collection in accordance with that standard.

7.11.3 Electronic Component Lead and Terminal Finishes Electronic component lead and terminal finishes refer to the
solderable finishes applied to electronic components. These include lead-frames for ICs, leads for other solderable compo-
nents, terminations for discrete components, and solderable finishes applied to plated covers on electronic components.
Lead-frames are the metal tabs that electrically connect the chip die to the printed circuit board. The majority of current
lead-frames are made of copper or a copper alloy. In addition, some lead-frames are still made of an iron-nickel alloy (e.g.,
alloy 42). Typically, the lead-frames are purchased without a finish (or plating) and processed at the manufacturing site into
a package. Tin lead-frame plating is done after the molding operation. Historically, the predominant lead-frame finish was
a tin-lead alloy with typical nominal Pb content ranging from 7% to 37% Pb. However, this transitioned primarily to tin-
based Pb-free alloys in the 2005/2006 timeframe. About 10% of the lead-frame finishes are NiPdAu, which is purchased in
a pre-plated form by the component assembly manufacturer.
Table 7-13 lists all the lead-free finishes that the User Group has identified as offered or proposed finishes for electronic
components. For each finish, which includes under-layer plating if applicable, and associated base material, the finishes are
placed in one of three categories. This table is specific to tin whiskers and does not directly address other possible issues
and concerns with these finishes. Category 1 indicates that the proposed solderable finish will be accepted by the User Group
without any tin whisker testing. Category 2 indicates that the finish will only be accepted if it passes the whisker test
requirements given in JESD201, Environmental Acceptance Requirements for Tin Whisker Susceptibility of Tin and Tin
Alloy Surface Finishes. Previous data generated according to the iNEMI Tin Whisker Acceptance Test Requirements may
also be acceptable to users. A Category 3 rating indicates that User Group members consider this finish a high risk for tin
whiskers and will not accept it in any case, regardless of tin whisker test data provided. The table summarizes what the
majority of companies will accept for each finish. Suppliers should be aware that though this table represents the majority
opinion, individual company requirements may vary.

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Table 7-13 Component Lead-Free Finishes (Tin Whisker Test Requirements)

Table Courtesy of iNemi
Base Material
Ceramic (Such as
Cu (7025, 194 etc) Low Expansion Alloy resistores and capacitors) -
(Excluding Brass) (Alloy 42, Kovar™) no lead-frame
Solderable Finish Category Category Category
NiPdAu 1 1 1
NiPd 1 1 1
NiAu 1 1 1
Hot dipped SnAgCu 1 1 1
Matte Sn w/Nickel underplate 2 NA 1 or 2(1)
Reflowed Sn 2 2 2
Matte Sn w/Silver underplate 2 2 2
Hot Dipped SnAg 2 2 2
Hot Dipped Sn 2 2 2
SnAg (1.5 - 4% Ag) 2 2 2
Matte Sn - 150C anneal 2 2 2
SnBi (2-4% Bi) 2 2(2) 2
(6)
Hot Dipped SnCu(7) 2 or 3 2 2
Matte SnCu - 150C anneal (2% Cu) 3 3 3
(5) (5)
Bright Tin w/nickel underplate 3 3 3(5)
(4)
Matte Sn 3 2 3(4)
Semi-Matte Sn 3(4) 3(4) 3(4)
(4) (4)
SnCu 3 3 3(4)
Bright Tin 3(4) 3(4) 3(4)
(3)
Ag (over Ni) 1 1 1
AgPd (over Ni)(3) 1 1 1
(3)
Ag 1 NA 1
Category 1: No tine whisker testing required
Category 2: Finish must pass tin whisker testing
Category 3: Do not accept this finish in any case

Color coding for the above table

Preferred Finishes
Finishes with preferred tin whisher mitigation practices
Finishes with tin mintigation practices that are less desireable than preferred pratices
Finishes without tin whisker minigation that are often not acceptable to users
Finishes to avoid

Notes for Table 7-13:

(1) In general, tin whisker testing is required. However, users have accepted for approximately 10 years, and many will
continue to accept, small discrete resistor and capacitor device components with a matte Sn over Ni finish. These
devices are exceptions to the tin whisker test requirements but must meet all of the following criteria to be acceptable:
• The Sn finish should be matte tin.
• The Ni under layer should be at least 2 µm (80 micro inches).
• The supplier should have data to substantiate control of its processes to minimize whisker growth (see JESD201).
• The devices must not require any lead forming or other stress creating operations after final finish.
• Tin plating thickness greater 2 µm (80 micro inches) is the minimum acceptable.
• New component types must be similar in size and construction to previously accepted components.
• Plating of new component types must use the same plating lines, chemistries, etc., that have been previously accepted.
• New component types must pass whisker testing unless otherwise agreed to by user and supplier.

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(2) A number of users have restrictions on the use of SnBi finishes on alloy 42 lead frames that are independent of tin
whisker concerns.
(3) In general, although whiskers on Ag and AgPd finishes are not considered an issue, the User Group is very hesitant to
accept these finishes due to a number of concerns including, but not necessarily limited to, electromigration and solder-
ability shelf life.
(4) A small number of users may accept these finishes for devices with lead spacing greater than 1 mm.
(5) Some exceptions exist where users may consider this option.
(6) There is significant disagreement among users as to whether this finish is acceptable, regardless of whisker test results.
(7) Factors such as part geometry and solder coverage that result in thin areas of the finish may play a significant role in
the tin whisker mitigation effectiveness of the finish.

7.11.4 Separable Connectors A separable connector is defined as a make/break connector with a separable interface for
interconnection and, typically, a second interface with a more permanent connection, such as a crimp to a wire or a solder
joint to a PCB. Separable connectors include, for example, compliant pin connectors, bolt-on connectors, PCB connectors
and cable connectors. Separable connectors usually have a nickel underlay beneath a film of gold, tin-lead, or pure tin.
Many connectors use tin as a solderable finish and use a precious metal in the separable interface. If the tin plating is com-
pletely wet during the soldering process, the likelihood for whiskering after soldering is greatly reduced. Thus, some com-
panies may have different acceptance criteria for tin used only in the solderable interface.
Compliant pins (or press-fit pins) utilize a contact design where a portion of the contact is mechanically inserted into a plated
through-hole (PTH) of a printed circuit board. The EU RoHS Directive has an approved exemption for the use of Pb in
compliant pin terminations. As exemptions are to be reviewed every four years, this exemption may eventually be elimi-
nated.
Compliant pins typically utilize a tin-lead plating to achieve reasonable insertion forces. Members of the User Group have
performed testing on lead-free compliant pins and shown that the insertion forces and retention forces increase when the Pb
is removed from the finish. This increase in insertion force is acceptable in most applications. The increase is most strongly
linked to the switch from bright tin-lead coatings to matte tin coatings. Bright tin coatings have demonstrated insertion forces
that are statistically equivalent or lower than bright tin-lead; however, any tin plating over nickel should be reviewed for
whisker performance in a stress induced application.
Whisker growth can be accelerated by the high stresses exerted on terminal finishes used on bolted connectors. Bolted con-
nectors are typically annular rings (ring lugs) that are bolted down onto a base metal, often with a Belleville washer assem-
bly to maintain a high torque level over time. Many of these products have used pure tin finish for decades and many of
them have generated tin whiskers. Each application must be analyzed relative to possible exposure to sensitive electrical cir-
cuitry. For example, bolted connections in the air stream leading to electrical circuitry could be considered a sensitive loca-
tion. Whisker forming materials should not be used in sensitive locations.
Table 7-14 summarizes the iNEMI User Group’s ratings for connector finishes relative to concerns about whisker formation
and growth. The first column tabulates acceptance of finishes for solderable terminations. The second column tabulates the
use of surface finishes in a region of the product where the terminal finish is in the stressed separable interface and the con-
nector spacing is ‘‘fine.’’ We define ‘‘fine spacing’’ as contacts with a spacing less than or equal to 0.5 mm. The third col-
umn tabulates the use of surface finishes in a region of the product where the terminal finish is in the stressed separable
interface and the connector spacing is ‘‘large.’’ We define ‘‘large spacing’’ as contacts with spacing greater than 0.5 mm.

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Table 7-14 iNEMI Ratings for Whisker Risk on Termination Finishes for Separable Connectors
Terminal finish use as a Terminal finish use as a
Termination finish separable interface for separable interface for
use only as a fine spacing large spacing
Finish solderable finish applications. applications
NiAu 1 1 1
NiPd 1 1 1
NiPdAu 1 1 1
Ag (over Ni) * 1 1 1
Hot dipped SnAgCu 1 1 1
Reflowed Sn 1 2 2
Hot Dipped Sn 1 2 2
Hot Dipped SnCu 1 2 2
Matte Sn w/Nickel underplate 2 2 2
Matte Sn w/Silver underplate 2 2 2
Matte Sn - 150C anneal 2 2 2
Matte SnBi (2-4% Bi) w/Nickel Underplate 2 2 2
Matte SnAg (1.5 - 4% Ag) w/Nickel underplate 2 2 2
SnCu w/Nickel underplate 2 2 2
Bright Tin w/nickel underplate 2 2 2
Matte SNBi (2-4% Bi) 2 2 2
Matte SnAg (1.5-4% Ag) 2 2 2
Matte Sn (No underplate) 3 3 2
Bright Tin 3 3 3
SnCu 3 3 3

Color coding for the above table

Preferred Finishes
Finishes with preferred tin whisher mitigation practices
Finishes with tin mintigation practices that are less desireable than preferred pratices
Finishes without tin whisker minigation that are often not acceptable to users
Finishes to avoid

Note for the above table:

*In general, although whiskers on Ag finishes are not considered an issue, the User Group is very hesitant to accept these finishes due to a number of concerns
including, but not necessarily limited to, electromigration and solderability shelf life.

7.11.5 Bus Bars Bus bars are typically copper or copper alloy. Aluminum may also be used in some applications. These
parts are of particular interest because they are usually in close proximity to electrical circuitry. Whiskers on these assem-
blies can cause problems if they dislodge and short electrical circuitry. It is, therefore, prudent to avoid using plating mate-
rial that is susceptible to whisker formation and growth. If possible, it is advisable NOT to plate bus bars when the appli-
cation allows. In non-corrosive environments, the base copper metallurgy will tarnish slightly over time, but the basic
function of the piece will be unaffected. Localized plating to enhance solderability or contact resistance should utilize plat-
ings other than tin when possible, or utilize tin whisker mitigation practices. Table 7-15 summarizes the recommendations
of the iNEMI User Group.

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Table 7-15 Bus Bars - Tin Whisker Concerns

Base Materials
Copper Alloys
Finishes Solderable (Yes/No) (Excluding Brass) Aluminum
None (Unfinished) No Ok Ok
Nickel No Ok Over Copper Strike Plating Ok
Chromium(3) No Ok Over Copper Strike Plating Ok
SnAgCu Solder Dip Yes Ok Over Copper Strike Plating Ok
Silver(1) (Immersion or Electroplate) Yes Ok Over Copper Strike Plating Ok
Over Copper strike Plating,
Matte Sn(2) Yes Not recommended(2)
Not recommended(2)
Notes:
(1) Silver (Ag) plating, while frequently used for bus bars, is susceptible to corrosion in sulfurous environments or dendritic growth in the presence of moisture.
(2) When utilized on bus bars as a finish, tin whiskers are a concern for this finish, particularly when bus bar connections result in mechanical stresses on the
finish. As such, the iNEMI Tin Whisker User Group recommends that this finish not be used for bus bars. If Sn finishes are used, a tin whisker mitigation
practice is recommended. This finish has been used on bus bars in many products for years, so the application may still be acceptable even with tin
whiskers. It is up to the user to make the final decision as to acceptance of this finish.
(3) Chromium finishes should not contain CrVI (Hexavalent Chrome).

7.11.6 Heat Sinks Heat sinks are commonly aluminum (including anodized aluminum), copper, or graphite. Graphite heat
sinks are generally unfinished and tin whiskers are not a concern with graphite. Copper heat sinks generally require a fin-
ish, and may require solderability on some portion of the finish. Similarly, if aluminum heat sinks require soldering, they are
typically selectively plated or solder dipped to provide a solderable surface. Lead-free plating finishes that utilize Sn are a
concern for tin whisker growth as the use of heat sinks is typically associated with electronic components. Tin-based lead-
free finishes should not be used when the heat sink finish is subjected to mechanical mounting stresses. Table 7-16 below
summarizes the recommendations of the iNEMI Tin Whisker User Group relative to heat sinks.
Table 7-16 Heat Sink Finishes and Tin Whiskers
Heat Sink Base Materials
Solderable
Surfaces Copper Alloys
Surface Finish (Yes/No) (Excluding Brass) Aluminum Graphite
None (or anodized for Aluminum) No Ok Ok Ok
Nickel No NA Ok NA
SnAgCu Yes Ok (Over Cu Strike) Ok NA
(Over Cu Strike) Tin Whisker Tin Whisker Testing
Matte Sn over Nickel Yes NA
Testing Required(1) Required(1)
(Over Cu Strike) Not
Matte Sn Yes Not Recommended(1)(2) NA
Recommended(1)(2)
Notes:
(1) Tin whisker testing required per JESD201.
(2) This finish is generally not recommended due to tin whisker concerns. However, it may be acceptable if one of the preferred mitigation practices is used.
Also, if the matte Sn surface is fully wetted by solder during assembly, the finish is generally acceptable.

7.11.7 Printed Circuit Boards (PCB) The surface finish on PCB lands (made of copper) are designed to protect the base
metal against oxidation that could result in poor solder joints during assembly operations. HASL (hot air solder leveled) tin-
lead finishes have been the coating of choice for most of the last fifty years. To comply with legislation, alternative Pb-free
surface finishes must be considered. These finishes include organic solder preservatives (OSPs), immersion gold over elec-
troless nickel, electroplated gold over electroplated nickel, Pb-free HASL, immersion silver, and immersion tin. Of these
surface finishes, immersion tin is susceptible to the formation of pure tin whiskers and immersion silver is susceptible to the
formation of silver sulfide dendrites. Both tin whiskers and silver sulfide dendrites can create electrical shorts; however, the
formation mechanisms and the required environmental conditions are different. There have been no reported instances of tin
whiskers on SnCu HASL finished PCBs. However, it should be noted that the use of SnCu HASL as a board finish has been
very limited. For all of these finishes, individual processes vary tremendously relative to film quality, corrosion resistance,
shelf life, etc., and the user should work closely with the process provider to evaluate each particular process. Aside from
whisker and dendrite growth, other aspects of the surface finishes will affect selection, including cost, shelf life, solderabil-
ity, manufacturability, corrosion resistance, and technical limitations with certain assembly processes, component types, and
board designs.

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Table 7-17 summarizes the assessments of the individual members of the iNEMI Users Group relative to the above PCB
finish processes.
Table 7-17 Printed Circuit Boards
PCB Finish Tin Whisker Test Requirements
SnCu HASL Yes
Immersion Sn Limited
Electroless NI/Immersion Au None
Electroplated Ni/Electroplated Au None
Immersion Ag None
OSP (e.g., Entek) None

7.11.8 How Can I Tell If A Component Contains A Tin-Finish?

7.11.8.1 Literature Search Most component manufacturers that are striving to achieve RoHS environmental compliance
by phasing out Pb from their component finish (s) have detailed information available on their web pages that identify the
component lead finish. This may also include test results to document the degree to which accelerated life testing has dem-
onstrated the propensity of their component lead finish to grow tin-whiskers. However, to date, there is no known direct cor-
relation from this data to represent whether fielded equipment will remain tin whisker free over its expected lifetime.

7.11.8.2 Component/Assembly, and/or Packaging/Packing for Shipment Pb-Free Marking Industry has recognized the
need to differentiate between Pb-bearing components/assemblies and Pb-free components/assemblies. Consequently, several
standards were developed that require marking of components/assemblies and/or packages with special markings. These
include: IPC-1066, Marking, Symbols and Labels for Identification of Pb-Free and Other Reportable Materials in Pb-Free
Assemblies, Components and Devices; and JESD97, Marking, Symbols, and Labels for Identification of Pb-Free Assemblies,
Components, and Devices.
Subsequently, the IPC and JEDEC superseded both IPC-1066 and JESD97 with a new Standard, J-STD-609, Marking and
Labeling of Components, PCBs and PCBAs to identify lead (Pb), Pb-Free and Other Attributes.
J-STD-609 establishes a marking category for tin-plated items, as well as for items having other types of finishes. For tin-
plated parts, ‘‘e2’’ is the category that applies to tin (Sn) alloys with no bismuth (Bi) or zinc (Zn), excluding tin-silver-copper
(SnAgCu). The ‘‘e3’’ category applies to Sn, and the ‘‘e5’’ category applies to SnZn, SnZnx (no Bi). Additional symbols
designating ‘‘Pb-Free’’ are also allowed for use.

7.11.9 Testing to Detect the Presence of Various Metals that may, or may not be Present in a Component Lead/
Termination Finish With the transition to Pb-free component finishes, some Original Equipment Manufacturers (OEM) are
starting to test components to verify the metals in some component lead finishes by using a non-destructive test method.
This testing is of particular importance for OEMs who elect to continue to require Pb-bearing component finishes in lieu of
a Pb-free component finish. Without such testing, it is impossible to tell the difference visually between a Pb-bearing com-
ponent finish and a Pb-free component finish.
The most industry recognized non-destructive test method for determining the presence of Pb (and many other elements as
well) in component leads or terminations is testing using X-Ray Fluorescence (XRF) instruments. When an X-ray strikes an
element, it causes energy in the form of a fluorescent photon to be emitted. By determining the energy (wavelength) of the
X-Ray light photon emitted by a particular element, it is possible to determine the identity of the element.
XRF instruments can be a hand-held ‘‘gun’’ type, or bench mount type. Normally, the hand-held instruments are not a viable
approach if one needs to test a single small part such as a surface-mount part because the X-Ray spot size is normally not
small enough to just focus on the component termination; thus, metals that may be part of the component body may give a
false indication that the metal (e.g., tin) is present in the component termination rather than elsewhere within the component
internals. Hand-held XRF instruments can be used for larger components, and are of particular use as an alloy identity tes-
ter for raw materials (e.g., stainless steel bar stock, etc.).

7.11.10 Energy Dispersive Spectroscopy EDS may also be used to identify the type of component lead/termination
finish.
Figures 7-8, 7-9, and 7-10 were extracted from the NASA Goddard website on tin whiskers and show examples of failures
attributed to tin whiskers.

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Figure 7-8 NASA Tin-Whisker Photograph

Figure 7-9 Tin Whiskers - Observed Problems Caused by Whiskers

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Figure 7-10 Additional Tin Whisker Problems

The reader is referred to http://nepp.nasa.gov/WHISKER/ for further information on tin whiskers.

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8 COMPONENT MOUNTING
This section covers the requirements for the preparation of components for soldering on Printed Circuit Boards. Further
information can be found in IPC-CM-770 - Guidelines for Printed Board Component Mounting.

8.1 Assembly Classifications

8.1.1 Producibility Levels Producibility levels are a method of communicating between design and fabrication/assembly
facilities the degree of difficulty of assembling a circuit card assembly. These levels are:
Level A – Through-hole component mounting only
Level B – Surface mounted components only
Level C – Low complexity through-hole and surface mount intermixed assembly
Level X – Complex intermixed assembly, through-hole, surface mount, fine pitch, and BGA
Level Y – Complex intermixed assembly, through-hole, surface mount, ultra-fine pitch, and chip scale
Level Z – Complex intermixed assembly, through-hole, ultra-fine pitch, COB, flip chip, and TAB

8.1.2 Printed Circuit Board Assembly Types A type designation further describes whether components are mounted on
one or both sides of the packaging and interconnecting structure. Type 1 (Figure 8-1) defines an assembly with components
mounted on only one side. Type 2 (Figure 8-2) is an assembly with components on both sides.
Any design class may be applied to any of the end-product equipment categories. Therefore, moderate complexity (Type
1B) defines components mounted on one side (all surface mounted), and when used in a Class 2 product, can be referred
to as Type 1B Class 2. Product described as Type 1B Class 2 might be used in any end-use application, with the selection
of Class being dependent on the requirements of the customer.

Type 1 Components (mounted) on only one side of the board

Through-Hole
Simple A

PLCC
CHIP COMPONENT SOIC

SMT
B
Simple
PLCC CHIP
SOLDER SOIC
COMPONENT
PASTE DIP DIP

SMT/TH
C
Complex

PLCC CHIP
COMPONENT
DIP
BGA UFPT PKG.
THT
SMT
X
FTP
BGA Y & Z Similar, Not Shown
IPC-820a-08-01

Figure 8-1 Type 1 Printed Board Assembly

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Type 2 Components (mounted) on both sides of the board

A 2-Sided Through-Hole (NOT RECOMMENDED)

PLCC
CHIP COMPONENT SOIC
SOLDER
PASTE Adhesive (Optional)
SMT
Complex B
FPT
SOLDER
Simple PASTE
SO CHIP
COMPONENT PLCC

TH/SMT
C
Simple

CHIP
COMPONENT Wire bond or
tab IC chip
PLCC CHIP attachment
SOIC COMPONENT SOIC

THT DIP
UFTP
COB Z
TAB
Flip Chip FLIP
CHIP FPT PKG.
CHIP (selectively attached)
SOIC
COMPONENT

X & Y Similar, Not Shown

Class A = Through-hole component mounting only

Class B = Surface mounted components only
Class C = Simplistic through-hole and surface mounting intermixed assembly
Class X = Complex intermixed assembly, through-hole, surface mount, fine pitch and BGA
Class Y = Complex intermixed assembly, through-hole, surface mount, ultra fine pitch, chip scale
Class Z = Complex intermixed assembly, through-hole, ultra fine pitch, COB, flip chip, TAB
IPC-820a-08-02

Figure 8-2 Type 2 Printed Board Assemblies

8.2 General Guidelines The component mounting technique, the mounting sequence, and the assembly configuration all
impact the soldering techniques that can be applied to the interconnection of components and printed boards, and the resul-
tant quality of the solder joints.
Excessively large clearances can result in draining of the solder. Lead extension through the hole must be adequate to ensure
a good solder joint and permit subsequent inspection, but not so long as to interfere with tooling for subsequent processes,
or shorting to adjacent conductors or assemblies.
8.2.1 Design Options and Considerations If the printed board structure is complicated, or only a small number of assem-
blies are to be made, then manual assembly techniques are often used. However, if the printed board structure is simple, or
the number of assemblies required is large, then the set-up time and monetary investment for automated component mount-
ing and assembly may be worthwhile.
The joining techniques used may also influence the assembly process. In some sequential manufacturing operations, certain
parts must be secured or permanently attached before other components are mounted.

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The assembly process itself often influences component placement. For example, single or multiple component placements
affect tool clearances for automatic placement equipment, set up procedures, and other manufacturing steps.
The entire sequence of events in the assembly/joining process affects component placement. Previously mounted compo-
nents must not interfere with other components mounted in a later step, and secondary-joining techniques, such as solder-
ing, must not damage components previously placed and joined.
To prevent problems and create a board that can be manufactured, the designer must take into account all of the fabrication
assembly steps necessary to complete the electronic assembly.
8.2.1.1 Leadless Component Terminations This geometry provides little compliance and results in a rigid, small, lap-
solder joint that depends solely on the solder to provide desired mechanical properties. For some types of leadless termina-
tions, not all areas of the solder connection are visible for inspection. Cleaning is more difficult with this geometry than with
leaded terminations.
8.2.1.2 Leaded Component Terminations This geometry results in a narrow solder fillet. The lead material provides
compliance that can compensate for some degree of mismatch in expansion between the component package and the sub-
strate. Visual inspection of solder joints is easier with this geometry. Cleaning is facilitated by the larger clearances around
the solder connections. Excess solder fillets on this geometry can stiffen the lead and reduce any compliance advantage.
8.2.1.3 Component Spacing Proper spacing can greatly increase automatic, semiautomatic, and manual speeds of com-
ponent placement. If possible, features should be placed in straight-line patterns rather than random ones. Additional con-
siderations:
• Tooling holes should be placed as far apart as possible to provide better alignment in the fixturing.
• Mounted components should not interfere with subsequent component mounting operations.
8.2.1.4 Part Types Mass soldering is usually performed with either a solder wave, or a solder paste reflow process using
hot air convection, radiation (infrared), condensation heat transfer (vapor phase soldering), or conductive plate. Many leaded
devices such as chip carriers are not considered appropriate for wave soldering and must be soldered by a reflow process.
These devices may appear on either side of the board. However, if processing includes a wave-solder operation, any SMT
components that have been reflow-soldered to the solder source side must be protected from the solder wave, for example
by using custom pallets.
Surface mounted devices with few or no leads, such as passive chip resistors, capacitors, SOTs, SOICs, and other small out-
line (SO) devices, may tolerate immersion in molten solder. These parts may be assembled by solder wave, but the orien-
tation of the parts becomes important.
Through-hole mounted parts will not solder properly if insulation material, potting compound, or other contaminant is
allowed to protrude into the hole. Another characteristic of these devices is their tendency to ‘‘rise’’ during the fluxing/wave
soldering process if not clinched or mechanically retained. For wave soldering, the through-hole mounted devices are
mounted on the solder destination side of the board. These devices may not be compatible with temperatures encountered
during reflow processes.
Heavy mass components require longer soldering times due to their heat sinking characteristics. Wave solder speed and tem-
perature may need to be adjusted to ensure solder flows properly through all plated-through-holes.
8.2.2 Assembly Considerations

8.2.2.1 Component Preparation Requirements for lead bend location and bend radius are similar for through-hole and
surface mount components.
Sometimes it is necessary to modify a component so that it can be mounted in a different manner. For example, forming the
leads of a through-hole component so that it can be surface mounted may permit the elimination of a wave soldering opera-
tion. Conversely, Figure 8-3 shows a flatpack, which is usually surface mounted, with leads formed for mounting in
through-holes. This practice might be used when a limited number of flatpacks are present on an otherwise all through-
mounted assembly.
When components designed for through-hole are converted to surface mount, additional steps are necessary in lead form-
ing. Axial leaded parts that are normally mounted in through-holes may have their leads coined as shown in Figure 8-4 to
permit surface mounting. Dual-in-line packages (DIPs) with I-beam leads can be trimmed and formed for surface mounting
as shown in Figure 8-5.

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8.2.2.2 Lead Forming Forming/bending of leads for

through-hole mounting serves many purposes. These include
retaining the component in the substrate during handling prior
to soldering, providing stress relief for the lead-to-component
connection, and providing a standoff. Bends or loops can be
one method of providing standoff and achieving lead bend
requirements.
Component leads may be formed using automated forming
machines, or hand formed. The leads should be formed to the
final configuration before assembly or installation (except for
the final crimp, where required). When bending a welded lead,
a suitable tool must firmly hold the lead on the side of the
weld away from the component body. Lead forming must not
nick the lead. Care must be taken so that energy (mechanical
shock) from the bending action is not transmitted into the
component.
Lead forming tools and forming tolerances affect functional
quality of formed components. Considerations must be given
to lead material and hardness when designing tooling. Com-
ponent body materials (glass, elastomers, metal, and plastic)
react differently to forming strains. Stresses from gripping and
close bending may damage protective cases.
Nicks, cuts, or other reductions in lead cross-section caused
by gripping and forming can provide failure mechanisms and
change electrical characteristics. Care should be exercised in
tool design and materials. Follow specific guidelines on close-
ness of bend and minimum bend radius.
IPC-820a-08-03
8.2.2.3 Component Placement Sophisticated tooling is
available for placement of axial leaded and surface mounted Figure 8-3 Staggered Hole Pattern Mounting ‘‘MO’’
components. In most cases, surface mount components are Flatpack Outline Drawing (Only Inches Shown)
placed first and attached by reflow soldering. The design must
provide adequate clearances for automatic equipment to place
▼

Straight for 1 D but not less than 0.8 mm

components and clinch the leads, otherwise components might
have to be inserted semi-automatically or manually.
0.25 mm Min.
▼

Foot
▼

2.0 mm Max.
8.2.2.4 Mixed Assemblies In the examples shown in Figure
8-6, the surface mount components would be placed first and ▼
▼▼
▼
▼

attached by reflow soldering.

Conductor
8.2.2.5 Securing Components The shock and vibration to Flush to 0.635 mm [0.25] Max
which printed board components are subjected during normal IPC-820a-08-04

handling and environmental testing can damage the lead ter- Figure 8-4 Component Modifications for Surface
minations and lead-to-component body seals. For this reason, Mounting Applications

Dip, Modified “SOIC” Dip, Modified “BUTT”

Dip,Through-Hole Mount Type Mount (Gull-Wing Lead) Mount (“I” Lead)
IPC-820a-08-05

Figure 8-5 Modifying DIP for Surface Mounting

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February 2012 IPC-AJ-820A

DIP
RES.

Type 1A Simple Through-Hole

DIP
RES.

SMCC

Type 2C Simple Mixed Through-Hole & Surface Mount

SOIC
SMCC

Type 1B Simple One Side Surface Mount

SOIC
SMCC

SMCC

Type 2B Simple Surface Mount on Two Sides

DIP
PLCC
SMCC

Type 1C Simple Mixed Through-Hole & Surface Mount on One Side

DIP
PLCC
RES.

SMCC

Type 1A Simple Mixed Through-Hole & Surface Mount on Two Sides

IPC-820a-08-06

Figure 8-6 Mixed Assemblies

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many components, especially those weighing more than 7.09 g per lead, should be mechanically secured to the mounting
base prior to lead termination and during assembly. The component securing methods most commonly used are clips,
clamps, brackets, wire and elastic straps, adhesives, and integral mounting provisions (see Figures 8-7 & 8-8).
Because shock and vibration vary widely with each specific application, it is not possible to provide solutions here for all
component-mounting problems.
Shock may be of particular concern for intermixed assemblies. Some components and their solder connections may not
withstand the shock of a secondary assembly operation. For example, chip components mounted on the underside of the
board and attached using adhesive may be dislodged during later assembly operations that impart additional shocks. Shock
and vibration can also affect the reliability of the solder connection.
Special fixturing may help prevent damage to parts that have been previously attached.

8.2.2.6 Clips, Clamps, and Brackets The following guide-

Positive
lines apply for components mechanically secured by clips, Displacement
clamps, or brackets (see Figure 8-7): Clamp

▼
• All clips, clamps, or brackets should be secured using two
Secure Clamp

▼
fasteners, or one fastener and a non-turn device to prevent to Board
rotation.
• Clamps and brackets that require removal in order to replace
the component should be secured with a threaded fastener or
other nonpermanent fastener, unless the subassembly is con- IPC-820a-08-07

sidered to be disposable or non-repairable. Figure 8-7 Clip-Mounted Component

• Spring-type clips that need not be removed during compo-
nent replacement may be secured with permanent fasteners
such as rivets or eyelets.
• Twist-type lugs, ears, or clips should be avoided with glass
envelope components.

8.2.2.7 Strapping Devices When using wires and elastic

straps for mechanical securing, the strap should be wrapped
over the component body and passed through-holes in the
mounting base. The elastic strap is secured by being stretched
to reduce its cross-section below that of the hole, and then
returned to its larger-than-hole size by relieving the tension IPC-820a-08-08

after it has been passed through the hole. The resiliency of the Figure 8-8 Strap Securing
strap holds the component in place (see Figure 8-8).
When wire is used, it should be clinched and soldered in the same manner as component leads to lands. When wire is used
with heat-sensitive or fragile components, any part of the wire on the component should be covered with a suitable sleeving.
8.3 Other Mounting Structure Materials and Considerations

8.3.1 Heat Sinks Heat sinks are devices used to absorb and/or transfer heat away from heat sensitive parts. Heat sinks
come in many styles, shapes, and sizes, and may be designed for mounting on printed boards, on a component, or a series
of components. They can be mounted by riveting/bolting to the component or the circuit board, or by clipping to a mounted
component.
To facilitate heat sinking of components that must be electrically insulated from heat sinks, chassis, washers, etc., thermally
conductive epoxy compounds and adhesives, silicone grease, silicone rubber and other materials are available.
8.3.2 Spacers Spacing a component above the mounting surface provides electrical clearance, increases soldering and
cleaning capabilities, improves air flow on heat dissipative parts, provides mechanical support, and minimizes stresses.
Spacers are manufactured from nonconductive materials (plastic, nylon, and Teflon), that do not dissolve during the clean-
ing process. Spacers are usually applied to multileaded radial devices (three or more leads), such as transistors, or amps,
potentiometers, etc. See Figure 8-9 for examples. See IPC-A-610 for accept/reject criteria regarding the installation of
spacers.

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IPC-820a-08-09

Figure 8-9 Typical Spacers

A typical method for mounting a TO component with a spacer

is shown in Figure 8-10. The effect of the spacer on the lead/
can seal and on lead forming should be evaluated before use.
The installed spacer should be in intimate contact with both
the component and the printed board. Spacers with feet on one Spacer

▼
side should be mounted with the feet against the board and the
component in intimate contact with the spacer.

8.3.3 Component-Lead Spreaders Multiple lead spreaders,

Figure 8-11, function for offset mounting similar to spacers
for straight-through mounting. Leads may be clinched or IPC-820a-08-10
unclinched. The spreader helps support the lead to prevent
Figure 8-10 Transistor Mounting with Spacer
stress at the lead-to-body seal.

8.3.4 Thermally Conductive Insulators The most common

thermally conductive insulators have been thermally conduc-
tive filled rubber sheets (see Figure 8-12). Silicone grease and
mica have also been used, but on boards that will be confor-
mally coated, silicone grease can cause cleaning and coating
adhesion problems.

8.4 Assembly Design Cycle Because of the multistep com-

ponent mounting operation, designers of intermixed assem-
blies must take into account all of the fabrication and assem-
IPC-820a-08-11
bly steps necessary. Some design considerations include:
Figure 8-11 Multiple Lead Spreader
A. Component Types:
• Through-hole
• Leaded SMT
• Leadless SMT
B. Assembly Processes Used:
• Single-Sided Assembly
• Double-Sided Assembly
C. Component Securing
D. Joining Techniques:
• Single-Sided Joining
• Double-Sided Joining
E. Care Required for Heat-Sensitive Components IPC-820a-08-12

F. Handling of Unsealed Components Figure 8-12 Thermally Conductive Insulator

G. Sequence of Events
Item ‘‘G’’ above is often neglected during the design cycle.

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8.5 Placement Guidelines Pick and place equipment requires ‘‘keep-out’’ areas for essential equipment clearances, which
must be provided in the design. The placement and spacing of components is critical for manufacturing assembly and
inspection, component removal, cleaning, thermal heat management, and test probe access.
During assembly sequencing, singular component placement (one component at a time), and multiple component placement
should be major considerations, along with the type of board or packaging interconnection structure.

8.5.1 Construction Formats and Process Sequences Figures 8-13 through 8-18 show examples of basic construction
formats, with associated process sequences.
NOTE: Where leaded components must be inserted after a mass immersion soldering operation, it may be necessary to
cover the related plated through-holes with a peelable resist to prevent them being filled with solder.
With intermixed assemblies, components that are through-hole mounted are usually positioned on one side, while compo-
nents mounted on the underside of the board are of the surface mounted variety. In this technique, the surface mounted
components are first attached using an appropriate adhesive, then the through-hole components are automatically inserted,
and the entire assembly is passed through a solder wave.
Some assemblies may require some through-hole components (usually connectors) to be mounted on both sides of the board.
This assembly process may require additional soldering processes such as partial wave soldering, solder fountain, paste in
hole, solder performs, and/or hand soldering. Assembly techniques can vary depending on the type of component, the num-
ber of different components being mounted, and the mounting techniques themselves. If a single part is surface mounted
amidst a large variety of through-hole mounted components, the surface mounted part becomes a minor part of the assem-
bly operation. The same holds true if the through-hole parts are in the minority. In these instances, manual or semi-automated
techniques are usually employed, especially if the quantities of assemblies do not justify the set up time required for auto-
mated component mounting.
When there is an equal number of through-hole and surface mounted components, the tooling concept for automated com-
ponent mounting must consider the need for special fixturing or attachment techniques. Double-sided or multilayer printed
board structures have similar part mounting characteristics, but single-sided boards may lack plated-through-holes. The tol-
erances of plated-through-holes must be more liberal to allow for plating build-up, so the component mounting process may
be more restricted. The attachment technique for through-hole components is usually wave soldering.

IPC-820a-08-13

Figure 8-13 Single-Sided Surface Mount Assembly, Reflow Only

IPC-820a-08-14

Figure 8-14 Single-Sided Surface Mount Assembly, Immersion Only

IPC-820a-08-15

Figure 8-15 Mixed Technology Assembly, Double-Sided, Reflow Only

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IPC-820a-08-16

Figure 8-16 Mixed Technology Assembly, Double-Sided: Reflow and Immersion

When parts are surface mounted to double-sided or multilayer printed boards, the surface mounted parts may be mounted
on one side or both. The attachment technique for surface mounted boards is usually some form of reflow soldering. In
intermixed assemblies, manual techniques may be used for secondary component placement and attachment. Manual tech-
niques may also be required due to lack of head clearances for automated assembly, or parts that require special handling,
such as heat sensitive or unsealed parts.

With the ever-increasing trend toward miniaturization, manual techniques usually require magnification and special tool
dexterity to insure that small parts are properly mounted, placed, or positioned. Semi-automated equipment is available to
take and position one component at a time, with the machine assisting the operator through enhanced movement. Even with
manual or semi-automated techniques, design should provide for adequate clearance around components, so that placement
heads or tools do not interfere with previously placed components.

Solder Paste Place Solder Paste

Reflow Invert
Deposition SMT Deposition

Insert Place
Manual Solder Reflow
TH SMT

IPC-;820a-08-17

Figure 8-17 Mixed Technology Assembly, Double-Sided Reflow and Manual

IPC-820a-08-18

Figure 8-18 Mixed Technology Assembly, Double-Sided, Immersion Only

8.5.2 Automated Assembly Automated techniques used for mixed components are similar to those used for boards that
have only through-hole mounted or only surface mounted components. Automated techniques and special fixturing help
reduce shock, and provide clearance for components that have previously been mounted.

Because of the special cost of tooling and set up time, many intermixed designs are assembled in panel form rather than in
individual board form. This is especially helpful when a manufacturer can set up equipment for a standard size panel, which
can contain one or many boards.

Panelized assembly requires special tooling registration incorporated into the panel. Tooling holes are located as shown in
Figure 8-19. These require special close tolerance considerations to insure that the automated equipment is able to locate
and position components.

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IPC-AJ-820A February 2012

Some assembly equipment uses special sensing symbols

incorporated in the board design. The equipment senses the
location of the symbol and can zero in on a particular board,
or even a pattern. The assembly equipment can then compen-
sate for material movement or shifting of patterns.
With special tooling, features, or holes, automated assembly
can accommodate panels of 467.2 mm [18 in] to 609.6 mm
[24 in] without any loss of accuracy for component placement
(see Figure 8-20).
Designs should consider whether assembly is performed on an IPC-820a-08-19
individual board assembly or panel. Board-to-component ori-
Figure 8-19 Panel Assembly Tooling Holes
entation and placement may be critical to prevent part bodies
from shadowing the solder joints during wave solder.

8.6 Component Characteristics, Through-Hole All com-

ponents used in a through-hole configuration have metal leads
as the interface between the component and board circuitry.
The lead configuration may be round (pins), flat (ribbon), or
V-shaped. Care needs to be exercised to assure leads are pre-
pared, and insertion controlled such that insulation on compo-
nent leads does not extend into the hole, which can have
adverse impact on the solder joint. This is often a problem
with two-leaded disk-type components. If not retained firmly
in the hole, such components may tilt before soldering, intro-
IPC-820a-08-20
ducing insulation in one hole and less than adequate protru-
sion in the other. Figure 8-20 Panel Assembly Tooling Holes

8.6.1 Axial-Leaded Discrete Components Axial-leaded

components with two leads are perhaps the most common
through-hole components used in printed wiring assemblies.
The component body is usually cylindrical in shape, with two
leads exiting from opposite ends of the component along its
longitudinal axis. The lead is usually round in cross section.
Component identification and as polarity (when necessary) are
generally marked on the body of the component. Many resis-
tors, capacitors, and diodes are supplied in this configuration.
Automatic processing technology and equipment handle this
type of component very effectively when the components are
provided on tape reels (see Figure 8-21).
Axial-leaded components (two leads) may come in polarized
styles (see Figure 8-22). Sizes and materials for component
bodies and leads vary widely based on device characteristics,
electronic ratings, and package styles. IPC-820a-08-21

Figure 8-21 Taped Axial-Leaded Components

8.6.2 Radial-Leaded Discrete Components Radial-leaded
components come in a variety of shapes: cylindrical, square,
rectangular, wafer, and kidney. Leads exit from a common
side of the component. The lead is either ribbon or cylindri-
cal. Selected devices can be automatically inserted during
assembly and can be modified with coined leads for surface
IPC-820a-08-22
mounting.
Figure 8-22 Polarized Axial Lead Component (Typical
Polarity Markings)

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Typical types of radial-lead components are electrolytic, plastic, dipped, molded, and encapsulated capacitors and transistors.
Hermetically sealed components such as electrolytic capacitors need to be handled with caution to prevent damage to seals.
Bi-metallic welds must not be stressed.

8.6.2.1 Plastic Package Components The integrity of the interfacial adhesion between the plastic dip coating (or encap-
sulant) and the packaging (or leads) must be maintained during handling.

8.6.2.2 Multiple-Radial-Lead Components This configuration was used for early multiple lead components and is still
popular today for transistors in metal TO (transistor outline) cans. Multiple-lead component cans are available in many sizes
and shapes.
The following should be considered when designing printed board assemblies with multiple-lead components:
• Land size, lead forming, and lead clinching
• The physical dimensions of the multiple-leaded component
• Automatic, semiautomatic, and manual component insertion tolerances and restraints
• Component dimensions and tolerances
• Mechanical securing such as clips, clamps, brackets, sockets, etc.

8.6.2.3 Transistor Outline (TO) Cans This type of component consists of

a hermetically sealed metal can with up to twelve round leads exiting from
the bottom of the device (usually in a circular pattern). Dimensions of stan-
dard and registered TO devices are included in JEDEC 95. Available tooling,
hermetic sealing, and rugged construction made the can with 10 or 12 leads
a natural choice for the first integrated circuit (IC) package. These require
special punching dies; drilling templates, or off-grid numerically controlled
(NC) drill programming for the pin circle.

8.6.3 Dual-Inline Packages The dual-inline, multiple-lead component

(DIP) has leads pointing downward, ready for insertion into holes in a
7.37 mm
printed board. The dual-inline package can be inserted easily, either auto- [0.290"] max
matically or manually. Sockets are available for mounting and testing pur- 10.16 mm
poses. Automatic insertion is very feasible using this package configuration. [0.490"] max

DIPs are made of metal, ceramic, glass, plastic, or combinations of these

materials. Materials for the leads, body, and glass seals are chosen to make
this a rugged package. The lead shape (shoulder) provides a standoff feature.
Leads clinched into a 10 ± 5° ‘‘V’’ formation provide retention of the com-
ponent (see Figure 8-22).

8.6.4 Single-Inline Packages Single inline packages (SIPs) are similar to

the dual-inline (DIP) components. The leads exit the component body
‘‘inline,’’ usually 2.54 mm center-to-center pitch, but in a single row pattern
rather than the dual row (square) pattern of the DIP (see Figure 8-23). 2.54 mm
[0.100"] max
SIPs are often used for resistor networks, which can reduce handling, inven- ‡ 0.25 mm
[0.010"] non-accum. IPC-820a-08-23
tory, board real estate, and assembly requirements, using a single component
in place of a number of discrete components. Figure 8-23 16-Lead Dip

8.6.5 Ribbon-Lead Components Flatpacks and quad packs are similar to small outline package (SO) devices, but with
leads extending straight out from the body on two opposite sides, or from all four sides. This permits either forming for
surface-mounting, or through-hole mounting. SO device leads are pre-formed by the vendor for surface mounting only.
These devices are available in both hermetically sealed and molded plastic styles. Hermetically sealed devices are packaged
in metal, ceramic, glass, or combinations of these materials. SO devices are normally available only in molded plastic cases.
Multiple-ribbon-lead components are suitable for high density printed board applications due to their close lead spacing
(1.25 mm), and small body sizes. The wide variety of flatpack configurations permits a variety of mounting methods.
Flatpacks can be through-hole or surface mounted. This section covers through-hole mounting (see 8.9 for Surface Mount-
ing Guidelines). Through-hole mounting can be with:
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IPC-AJ-820A February 2012

• Straight through (unclinched) leads.

• Clinched leads with circumscribing full lands.
• Clinched leads with offset lands.

A number of discrete devices (transistors and diodes) are available as ribbon leaded devices. Most of these have been
designed specifically for high-frequency stripline mounting.

8.6.5.1 Flatpacks One of the smallest multiple lead component types is the flatpack, with bodies as small as 3.2 mm wide,
6.4 mm long, and 0.8 mm thick. The component leads are normally flat ribbons 0.5 x 0.25 mm or smaller, and are located
on 1.27 mm centers. Flatpacks are available with up to 50 leads. Various approaches are used to secure them to carriers:

• Form leads to fit a staggered hole-land pattern, using pot or wave soldering.
• Weld or solder leads to lands or tabs.
• Simultaneously solder-coat all leads and then reflow solder (for leads with stress relief bends, since this protects the glass
seal welds).
Flatpacks with metal bodies must be insulated when placed over conductive
traces. Unless the user has control over the particular package material, it
may be appropriate to provide insulation between the bottom of the flatpack
and any conductive traces, regardless of the case material being used.
Flatpack users have had problems with nonstandard shipping containers.
Automated assembly costs can be very high compared to other packages, due
to the fragile leads and the special care required in assembly.
Flatpack devices are usually of the outline depicted in Figure 8-24.
Dimensions of standard flat pack devices are listed in the applicable compo-
nent specification and in JEDEC publication 95.
Through-hole mounting of flat packs is accomplished by forming the leads
to fit an appropriate hole-land pattern. Attachment is then accomplished
using either pot or wave soldering.
IPC-820a-08-24
8.6.5.2 Discrete Devices Ribbon-leaded discrete devices can be very
small, with the case no larger than necessary to provide mechanical support Figure 8-24 Flatpack Outline Drawing
for the leads. These devices were originally developed for use on stripline
boards, where the part body is recessed into the board so that the leads are
aligned with the stripline circuit traces.
The special characteristics of these devices (small lead inductance, low
capacitance between leads, and small physical size) have also made these
devices useful in non-stripline applications. Figure 8-25 shows a typical
ribbon-leaded device with flat leads. JEDEC publication 95 lists the dimen-
sions of ribbon leaded discrete devices.

8.6.6 Pin Grid Arrays Grid arrays are pinned or leadless carriers, with I/O
contacts on one surface of the package, on a grid 2.54 mm or smaller. The
use of a solid grid necessitates placing the die cavity on the side opposite the
I/O contacts. A double or multiple concentric row grid permits locating the IPC-820a-08-25

die cavity and I/O contacts on the same side, with an optional heat sink on Figure 8-25 Typical Ribbon Leaded
the opposite side. Discrete Device Outline Drawing (Flat
The pin grid array package (PGA) is designed for high pin-out ICs for Leads)

through-hole mounting because of its space efficiency and compatibility with

existing DIP facilities. The main advantage of the pin grid array is to avoid the I/O limitations of peripherally terminated
packages such as LCC, at the same time providing terminal separations of 2.54 mm centerlines. As such, it can be readily
installed into a conventional printed board and also wave soldered.

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The disadvantages are as follows:

• Limited inspectability of solder joints
• Impedance limitations
• Difficult removal and replacement
A typical pin grid array is a square, multilayer (usually
ceramic) package having terminals on 2.54 x 2.54 mm cen-
ters. These packages are available in either cavity-up or
cavity-down versions. A cavity-up configuration mounts the
die opposite the pins, allowing a full grid of pins and the
highest I/O density. A cavity-down configuration has the die
on the same side as the pins, and is generally used with high
power circuits in air-cooled applications to allow a heat sink
opposite the die. However, this version is not as space effi-
cient. Pin grid arrays have good electrical characteristics due
to the short signal paths from I/O pin to die. Pin grid arrays
overcome thermal expansion problems typically encountered IPC-820a-08-26
at ceramic component/printed board interfaces because the
Figure 8-26 Pin Grid Array
pins are compliant. Conventional soldering techniques such as
wave soldering can be used.
The higher the I/O lead count, the lower the percentage of the 1000
total package area the die cavity occupies. For example, the
96-lead, 1.02 mm center chip carrier is over one-inch square. 500 0.050" Solid Grid
For optimum packaging density, this percentage should be as 0 .0
2 5"
I/O'S / SQUARE INCH

high as possible. Therefore, 0.635 and 0.5 mm chip carriers LC & D

and grid arrays are used (see Figure 8-26). BL
Row
0.05
0" G
Figure 8-27 shows the I/O density achievable with various 0.100" Solid Grid rid
100
packages. For lead counts in excess of 100, a 2.5 mm center-
line solid grid provides greater I/O density than either 0.040 0.100" Conc. Grid
" CP
1.27 mm or 1.02 mm centerline chip carriers. 50 0.05 L eriph
eral
0" C
L Perip
The 0.635 mm centerline chip carrier is clearly more I/O hera
l
efficient than a 2.54 mm grid array. However, a double-row
1.27 mm solid grid provides the greatest I/O density. With
pins brazed on 2.54 mm centers, pin grid arrays are a logical 10
carrier for high lead counts intended for through-hole (not 50 100 150 200 250 300
surface mount) board assemblies compatible with DIPs. This PACKAGE LEAD COUNT
should extend the useful life of current technology for some IPC-820a-08-27
high lead count applications.
Figure 8-27 I/O Density Versus Lead Count (All
Dimensions in Inches)
8.6.7 Through-Hole Connectors Through-hole connectors
are designed to mount to the printed board with the leads
extended straight through and then soldered. Connectors are
also available with a compliant section in the pin, which
allows installation in a plated-through-hole without the need
for soldering. The interference fit between the compliant sec-
tion of the lead and the plated-through-hole achieves a reliable
gas-tight interconnection. Installation of this type requires the Note 2
use of an arbor press with suitable tooling (see Figure 8-28). Note 1
0.30 mm
Connectors may be mounted to the printed board by soldering, 0.03 mm DIM. 8
(0.015 in)
welding, crimping, press-fitting, or other means. Leads may (0.010 in)
be extended in through-holes, or surface mounted to circuit IPC-820a-08-28
lands provided on the board. Holes may be plated through or
Figure 8-28 Connector with Press Fit Contacts
simply drilled. The exact method depends on the connector

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design. Board size and weight are important factors in choosing connector-mounting hardware, and in deciding whether the
board is mounted horizontally or vertically. It is common practice to mount the connector either to a mother board or to card
racks or frames, then insert the component board into the connector using appropriate guiding and support mechanisms. In
general, if the board is mounted horizontally, or if vibration is expected, the board should be attached to the connector or
supported by mechanical means other than contact.
Press-fit headers require special tooling to apply the header to a board. Tooling can vary from simple hand fixtures to elabo-
rate presses depending on part size and connector design. Connectors with low line densities can be installed manually.
Higher concentrations require card ejectors, jacks, or guide pins. Zero insertion force connectors are available, which require
an auxiliary force to make connections after the card is inserted into the connector.
NOTE: Many versatile connectors are available for the printed board designer to transfer signals or power to the boards.
Careful attention to the uses and requirements of these devices will result in reliable interconnections.
Connectors with integral retention to the board are favored for manufacturing ease. Connectors that cannot be snapped or
clinched in place prior to soldering require mechanical fastening. This is primarily for positioning, and the connector must
then be soldered to assure electrical integrity.
Inspection of the leads is recommended. The assembler should look for grossly bent leads, poor plating, and loose debris.

8.6.8 Through-Hole Sockets Sockets normally have pre-set

leads supplied by the vendor, and are prepared for assembly Cover or
Hold-Down
into the board. Preparations should focus on two areas:
• Selection of the component (and its options) for a particular
assembly.
• Assurance that the part is supplied as requested. Chip
Carrier

The best guarantee is a preproduction trial run of the assem-

bly. Areas of concern are:
Retainer Screw
• Packaging and Handling Inadequate or improper methods (Pressure Only)

damage lead sets that force line delays.

• Terminal Surface These should be provided tinned or with Housing
gold plate. Gold plate may have to be removed (ref. J-STD-
Thruster
001). Clip

P/I
• Length of Terminals The terminals should not protrude Structure
beyond the board more than 1.5 mm and should be discern-
ible in solder joint.
• Seals Assembly processes (soldering, cleaning, etc.) dictate Plate
the degree to which the component must be closed. Standard (Pressure Only)
IPC-820a-08-29
precautions, however, include use of a closed-entry bottom
terminal exit or a plate to achieve the same effect. Special Figure 8-29 Surface Mount Clip Carrier Socket
tapes or pallet tools can seal the socket face when needed.
• Cleanliness Wave solder assembly cleaning processes are A. B.
normally adequate to assure part cleanliness. Periodic exami- Contact
nation of pre-assembly components is a normal procedure.
For applications where speed and ease of installation and Housing
removal are major considerations, devices can be mounted in Solder
suitable sockets. Sockets can be used in through-hole (non- Joint
surface mounting) applications (see Figure 8-29). However, P/I Structure Land P/I Structure
since the terminals of the chip carrier are not on 2.54 mm
centers, a contact similar to the one shown in Figure 8-30 may Compliant Section
IPC-820a-08-30
be used to provide the desired transition. A polarizing boss
Figure 8-30 Section Through Socket Solder Contact
can be provided on the connector to mate with a correspond-
ing hole in the printed board structure.
The low profile plastic leaded chip carrier socket serves as a transition device to enable users to take advantage of the ben-
efits of four-sided IC packages without making changes in their current assembly procedures.

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As previously mentioned, the chip carriers can have surface mount leads on 1.27 mm spacing. The chip carrier socket has
flat spring input leads on 1.27 mm spacing to accommodate the package, and straight solder-tail output leads on 2.54 mm
spacing to meet the requirements for standard through-hole mounting.
Through-hole mounting is the dominant choice for pin grid array packages. Sockets for pin grid arrays are designed to match
pin configurations.
There are three types of pin grid array sockets currently available:
• Standard Version Allows the component to be pushed in.
• Low-Insertion Force Employs a low force contact design.
• Zero-Insertion Force Makes use of a mechanical assist to maintain contact pressure.
Multi-leaded sockets used for mounting of large-pinout components such as pin-grid-arrays (PGA) and similar components
may require the use of special fixtures/tooling to ensure the component leads are fully inserted into the socket.
When sockets are used, 100% visual inspection for correct seating of the component leads in the socket is recommended.
In some cases (e.g., PGA sockets), the use of a feeler gage to verify the gap between the bottom of the component and the
top of the socket may be appropriate.

8.7 Assembly Sequence, Through-Hole

8.7.1 Process Steps Because of the multi-step component mounting operation, the designer of intermixed assemblies
must take into account all of the fabrication and assembly steps necessary to complete the electronic assembly.
Concerns during the design cycle include:
• Component Types
• Assembly Process (Single and double-sided assembly, component securing)
• Joining Techniques (Single and double-sided joining techniques, required care for heat sensitive components, handling of
unsealed components)
• Sequence of Events

8.7.1.1 Sequence The selection of a particular method for mounting and connecting components in equipment depends
on the following:
• The type of component package involved
• Equipment available for mounting and interconnecting
• The connection method used (soldered, welded, crimped, etc.)
• Size, shape, and weight of the equipment package
• The degree of reliability and maintainability (ease of replacement) required
• Cost considerations
Figure 8-31 shows a typical component mounting sequence.
Tests performed on clinched leads show that the pull and yield stresses produced by lead-clinching operations are far below
the allowable limits for these leads.

8.7.1.2 Attachment Issues Component preparation generally includes forming and cutting of component leads to facili-
tate subsequent component assembly, while minimizing component damage due to stress.
In any method that involves bending or forming of device leads, it is important that the lead be supported and clamped
between the bend and the seal, and that forming be done with extreme care to avoid damage to lead plating. Bending, form-
ing, and clinching produce stresses in the leads and can cause stresses in the seals if precautions are not taken. In no case
should the radius of the bend be less than the diameter of the lead, or in the case of rectangular leads such as those used in
DIPs or flatpack integrated circuits, less than the lead thickness. It is also important that the lead exiting the body of the
component be kept parallel to the axis of the component, and that the ends of the bent leads be perfectly straight and par-
allel to assure proper insertion through the holes in the printed board.
The most significant advantage of using the through-hole mounting method is its compatibility with conventional mass sol-
dering techniques, such as dip and wave soldering.

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IPC-AJ-820A February 2012

Incoming
Receiving
Inspection
Boards Automatic Insertion Automatic/Manual
(Mount Components) Insertion

Board &
Component Miscellaneous Solder
Dips Axials Radial Components Components
Preparation

Preclean Presolder
Mark Inspection
Prebake PWB

Combined Inspect Post Installation Aqueous/

To Stock Coat & & Special Solvent
or Next Inspect Test Components Clean
Assembly

Inspect
Solder
Touch-Up
IPC-820a-08-31

Figure 8-31 Component Mounting Sequence

In addition, replacement of flatpacks mounted in this manner is readily accomplished by melting and removing the solder
from each hole individually or in multiples.
If the board is machine soldered, components should be mounted on the side of the printed board opposite the side that con-
tacts the solder. Except when mounted in cordwood modules or on un-repairable printed boards, parts and components
should be spaced and located so that any part can be removed from the printed board without removing another part.

8.7.1.3 Assembly Process Methods The assembly process for attaching components to the printed circuit assembly typi-
cally uses solder to create the electromechanical connection.
The component preparation process may not cut the component leads to the desired length. The reasons may vary, but all
relate to the methods of handling the product prior to the soldering operation. During assembly, leads may be clinched, par-
tially clinched, or assembled straight through. After soldering, if leads are too long, they should be trimmed to prevent
shorting to the adjacent products when used in their final application. Cutters used to trim the leads must not damage the
component or solder connection due to physical shock. Per J-STD-001, all leads trimmed after soldering should either be
reflowed or visually inspected at 10X to ensure that the original solder connection has not been damaged or deformed. Lead
trimming after soldering that cuts into solder fillets should be reflowed. If the solder connection is reflowed, this is consid-
ered part of the soldering process and not rework. This requirement does not apply to components that are designed with a
portion of the lead intended to be removed after soldering.

8.7.1.3.1 Conforming Material Conforming sponge-like material can be used to hold components in place during wave
soldering. These materials have obvious disadvantages: fabrication, cleaning, removal, and frequent replacement.
‘‘Bean bags’’ or other weighty self-conforming substitutes can also be used.
Web-like materials are available for spraying on the top surface of the printed board assembly. These set up on contact and
are removable with water or solvents. Too heavy an application of the ‘‘web-like’’ material can interfere with the flow of the
solder along the component lead, resulting in unacceptable solder connections on the component side of the board.

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Blister pack or skin pack is sometimes used to hold components in place during lead trimming and soldering. This method
employs a transparent (sometimes bubble) sheet of plastic. A blister-packing machine applies heat and vacuum to form a
sheet of plastic over the tops of the components and around edges of the printed board assembly. Excess plastic is trimmed
from the bottom of the board before lead trimming and wave soldering. While the board is still warm, the plastic is removed.
With this process, the plastic material may soften and melt during the soldering operation and adhere to the components
leads, making it difficult to remove.

8.7.1.3.2 Heat Sinking Excessive exposure time and tem-

Thermal
perature can cause damage to heat sensitive parts. Thermal Shunt
shunts or heat sinks, as illustrated in Figure 8-32, should be
used for the protection of heat sensitive parts. They should be
made of a material with good heat conductivity (e.g., copper)
and the size and shape should provide adequate thermal pro-
tection and minimum mechanical interference.
IPC-820a-08-32

8.7.1.4 Assembly Lead Termination The objective of lead Figure 8-32 Thermal Shunt
termination is to electrically interconnect the component to
the assembly so that circuit continuity is maintained through
the life of the equipment in all anticipated service environ- TERMINATION LEAD
ATTACHMENT
ments.
CLINCHING LEADS STRAIGHT THROUGH LEADS
Leads may be attached to unsupported printed conductor lands
A F
by clinching or straight-through (unclinched) lead attachment
(see Figure 8-33). The component attachment allows the lead
or terminal to pass through the board and be soldered to the PLATED-THROUGH HOLE PLATED-THROUGH HOLE
conductor lands on the opposite side of the board. B G
When deciding between clinched or straight-through attach-
ment, the method of lead attachment should be optional with
NONPLATED-THROUGH HOLE NONPLATED-THROUGH HOLE
the following restrictions:
C TERMINALS
• For flat swaged eyelets (unfused), use a clinched lead attach-
ment. DOUBLE LAPPED PLATED-
CLINCH CLINCH THROUGH
• The diameter of unsupported holes should not exceed the HOLE
INTER-
diameter of the inserted lead by more than 0.5 mm for D CONNECTION
straight-through attachment.
CLINCHED
• The inside diameter of the supported hole should not exceed RIBBON LEAD LAPPED
the diameter of the inserted lead by more than 0.7 mm when
PLANAR MOUNTED LEADS
attaching straight-through leads to supported holes.
NONPLATED-THROUGH HOLE
• Leads should be terminated in such a manner that they do E INTERCONNECTION
not exert a force on the copper foil terminal area or conduc-
RIBBON AXIAL
tor. LEAD LEAD
• Each functional lead should have an associated terminal IPC-820a-08-33

area. Figure 8-33 Termination Examples

• There should be no more than one lead in any lead mount-
ing hole.

8.7.1.4.1 Unclinched Leads The most direct method for mounting components to the printed board is the straight-through
method with unclinched leads. This method requires minimal device handling.

The disadvantages associated with this approach are:

• The device is subject to movement both before and during the soldering operation. This makes it difficult to control the
component height off the mounting surface. This movement can be a source of solder joint problems.
• It is difficult to maintain a suitable clearance between the body of the component and the printed board surface for flux
removal and coverage of conformal coating.

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IPC-AJ-820A February 2012

• For components with rigid leads, precise drilling of the component mounting hole pattern is required due to small lead
circle and the inflexibility of the unformed leads.
• Supported holes are preferred to enhance the mechanical strength of the solder joint. With an unsupported hole, there is
too little contact surface and too much clearance between the component lead and the circumscribing land to provide a
solder connection that is mechanically sound.
The automatic insertion of the device leads may be difficult if component clearances are limited.
Using components with integral standoffs or mounting them with spacers may overcome some of the disadvantages:
• Suitable clearance between the component body and the printed board can be maintained to facilitate soldering flux
removal and conformal coating.
• Bearing surface for the body is provided if the component leads are to be clinched.
• The extension of unclinched leads beyond the printed board surface can be more accurately controlled.
• The height of the component body above the printed board surface can be more accurately controlled. This is especially
important when the printed board assemblies are closely spaced.
• The spacer may reduce mechanical stresses that are transmitted to the lead/body interface seal.
• The lead mounting hole pattern need not be held as accurately as for un-preformed component leads.
Spacers have the following disadvantages:
• Additional cost
• Increased assembly labor.
• Spacers with protrusions on one side should be mounted with the protrusions against the board.

8.7.1.5 Preformed Leads Offset multi-lead mounting methods have been developed to provide more space for board con-
ductors between the leads. When the components are removed from the forming die, the packages are usually hand-
assembled. Spacers are available for components with press-on heat sinks, or formed leads that have to be spaced off the
board.
The following considerations apply to offset multiple-lead mounting:
• Allows for larger lands and component lead holes.
• Requires less stringent board fabrication tolerances.
• Conductors can be routed between lands.
• May reduce (circular pattern) or eliminate (rectangular pattern) the number of off-grid mounting holes and lands.
• Provides spacing for flux removal and conformal coating.
• Requires considerably more time/labor for mounting tooling or fixturing.
• Care must be taken to assure that the lead forming process does not unduly stress the lead/body interface seal.
• Takes up more printed board area for the component mounting pattern.
• Preformed leads may be used for mounting components off the board.
• Preformed leads can reduce stress on land patterns on single sided boards.

8.7.1.6 Component Retention

8.7.1.6.1 Clinched Leads Clinching leads prior to soldering is commonplace, either as part of machine insertion or fol-
lowing hand insertion. The substrate land configuration and spacing to adjacent lands must be considered. Clinching in-line
with traces is good practice, and trimming of leads before clinching is recommended where clinch direction may cause
shorting to adjacent lands. It may not be necessary to clinch all leads of a multi-leaded device unless required by the cus-
tomer. The lead or terminal should make contact with the conductor pattern before soldering. Leads should not extend
beyond the edge of their lands, but if overlap does occur, the lead must not violate electrical spacing requirements.
In addition to the considerations common to straight-through mounting methods, clinching has the following advantages:
• A reinforced mounting hole is not required; teardrop and offset lands can be used.
• Some resistance to movement during soldering is afforded.
This method has some of the disadvantages of unclinched straight-through mounting, and in addition:

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February 2012 IPC-AJ-820A

• Care must be taken when cutting the lead to length and forming the clinch to assure that minimum conductor clearances
are maintained when the clinched lead overhangs the land.
• The lead clinching operation, if not controlled properly, can unduly stress the component lead-to-body seal.
The method chosen for component retention should take the following factors into consideration:
• End use of assembly and possible need for repair; component removal, replacement, and soldering without damage to the
printed boards, plated-through-holes, and/or lands. Straight-through leads are the simplest in this respect.
• Stresses on leads at the junction of the component body, especially for hermetically sealed or glass bodied components.
• Allowable distance from the bottom of the printed board to the end of the component leads, and desirable solder fillet.
• Area and direction available for clinching or bend-over without danger of proximity to other leads or conductors, which
may result in shorts or solder bridges.
• Possibility for internal voids and entrapments of flux, gases, etc., if the lead is curved or bent inside the hole, or in con-
tact with a hole corner.
• Hazards to personnel created by sharp lead ends
• Potential for fractured solder joints when leads are cut after soldering
• Potential for lifted lands
• Any specification constraints on component retention methods and results
Axial lead forming is normally along the centerline of the Table 8-1 Lead Clinch Length
component and inward, back toward the body. The clinch is Wire Diameter Minimum Clinch Maximum Clinch
either 90° or 45° (see Figure 8-33). The lead clinch length (L)
0.5 mm 0.8 mm 2.0 mm
of the component lead under the printed board is a function of [0.20 in] [0.030 in] [0.080 in]
the lead diameter, as shown in Table 8-1 and Figure 8-34. 0.8 mm 1.0 mm 2.0 mm
[0.030 in] [0.040 in] [0.080 in]
NOTE: The clinched lead length is measured parallel to the
printed board, after clinch. The clinch length for the normal 1.0 mm 1.3 mm 2.0 mm
[0.040 in] [0.050 in] [0.080 in]
90° clinch pattern is measured from the centerline of the com-
1.3 mm 1.5 mm 2.0 mm
ponent lead as it extends through the hole in the printed board. [0.050 in] [0.060 in] [0.080 in]
The minimum clinch lengths for small diameter leads also
depend on the hole diameter in the board. To maintain a mini-
mum clinch length, the hole size must not be more than
0.36 mm larger than the component lead diameter.
When printed boards are drilled to close positional tolerances
L Clinch Length
with minimum recommended hole sizes, the 45° clinch length
(L) may be as small as 0.8 times the lead diameter. This Standard Cut & Clinch Stress Relief Loop
allows only 0.3 times the lead diameter extending over the
land. In this case, two wire diameters should be allowed for
the distance below the board.
Automatic insertion machines may provide a means for hold- Stand-off from Board Clinch Length
ing components (for most reduced reliability applications, the Optional 45˚ Clinch
components need not be retained rigidly in position during IPC-820a-08-34

wave soldering). Numerically controlled insertion equipment Figure 8-34 Clinch Patterns
provides accurate placement of components (if tape sequence
and program are correct). Inspection of automatically inserted
components is usually through a sampling plan and/or a first
article inspection to check out the tape sequence and program.

8.7.1.6.2 Semi-Clinched Leads Semi-clinched leads (bent

less than 45°) should be considered as straight through leads
(Figure 8-35). The lead is passed through a hole in the board,
cut to length, and soldered. When straight-through leads are
used in conjunction with unsupported holes, the leads should IPC-820a-08-35
extend from 0.5 mm to 1.5 mm from the surface of the foil.
Figure 8-35 Semiclinched Lead
When straight-through leads are used in conjunction with

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IPC-AJ-820A February 2012

plated-through-holes or eyelets, the lead should extend at least to the surface of the plating or rim of the eyelet, and no more
than 2.3 mm from the plated surface eyelet.

8.7.1.7 Lead Cutting Cutting of component leads may be accomplished manually or by automated equipment. When
automated lead cutting is used, it is usually necessary to retain the parts on the board during the cutting process. Leads may
be cut either before or after soldering. However, cutting leads after soldering requires that cutting methods, sharpness of cut-
ting tools, lead material, or procedures are such that they do not induce solder fractures. J-STD-001 requires that any leads
clipped after soldering must be reflowed to insure the integrity of the solder connection, or the solder connection must be
inspected at 10X. The retention method may also serve to retain the parts during a second soldering operation.
As with any cutting instrument, as blade usage on the lead cutter increases, cutting quality diminishes. In some instances,
the small lead section is not entirely removed, leaving a ‘‘flag’’ attached to the lead end. Surface mount components mounted
to the bottom side of the board may also interfere with the lead cutting operation.

8.7.1.8 Axial Leaded Components

8.7.1.8.1 Lead Bends Leads must extend at least one lead diameter or thickness, but not less than 0.8 mm from the body
of the component before the start of the bend radius. The end of the body includes any coating meniscus, solder seal, sol-
der or weld bead, or any other extension. The minimum bend radius depends on the diameter or thickness of the lead. See
Figure 8-36. See Figure 8-37 for the minimum center-to-center lead spacing.

Straight for 1 diameter, Straight for 1 diameter,

▼
▼

but not less than but not less than

0.8 mm [0.031 in] 0.8 mm [0.031 in]
▼

▼
▼

R R Weld
▼
▼
▼

Diameter Diameter
▼

A. Standard Bend B. Welded Bend

Note: Measurement shall be made from the end of the part. The span for components mounted with a conventional
(The end of the part is defined to include any coating lead form is 0.8 mm [0.031 in] minimum, and
meniscus, solder seal, solder or weld bead, or any 33 mm [1.30 in] maximum.
other extension.)

Maximum Lead Diameter Minimum Radius (R)

Up to 0.8 mm [0.031 in] 1 diameter

From 0.8 mm [0.031 in] to 1.2 mm [0.0472 in] 1.5 diameters
Larger than 1.2 mm [0.0472 in] 2 diameters

IPC-820a-08-36

Figure 8-36 Lead Diameter Versus Bend Radius

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February 2012 IPC-AJ-820A

The minimum center-to-center lead spacing is represented by

the following equation: L = B max + 3D* + 2FA where:
FA
L = Center-to-center lead spacing
B = Body length
D = Nominal lead diameter
FA = Forming allowance (lead should not be disturbed within
this distance from the body, either D or 0.8 mm, which-
ever is greater) D
B
* 3D for lead diameters less than 0.8 mm, 4D for leads from
0.8 mm to 1.2 mm, and 5D for leads over 1.2 mm L
IPC-820a-08-37
The value of L is usually rounded upward to coincide with the
design grid spacing. The total length of both leads should not Figure 8-37 Bend Configuration
exceed 25 mm unless the component is mechanically sup-
ported to the mounting base.

8.7.1.8.2 Stress Relief Properly formed leads on axial

leaded components normally afford adequate stress relief
when formed as shown in Figures 8-35 and 8-36. Mechani-
cally sensitive components, such as glass diodes, may require IPC-08-38
other stress relief configurations, with one or more leads
formed with a stress loop/bend. Solder wicking into the lead Figure 8-38 Simple-Offset Preformed Lead
bend stiffens the lead and reduces stress relief. This is more
likely on smaller diameter components. If solder could wick
into the lead bend, an alternate stress loop/bend configurations
or spacer should be used (see Figure 8-38).

8.7.1.8.3 Lead Forming for Component Retention Compo-

nent leads may be pre-formed for retention to the board dur-
ing the wave solder operation or to elevate the components off
the board. The form can be a simple offset up to a complex
compound form. The major factors affecting the lead form are IPC-820-08-39
board thickness, lead diameter, lead material, hole size, and
tooling required. Figure 8-39 Dimple Preformed Leads

8.7.1.8.4 Simple Offset Method Figure 8-38 illustrates a component with a straight through lead. The advantages are ease
of forming and insertion. The disadvantage of this form is minimal retention force with the resiliency of small or soft com-
ponent leads.

8.7.1.8.5 The Dimple This method increases the retention of the component to the board and gives better contact to the
board circuitry. The main disadvantages are the complex die sets required to form the leads (see Figure 8-39).

8.7.1.8.6 Compound Forms This method gives the best retention and has the advantage of clinched lead reliability. Dis-
advantages include complex tooling required to form leads and the need for consistent hole-diameter tolerances (see Figure
8-40).

IPC-820a-08-40

Figure 8-40 Compound Lead Form Examples

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8.7.1.9 Radial Leaded Discrete Components

8.7.1.9.1 Component Preparation Under certain circumstances, it may be

advisable to provide stress relief for the leads of radial-lead components by
forming the leads outward from the normal component lead pattern to an
enlarged pattern (see Figure 8-41). Another method of providing stress relief
for radial-lead components is the use of a flexible low modulus spacer sup- IPC-820a-08-41
ported by rounded protrusions.
Figure 8-41 Stress Relief Leads
8.7.1.9.2 Multiple Radial Lead Components Multi-lead TO cans are used
in many applications, but the wide variety of can sizes and the varying num-
ber of leads make it difficult to standardize on a mounting method. This sec-
tion discusses the more commonly used mounting techniques.

8.7.1.9.3 Lead Forming Leads exiting from multi-lead radial type compo-
0.75
nents may be formed to standard grid spacing by forming the leads to a [0.030]
larger pattern below the component body. This facilitates inspection of sol-
der joints, improves stress relief, and enhances cleaning (see Figure 8-42). 0.5 [0.020]
(one lead diameter)

8.7.1.9.4 Component Retention The dimple in Figure 8-43 increases the

IPC-820a-08-42
retention to the board and gives better contact to the board circuitry. The
main disadvantages are the die sets required to form the leads. Figure 8-42 TO Can Lead Forming

8.7.1.9.5 Lead Configuration After Assembly The basic multi-lead TO

can mounting techniques can be grouped as follows:
• Straight-thru lead, unclinched
• Straight-thru lead, clinched
• Straight-thru lead, with spacer (clinched, unclinched)
• Preformed lead, unclinched IPC-820a-08-43

• Preformed lead, clinched Figure 8-43 Dimple Preformed Leads

• Preformed lead, with spacer (clinched, unclinched)
A mounting pattern for 12 1ead multiple-lead TO cans with radially offset and clinched component leads (e.g., TO-73,
TO-101) is shown in Figure 8-44.

8.7.1.10 Mechanical Securing Mounting for a high mass or high power component that must be mechanically secured to
the surface of the board is shown in Figure 8-45.

2.0
[0.080] CLINCHED
LEAD TYP.
PACKAGE
OUTLINE

1.4
[0.056]
11.34
[0.080]

IPC-820a-08-44 IPC-820a-08-45

Figure 8-44 Typical Mounting Pattern for 12-Lead Cans Figure 8-45 Mechanical Mounting - Lead Forming
with Clinched Leads Mounting

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February 2012 IPC-AJ-820A

8.7.1.11 Inline Leads The mounting pattern shown in Figure 8-46

employs ‘‘inline’’ leads and lands for through-hole mount devices. Although
such inline lead arrangements simplify lead-forming requirements, they
result in very closely spaced lands (approximately 0.8 mm clearance) and
therefore require close tolerance manufacturing processes for fabrication and
assembly, particularly for through-hole mounting. Another disadvantage of
the inline arrangement is the limited space available for conductor routing
between terminal areas. IPC-820a-08-46

8.7.1.11.1 Single-Inline Package (SIP) These components are ready for Figure 8-46 Single-Inline Component
manual insertion without the use of special tools or fixtures. Lead prepara-
tion is not normally required. Lead clinching is required to the board for component retention through manufacturing opera-
tions. Standoffs are usually built into the component body to accomplish proper board spacing as shown in the typical SIP
specification in Figure 8-46.

8.7.1.11.2 Dual-Inline Package Dual-Inline Package (DIP) packages leads should be dressed through the printed board,
whether printed board lands are of a round, square, or ribbon cross section. The maximum clinched lead length is depen-
dent upon the length of lead that is available for cutting and clinching, and the thickness of the printed board. In all cases,
the land diameter should be large enough to accommodate the clinched lead to minimize solder bridging.
A minimum of two (2) leads on opposite corners should be clinched outward for part retention as shown in Figure 8-47. The
base of the device should be parallel to the surface of the printed board to the extent that minimum lead protrusion and
maximum component body height from the board are maintained (see IPC-A-610). Heat sinks, when required, should be
properly secured so that they do not stress the solder joints. A resilient spacer may be used as shown in Figure 8-48. The
lead-to-body seals of mounted devices must be undamaged.
▼

Axis of Hole
▼

30 Max. IPC-820a-8-47

Figure 8-47 Lead Configuration (After Assembly)

Body chipouts that extend to or into the glass seal; chipouts that expose a normally encased area of a lead, and hairline
cracks in either the seal or body are not acceptable.

8.7.1.11.3 Staggered Leads Other disadvantages associated with inline

patterns can be overcome by the use of ‘‘staggered’’ lead arrangements (see
Printed
Figures 8-49, 8-50). In these mounting patterns, lead hole and lands are off- Board
set a convenient distance from the inline axis on each side of the device.
Lead forming is normally accomplished using fixed dies, which bend all
leads simultaneously and uniformly.
Although staggered leads require more board area per device than the inline Frame
arrangement, it provides several advantages: Resilient
• Tolerances are less critical. Spacer
• Larger lands can be used. IPC-820a-08-48

• More space is available for routing conductors between adjacent lands. Figure 8-48 Resilient Spacer to Heat Sink
• Larger component lead holes can be used to simplify component insertion. Frame

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D
R

T
IPC-820a-08-49 IPC-820a-08-50

Figure 8-49 Staggered Hole Pattern Mounting (Flatpack Figure 8-50 Component Mounting - Lead Forming
Outline Drawing)

A good compromise between loss of available board area and the increase in the number of through conductors may be
achieved by a 2.5 mm offset. Conventional manufacturing tolerances are applicable, and a 0.25 mm annular ring (a practi-
cal minimum) is possible. The maximum offset that can be achieved with flatpack leads of 6.4 mm length is 3.8 mm. When
this maximum offset is used, only straight-through (unclinched) mounting is practical.

Hand held tooling is also available to bend all leads on one side of the device. All tooling should protect the device seals
by supporting the lead between the body and the bend.

Lead bending and forming requirements for typical packages are shown in Figure 8-50.

8.7.1.11.4 Unclinched Flatpack When mounting through-

hole flatpacks with unclinched leads, the flat leads are formed
at a 90° angle and inserted in mounting holes in the printed
board (see Figure 8-51).

8.7.1.11.5 Clinched Leads Flat packs mounted in unsup-

ported holes with annular ring should be clinched a minimum
IPC-820a-8-51
of 45° with lead protrusion of at least 0.5 mm (see Figure
8-52). Advantages include: Figure 8-51 Through-Hole Board Mounting with
Unclinched Leads
• The flatpack is positioned to withstand the forces exerted
upon it during mass soldering operations.
• The hole-to-lead clearance is not as critical.
• Solder connections are more reliable than unclinched mount-
ing due to additional mechanical contact.
• A common variation of the through-hole, clinched-lead flat-
IPC-820a-08-52
pack mounting method, as opposed to the annular ring
method, is where the land is offset (see Figure 8-53). Figure 8-52 Through-Hole Mounting with Clinched Leads
and Circumscribing Land
8.7.1.12 Pin Grid Array Components To accommodate a
high count of I/O pins, a pin-grid array package can be
inserted in a 100-mil grid through-hole process and wave sol-
dered. However, because of the risks involved with removal
of these packages, various socket styles, including low-profile
grip sockets, are often utilized in this application. Inspection
of the solder connections is performed on the solder side of IPC-820a-08-53

the board, and the device can be tested on ‘‘bed of nails’’ tes- Figure 8-53 Through-Hole Mounting with Offset Land
ters. Inspecting the solder joints on the component side of the
board is extremely difficult without the aid of special tools
such as fiber optic inspection or x-ray.

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Pin Grid Array pins should be through-hole mounted with straight through lead attachment. Lead forming is not recom-
mended.

8.7.1.13 Through-Hole Mounted Connectors and Sockets Chamfered lead ends are recommended for large connectors.
Lead and hole location becomes more critical as the number of I/Os increases. As in any multi-lead device, the true posi-
tion of pattern clusters becomes critical for reliable installation and ease of manufacturing. The use of a secondary reference
such as a hardware hole is recommended. Connector manufacturers should be contacted for availability of installation aids.

8.7.1.13.1 Through-Hole Mounted Socket Lead Configuration After Assembly Socket contacts are normally stationary
(non-formable), preset, and typically protrude through to the board surface. Stamped contacts without mechanical grip and
clinching are recommended. A post-assembly terminal inspection should highlight lead length conformance and electrical
separation of lead ends from other leads or surface conductors.

8.7.1.13.2 Polarization The device and socket assembly application specifications, as well as the board markings, are the
principal controlling documents for orienting sockets on the board. Sockets are visually and dimensionally symmetrical, and
may offer only visual aids (a dot, slanted corner, tab, etc.) on the part to orient it. The controlling assembly document should
note the visual aid and the pin numbers.

8.7.1.13.3 Lead Forming and Alignment Lead forming is not usually performed on sockets, but if it is necessary, the fix-
ture or tool must ensure the integrity of the contact areas, and that the lead is not deformed beyond 10% of the lead diam-
eter.

8.7.1.13.4 Seating With sockets being relatively light in relation to their land patterns, some of the leads penetrating the
board may not seat properly. They may not bottom out fully to the board, or may have a lead or two folded beneath the
body. After assembly, a visual inspection should be performed prior to soldering.

8.7.2 Component Placement

8.7.2.1 Straight-Through Leads Straight-through lead definition includes partially clinched leads, where the components
are secured with only limited movement, and the leads are in contact with the land patterns.
Lead projection from an unsupported hole should be 0.5 mm
minimum. Lead bend at the solder side is allowed to extend
such that minimum electrical clearances are maintained. Lead
projection from a supported hole must extend beyond the bot-
tom surface of the board such that, as a minimum, the lead
contour is discernible after soldering. Leads may be pre-
formed for component retention without clinching to eliminate
the need for post-solder lead cutting.
Not Recommended
8.7.2.2 Lead Spacing Where practical, components with Sleeved component bridges more than one conductor.
similar physical dimensions should have the same lead spac-
ing and be on the design grid.

8.7.2.3 Component Body Through-hole components may

be mounted on both sides of the board. Components should
not be mounted across or on top of vias or exposed conduc-
tive patterns unless adequately electrically insulated (see Fig-
ure 8-54). Resistors with high heat dissipation should be Insulating
Material
mounted with a clearance of at least 1.5 mm from the board
surface. Parts or metal case components mounted over elec- Recommended
tronic circuitry should be insulated from conductive elements. Conductors protected from moisture traps
by compatible insulating material.
Insulation materials should be compatible with the circuit and IPC-820a-08-54
the board material.
Figure 8-54 Components Mounted Over Conductors
Conductive areas under parts should be protected against
moisture entrapment by one of the following methods:

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IPC-AJ-820A February 2012

• Application of conformal coating using material in accordance with IPC-CC-830.

• Application of a cured resin coating by using low flow prepreg material.
• Application of a permanent polymer coating (solder resist) in accordance with IPC-SM-840.
Component bodies should not be closer than 1.5 mm from the board edge.

8.7.2.4 Hardware Clearance The designer must locate

1 2
components to maintain electrical clearances to printed board
conductor patterns (see Figure 8-55).
Component placement density considerations should also
include: 4
• Isolation resistance
• Thermal dissipation 3

• Reduction of component power rating 1. Metallic hardware

1
2. Conductive pattern 5 3
• Ease of rework and repair processes 3. Specified minimum
electrical clearance
8.7.2.5 Horizontal Axial Leaded Discrete Components 4. Mounted component
Horizontally mounted components should be oriented in either 5. Conductor IPC-820a-08-55

of the two board plane axes, preferably with component iden-

Figure 8-55 Hardware Clearance
tification in the same direction. The body of the component
should be approximately centered between the lead mounting
holes (see Figures 8-56, 8-57). The clearance between compo-
nent leads or components with metal cases and any other con-
ductive path should not violate minimum electrical spacing. R1 R2
CR1
Parts and components should be mounted so as not to obstruct
solder flow on the topside termination areas of plated through-
holes that require soldering. Component bodies should not be
closer than 1.5 mm from the board edge.
8.7.2.6 Radial Leaded Discrete Components, Horizontal
Mounting When radial leaded components (e.g., transistors
in TO cans) are mounted horizontally, mounting clips or adhe- +C1
sives should be used. Typical methods of mounting compo-
R5 R4 R3
nents of this type are shown in Figures 8-58 and 8-59.
IPC-820a-08-56

8.7.2.7 Plastic Power Transistors Plastic power transistors Figure 8-56 Component Alignment
are designed such that the mounting hardware may also be a
part of the active circuit. Typical mounting of such a device is
shown in Figure 8-60. Lead bend requirements must be fol- R1 R2
lowed when mounting these devices.
8.7.2.8 Electrical Insulators and Thermal Conductors
When electrical insulators are also thermal conductors, the CR1

device should be in contact with the electrical insulator/

thermal conductor and the electrical insulator/thermal conduc-
tor should be in contact with the board.
8.7.3 Vertical Mounting

8.7.3.1 Axial Leaded Discrete Components Components

+C1
mounted perpendicular to printed wiring boards should be
installed with a minimum of 0.4 mm clearance between the R5 R4 R3
end of the component body (which includes any packaging Q1

meniscus) and the surface of the board. This will prevent heat
IPC-820a-08-57
damage and entrapment problems (see Figure 8-61). The
maximum vertical misalignment must not violate minimum Figure 8-57 Component Alignment
electrical spacing.

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Heat sink

IPC-820a-08-58 IPC-820a-08-59

Figure 8-58 Horizontal Mounting of Radial Leaded Figure 8-59 Horizontal Mounting of Radial Leaded
Component Component with Heat Sink

IPC-820a-08-60

Figure 8-60 Horizontal TO Mounting Not Recommended

Component mounted flush to printed board.

8.7.3.2 Radial Leaded Discrete Components Components
whose leads are on one side should be mounted so their axes
are as parallel and perpendicular as practical to the mounting
base (see Figure 8-62). The coating meniscus on leads is not
to be removed. Components installed on boards with lands on
the component side should maintain a visible clearance 0.4 mm
[0.016 in]
between the surface of the circuitry and where the meniscus
ends on the lead (see Figure 8-63). A typical method for ver-
tical mounting in unsupported holes is shown in Figure 8-64.
Assemblies with stringent conformal coating requirements
Recommended
may need to be coated prior to component mounting.
Component mounted with adequate
clearance between end of body and board;
8.7.3.3 Multiple Radial Lead Components In this method, spacer may be used.
the component leads are simply inserted in the proper sup-
ported hole in the printed board and joined to the land by NOTES:
conventional soldering techniques. Typical methods for verti- 1. The purpose of raising the component body off the
cal mounting of transistors without spacers are shown in Fig- board surface is to facilitate solder flow, escape of
gases in soldering and cleaning. Normally, this is
ures 8-65 and 8-66. accomplished only by raising the component off the
board. There are, however, certain hole devices that
For mounting TO cans with spacers or spreaders, see 8.3.2 or can support the component and still accomplish
8.3.3 respectively. solder flow, gas liberation, and cleaning.
2. If the component is mounted tight to the board (no
In installations where flux must be removed, clearance should clearance) component movement will unduly stress
be provided between the board and the base of the component. the component lead.
The base of the component should be parallel to the board. 3. Conformal coating application and coverage may
necessitate an increase in the 0.015" minimum
Suitable fixturing should be provided to help assure that the dimension.
component is retained in proper position throughout the sol- 4. Care should be taken when using spacers with high
coefficients of thermal expansion.
dering operation. Where no spacer is specified, a temporary IPC-820a-08-61

spacer may be used until the component has been soldered. Figure 8-61 Vertical Mounted Axial Lead Components

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IPC-AJ-820A February 2012

IPC-820a-08-63

Figure 8-63 Vertical Mounted Components Coating

Meniscus

IPC-820a-08-64

Figure 8-64 Radial Components Mounting (Unsupported

Holes)

IPC-820a-08-62

Figure 8-62 Vertical Mounted Radial-Lead Components

Tab or index locations must be closely observed to assure

proper orientation in mounted position.

8.7.3.4 Hermetically-Sealed Components Hermetically

sealed components, such as reed relays and glass-sealed
IPC-820a-08-65
capacitors and diodes, must be handled with care to prevent
damage to seals. Figure 8-65 Offset Lead Can Mounting

8.7.3.5 Rectangular-Bodied Components A component

with a rectangular body should have clearance from the
mounting base to allow cleaning.

8.7.3.6 Metal Power Packages Metal power packages (see

Figure 8-67) should be mounted in accordance with the fol-
lowing:
• Lead holes may be plated-through, but should not be inter-
facial or interlayer if the component body is mounted in
IPC-820a-08-66
contact with the board or circuitry thereon.
• The component body should be spaced a minimum of Figure 8-66 Offset Lead Can Mounting
0.25 mm above the board surface if lead holes are interfacial
or interlayer to permit solder flow to the component land.
• Leads may be tempered or exceed 1.25 mm in diameter pro-
vided they are not clinched against the printed board land.
• A washer should be inserted between each screw head and
IPC-820a-08-67
the land and board material to prevent damage to the land.
• Nuts should be lock-type or should be retained by locking Figure 8-67 Metal Power-Package Transistor Mounted on
devices. Resilient Standoffs

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• The heat sink or device-mounting flange may be provided with threads to match a mounting screw for a solder lug.
• Resilient and/or insulating material may be required functionally or as standoffs.
• Hardware must be torqued to specification.

8.7.4 Mixed Technology

8.7.4.1 Axial Leaded Discrete Components When through-hole axial components and chip components are used in the
same assembly, care must be taken to establish proper assembly sequence, design for tool clearances, and shock resistance
before soldering, cleaning, inspection/testing, and rework. Refer to 8.1, general information related to Type 1 Level C or
Type 2 Level C assemblies, for consideration when leaded axial surface mount components are used with chip components.

8.7.4.2 Radial Leaded Discrete Components Assembly of surface mounted devices in combination with radial-leaded
through-hole devices requires two assembly processes.

8.7.4.3 Inline Leaded Components SIPs and DIPs are normally intended to be through-hole mounted. If parts are to be
surface mounted, the requirements for surface mounting apply. In a mixed assembly that contains both surface mounted and
through-hole mounted components, the decision of how to mount these part types should be determined during the design
phase, based on the number of parts of a given type, and with the intention to minimize the number of assembly or process
steps. Land patterns must be appropriate for the type of attachment specified.

8.7.4.4 Pin Grid Array Components Through-hole mounted pin grid arrays may be used on a mixed assembly with other
through-hole components, DIPs, axial-leaded components, etc. Manual assembly of the pin grid array package to the printed
board can be achieved using special tools designed for ease of alignment and insertion. Tweezer-type devices may be used
to place and hold a component, or a machine positioned vacuum pick-up under the operator’s control.

8.7.5 Manual Techniques See 8.1 for additional information.

8.7.5.1 Axial and Radial Discrete Components Procedures utilized should reduce contamination and damage to the com-
ponents. Identification marking is desirable on printed wiring boards to assure proper placement of components during
assembly.

8.7.5.2 Dual-Inline Package Gripping Tools Tools may be used to maintain lead spacing during insertion (see Figure
8-68).

8.7.5.3 Multiple Radial Leaded Discrete Components Special tools and equipment are not normally needed for manual
insertion of multi-leaded radial components. Special fixtures or forming techniques may be required to maintain component
placement/position integrity prior to the solder process. Partial assembly and soldering may be required before a second set
of electronic components are mounted to the packaging/interconnection structure.

8.7.6 Automated Techniques Refer to Section 8 for general considerations. Some basic principles for assembly, espe-
cially automated, are:
• Arrange all components on X and, if necessary, Y axes.
• Arrange components in columns and/or rows, if possible.
• Sequence all axial-leaded components prior to insertion.
• Minimize the distance between the components, and follow a grid pattern for component layout.
• Minimize the number of different center spacings.
• Make provisions for tooling holes at or near the edge of the board in an area not occupied by components.
• Minimize the number of different hole sizes to reduce manufacturing time if boards are drilled, or die costs if punched.
• Provide clearance areas, as large as the tooling footprint between components, for the insertion tools both above and below
the board.

8.7.6.1 Axial Leaded Discrete Components Multiple station sequencers and automatic variable center distance (VCD)
axial component insertion machines can be utilized to perform high labor content kitting and component preparation auto-
matically for manual or operator-assisted component assembly. For this application, the cut and clinch head of the VCD
machine is removed and a multiple cavity tray is placed in a modified board holder in place of a printed board.

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IPC-AJ-820A February 2012

IPC-820a-08-68

Figure 8-68 Dual-Inline Package Gripping Tools

8.7.6.2 Radial Leaded Discrete Components Insertion forces on preformed leads should be controlled to ensure suffi-
cient clearance under components for cleaning after assembly.
8.7.6.3 Multiple Radial Lead Components Before automatic insertion of TO-5, TO-18, and similar devices, leads usually
must be straightened and cut. There are few standards for automatic insertion of TO can components because few are
inserted automatically.
There are two general methods for automatic insertion: axial when the part is handled by the leads, and radial when the part
is handled by the body. Radial insertion cannot guide leads directly into the board holes, so hole diameter may need to be
increased by at least 0.25 mm to allow for lead position variation.

8.7.6.3.1 Location Considerations Both axial and radial

DRIVER
insertion require tooling clearances. Above-the-board clear-
ances similar to those in Figure 8-69 must be used in the axial
method. The radial method requires a clearance of approxi-
mately 2.0 mm larger than the body diameter.
FRONT
8.7.6.3.2 Radial Method The component body is held dur- VIEW OUTSIDE
FORMERS
ing the insertion process. A major problem with the radial
technique is that part dimensions may vary considerably from
batch to batch, and from manufacturer to manufacturer. SPAN
PLAN
VIEW 0.070 0.070
8.7.6.3.3 Axial Method When the axial method of auto-
matic insertion is used, the part is treated like an axial-leaded 0.200 0.100
component. This system for handling TO-92, TO-18, and
similar parts is based on forming the leads as shown in Figure Spacing on two-lead side may be 0.100/0.125"
8-70 and then taping them on conventional lead tape, similar IPC-820a-08-69

to axial-leaded components. Since the physical configuration Figure 8-69 Transistor Assembly Tools
of the component can vary, it is advisable to obtain parts on

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February 2012 IPC-AJ-820A

reels with thick interliners. This will ensure the handling of

one-size part only. Once on tape, a single insertion head can
14" Max. Reel Diameter
be used without retooling for nearly all vendors’ devices. See Note 4
0.015" Max
Optional Form

Spans from 7.6 to 10.2 mm are possible.

8.7.6.4 Inline Leaded Components DIPs can be automati-

1 1/4"
cally inserted with speed, volume, and accuracy. All DIPs 0.106" ± 0.015" Diameter
3" Dia. Min.
0.250"
should be inserted in a single orientation. The component ± 0.015"

space requirements for DIP components are similar to axial

0.015" Max
lead components, in that the general rules for axial-leaded Misalignment

component layout apply whenever they are intermixed with

DIPs on the same board. The DIP-to-DIP clearances for the Standard
Interliner Note 1
0.340" 1/4"
tooling fingers are shown in Figure 8-71. Because the front #767 Tape
or
leads locate the DIP, it is recommended that all DIPs be laid equivalent
Each side equal within 0.032"
out in a row or column fashion, starting at the front or ‘‘opera- 0.725"
Max

tor’’ side of the board (see Figure 8-72). 0.350" TYP

+ 0.060"
0.812" - 0.006"
DIP leads should be uniform and not bent too far from the See
Note 2 0.016" 0.030" Min
specified positions. Machines do form and straighten the leads Lead 0.019" 0.040" Max
0.350"
Diameter
0.400"
within the machine, but leads bent too far out of tolerance 0.281" Max See Note 8

cannot be formed and will cause jams. Care should be taken

not to damage lead-to-body seals on ceramic metal devices.
Notes:
For automatic insertion, DIP components should be obtained 1. Heavy Kraft or single ply “A” type corrugated interliner
from the supplier in slide magazines (see Figure 8-73) for to be used.
feeding into insertion machines. Each slide magazine can hold 2. Lead length in contact with tape, each side, 0.120"
minimum.
from 20 to 50 components, depending on the length of the 3. Leads must be straight within 0.015" between body
DIP. and tape.
4. Component bodies must be in line within 0.015".
DIPs may be inserted into sockets mounted on the printed 5. No more than one component may be missing at a gap.
board, or directly into predrilled holes. When inserting into 6. Distance between tapes must not go below minimum
sockets, the cut-and-clinch mechanism can be disabled. In the shown. Variation of 0.060" over reel permissible.
case of wire wrap sockets, the cut and clinch mechanism may 7. Both in-line leads (TO-92, TO-98, etc.) and TO-18 pin
configurations suitable for this process.
be completely removed to provide the necessary clearance for 8. Insertion spacing is a function of part width. For
the socket leads. Sockets may not be acceptable for Class 3 example: for 0.235" width, it is 0.400". Certain plastic
products. devices can be handled down to 0.300".

IPC-820a-08-70
8.7.6.5 Pin Grid Array Components For high volume
assembly of pin grid arrays, high accuracy robotic work cells Figure 8-70 Taping Specifications (only inches shown)

0.25 mm
[0.010 in]
2.54 mm MIN
[0.100 in] 2.54 mm
[0.100 in]

3.81 mm 2.54 mm
[0.150 in] [0.100 in]
MIN MIN
IPC-820a-08-71 IPC-820a-08-72

Figure 8-71 DIP Clearances Figure 8-72 DIP Layout in Rows and Columns

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IPC-AJ-820A February 2012

represent a cost effective method of automating semi-automatic and manual

steps. The work cells can be configured to perform a wide variety of inser-
tion and assembly tasks.

8.8 Temporary Masking Guidelines Temporary masking is used to pre-

vent solder from filling printed through-holes (PTHs) or vias, or to protect
surfaces that are not to be coated with solder. The guidelines are: IPC-820a-08-73
• Total surface area to be protected should be covered with maskant.
Figure 8-73 DIP Slide Magazines
• Any residues from the temporary adhesive should not reduce the cleanli-
ness or the solderability of the protected areas.
• Subsequent processes should not be adversely affected.

8.9 Surface Mount

8.9.1 Assembly Hierarchy

8.9.1.1 Sequence The selection of a particular method for mounting and connecting components in equipment depends
on:
• The type of component package involved, including the size, shape, and weight
• Equipment available for mounting and interconnecting
• The connection method used (soldered, welded, crimped, etc.)
• The reliability and maintainability (ease of replacement) required
• Cost considerations
Refer to IPC-D-279 for design for reliability (DfR) recommendations.

8.9.1.2 Attachment Issues When surface mounting, good solderability is essential for high assembly yield. The solder-
ability of the terminations should be tested on all new components upon receipt and after any prolonged storage (longer than
one month).
Bare silver-palladium terminations should be avoided because such terminations tend to lose solderability.
Component terminations should have a diffusion barrier layer (typically nickel or copper) under the solder to prevent the
leaching of silver from the underlying silver palladium termination. No silver should be detectable on the surface of the
component.
Conductors can be connected to a land at any portion of the land perimeter, but unfilled vias should not be located on or in
contact with the land. When reflow soldering is used, conductors should be covered with solder resist to minimize scaveng-
ing of solder away from the component termination. This is especially important when conductors connect to plated-through-
holes near the component termination land.

8.9.1.2.1 Through-Hole Mounting Chip components are normally leadless or have ribbon leads that are not appropriate
for through-hole assembly. SO devices are not designed for through-hole mounting.
In general, through-hole mounting does not apply to chip carriers, but some leaded chip carriers incorporate clip-type leads
designed for through-hole mounting. Leaded and leadless chip carriers can be interconnected to the printed board using
through-hole mounted sockets. There are some advantages to this approach, including simplified replacement of the chip in
the event of failure or design change, and reduced exposure of the component to damage during assembly and soldering.

8.9.1.2.2 Surface Mounting Surface mounting was originally developed for stripline and other high frequency applica-
tions where lead placement and discontinuities had to be strictly controlled.
Surface mounting consists of placing the component on the printed board or other suitable substrate, and making the nec-
essary electrical connection to the component on the same side of the board. The leads of surface mounted components do
not pass through the board. The specific connection technique to be used depends on several factors.
In general, leaded components are lap-soldered to the terminal areas, while leadless components are connected by solder
fillets between a component termination and the land area.

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For wave soldering, components should be placed to avoid

bridging or depleted solder on the trailing component (see
Direction of Travel
Figure 8-74).

8.9.1.2.3 Lead Forming Typical form for a leaded compo-

nent is illustrated in Figure 8-75. When forming, the leads Solder Wave
must be held close to the body to prevent damage to the seal. IPC-820a-08-74

Leaded components should be mounted with the body above Figure 8-74 No Bridging
the surface at least 0.25 mm, except when the part body is
sealed to the surface of the board with adhesive so that no
flux, moisture, or other contaminants can become entrapped.
Round axial-leaded parts need not be elevated, since the body
configuration permits thorough cleaning.
IPC-820a-08-75
Components should be mounted with leads all coplanar within
+0.05 mm to assure adequate solder filleting to each lead. This Figure 8-75 Lead Forming for Surface Mounting
can be measured by using the three longest non-co-linear
leads to define a plane (sit the part on a flat surface); all leads should be within +0.05 mm of the surface. It should be noted
that JEDEC standards do not contain such a stringent coplanarity requirement, so lead forming by the user may be required.
Solderability is of prime importance. All surfaces to be soldered should be verified as solderable through one of the solder-
ability test methods in J-STD-002.
The formed leads should be parallel and in contact with the lands on the mounting base without unplanned overhang. The
angle between the lead pad and parallel-mounting base should be less than 15°.

8.9.1.2.4 Lead Support Leads should be supported during forming to protect the lead-to-body seal.

8.9.1.2.5 Coined Leads Leads that are round in cross-section are usually coined to enhance mounting stability. Compo-
nents with axial leads of round cross section should be utilized for planar mounting only if the leads are coined or flattened
for positive seating.

8.9.1.2.6 Component Support Depending upon weight, components can be secured for soldering in the following ways:
• For light components, solder paste may hold the component in place.
• For heavier components, adhesive or mechanical means can be used.

8.9.1.2.7 Metallurgical Considerations Cleanliness and solderability of terminations on all components is of utmost
importance for both leadless and leaded components. Inspection, repair, and rework of soldered surface mount component
assemblies are generally more complex than for through-hole mounted components. Sockets for chip carriers require appro-
priate contact metallurgy to ensure a reliable electrical connection.
Pretinning enables evaluation of solderability characteristics prior to assembly. The additional solder volume may improve
shear strength of the solder connection.
Chip carriers with mold release on the leads may need to be cleaned with an appropriate solvent to ensure solderability.
Ball grid arrays should be chosen with a ball metallurgy that is compatible with the assembly solder (see IPC-7095).

8.9.1.2.8 Mechanical Considerations Leadless devices should not be used in applications with significant differences in
thermal expansion between the component and the printed board. The mismatch in coefficient of thermal expansion (CTE)
may be particularly significant with ceramic components, including leadless chip carriers (LCCs) and ceramic column grid
arrays (CCGAs). Guidance for design and process development for Ball Grid Arrays (BGAs) can be found in IPC-7095.
Thermal mismatch may also be especially problematical for components with bottom terminations only (see IPC-7093), such
as QFNs, Land Grid Arrays (LGAs), and components with thermal plane terminations (e.g., DPAKs). Spacing under these
components is small, leaving little compliance in the solder connection.
Leadless chip carriers can be modified with the addition of clip leads for surface mounting. Clip leads are available with or
without solder preforms in the attachment areas. The leads afford stress relief between the chip carrier and substrate (see
Figure 8-76).

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Good Adequate Insufficient

Solder Fillet Solder Fillet Solder Fillet

A
Line Parallel Void
to Chip Carrier
SECTIONS A-A

Lead Centered Lead Aligned Flush Lead Overhangs

on Chip Carrier to Chip Carrier Terminal Chip Carrier Terminal
Terminal and Good and Solder Fillet
Solder Fillet on One Edge Only

Preferred Acceptable Not Preferred

IPC-820a-08-76

Figure 8-76 Criteria for Lead Attachment to Leadless Type A (Leaded Type B)

Leads can be mechanically attached in strip form with tooling,

which ensures proper seating and alignment with the terminal 0.390
metallization. The leads can then be soldered to the chip car- 0.050
rier by a reflow method, or if the leads are supplied with sol- 0.027
0.060
der preforms, leads to the chip carrier can be soldered simul-
taneously with the attachment of the chip carrier to the
0.028 MAX 0.015
substrate. In the former case, all residues should be removed 0.050
by cleaning prior to the final mounting of the chip carrier.
Coplanarity of leads is critical to ensure that the lead ends
make adequate contact with substrate lands for reliable solder- 8 7 6 5 4 3 2 1
ing. Coplanarity should be kept to +0.05 mm. It is also neces-
sary to protect the leads from distortion prior to assembly. Top
Flatness of the substrate should also be controlled. View
When the decision is made to use through-hole components in 9 10 11 12 13 14 15 16
combination with surface-mount components, some of the
advantages of a totally surface mount assembly are compro-
mised. Through-hole components can be modified for surface
mounting, but modified components do not result in the space 0.200
savings that surface mount components provide.
0.040
0.150
8.9.1.2.9 Small Outline Devices Small outline (SO)
devices are usually supplied with leads preformed for surface
mounting. Lead configurations are illustrated in Figures 8-77
and 8-78. 0.012
0.010 0.008 MIN
0.240
8.9.1.2.10 Component Lead Preparation One method for
surface mounting both through-hole and surface mounted
components on the same board is to modify the through-hole SO-16
component leads so that they can be surface mounted and sol-
dered. (Inches Shown) IPC-820a-08-77

8.9.1.2.11 DIPs When only a few DIPs are involved on an Figure 8-77 SO-16 Package Drawings Typical Dimension
otherwise surface mounted assembly, the leads can be formed

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to resemble a SOIC package (see Figure 8-80). For production, machines are
available to cut and form IC leads into a ‘‘gull wing’’ configuration (see Fig-
ure 8-79).
Another method of modifying DIPs for surface mounting is by ‘‘butt’’ mount-
ing, which involves cutting the DIP leads to a shorter length and placing the
device on a land pattern to be soldered along with the other surface mounted
devices. ‘‘Butt’’ mounting is not allowed on Class 3 products.

8.9.1.2.12 SIPs SIP lead forming is shown in Figure 8-80. Care should be
taken to assure coplanarity of the reformed leads, especially if the assembly
is to be reflow soldered. Leads can be formed carefully by hand for low vol-
ume or prototypes. For production, machines are available to cut and form
IPC-820a-08-78
IC leads into SOIC-type configuration.
Figure 8-78 Typical SOT Packages
8.9.1.2.13 Surface Mount Connectors Surface mount connectors are
designed with compliant leads that are usually reflow-soldered to surface
lands. Although not as popular, alternate methods of attachment at the non-
separable interface include pressure and conductive epoxy. Connectors
designed for surface mount incorporate high temperature, dimensionally
stable materials. Examples of surface mount connectors are shown in Figures
8-81 through 8-84.
Connectors for surface mounted substrates differ from through mounted con-
nectors in the following ways: Dip, Through-Hole Mount

• The plastic insulator material must withstand the high temperatures (215 °C
and up) encountered during reflow solder processes.
• Leads are formed to make contact with the lands on the board. The more
intimate the contact between lead and land, the better.
• Leads should be plated to assure good solderability. Solderability can be
checked using simple tests described in J-STD-002.
• Connectors can include features for mechanical attachment to the board. Dip, Modified “SOIC”
Type Mount (Gull-Wing Lead)
This is especially desirable for longer connectors, or those that may be sub-
ject to high stresses during mating and unmating.
Alternative methods of surface mounting include the use of pressure contacts
to maintain electrical contact between the board and the separable interface.
Such applications may need board-stiffening structures to neutralize the
effect of ‘‘normal’’ forces.
An evolving technology is the use of conductive epoxies for surface mount-
Dip, Modified “BUTT”
ing. This method affords lower processing temperatures. Extra care should be Mount (“I” Lead)
taken with surface mount connectors to assure that the leads are not damaged IPC-820a-08-79
prior to placement on the board.
Figure 8-79 Modifying DIP for Surface
Flux or solder must not be allowed to wick up into the contacts. Some Mounting
manufacturers provide anti-wicking devices. If connectors are not mechani-
cally secured to the board, suitable fixturing should be provided to prevent
lifting during soldering. This is especially important with small, lightweight
connectors.

8.9.1.2.14 Surface Mount Sockets Instead of straight solder tails, which

are inserted into through-holes, the surface mount socket has flat ‘‘L’’ or ‘‘J’’
type leads. Figure 8-85 shows a section through a contact that can be used
with the type of socket in Figure 8-86 for surface mounting. This contact has IPC-820a-08-80
a long compliant lower leg, and mates with the land pattern shown in Figure
Figure 8-80 Gull-Wing Lead for SIP-Type
8-87. The two registration holes mate with corresponding projections on the
Component
socket.

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IPC-820a-08-81 IPC-820a-08-82

Figure 8-81 Surface Mount Receptacle Figure 8-82 Surface Mount Connector

IPC-820a-08-84

IPC-820a-08-83
Figure 8-84 Box-Contact Surface Mount Connector
Figure 8-83 D-Subminiature Surface Mount Connector

Cover or Hold-Down
Hold Down
Frames

Chip
Carrier

Retainer Screw
(Pressure Only)

Housing

Thruster
Clip

P/I Structure
0.035 REF

Plate
(Pressure Only)
Section Through Contact Cavity
IPC-820a-08-85 IPC-820a-08-86

Figure 8-85 Leadless Grid Array Socket Figure 8-86 Surface Mount Chip Carrier Socket

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Figure 8-88 shows an alternate contact configuration. At the

cost of reduced compliance, this contact has a shorter electri- HEAT
SINK HOLD
cal path, allows easier visual inspection of the solder joint, DOWN
and requires a different land pattern. SCREW

For sizes larger than the 68-position (1.27 mm centerline), the RETAINER CHIP
interaction of the contact force and cover force can distort the CARRIER
connector housing, which can strain the solder joint. This can CONTACT
be avoided by using four corner screws to engage a backup HOUSING
LAND
plate, which transfers forces from the cover to the backup PATTERN
plate.
A thruster clip is used to bias the leadless type A, B, or D chip
carrier into a zero reference position for good registration. The
hold-down has compliance to accommodate the thickness tol-
erance of the chip carrier (CC). It snaps into place and retains
the CC. An opening is provided to accommodate a heat sink.
P&I
The socket shown in Figure 8-86 can also be obtained with a DIELECTRIC STRUCTURE
SPACER
mechanical contact pressure interface with the printed board BACKUP
structure. The advantage of this type of socket is ease of PLATE IPC-820a-08-87

replacement in the field. The disadvantage is that a second Figure 8-87 High Speed Circuit Socket
mechanical interface is now in the circuit. Figure 8-89 shows
how the socket is mounted. Two alignment/locating pins in the
socket engage two mating holes on the printed board. The pins HOLD DOWN
SCREWS (4)
serve as registration and polarizing devices. A screw clamps
the socket to the structure by means of a backup plate and a COVER OR
HOLD DOWN
socket plate. The clamping action of the screw and plate
causes the lower half of the contact to deflect and generate the
contact force. This arrangement is suitable for 68-position
CHIP
(1.27 mm centerlines) and smaller. In the larger sizes, the CARRIER
contact force becomes too great for a single screw clamp.
Four corner clamping screws are used in the larger sizes.
The center screw holds the socket in place until the four cor-
ner screws are engaged. The center screw applies a preload to HOUSING
the bottom beams of the contact. After the chip carrier is THRUSTER
CLIP
inserted into the socket, the four corner screws secure the
cover. These corner screws are torqued until the full contact P&I
STRUCTURE
load is developed. The load is transferred to the backup plate,
reducing the load on the printed board and minimizing creep BACKUP
PLATE
under load.
IPC-820a-08-88
Due to the terminal/contact configuration, sockets have a ten-
Figure 8-88 Screw Down Cover
dency to sink more heat than other components. As a conse-
quence, they require a slightly longer dwell time. Due to
inability to adequately clean the terminal area, the user should CONTACT
avoid use of activated fluxes.
SOCKET PLATE
In wave soldering through-hole mounted sockets, the socket
must be mounted on the component side of the printed circuit
board or carrier. Care must be taken to ensure that flux or sol-
der does not wick up into the receptacle area of the socket.
STAND OFF
SCREW
LAND BACKUP PLATE ALIGNMENT/LOCATING PIN

IPC-820a-08-89

Figure 8-89 Pressure Mounted Socket

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8.9.1.3 Lead/Land Configuration after Placement

8.9.1.3.1 Small Outline Devices Small Outline (SO) Devices can be mounted with or without adhesive. If adhesive is
used to secure the SO package to the substrate, major considerations are:
• The adhesive must not contaminate the land area.
• The adhesive must be cured prior to soldering.

8.9.1.3.2 Lead Configuration for Surface Mounting of SIPs and DIPs The configuration remains the same after assem-
bly as before assembly. For reflow-soldering, the leads must be in contact with the solder paste, the fused tin/lead plating,
or the solder coating on the lands. Proper handling is required so components do not move prior to the reflow soldering
operation.

8.9.1.3.3 Lead/Land Configuration after Assembly for Chip Carriers Care must be taken to assure solderability of the
chip carrier terminations. Storage, handling, and placement must preserve good metallurgical and mechanical properties of
the termination up to and through placement of the device.

8.9.1.3.4 Mounted Component Configuration Assembled chip carriers can be constrained mechanically or with adhesive
prior to soldering, or they can be allowed to float. If adhesives are used, they should not absorb moisture, create a conduc-
tive leak path, or interfere with solder joint formation. Standoffs can be used to control solder joint configuration and/or pro-
vide required clearance for cleaning after soldering. Clearance of 0.25 mm minimum should be provided between the chip
carrier and the substrate to facilitate adequate cleaning.
In some solder paste applications, leadless components can be allowed to ‘‘float’’ because surface tension pulls the chip car-
rier into correct alignment with the land pattern. However, this depends upon the chip carrier size, positional tolerance, flat-
ness of leads, etc.
For leaded chip carriers having through-hole clip leads, adequate tooling should be used to assure that the leads mate with
holes in the substrate. Preforms can be used on either side, depending upon structures and orientation during reflow.

8.9.1.3.5 Surface Mount Connector Lead/Land Configurations after Assembly Surface-mount connector leads are not
reconfigurable after surface mounting. The position of component leads becomes more critical as the number of inputs/
outputs increase. Board hole tolerances and lead tolerances over the length of some of the larger connectors can cause inter-
ference problems when mounting. In such instances, mounting aids are required, and may be provided by the connector
manufacturer.
An important consideration with larger surface mounted connectors is the difference in thermal expansion between the con-
nector plastic and the printed board. Commonly used plastic materials have a Coefficient of Thermal Expansion (CTE) that
exceeds that of epoxy glass boards by at least 7 ppm/°C (17 ppm/°C for ceramic substrates). The mechanical connector
design must absorb this CTE difference to avoid solder joint failures during thermal cycling. Visual inspection of the
mounted connector leads is recommended before soldering so that individual leads can be repositioned.

8.9.1.3.6 Surface Mount Socket Component Preparation Lead forming is generally not performed on surface mount
sockets.

8.9.1.4 Chip Component Placement When design permits, chip components to be wave soldered should be oriented with
the longitudinal axis of the chip (a line passing from the center of one termination to the other) perpendicular to the direc-
tion of motion through the wave, so that the two terminations meet the wave at the same time. Chip components that pass
longitudinally through the wave can generate skips or insufficient solder joints on the following terminations. Adequate space
must be left between adjacent components and other board features to avoid solder bridging.

8.9.1.5 Mixed Technology Chip components are commonly assembled to boards along with through-hole components.
Frequently the chips are attached to the solder source side of the board with adhesives, and wave soldered to the lands at
the same time as the through board components. Chip components to be wave soldered must be qualified for immersion in
molten solder.
Alternatively, the chip components can be attached on the solder destination side of the board with solder paste (and some-
times with adhesive to guarantee mechanical attachment), and reflow soldered to the mounting lands. After reflow solder-
ing of the surface-mount components, the through-board mounted components are wave soldered.

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The wave soldering process should not reflow the surface mount connections on the top of the board. Higher pin count SO
devices are normally mounted on the component side of the substrate, while small SOT devices can be found on both sides.
The process sequence for mixed assembly using chip carriers varies depending on the other types components mounted on
both sides of the substrate, and the specific solder processes.
Where through-hole mounted components, discrete chips, and chip carriers are all mounted on the same side of the board,
the order of assembly must take into account the solder process to be used. As for class C-1 assemblies, if solder preforms
are utilized with through-hole mounted components, one of the solder operations might be eliminated.

8.9.1.5.1 Surface Mount Connector Mixed Technology These assemblies generally are wave soldered as the last attach-
ment step. Standard through-hole connectors can therefore be used for mixed assemblies. These connectors should be applied
after the reflow solder process, or must be compatible with the high temperatures seen during reflow soldering.

8.9.1.5.2 Surface Mount Socket Mixed Technology The assembly sequence is dictated by the soldering process. Sockets
are not intended for direct immersion in solder, and are therefore restricted to the solder destination side (component side)
for wave soldering. For solder reflow processes, the socket material must be compatible with reflow temperatures.
Sockets are being used increasingly for specialized applications, especially in mixed mounting situations. Considerations
unique to sockets include:
• Heights – Although low profile sockets are available, sockets (with their assembled devices) present a higher assembly
profile. Wave solder fixtures or tooling may be affected.
• Automatic Assembly – Designers should specify common sockets on high volume boards if possible.
• Land Patterns – Device insertion/extraction tools should be used, which require clearance around sockets.

8.9.2 Manual Assembly Techniques Because of the small size of most chip components, manual assembly is limited to
low volume production or to designs where only a small number of chip components are to be mounted on each board.
Chip components can be placed with tweezers or vacuum pickups, and manually soldered with a temperature controlled sol-
dering iron. Manually placed components can also be reflow soldered if the manual placement is properly located in the
assembly sequence.

8.9.2.1 Manual Assembly Vacuum pick-up devices may simplify the precise component placement required for satisfac-
tory soldering.
Boards designed for manual component installation need not follow the layout guidelines for automatic assembly. However,
space must be allowed for exposure to the solder wave (when applicable), test access, and rework.

8.9.2.1.1 Manual Assembly for Surface Mount Connectors Many connectors are inserted or placed manually. Assembly
can occur at the same time as other components, or as a separate operation, using care not to disturb previously assembled
parts.

8.9.2.1.2 Manual Assembly for Surface Mount Sockets Sockets are normally handled manually using special tools
designed for ease of alignment and insertion. On some sockets, including pressure fit sockets, a locating pin helps to cor-
rectly orient the part to the land pattern. Manual assembly, as always, offers a greater risk of damage.
When using these procedures with sockets, the major points to be addressed are:
• Board Loading – Always load from the component side, with lands and holes in view. Clinch diagonally opposing leads
on the solder side.
• Handling – Socket contact springs are susceptible to handling damage and contamination by finger oils and particulates.
Assembly using lint-free gloves may be appropriate. Handling the sockets with tools or by the insulator is also necessary.
• Storage – Leads are extremely susceptible to displacement. Remove sockets from the shipping container one at a time,
and assemble immediately to the board. Never accumulate/store unprotected sockets on the work bench.

8.9.3 Automated Assembly Techniques Most surface mounted components can be assembled using automated equip-
ment. Figure 8-90 illustrates component orientations that may simplify automated assembly by restricting table motions.

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IPC-AJ-820A February 2012

0.5 mm [0.020"] min.

0.9 mm [0.035"] min.

5.0 mm
[0.200"]

A.
3.0 mm [0.120"] min.

A.

3.0 mm
[0.120"]

B.

B.

C.
IPC-820a-08-90

Figure 8-90 Preferred Mounting Orientations

Chip components are well adapted to automated assembly lines. Most chip components are supplied in tape-and-reel pack-
aging to interface with automatic placement equipment. Automated placement equipment may also be used to place adhe-
sive dots and then place the chip component on the adhesive for a wave soldering process. When reflow soldering is used,
solder paste is screen printed before the parts are placed, and the paste is used to hold the chip components in place until
the solder is reflowed. Automated board handling facilitates precise and rapid movement of assemblies through the process.

8.9.3.1 Placement Automated placement for high volume, high density mounting of chip carriers provides benefits in
quality and productivity. Several manufacturers provide automatic placement equipment utilizing vacuum pickup and/or
self-centering tweezer grips.

8.9.3.2 Automated Assembly of Surface Mount Connectors Computer controlled equipment is available to stake indi-
vidual pins into backplanes. Pin lengths can be selected for staged mating of ground, power, and signal contacts.
Automated placement is possible for connectors where the true position tolerances and other key dimensions are compatible
with the board and automated placement system. Packaging should also be selected to simplify delivery of the connector to
the automated placement system.

8.9.3.3 Automated Assembly of Surface Mount Sockets Although most sockets and DIPs can be automatically loaded
with stick loaders, some do not lend themselves to automation. High board count with a large quantity of sockets might be
assembled economically by pick and place type equipment.

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9 SOLDERING

9.1 Introduction Soldering operations involve alloys having relatively low melting temperatures that are composed pri-
marily of tin and lead which are used to join metals having higher melting temperatures than the soldering alloys. The selec-
tion of the soldering process depends upon the type of components to be soldered and whether or not they will be used in
combinations of through-hole and surface mount types. However, no one soldering process is best for all soldering tasks.
Soldering is defined as a joining process with the use of heat and a metal with a melting temperature below that of the base
metals to be joined. Soldering is a practical technique for producing mechanically sound and electrically reliable intercon-
nections. Different soldering processes exist, suited for a variety of electronics assembly applications and technologies. In
general, the IPC standards do not identify or specify methods of soldering to be used because the method used normally has
no effect on the quality of the connection achieved. The exception to this is when there are specialized soldering processes,
(e.g., pin/paste-in-hole, intrusive soldering, etc.) that require the creation of special acceptance criteria other than as stated
in this document. The criteria should be based on design, process capability and performance requirements.
Typically, two solder alloy systems are found in the electronics industry: tin/lead and lead-free. Tin/lead solder alloys used
in electronics manufacturing include Sn60, Sn62 and Sn63. Lead-free solder alloys used in electronics manufacturing include
SAC 405, SAC 305, and Sn/Cu with element modifications. Tin/lead soldering processes typically produce a solder joint
that is smooth and shiny whereas lead-free soldering process can result in duller appearances and rough surfaces. However,
a solder joint’s appearance is a result of the soldering process thermal parameters (i.e., temperatures and heating/cooling
rates) influence on the solder joint microstructure. Either tin/lead or lead-free soldering process can produce a variety of sur-
face appearances.

9.1.1 The Process of Wetting The angle formed between the liquid and solid is called the dihedral angle. This angle is a
function of the surface tensions of the solder, the metal, and the interface between the solder and the metal.
Wetting, sometimes called tinning, is the pre-coating of a surface with solder, whether or not it contains tin. Wetting also
occurs much easier if the solder can alloy to the base material, such as soldering to a piece of copper. Once soldered, the
copper is silver in color, which is due to the solder wetting the copper. The tin in the solder wets the copper and creates a
film (the intermetallic layer). Lead does not alloy with copper, meaning it does not wet to it. It is the tin in the solder that
does the wetting.
The most important visual characteristic of solder joint quality is the wetting angle. Wetting is the free flow and spreading
of solder on a metallic surface to form an adherent bond. The ideal solder connection has a smooth, concave fillet, which
is complete around the connection. The acceptable solder connection is characterized by good wetting, evidenced by smooth
feathering of the fillet onto the connection elements, and by the formation of a small contact angle between the solder fillet
and the elements being joined. Contact angles of 90° or less are considered acceptable, although there can be instances where
contact angles in excess of 90° are acceptable.
In some solder connections, there will be a line of demarcation, or transition zone, where the applied solder blends with the
solder coating, plating, or other surface material. The line of demarcation is not an indication of a defect. If the contact angle
at the line is acceptable, the solder connection is considered acceptable. There are solder alloy compositions, lead or termi-
nal coatings, and PCB plating and solder processes that tend to produce dull, gray, or grainy solder connections and larger
wetting angles. High temperature solders typically produce dull solder connections. Large mass solder connections tend to
cool slowly and generally do not produce shiny solder connections. Solder connections with these attributes are acceptable.
The printed board metallization is typically copper that has been coated; therefore the bond will be made between the sol-
der and the copper.

9.1.2 Wetting and Solderability There are many variables involved in the soldering operation. Each variable has its
impact on the outcome of the operation; however, none has a greater impact on the success of the operation than the sol-
derability of the materials. Solderability may be defined as the ease with which a surface can be wetted by liquid solder
under a given set of conditions of flux and temperature. Solderability must be built into each lead or contact point of each
component and maintained throughout the soldering process. At the outset of the PCA design, the design engineer must
choose finishes for surfaces to be soldered so they are both solderable as received and able to maintain the solderability dur-
ing normal handling and storage at the facility. Good solderability must be planned early in the design cycle. Any solder-
ability problem, especially where component leads are involved, shortens the life of a solder joint. Poor solderability reduces
the effective soldered length of the joint and introduces stress concentration factors. Of additional concern is the increase in
manufacturing cycle time and costs for touchup.

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When solder bonds or ‘‘wets’’ to metals a metallurgical reaction takes place between the solder and the base metal. This
reaction creates a new metal alloy that is defined as the intermetallic. This intermetallic layer holds the solder connection
together.
9.1.3 Solder Solder is an alloy used for joining metals below 430 °C. It is generally accepted that the joining of metals
above 430 °C is referred to as brazing. Traditionally, the most common alloy was tin-lead while other alloys used include
tin-silver, tin-antimony, tin-zinc and indium-based solders. The melting point of the solder depends on the metals in the alloy
and the percentage of each. Solder alloys, which change directly from liquid to solid and solid to liquid without any inter-
mediate plastic states, are eutectic solders. Additional information related to solder and its composition can be found in
J-STD-006.
Relative to other metals, the strength of solder is low. The measured values of tensile and shear strength are not good indi-
cators of the actual strength of a solder connection. Strength value is lower during conditions of thermal cycling, which
occur during actual use. The stresses caused by thermal cycling and those built into the connection cause creep, which is a
slow plastic deformation of the solder. The cyclic plastic deformations of the solder result in fatiguing of the metal, which
may eventually result in the formation of cracks.
Many lead free solder alloys are available for use. Processing parameters used with these alloys is different than those used
for leaded solder. The primary difference between the visual appearances of the completed connections is the surface rough-
ness and wetting angles.
9.2 Solder Alloys

9.2.1 Structure of the Solder Bond There are five phases in the metallurgical structure of a solder connection. These are:
1. The base metal (e.g., the printed board conductor);
2. The zone of intermetallic bonding between base metal and solder;
3. The solder fillet;
4. The zone of intermetallic bonding; and
5. The base metal (e.g., the component lead wire).
The presence of a distinct whitish metallurgical phase, the intermetallic compound layer, is characteristic of the zone of
bonding between solders and solderable metals. See Figure 9-1.
The intermetallic compound layer differentiates the bond from
pure adhesion and offers a chemical character to the bond. For
example, if molten Sn-based solder is placed in contact with
clean Cu, the metallurgical reaction between Sn and Cu will
result in the formation of a layer of Cu6Sn5. This intermetallic
layer is the ‘‘glue’’ that holds the solder connection together.
In normal soldering, the thickness of the intermetallic layer is
on the order of 0.5 to 1.0 micrometer. It will rarely grow
thicker than this in a liquid-solid reaction. However, solid-
state metallurgical reactions can progress after solidification IPC-820a-09-01
of the solder connection, especially at elevated temperatures. Figure 9-1 Structure of a Solder Bond
In the Sn-Cu system, a second intermetallic compound can 1. Component Base Metal (Cu)
form between the Cu and the Cu6Sn5 layer. This is Cu3Sn, 2. Intermetallic Layer(s) of Base Metal [Cu6Sn5/Cu3Sn]
3. Intermetallic Layer(s) of Base Metal [Cu3Sn]
which has quite different (non-solderable) properties than the 4. Solder
Cu6Sn5 compound.
The layer offers an easy means for the metallographic assessment of the reliability of the bond. Further, the existence of a
distinct, preferably continuous and relatively thin intermetallic compound layer in the zone of bonding can be considered in
printed board assembly as a safe indicator that solid and reliable bonding between solder and the conducting surfaces has
taken place.
The intermetallic layer is generally brittle due to the covalent character of the bond, and if this layer becomes too thick, it
will significantly affect the connection’s mechanical strength, particularly its resistance to shock and tear.
Intermetallic compounds have much different physical and mechanical properties than the metals that make them up. Typi-
cal intermetallics are very brittle and have poor electrical conductivity. In addition, if they are exposed to air, they will pas-
sivate (oxidize) very rapidly.

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The reaction rate involved in intermetallic formation during solder wetting will vary considerably in different metal systems.
For example, the Sn-Ni intermetallic formation rate is slower than the Sn-Cu formation rate, while the Sn-Ag formation rates
are faster by orders of magnitude. Stability of the different intermetallic compounds also varies between the metal systems.
Growth of the intermetallic compound phase is caused by:
• Heat (an endothermic process).
• Dwell time - The time required for the bonding mechanism to occur is short. The thermal capacity of the connection, how-
ever, requires a certain minimum time for satisfactory bonding to occur.
• Solder alloy.
• Base metal.
• Cleanliness – The cleanliness of the surfaces influence the extent to which they are wetted by solder.

9.2.2 Intermetallic Growth Rates The rates of growth of the intermetallic compounds, which form between solder and
various substrates, can be estimated using the following equation (from IPC-HDBK-001).
Z02 = D0 t exp(-Q/RT)
Where:
Z02 = Intermetallic thickness after exposure at time t and Temperature T
D0 = Diffusion coefficient (m2/s)
t = Time of exposure in seconds
Q = Activation energy (J/mol)
R = Molar Gas Constant, 8.314 J/(mol K)
T = Temperature, °K
It should be noted that this formula is an approximation and that the following caveats apply:
• The initial growth rate is faster during the initial exposure; therefore, these estimates should not be used to estimate growth
over short aging times (yielding thickness (1.0 mm)).
• Intermetallic layers tend to vary in thickness over the contact area, and these equations estimate only the average thick-
ness.
• These estimates were developed from test data on Sn60Pb40 and Sn63Pb37 solders and should not be applied to other sol-
der alloys.
A summary of the diffusion constants (D0) and activation energies (Q) as well as the intermetallics formed, are given in
Table 9-1. Intermetallic compounds are listed in the order found when moving from the substrate towards the bulk of the
solder.
Table 9-1 Intermetallic Compounds and Diffusion Constants for Near-Eutectic SnPb Solders
System Intermetallic Compounds Diffusion Coefficient (m2/second) Activation Energy (J/mol)
Cu-Sn Cu6Sn5, Cu3Sn 1 x 106 80,000
7
Ni-Sn Ni3Sn2, Ni3Sn4 Ni3Sn7 2 x 10 68,000
Au-Sn AuSn, AuSn2 AuSn4 3 x 104 73,000
9
Fe-Sn FeSn FeSn2 2 x 10 62,000
Ag-Sn Ag3Sn 8 x 109 64,000

The specific intermetallic compound formed often depends on the temperature used. For example, the copper intermetallic
Cu6Sn5 forms at all temperatures and is relatively coarse grained, while Cu3Sn forms at temperatures >60 °C at the inter-
face of the Cu6Sn5 and the bulk solder1.

9.2.3 Factors Affecting Physical Properties of Solder Alloys Table 9-2 lists common physical property values for lead
free solders.

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Table 9-2 Common Physical Property Values for Lead-Free Solder

Physical Property (Alloy) Value
Surface Tension mN/m, SAC 305 in air 271 °C 431.00
Surface Tension mN/m, SAC 305 in N2 271 °C 493.00
Elongation % (Sn3.5Ag) 35.00
Elongation % (Sn0.7Cu) 12.00
Elongation % (Sn9Zn) 38.00
2
Density, g/cm (Sn3.5Ag) 7.50
Density, g/cm2 (Sn3.8 Ag0.7Cu) 7.50
Hardness H (Sn3.5Ag) 17.90
Hardness HV (Sn0.7Cu) 14.40
Hardness HV (Sn9Ag) 23.00
Electrical Resistivity µohms cm (Sn3.5Ag) 7.0
Electrical Resistivity µohms cm (Sn3.8 Ag0.7Cu) 13.00
Electrical Resistivity µohms cm (Sn0.7Cu) 10-15
Electrical Resistivity µohms cm (Sn9Zn) 10-15

a. Temperature Effects – As the operating temperature of solder alloys increases, the physical properties of these alloys
change. In addition, significant creeping occurs as temperature above 12 of its Solidus temperature in degrees k in its
phase diagram.
b. The effect of temperature is shown by the change in the tensile and shear strengths in Table 9-3 and Figure 9-2.
Table 9-3 Effect of Temperature on
Lap Shear Strength PSI (Pa)
Temperature (°C)
Solder Alloy -55 °C 25 °C 100 °C
Sn63Pb37 10,070 (69.4) 6,060 (41.8) 3,510 (24.2)
Sn60Pb40 10,320 (71.2) 6,090 (42) 3,260 (22.5)
Note: Testing done at 0.020 in/min. (0.5 mm/min.)

At common use temperatures, solders stress relieve them-

selves by creeping. This creeping causes the solder to plasti-
cally deform in response to an applied stress, thereby increas-
ing the cyclic creep-fatigue damage (see Figure 9-3).
The creep fatigue damage makes solders very susceptible to
fatigue failures and applied loads result in plastic deformation
of the connection. Over time, these cyclically occurring creep
fatigue damages accumulate leading to the failure of the sol-
der connection and this effect is illustrated in Figure 9-4 and
relates to applied strains cycles-to-failure.

9.2.4 Strain Rate Effects Solder properties are also sensi-

tive to strain rate, as shown in Figure 9-5. As strain rate
decreases, both tensile and shear strength decrease. This phe-
nomena is also related to the effect of stress relaxation, in that
the lower strain rates offer more time for the solder to stress
relieve and reduce the applied load.
A tremendous effort is currently underway within the electron-
ics industry to characterize and understand the temperature
IPC-820a-09-02
and strain effects on lead-free solder alloys. These efforts are
in their infancies and will take a number of years to complete Figure 9-2 Property Changes as a Function of
and undergo industry evaluation/scrutiny. However, it is gen- Temperature
eral industry tribal consensus that lead-free solder alloys are

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100
90
80
70

60
Remaining Stress (%)

50

40

30

IPC-820a-09-04

20 Figure 9-4 Cylindrical Deformation Leading to Joint

1h 1day 1wk Failure
70˚
1day 1wk 1mth
25˚

10
10 -6 10 -5 10 -4 10 -3

Time x exp ( )
7200 (s)
T IPC-820a-09-03

Figure 9-3 Stress Relaxation with Time and Temperature

very robust in low stress applications and less robust than tin/
lead solder alloys in high stress applications. Figure 9-6 illus- IPC-820a-09-05
trates the lead-free solder alloy stress interaction.
Figure 9-5 Property Change with Strain Rate

IPC-820a-09-06

Figure 9-6 Cyclic Shear Strain Range (Figure Courtesy of J.P. Clech)

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9.2.5 ‘‘Grain Size’’ Effects The ‘‘grain size’’ is actually a

measure of the mean free path between lead-rich islands.
‘‘Grain size,’’ or more properly, the size and distribution of the
α and β phases in Sn/Pb solders, is initially a function of
cooling rate with finer dispersions resulting from faster cool-
ing rates. Increasing grain size generally results in lower resis-
tance to fatigue.
It should be noted that these effects are generally not stable
over time. Experiments have demonstrated that Sn60Pb40 sol-
der morphology coarsens even during room temperature stor-
age, with grain sizes doubling in as little as 48 hours at room
temperature. It is also noted that this coarsening occurs more
rapidly with finer (e.g., quenched) microstructures than with
normally cooled (and coarser) microstructures. Grain coarsen-
ing is more rapid at elevated temperatures and under load. See Figure 9-7 Solder Joint Grain Size Structure (As Sol-
Figures 9-7, 9-8 and 9-9. dered) Courtesy of Nicholas Gollmer, ITT Automotive, USA

Figure 9-8 Solder Joint Grain Size Structure (After accelerated Cycling) Courtesy of
Nicholas Gollmer, ITT Automotive, USA

The microstructure of the lead-free solder alloys is very dif-

ferent from the microstructure of tin/lead solder alloys. Lead-
free solder alloy microstructure is typically composed of a tin
dendrite matrix with a distribution of both a silver/tin (Ag3Sn)
and a copper/tin (Cu6Sn5) intermetallic phases. The micro-
structure of lead-free solder alloys is significantly influence by
the solder alloy elemental constituents and the thermal profile
history in comparison to tin/lead solder alloys. Figure 9-10
illustrates the microstructure formation of a lead-free SAC
solder alloy schematic.
Lead-free solder alloy microstructure morphology changes are
not similar to those observed for tin/lead solder alloys. Figure
9-11 (left) illustrates a BGA SAC alloy solder joint with a
small amount of tin/lead solder contamination after reflow
Figure 9-9 Solder Joint Grain Size Structure (After Field
soldering and a BGA SAC alloy solder joint after being sub-
Failure) Courtesy of Nicholas Gollmer, ITT Automotive, USA
jected to -55 °C to +125 °C thermal cycle conditioning for

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IPC-820a-09-10

Figure 9-10 Schematic Diagrams of The Microstructure Formation in Lead-Free Paste - Lead-Free Solder Balls Under
Reflow (Figure Courtesy of Dr. Polina Snugovsky, Celestica)

250 cycles (right). The coarsened microstructure bands typically found in tin/lead solder joints is not observed. Lead-free
solder alloys also tend to have multiple solder joint crack paths in comparison to tin/lead solder alloys.

Figure 9-12 illustrates a tin/lead and lead-free surface mount resistor component after being subjected to -55 °C to +125 °C
thermal cycle conditioning for 2000 cycles.

Figure 9-11 A Lead-free BGA Microstructure; Left - As Reflowed, Right - After Thermal
Cycling (Courtesy of Rockwell Collins)

Figure 9-12 Solder Alloy Microstructure Differences: Left - Tin/lead Solder Alloy, Right:
SAC305 Solder Alloy (Courtesy of Rockwell Collins)

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9.2.6 Lead-Free Soldering: Process Considerations:

9.2.6.1 Background The use of conventional tin-lead (Sn/Pb) solder in circuit board manufacturing is under ever-
increasing political scrutiny due to environmental issues and new regulations concerning lead, such as the Waste Electrical
and Electronic Equipment (WEEE) and the Restriction on Hazardous Substances (RoHS) Directives in Europe. In response
to this, global commercial electronics manufacturers are initiating efforts to transition to lead-free assembly. Tin/lead solder-
ing processes and lead-free soldering process are similar in many respects; however, there are a number of significant dif-
ferences that need to be addressed to ensure product integrity.

9.2.6.2 Mixed Metallurgy Concerns The implementation of the European Restriction of Hazardous Substances (RoHS)
Directive has initiated an electronics industry materials evolution. Printed wiring board laminate suppliers, component fab-
ricators, and printed wiring assembly operations are engaged in numerous investigations to determine what lead-free (Pbfree)
material choices best fit their needs. The complexities of Pbfree soldering process implementation insures a transition period
in which Pbfree and tin/lead solder finishes will be present on printed wiring assemblies. The use of lead-free components
in a tin/lead soldering process is not a new topic for the electronics industry. Texas Instruments introduced a nickel/
palladium/gold component surface finish in 1990 and the electronics industry has successfully processed that finish with few
issues. The introduction of lead-free finishes such as tin, gold, silver and bismuth requires due diligence by the soldering
process engineer to insure that any potential incompatibilities, such as gold embrittlement, are addressed. Figure 9-13 illus-
trates the incompatibility of a lead free bismuth solder alloy with a tin/lead component finish. The reduction in solder joint
thermal cycle fatigue life is clearly evident for a tin/lead surface finish and a tin/copper surface finish with a SnAgCuBi sol-
der alloy.

IPC-820a-09-13

Figure 9-13 Lead-free Solder Alloy/Component Surface Finish Incompatibility Example (Reference: D. Hillman and R.
Wilcoxon, ‘‘JCAA/JG-PP Lead-free Solder Testing for High Reliability Applications: -55 °C to +125 °C Thermal Cycle
Testing,’’ SMTAI Conference, 2006)

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A second mixed metallurgy topic of concern is the soldering of area array component styles such as ball grid arrays (BGAs),
chip scale packages (CSPs), and flip chips (FCs). The contribution of the solder ball metallurgy to the overall solder joint
volume for an area array package is significantly greater than for standard surface mount package technologies. Combine
the solder ball contribution to the higher melting point of a lead-free solder alloy and the resulting solder joint has the
potential for the creation of a non-uniform solder joint microstructure or an incomplete solder joint reflow. Figure 9-14 illus-
trates these two effects.

Figure 9-14 left: Non-uniform Solder Joint Microstructure, right: Incomplete Solder Joint Reflow
(Head-on-Pillow) (Courtesy of Rockwell Collins)

Many printed circuit assembly manufacturers are faced with the dilemma of using a lead-free BGA component in a tin/lead
soldering process due to component sourcing constraints. A lead-free BGA can be reballed with tin/lead solder spheres but
this option results in added costs/cycle time which may be unacceptable. A second option is to utilize a lead free solder paste
and reflow profile. This may not be a good option if the assembly has not been designed for lead free soldering higher pro-
cessing temperatures. A third option that segments of the industry utilize is a ‘‘mixed alloy’’ or ‘‘hot tin/lead’’ profile. This
is a reflow profile that is on the high side of a tin/lead profile, and the low side of a lead free profile. A reflow profile is
created that does not damage the tin/lead solder paste due to the increased temperature and process time parameters. The
resulting solder joint has a uniform ‘‘mixed’’ microstructure with no segregation of the tin/lead paste alloy or the lead-free
solder sphere alloy. In many applications the ‘‘mixed’’ reflow profile provides adequate solder joint integrity for a given
product use environment. In some applications such as high performance products, the resulting uniform ‘‘mixed’’ micro-
structure does not provide acceptable solder joint integrity.

9.2.6.3 Temperature Compatibility Concerns The introduction of lead-free soldering processes has resulted in an
increase in soldering process temperatures. The using of SAC solder alloy family increases the soldering process tempera-
ture from 183 °C (Sn63Pb37 solder alloy) to 217 °C - a 34 °C increase without accounting for the thermal thieving effects
of the printed wiring laminate! A review of the component and laminate temperature compatibility is necessary. Laminate
materials will delaminate and warp if they cannot withstand the lead-free soldering process temperatures. A component’s
moisture sensitivity level (MSL) is a function of temperature and some component materials will degrade if exposed to
lead-free soldering processes. Figure 9-15 illustrates component incompatibility examples.

9.2.6.4 Soldering Process Equipment Compatibility Concerns The tin content of lead-free soldering alloys is signifi-
cantly greater than the traditional eutectic tin/lead solder alloys. Molten tin is an aggressive element in terms of the disso-
lution and erosion of other metals. The implementation of lead-free soldering processes requires a review of lead-free solder
alloy compatibility with any process equipment that will come in contact with the molten alloys. Wave solder pots and static
solder pots are two primary areas of concern. Figure 9-16 illustrates the attack of wave solder process equipment by a lead-
free solder alloy.

9.2.6.5 Copper Dissolution Concerns The discussion of molten lead-free solder alloy damage of soldering process
equipment also has lead-free soldering process implications. The dissolution of copper plating on surface mount pads and
in plated thru holes is significantly increased for lead-free soldering processes. Figure 9-17 shows the accumulative effect
of repeated soldering process exposures for various lead-free soldering alloys. The copper dissolution issue is of critical
importance for plated thru hole rework processes, especially those utilizing mini-wave or selective solder equipment.

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Figure 9-15 Component Degradation Due to Lead-free Soldering Process Incompatibility (Courtesy
of Rockwell Collins (left) and Bob Willis Electronic Presentation Service (right))

9.3 Gold Removal Gold is applied to component leads for

several reasons. It has a low contact resistance, can withstand
multiple insertion and removal cycles (when used on PCBs
and edge card connectors), and maintains solderability of
leads. It is often used in microwave applications and to with-
stand high temperature firings on ceramic components.

9.3.1 Reason for Gold Removal It is important that no sol-

der is present on any of the gold contacts in the critical con-
tact area. Any solder present can have a long term detrimental
effect on the gold plating.
The reliability of a solder connection can be degraded due to
the formation of a gold-tin intermetallic phase during solder-
ing. This gold-tin intermetallic layer is very brittle. Gold is
used by many electrical component manufacturers because of
its compatibility with component fabrication temperatures and
its ability to not oxidize, thus remaining solderable. Industry
investigations have shown that a gold-tin intermetallic phase
forms under normal soldering process parameters when the
Figure 9-16 Lead-free Solder Alloy Attack of Wave Solder
weight percent of gold in the solder connection reaches the
Equipment (Photograph Reference: ‘‘Pb-free Technology and
3-4% range. Prevention of gold embrittlement of solder con- the Necessary Changes in Soldering Process and Machine
nections is possible, provided the following two conditions are Technology,’’ H. Schlessmann, APEX 2002 Conference
met. Proceedings)

Figure 9-17 Copper Erosion Due to Lead-free Soldering Processes (Courtesy of Nihon Superior)

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1. There is enough solder volume present to allow dissolution of the gold so that the overall weight percentage of gold in
the solder connection is below the 3-4% range.
2. The soldering process parameters allow for the solder connection to stay molten (183 °C minimum) for a sufficient time
to allow the gold dissolution to reach equilibrium throughout the solder connection.
Industry testing has shown that the major source of gold embrittlement has been:
• Improper design of gold finishes for soldering, such that the gold finish is so thick (>2.5 microns) that gold dissolution
provides a high percentage of gold in the solder connection (>3-4%).
• The soldering process parameters used resulted in a segregated zone of gold-tin intermetallic phase, which cracked.
Prior to assembly, either tinning the gold finished components with dynamic solder wave or double-tinning can accomplish
avoidance of gold embrittlement2,3.
Gold is used as a PCB surface finish for planarity reasons and to provide a surface for wire bonding. In soldering to a
gold PCB surface finish, removal of the gold on the PCB is not necessary, provided the thickness of the gold PCB finish is
<2.5 microns, there is enough solder volume present to allow dissolution of the gold so that the overall weight percentage
of the gold in the solder connection is below the 3-4% range, and the soldering process parameters allow for the solder con-
nection to stay molten (183 °C minimum) for a sufficient time to allow the gold dissolution to reach equilibrium through-
out the solder connection.
There are a number of ways to enhance the life of a surface mount or any other connection:
• Reduce the CTE mismatch.
• Strain reduction by solder connection geometry.
• Use leaded components rather than leadless components.
• Selection of solder alloy.
These are listed in order of overall effectiveness and take into account producibility plus microstructure resulting from ther-
mal exposure. It should also be noted that processes such as vapor phase soldering tend to result in coarse microstructures.

9.4 Solder Purity Some materials that may be found in solder baths, some of the reasons they are there, and issues to be
aware of are outlined in 9.4.3 through 9.4.13. In small amounts, these materials are acceptable, but in higher levels, these
materials are considered contaminants. It is noted that the addition of a certain amount of bismuth, nickel, and copper to the
eutectic tin-lead solder alloy improves the wetting ability of the solder, whereas the addition of cadmium and zinc decreases
the wetting power of some solder alloys. Table 9-4 lists the allowable maximum limits of solder bath contamination for both
precondition and assembly soldering processes for both tin/lead and lead-free solder alloy system.

9.4.1 Reasons for Testing Testing of a solder bath is a preventative measure. It is easier to test the solder bath and cor-
rect the composition than to disposition non-conforming hardware.

9.4.2 Testing Frequency How often the solder is tested is up to the individual user. To establish a baseline, the solder pot
should be tested at a set frequency (i.e., monthly) established by the user, based on production levels, etc. Based on these
results and how much product is being assembled using the solder pot, the frequency of testing can then be increased or
decreased appropriately. Another option, once a baseline history has been established, is to replace the solder bath periodi-
cally rather than test and replenish it.

9.4.3 Copper Copper has negligible solubility in both tin and lead. Two intermetallic compounds: Cu3Sn and Cu6Sn5, are
formed between copper and tin. As the copper content of the molten solder increases, higher temperatures are needed to
overcome sluggishness and grittiness of the liquid metal. This increases the rate of solution of additional copper from the
surfaces to be soldered, rapidly degrading the soldering conditions.

9.4.4 Gold The solubility of gold in tin-lead at room temperature is negligible. Several intermetallic compounds are
formed between tin (Au6Sn, AuSn, AuSn2 and AuSn4) and lead (Au2 Pb and AuPb2). Unless the soldering is rapidly com-
pleted, the gold intermetallics will rise to the surface of the connection, causing an extremely dull gray, grainy surface.
Above 0.340% gold contamination in the solder pot may cause embrittlement of the solder connection.

9.4.5 Cadmium The solubility of cadmium in both tin and lead is negligible. There is an intermetallic phase at elevated
temperatures. Cadmium surfaces can deteriorate rapidly and cause spotty connections with poor adhesion (poor wetting).
Practically speaking, this problem does not often surface.

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Table 9-4 Maximum Limits of Solder Bath Contaminant

Preconditioning Maximum Assembly Maximum Preconditioning and Assembly
Contaminant Weight Contaminant Weight Maximum Contaminant
Percentage Limit Percentage Limit Weight Percentage Limit
Contaminant SnPb Alloys SnPb Alloys Lead-free Alloys1
Copper 0.75 0.3 1.13
Gold 0.5 0.2 0.2
Cadmium 0.01 0.005 0.005
Zinc 0.008 0.005 0.005
Aluminum 0.008 0.006 0.006
Antimony 0.5 0.5 0.2
Iron 0.02 0.02 0.02
Arsenic 0.03 0.03 0.03
Bismuth 0.25 0.25 0.25
Silver2 0.75 0.1 4.0
Nickel 0.025 0.01 0.05
Lead N/A N/A 0.1
Total of Copper,
Gold, Cadmium, Zinc, N/A 0.4 N/A
Aluminum Contaminates
Note 1: Maximum contamination limits are applicable for Sn96.5Ag3.0Cu0.5 (SAC305) per J-STD-006. Other Lead-free solder alloy contamination limits may
be used upon agreement between user and vendor.
Note 2: Not applicable for Pb36B: limits to be 1.75% to 2.25%.
Note 3: A maximum copper limit of 1.0% may be specified as agreed between user and supplier. Printed circuit assemblies that are characterized as thick and
thermally demanding may have potential plated through hole fill and/or solder joint defects due to the impact of copper on solder flow characteristics.

Cadmium is considered the plating of choice for resistance to salt-laden environments, but there are concerns with some of
the carcinogenic properties of the materials in the cadmium plating process. Cadmium wastes also constitute hazardous
materials with all of the attendant environmental regulations. The cadmium metal, itself, is not carcinogenic.
The most common source for cadmium metals being transferred to solder baths is the back shells on connectors, which are
often cadmium plated to increase environmental resistance.

9.4.6 Zinc Zinc has little solid solubility in tin and none in lead. No intermetallic compounds are formed with either tin
or lead. Zinc is detrimental to the solder alloy. As little as 0.005% of zinc is reported to cause a lack of adhesion, grittiness,
and susceptibility to grain boundary weakening.

9.4.7 Aluminum Aluminum does not have any solid solubility in either tin or lead at room temperatures, and only a small
amount of aluminum is dissolved in liquid tin at an elevated temperature. Aluminum in molten solder usually causes slug-
gishness in the melt, with a considerable amount of grittiness and lack of adhesion. Very little aluminum is used in elec-
tronic soldering because of the large galvanic potential present between aluminum and the tin-lead alloy (1.53V). Aluminum
surfaces that must be exposed to molten solder, even for a short time, should be hard anodized.

9.4.8 Antimony The solubility of antimony in tin at room temperature is about 6-8%, while little antimony is dissolved in
lead at room temperature. In some specifications, the presence of 0.2-0.5% antimony is mandatory to retard the transforma-
tion of tin into its gray state (tin-pest). Excessive antimony may cause a spread reduction in lead termination.

9.4.9 Iron Iron has some solubility in tin at elevated temperatures, forming two intermetallic compounds, FeSn and FeSn2,
manifesting themselves as needle-shaped crystals. The presence of iron in solder is detrimental and causes grittiness.

9.4.10 Arsenic No solubility of arsenic in either tin or lead has been observed. Two intermetallic compounds: Sn3As2 and
SnAs, appear as a long needle in the microstructure. Arsenic may cause poor wetting.

9.4.11 Bismuth At room temperature, bismuth has solubility in lead of up to 18% and solubility in tin of about 1%. A
concentration of less than 0.25% will cause a reduction in the working temperature. Bismuth causes a gray appearance.

9.4.12 Silver There is no solid solubility in either tin or lead, but tin and silver form the intermetallics Ag6Sn and Ag3Sn.
When silver content rises over 2.0%, the silver-tin intermetallics will segregate upon cooling.

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9.4.13 Nickel Nickel shows no solubility in either tin or lead. Intermetallics formed with tin are Ni3Sn, Ni3Sn2, and
Ni3Sn4.
9.4.14 Solder Pot Contamination Copper, iron, gold, and nickel may be found in solder baths as a result of lead clip-
pings, PCB pieces, or components falling into solder baths. In addition to these known causes of contamination, there are
other ways that contaminants can get into the solder pot, such as a piece of jewelry falling into the solder pot.
9.4.15 Effect of Contamination on Solder Process Contamination can have adverse effects on the soldering process. It
can result in brittle or grainy joints and lower the reliability of the product.
9.4.16 Resolving Contamination Problems If there are contamination problems, several options are available. By remov-
ing calculated amounts of contaminated solder and adding amounts of ‘‘virgin’’ solder to the solder bath, the relative level
of contamination will be reduced. This can also be done if all of the contaminants are within limits as a process control
measure.
If the user needs to add a large amount of ‘‘virgin’’ solder to the solder pot to bring the contamination limits to acceptable
limits, the user may want to consider replacing the entire solder bath.
Reducing pot temperature will allow some contaminants to come out of the solution. This can happen through solidification
of impurities or the creation of immiscible liquids. Either way provides relatively easy removal of the contamination.
In addition, if the solder bath is exceeding the limits, the possible cause of the contamination should be investigated:
• Has the solder bath been heavily used?
• Was there a one-time isolated incident that might explain the condition?
• If the contamination is above the acceptable levels, increasing the frequency of analysis should also be considered.
9.5 Tin Depletion A product of wave soldering is the formation of dross on the static portion of the wave solder pot. The
dross is primarily composed of solder, encapsulated by tin oxide. Additionally, a fine, black powder, which is found in tin
oxide, will often form near the impeller shaft. It should be noted that this formation of tin oxides gradually diminishes the
tin available in the solder and the tin level needs to be frequently monitored and the tin replaced.
Shown below are two formulas for determining the amount of tin to be added to a solder pot to adjust the tin content. Two
cases are shown, depending on whether or not the amount of solder in the pot remains constant or not.
Case 1: Solder pot mass constant.
(i.e., solder is removed and replaced by new solder/tin)

MP (Sn%D – Sn%C)
MT_A =
(Sn%A – Sn%C)

Case 2: Solder pot mass increases with added solder or tin.

MP (Sn%D – Sn%C)
MT_A =
(Sn%A – Sn%D)
Where:
MT_A = The mass of tin to be added to the solder pot.
MP = The mass of solder pot (prior to addition).
Sn%D = The tin content desired in the solder pot (% by weight).
Sn%C = The tin content currently in solder pot (% by weight).
Sn%A = The tin content in solder or tin bar used for addition (e.g., 100 for pure tin bar).
9.6 Soldering Processes A variety of soldering processes are utilized in the assembly of electronic products. Table 9-5
illustrates the various soldering processes and their characteristics comparison. The following chapter sections provide
in-depth details of the soldering processes.
9.7 Manual/Hand Soldering

9.7.1 Flux Application A material will only flow freely over a surface if in doing so, the total free energy of the system
is reduced. In the case of soldering, the free energy of a clean surface is higher than a dirty one, making it more likely to
promote solder flow.

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Table 9-5 Soldering Process Comparison

Convenient Volume
Atmosphere Minimization Double Sided Production
Soldering Techniques Technique Control of Time Process Control Assembly Capability
Vapor Phase (Belt) Yes Excellent Excellent Yes Excellent
Vapor Phase (Batch) Yes Good Excellent Yes Good
Belt, Conduction No Good Good Difficult Fair
Belt, Infrared Yes Poor Fair Yes Good
Belt, Convection Yes Good Fair Yes Good
Wave, Conventional No Excellent Excellent Yes Excellent
Wave, Dual or Bubble No Excellent Excellent Yes Excellent
Hot Air/Hot Gas1 No Poor Fair Difficult Poor
1
Soldering Iron Style Tools No Poor Poor Yes Poor
Laser Possible Excellent Good Yes Very Poor
Hot Plate No Poor Poor Difficult Poor
Selective Soldering Yes Good Excellent Yes Good
Note 1: Soldering iron style tools and the hot gas machines are used primarily for repair and replacement operations.

The major purposes of a flux are:

• Chemical: Reduces the oxides from the surface to be soldered and protects this surface (by covering it) from re-oxidation.
• Thermal: Assists in heat transfer from the heat source to the item being soldered (especially critical for hand and pulse
soldering).
• Physical: Transports the oxides and other reaction products away from the area being soldered.
In use, fluxes have two general criteria:
• Flux activity: The ability of the flux to reduce oxides and protect the surfaces from re-oxidizing.
• Flux corrosivity: The impact of the flux residues on the long-term reliability of the assembly or device being soldered.
These two criteria typically oppose one another, as active fluxes tend to be highly corrosive, and fluxes that are not corro-
sive over the long term are also generally not very active in the short term. Obviously, one method of overcoming this prob-
lem is to remove the flux residue using some cleaning method. There is always some potential for residue remaining (due
to operator error or inadequate processing); therefore, extremely active fluxes are rarely used in electronics.
For the fluxes to be useful, it is necessary that these materials be evaluated for corrosivity and insulation resistance of the
residue when exposed to life cycle type environments. It has been noted that in many cases, ‘‘No Clean’’ fluxes are not
compatible with cleaning attempts or even other ‘‘No Clean’’ fluxes1. The impact of materials used in subsequent processes
(fluxes, solvents, and conformal coatings) needs to be evaluated in combination with the flux and soldering process under
evaluation.
The practice of adding liquid flux as a soldering aid should be used with great caution. Liquid flux tends to spread to other
areas of the assembly and may not reach full activation temperature. The result may be electrical leakage, metal migration,
or corrosion.
9.8 Solder Application Solder wire is typically used for hand soldering. The type, form, and weight percent of flux in the
wire identify solder wire. Solder preforms are generally either solder wire or solder sheets formed to a specific shape (typi-
cally a toroid or washer) for use in reflow soldering (oven, vapor phase, or IR) of PTH devices. Preforms may contain flux
but are typically either flux-free or coated with a mild rosin flux, used both for soldering and to prevent oxidation on the
preform surface.
9.9 Hand Soldering The use of an operator in the soldering process increases the variability of the process. A well-trained
soldering operator can produce consistent and reliable quality hardware. The process engineer can provide support by mak-
ing a careful hand soldering tool selection that is properly matched to the connections being soldered. A list of generic hand
soldering tools is listed below in Table 9-6.
Regardless of the soldering iron type, successful hand soldering depends on the following conditions:
• Good thermal contact between the soldering iron tip and the item to be soldered. This includes ensuring that the tip is clean
and free of oxides and creating a thermal ‘‘bridge’’ of molten solder from the tinned tip of the soldering iron to the item
to be soldered.

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Table 9-6 Hand Soldering Tools

Soldering Iron
Iron tip selection
Solder (various sizes)
Flux
Sponge\water
Alcohol
Acid Brush
Desoldering tools (manual extraction, Vacuum extraction, wicking)
Light duty Lamp/Hi Intensity quartz Halogen Lamps (single illuminator)
Circuit card holder/vise
Microscope

• Allow the flux (typically from cored solder wire or liquid flux) to flow over the area to be soldered in advance of the mol-
ten solder. The flux will both increase the ability of the surface to accept solder and act as a thermal transfer medium to
aid in heating.
• Apply adequate solder to form an acceptable solder connection.
• Maintain thermal contact until good solder spread is obtained (but do not stay too long).
• Remove the soldering iron but do not disturb parts until solder solidification is complete.

9.9.1 Heat Transfer Considerations

9.9.1.1 Tip Working Surface All of the heat provided to the connection by the iron must pass through the tip. The tip
with the largest possible contact area relative to the size of the connection area should be selected. A proper solder heat
bridge will maximize the heat transfer and reduce dwell time on the connection as it is being formed. To maintain the effec-
tiveness and life of the soldering iron tip, users should keep the tip tinned at all times. When a hand piece with a tinnable
tip is returned to the holder, it should be tinned to protect the working surface. Tips with damaged plating surfaces will flush
copper into the connection and leave a hollow tip once the copper has been depleted. Flux residues and plastic wire insula-
tion residues should not be allowed to accumulate on the tip. If the tip becomes excessively oxidized or contaminated, it
will not transfer heat well. Oxidized and contaminated tips should be replaced or reconditioned in accordance with the tip
manufacturer’s instructions.

9.9.1.2 Board Design The number of interconnects to a PTH will affect the amount of heat drawn from the iron by the
board. As the number of interconnects increases, the heat draw from the tip will greatly increase.
The use of hot plates to preheat the PCB during hand soldering operations is an effective method that is successful in high
thermal load situations. This technique is most effective when no parts are mounted on the solder (secondary) side of the
assembly. Contact between only the laminate and the heater plate is minimally effective for heating the inner layers of the
board. The time of contact and heater operating temperature must be carefully controlled to limit the potential for part or
board damage. The assembly contours (i.e., parts mounted on the bottom surface) will affect the heat transfer between the
heater plate and the assembly.
For the rework of surface mounted assemblies, some equipment suppliers have developed hot air reflow systems for heat-
ing of assemblies. After the region of the assembly is heated, hand soldering operations should be able to be adequately per-
formed.

9.9.1.3 Pad Size and Hole Diameter This is a copper quantity issue. As such, a small pad and a narrow barrel plated with
a thick layer of copper may draw more heat than expected.

9.9.1.4 Boards with Internal Heat Sinks Heavy internal heat sinks with PTH feed-throughs will draw large quantities of
heat from the soldering area. Any connection with large metal mass will require large quantities of heat for soldering.

9.9.1.5 Durability Both the soldering iron station and the tips need to be evaluated for durability. For example, as the tip
surface oxidizes or the plating wears, the ability of the tip to transfer heat during soldering is reduced. If tip life is limited,
the cost of replacement tips should be factored in at the time of soldering iron purchase. It is important to understand which
parts need regular maintenance and to have replacement parts available.

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9.9.1.6 Digital Read-Out The use of a digital read-out for display of soldering tip temperature is frequently misunder-
stood. Although digital displays reflect the temperature of the temperature sensor, they may not accurately reflect the tip
temperature. The indicated temperature can be extrapolated or related to the tip temperature.

9.10 Temperature Control - Thermal Considerations for Components and Boards

9.10.1 Heat Sinks Heat sinks are typically used to prevent the heat from damaging the component during the soldering
operation. They can range from simple alligator types of clips to reverse tweezers, which are attached to the lead between
the component body and the area where the solder connection is made.

9.11 Tip Selection

9.11.1 Tip Materials The primary material consideration in tip selection relates to the plating material. For most electri-
cal and electronic soldering applications, an economically priced iron-plated tip is used. As long as the tip is maintained
properly, it will perform adequately in most applications.
Proper tip maintenance generally involves keeping the tip cleaned and tinned during soldering operations. Tip oxidation will
become a problem if the tip is not maintained, cleaned, and tinned. Soldering operations involving low tin solders (less than
10% tin) are generally best performed using iron-plated tips. In addition to these general-purpose tip materials, there are
other specialty materials available. Ceramic-coated tips should be used when soldering is performed on adjacent, electrically
active terminals. Copper tips with a stainless steel bonded surface are also available. Stainless tips usually have longer
working lives, do not freeze onto the iron, and are generally easier to change, but suffer from poor thermal performance.

9.11.2 Soldering Iron Tip Selection Soldering iron manufacturers frequently have a range of tips available. Soldering iron
tips are generally made of a copper, tellurium copper, or lead copper because copper is both economical and a good mate-
rial for heat transfer. This base material is then coated or plated to reduce oxidation and tip solubility. The material compo-
sition and shape of the tip should be considered during tip selection. The goal is to select a tip that will rapidly transfer heat
without reacting to the solder.

9.11.3 Shape/Physical Configuration

9.11.3.1 Tip Selection Criteria There are three basic parameters to consider in selecting the soldering iron tip: length,
diameter and shape. For maximum iron operating efficiency, the shortest tip that meets the application requirements should
be used. A general rule is: As the tip length grows, the working temperature of the tip reduces. The tip diameter affects the
heat transfer of the tip and is directly related to the soldering iron life and maintenance requirements.

9.11.3.2 Tip Shape and Style The shape of the tip should be selected to minimize the soldering operation dwell time. For
the shortest dwell, use the broadest point with largest area of contact between tinned surface and terminal. Conical tips are
most effective when soldering eyelets. Full chisel tips are best for soldering terminals, leads, and wires. Radius and grooved
tips are best for soldering (gold cup) pin connectors.

9.11.3.3 Tip Length The length of the tip affects the recovery and response time of the iron. The length of the heat path
from the heating element to the working area of the tip affects the response time of the iron, with a shorter heat path pro-
viding quicker response.

9.11.3.4 Contact Area All of the heat provided to the connection by the iron must pass through the tip contact area. The
largest practical tip contact area will keep the dwell time to a minimum.

9.11.3.5 Heat Capacity and Mass When a soldering iron tip is placed on a connection, the temperature of the two sides
of the connection will eventually equalize. The higher the temperature difference between the connection and the tip, the
faster the thermal transfer will be from the tip to the connection. To minimize dwell time, the tip temperature needs to be
maintained well above solder melt temperature to ensure fast transfer of thermal energy into the connection.
Raising the initial temperature of the iron high enough to withstand the tip temperature drop and still maintain a good trans-
fer rate can cause thermal damage that does not occur at lower temperatures. To allow soldering at lower temperatures, the
thermal carrying capacity of the tip is increased by increasing its overall mass, causing the percentage of thermal energy

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being drawn from the tip by the connection to increase. This additional thermal rising reduces the temperature drop of the
tip and keeps the temperature difference between it and the connection higher, maximizing rapid heat transfer.
As heater technology has improved, tip mass has come down to improve thermal transfer performance. A larger thermal
mass, while able to store more energy, slows down the throughput of energy directly from the heater to the connection. With
high performance heaters, the temperature difference between the connection and tip can be maintained by using the tip as
a rapid transfer medium rather than a thermal storage medium. High mass tips are a negative factor in this environment.

9.11.4 Tip Maintenance To maintain the effectiveness and life of the soldering iron tip, users should keep the tip tinned
at all times. Excess solder should be allowed to sit on the iron tip while the iron is idling in the holder. Flux residues and
plastic wire insulation residues should not be allowed to accumulate on the tip. If the tip becomes excessively oxidized or
contaminated, it will not transfer heat well. Oxidized and contaminated tips should be replaced or reconditioned in accor-
dance with the tip manufacturer’s instructions.
Figure 9-18 illustrates the damage caused by poor care of a soldering iron tip in a lead-free soldering process.

Figure 9-18 Lead-free Soldering Iron Tip Damage (Courtesy of Hakko)

9.11.5 Soldering Iron Station Maintenance When the tip can be removed from the heating element, oxidation can result
on the heater/tip connection surface, causing the tip to freeze. Each shift before the soldering iron is turned on, the tip should
be physically removed or loosened from the iron. This will prevent oxidation build-up, which, over time, can cause the tip
to freeze into the iron. Follow the iron manufacturer’s maintenance instructions.

9.11.6 Extending Tip Life There are many variables that affect tip life. The tip shape selected, pressure used while sol-
dering, soldering temperature, and flux used all have an impact on defining tip life. This section details some of the more
common tip failure mechanisms and gives specific recommendations for extending tip life.
Cracking:
• Select the largest tip possible for the lead being soldered.
• Do not apply excessive pressure when soldering. To maximize heat transfer, tin the tip.
• Take care not to bang the solder tip against the metal work stand when inserting the tool.
• Do not use tips as a screwdriver or a prying tool.

Wear:
• Select the largest tip possible for the lead being soldered. Blunter tips carry more plating.
• Do not apply excessive pressure during soldering.
• Do not ‘‘scrub’’ the lead. To maximize heat transfer, tin the tip and create a solder bridge.
• Do not drag the tip. If the user must drag solder, be aware that it will shorten tip life.
• Flux cored wire solder or paste should be used for tip tinning.
• Use a clean, wet sponge to clean the tip. Do not use a dry sponge, rag, or any abrasive agent or material.

Corrosion:
• Select lower activity fluxes when possible. RMA flux is best for maximum tip life.

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• Use only sulfur-free sponges for cleaning tips.

• Use only clean sponges. Discard dirty sponges.
• Use RMA solder to tin tips during storage. Do not use aqueous or high activity flux solders.
Dewetting:
• Use the lowest possible temperature when soldering. Low temperatures reduce oxidation.
• Keep tips tinned when in use and during storage. This keeps air from the tip.
• Use a flux with suitable activity during soldering.
• Use only clean sponges.
• Use deionized water to wet the sponges.
• Do not leave the iron on idle for long periods of time.
No Clean Solders:
• Use the lowest possible temperature. Low temperature reduces thermal oxidation, solvent volatilization, and
polymerization.
• Periodically use RMA wire solder or solder paste to tin the tip.

Proper tip maintenance generally involves keeping the tip cleaned and tinned during soldering operations. Tip oxidation will
become a problem if the tip is not maintained, cleaned, and tinned. Soldering operations involving low tin solders (less than
10% tin) are generally best performed using iron-plated tips. In addition to these general-purpose tip materials, there are
other specialty materials available. Ceramic-coated tips are used when soldering is performed on adjacent, electrically active
terminals. Copper tips with a stainless steel bonded surface are also available. Stainless tips usually have longer working
lives, do not freeze onto the iron, and are generally easier to change, but suffer from poor thermal performance.

9.12 Hand Soldering-Soldering Tools and Equipment Tools and equipment must be selected and maintained in such a
way that they do not impart physical or electrical damage to parts or assemblies. Equipment used for soldering must pro-
vide temperature control and isolation from EOS or ESD. The following sections cover hand soldering tools and equipment.
a. Soldering Tools and Equipment – A hand soldering tool can be defined by reducing it to its simplest terms: a heating
source and a soldering tip. The heating source (in this case, an element) provides heat to the tip, and the tip transfers
heat from the element to the work piece being soldered. Additional control is provided by sensor technology, which
automates the ability of the tool to control temperature.
b. Thermal Profile of the Hand Soldering Process – Figure 9-19 shows the variation in tip temperature during a typical
soldering sequence. This profile could be for either a constant output iron or for a temperature controlled iron. The dif-
ference in temperature between the lowest temperature during soldering and recovered temperature (the highest tempera-
ture after soldering is completed) is known as the working range. The goal of optimal soldering tool selection is to match
the working range of the soldering tool to the thermal demands of the work piece.

IPC-820a-09-19

Figure 9-19 Thermal Profile of a Soldering Iron Tip

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c. Constant Output Soldering Irons – This type of soldering iron is typically used in the soldering of connections to chas-
sis, RF shields, transformers, and other high thermal mass applications where large quantities of heat are required. Con-
stant output tools provide heat from a fixed resistance element. The temperature delivered from these tools cannot be
varied without external controls. Delivered temperature will vary with wattage and inherent design of the soldering tool.
The use of an externally mounted rheostat will allow proportional power control, which can provide limited ability to
control temperature. The temperature provided from these tools is greatly impacted by changes in line voltage.
d. Temperature Controlled Soldering Irons – True temperature control provides a stable idle temperature to a tight toler-
ance (current guideline of the Standard is ± 5 °C) and provides the ability to respond promptly to changes in heat demand
of soldering load. Examine the original components of a constant output tool. The difference between it and a
temperature-controlled tool is the inclusion of a sensor. The function of a sensor is to monitor the temperature of the tip
and determine when the task requires additional heat. The sensor technology varies widely from a thermocouple, to a
microprocessor, to a skin effect heating element, and is unique to the specific tool design. Critical features of a
temperature-controlled soldering tool include stability of temperature at idle, maximum sensitivity and thermal response
of element, low tip resistance to ground, no risk of EOS/ESD damage to electronics, and fast sensor response.
e. Selection of Hand Soldering Tools/Materials – Some performance variables that should be considered when selecting
a soldering iron include temperature, heat delivery, tip size and shape, recovery time, ease of use, and ease of mainte-
nance. When selecting a soldering iron, one should evaluate how well the iron will perform specific tasks. IPC-TM-650,
Method 2.4.37.2, can be used to evaluate hand soldering tool performance as it relates to heavy loads. This method pro-
vides a standard technique and a coupon for comparatively measuring how long it takes a soldering iron to reflow the
solder coating on a 3.2 mm thick copper coupon. It has also been useful at discriminating performance levels of vari-
ous soldering tools.
Soldering guns must not be used in applications where there is a risk of EOS/ESD damage to electronics. The transformer
in a soldering gun creates a magnetic field, which can damage static-sensitive components (integrated circuits, processors,
hybrids, etc.).

9.13 Terminal Soldering

9.13.1 Flared Flange Hardware

9.13.2 Shank Discontinuities Discontinuities in the shank can be perforations, splits, cracks, or other conditions that
allow liquid processing materials such as flux and cleaning solvents to enter the space between the terminal shank and the
mounting hole. Circumferential cracks or splits are those that run cross-sectional to the shank vertical axis. When disconti-
nuities are present and processing fluids are allowed to enter the mounting hole, the subsequent soldering process may result
in entrapment, blow holes, or other defects. Circumferential cracks in shanks can propagate into a complete separation.

9.13.3 Flared Flange Angles Flared flange angle is the distortion of the straight terminal shanks outward used to hold/
retain the terminal to the PCB prior to soldering. The mechanical fit of the terminal after flaring should be tight, such that
the terminal does not tilt, but is loose enough to be hand rotated. The flare is for mechanical retention prior to and during
the soldering operation. If the flare is too tight, solder will not flow upwards into the mounting hole and may result in lami-
nate damage because of thermal expansion during the soldering process. If the flare is too loose, the terminal could tilt dur-
ing soldering. The terminal swaging tool should be adjusted to produce a flare within the specification requirements. It is
difficult to inspect for the appropriate flared angle and, as such, the tooling must be controlled to ensure that consistent
forming of the flare is accomplished.

9.13.4 Terminal Mounting

9.13.4.1 Electrical Terminals requiring electrical connection to the PCB are normally mounted using a flared flange in
non-interfacial PTHs with active circuitry on the flared side of the PCB. Since there is a possibility that using flared termi-
nals in plated-through holes may break the plating in the hole and cause electrical discontinuity during thermal cycling,
interfacial connections are discouraged. The flared flange is used in lieu of a rolled flange to prevent trapping of fluxes and/or
cleaning solutions in the rolled area during soldering/cleaning processes.
Rolling the flange against bare board laminate should be used if:
• The hole is not plated through.

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• The connecting circuitry is on the side opposite the termination.

• The rolled area does not get soldered or come in contact with solder/fluxes.

9.13.5 General Requirements

9.13.5.1 Insulation Clearance Insulation clearance is the distance from the trimmed insulation on the wire to the solder
fillet in the solder connection.
Insulation, which interferes with the formation of the solder connection, can weaken the connection or hide defects from
visual detection. Clearances that are too large can expose bare wire, which could pose a shorting problem between two dif-
ferent electrical potentials. The combination of an improperly tinned wire and excessive insulation clearance will most likely
result in a birdcaged wire. The wire should be stripped and tinned long enough to be wrapped around (or through) the
attaching terminal, such that, when trimmed, the insulation neither touches the terminal, nor is further than the maximum
distance allowed away from the terminal.

9.13.5.2 Service Loops Service loops are the extra length in the wire provided during installation of the wire to termi-
nals; therefore, the wire is longer than required to reach the attaching terminal. When repairs are required in the field (i.e.,
the removal of the attached wire) enough wire should be present to allow the service technician to cut, re-strip, and reattach
the wire following the repair. The wire is usually precut to a prescribed length prior to assembly, per assembly instructions.

9.13.5.3 Stress Relief Stress relief for wires and components is the gradual bend of the attaching wire/lead to the termi-
nal post or solder connection. The gradual bend of the wire as it attaches to the terminal post or solder connection allevi-
ates the stress to the component seal and solder connection. During heating and cooling cycles, either by electrical operation
or environments the electronics must operate in, the components expand and contract, exerting mechanical stress on the
components and solder connections. Ensure that the attached wire/lead has a gradual bend before soldering the connection
when installing wires or components. The bend should never be made after soldering.

9.13.5.4 Orientation of Wire Wrap When wrapping wires around (or

through) terminal posts/slots, make sure that the wire is oriented in the same
direction as the mechanical wrap to the post. The orientation of the wire as
it enters the terminal should be continuous with the wrapping direction of the
wire around the terminal, as shown in Figure 9-20. When wrapped in this
manner, the wire exerts no stress to the solder connection as shown. When
wrapped improperly, the wire stress can ‘‘peel’’ the wire away from the ter-
minal as shown in Figure 9-21.
IPC-820a-09-20
The largest wire should be placed on the base of the terminal with subse-
quent wires added in descending size order. Wires should rest on the base of Figure 9-20 Properly Wrapped Wires
the terminal or previously attached wire.

9.14 Soldering To Terminals

9.14.1 Turret and Hook Terminals Mechanical securing of the wires pre-
vents movement during the soldering and cooling phases of the connection.
The amount of wrap (180° to full) determines the strength of the finished
solder joint. Overlapping serves no purpose and takes up more space, leav-
ing less room for additional wire attachments. Leaving enough wire to pro-
vide a service loop allows for detachment and reattachment (including
IPC-820a-09-21
re-stripping) of the wire ends on the equipment by service technicians in the
field. The wire/lead should be held firmly against the terminal while the Figure 9-21 Soldering To Terminals
wire/lead is wrapped around the terminal shank using an appropriate tool.
The lead end is then trimmed off to the desired length using lead cutters. Pliers are then used to crimp the lead end to the
terminal shaft and position the wire to the flange base (or previously installed wire wrap).

9.14.2 Bifurcated, Pierced or Perforated Terminals The solder connection requirements for leads and wires wrapped to
terminals should exhibit the same wetting characteristics referenced throughout this handbook. The combination of the wrap
requirements and the solder connection requirements referenced herein will ensure a reliable electrical solder connection.

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For bifurcated, pierced or perforated terminals with side route connections the minimum solder fillet should be 100% of the
90° wrap or straight through connection.
The minimal mechanical interface available with side route connections on bifurcated, pierced and perforated terminals
makes it especially important to have the maximum possible solder fillet. Wires or leads that pass straight through bifur-
cated terminals provide only limited mechanical interface and the maximum solder fillet possible is necessary.

9.14.3 Cup and Hollow Cylindrical Terminal Soldering The integrity of

the solder connection is determined by the appropriate installation of the wire
into the terminal cup. A full depth insertion gives the maximum amount of
surface for both the wire and the cup to form a strong solder joint. Wire
strand deformation or removal weakens the wire and may result in a less
reliable solder connection. After soldering, the connection should be
adequately cleaned (see Figure 9-22).
A typical process for soldering wires into cups and hollow cylindrical termi-
nals is as follows.
NOTE: Gold-plated cups require gold removal if the gold thickness is
≥2.5 micrometers. You can do this by filling the cup with solder and wicking
IPC-820a-09-22
it out.
Figure 9-22 Acceptable Soldered Cup
1. Insert a predetermined number of cut slugs of flux-cored solder wire in the
cup. Fill the cup with sufficient solder to ensure solder will not overflow
when the user inserts the conductor.
2. Hold the cup at approximately a 45° angle to prevent entrapment of gases and flux.
3. Using a soldering iron or resistance-soldering unit, apply heat to the side of the cup until reaching the flow temperature
of the solder.
4. If required, place insulation tubing on the wire and slide it back out of the way.
5. Place the stripped and tinned wire in the cup, bottoming the wire in the cup. Maintain heat until it forms a good fillet to
the cup and wire. Do not heat longer than necessary to form an acceptable connection. Excessive heat can cause exces-
sive wicking under the wire insulation. ‘‘Burp’’ the connection by moving the wire toward the operator and seating it
against back wall of cup. Ensure that the wire does not move while the solder is solidifying.
The solder fillet measurement (0%) should begin at the ‘‘lip’’ of the solder cup and not at the true ‘‘bottom’’ of the solder
cup as the bottom of the solder cup is not a visually inspectable location.
To provide the most mechanical strength and best solder connection characteristics, single or multiple wires inserted into a
cup type terminal should be positioned against the back wall of the terminal whenever possible. The preferred solder con-
nection includes a solder fillet from the wall of the terminal to the wire that rises to 50% or more of the wire diameter. The
requirement for 75% fill of the solder cup should be based on the distance between the lower lip of the cup and the top of
the cup opening.
Any solder buildup on the outside of the cup should be well wetted to the cup to assure that it does not detach from the cup
later. It should be thin enough so that it does not interfere with the installation of sleeving or create the possibility of a short
circuit and should not include any peaks/spikes that would penetrate sleeving.

9.15 Unsupported Holes An unsupported hole has no plating in the hole to achieve electrical connection between the top
and bottom of the PCB.
The criteria of Table 9-7 do NOT require that Lead to Barrel wetting or Lead to Barrel filleting be continuous. For example
look at Criteria A of the table. If 270° of Lead to Barrel fillet and wetting on secondary side (solder source side) of the lead
and barrel is required, the requirement can be satisfied by two separate wetted fillets of 100° and 170° or any combination
of fillets that cumulatively total the requirement (Class 1,2 = 270°, Class 3 = 330°).

9.16 Supported Holes (PTH)

9.17 Vertical Fill of Hole While the solder in a through-hole connection must show evidence of wetting, a minimum
amount of solder fill is also required for connection strength.

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Table 9-7 Unsupported Holes with Component Leads, Minimum Acceptable Conditions1,4
Criteria Class 1 Class 2 Class 3
A. Fillet wetted to lead and land 270° 270° 330° Note 2
B. Percentage of land area covered with wetted solder3 75% 75% 75%
Note 1. Double sided boards with functional lands on both sides need to comply to A and B on both sides.
Note 2. For Class 3, lead is wetted in the clinched area.
Note 3. Solder is not required to cap or cover the hole.
Note 4. Wetted solder refers to solder applied by the solder process.

The criteria of Table 9-8 do NOT require that Lead to Barrel wetting, Lead to Barrel filleting, or surface coverage be con-
tinuous. For example, where 270° of Lead to Barrel fillet and wetting on secondary side (solder source side) of lead and
barrel is required, the requirement can be satisfied by two separate wetted fillets of 100° and 170° or any combination of
fillets that cumulatively total the requirement (Class 1,2 = 270°, Class 3 = 330°). The requirement for surface coverage can
be achieved in the same manner. If the cumulative total surface coverage of two or more solder coated areas equals the
requirement, then the requirement has been achieved.
Table 9-8 Supported Holes with Component Leads, Minimum Acceptable Conditions Note
Criteria Class 1 Class 2 Class 3
Not
A Vertical fill of solder. Note 2 75% 75%
specified
Not
B Circumferential wetting of lead and barrel on solder destination side. 180° 270°
specified
C Percentage of original land area covered with wetted solder on solder destination side. 0 0 0
D Circumferential fillet and wetting of lead and barrel on solder source side. 270° 270° 330°
E Percentage of original land area covered with wetted solder on solder source side. Note 1 75% 75% 75%
Note 1. Wetted solder refers to solder applied by any solder process including intrusive soldering. For intrusive soldering there may not be an external fillet
between the lead and the land.
Note 2. The 25% unfilled height includes the sum of both source and destination side depressions.

9.18 PTH Mounted Components - Solder Conditions

9.18.1 Solder in Lead Bend Excess solder in contact with the component body is generally seen on through-hole mounted
components. By design, some SMDs may have exceptions to this requirement.

9.18.2 Meniscus in Solder When required for certain applications, meniscus on the components are to be controlled to
ensure that, with components fully seated, the meniscus on the leads does not enter the plated-through holes of the assem-
bly. (Example: high frequency applications, very thin PCBs.)
For thin PCBs and certain other applications, the meniscus does not enter the PTH. These requirements are based on the
fact that component manufacturers frequently note in the component specifications that the lead immediately adjacent to the
component body may not be solderable. Frequently the first 1.25 mm [0.050 in] of lead below the meniscus is not solder-
able. The area may be rendered non-solderable by the temperatures and outgassing associated with the formation of the
component body.
Some radial-mounted components have a meniscus at the lead-to-body interface. This meniscus is formed during the mold-
ing of the component encapsulate material when the component is manufactured. This meniscus should not be trimmed and
the component should be mounted so that the meniscus material does not interfere with the forming of the topside solder
fillet during the soldering process. Trimming the meniscus from the component may violate the lead-to-body seal of the
component, allowing processing materials/solvents to enter the component cavity and cause corrosion. Mounting the com-
ponent with the meniscus in the through-hole interferes with the natural formation of the solder fillet. The component should
be mounted with a space between the meniscus and the surface of the PCB.
Temporary spacers may be positioned under the component to space the body above the board during the soldering process
and can be removed following soldering. Permanent spacers may be used when allowed by the drawing.

9.18.3 Interfacial Connection Without Lead - Vias It is not required for via holes to be filled with solder. However, where
solder does not wet to the walls of the hole, it may be an indication of contamination elsewhere on the board.

9.18.4 Hole Obstruction Hole obstruction usually occurs when components are flush mounted to the topside of a circuit
board. The component body rests on the top of the board while the leads extend through the PTH. Topside hole obstruction

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can result in solder defects on the opposite side of the board. The component ‘‘caps off’’ the hole, which traps air and flux
during the soldering process, resulting in a partially filled hole. The entrapped air and flux sometimes ‘‘outgas’’ during sol-
dering and solidification resulting in blow holes. The component should be mounted above the circuit board surface to allow
an escape route for the air and flux during the soldering process. This can be done by using temporary spacers under the
component or by installing the components using permanent ‘‘footed’’ spacers. The use of permanent spacers is normally
allowed if documented on the design drawing. Make sure mounting requirements such as spacing and height are not vio-
lated when using temporary spacers.

9.19 Machine Soldering

9.19.1 Wave Soldering By definition, mass soldering implies creating many solder connections or interconnections simul-
taneously in a semi-automated or automated process. Equipment designed for this task generally has four basic components:
product conveyance, fluxing capability, preheating capability, and a standing molten pot of solder. The differences between
manufacturers are typically in the application of these basic concepts and the controls of the equipment. Although each is
unique, they need to be evaluated to determine the correct choice for any application, whether it is related to product size,
component density, volume/capacity, or equipment service and maintenance.
Wave soldering is an accepted printed board assembly production method for mass soldering interconnections. Complete
systems include fluxing, preheating, and soldering units with a means of automatically conveying the printed board assem-
bly through the system.
Wave soldering systems are commonly used for the mass soldering of PTH and SMDs (chip and leaded devices). When
bottom-side SMDs are soldered, they are typically secured with an adhesive and cured in place prior to soldering. These
adhesives are specially formulated to have high ‘‘drop’’ heights (to bridge from the PCB surface to the part) and good bond-
ing to component surfaces at temperatures +260 °C. Post solder characteristics are generally limited to being non-ionic, with
post solder application strength being redundant to the solder connection and generally unspecified.
The wave soldering system automatically performs the soldering process, as previously described for hand soldering, which
is flux application, heating of the area to be soldered, application of molten solder, and solidification. As all of these com-
ponents act together to ensure proper soldering, a solder ‘‘schedule’’ is often developed by recording the optimum process
parameters selected for flux, preheat, conveyor speed, solder temperature, and the solder wave configuration used (on cer-
tain systems).
The ‘‘solder schedule’’ often records the preheater settings (preheater temperature and conveyor speed) vs. a thermal profile
developed by placing a thermocouple on the surface of the PWA during soldering. In order to maximize repeatability within
and between PWA designs, the thermocouple is generally placed on the surface of the laminate (as opposed to the circuit
trace or part lead).

9.19.2 Machine Controls Procedures are available at the machine describing the operation and sequence for starting,
operating, and shutting down the equipment.

9.19.3 Fluxing The two preferred wave soldering fluxing methods are wave fluxing and foam fluxing. Spray fluxing and
brush fluxing are other fluxing techniques that are used occasionally.

9.19.4 Foam Fluxing Many wave soldering systems use foam fluxing as it is the simplest and most economical fluxing
method. With foam fluxing, foam is generated from a liquid flux by means of a porous ‘‘diffuser,’’ such as a hollow cylin-
drical stone. Low-pressure compressed air is forced through the pores of the stone that is immersed in the flux in order to
generate the fine bubbles or foam that are guided to the surface by a chimney nozzle.
At the exit end of the unit a soft bristle brush or air knife is usually mounted so that it can remove excess flux and drip-
pings without disturbing the component leads. A well-designed foam fluxer is also equipped with a pressure gauge and regu-
lator, microflow valve, feeder bottle, drain valve, and a means of height adjustment and leveling.
Foam fluxing should be used where through-hole component lead lengths do not protrude through the printed board by more
than 6 mm [0.25 in]. Only fluxes that have been formulated for a foam fluxer should be used.

9.19.5 Wave Fluxing Wave fluxing is based on the application of flux using the liquid wave principle to form a double-
sided parabolic wave. The washing action of the wave promotes flux coverage of the underside surfaces, while capillary
action forces promote through-hole penetration.

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The unit should be equipped with an adjustable wave-height control. An exit brush or air knife is usually optional.
Wave fluxing should be used when through-hole component lead lengths protrude through the printed board by more than
6 mm [0.25 in] or where the use of fluxes without a foaming capability is required. The solids content of the flux will also
be a determining factor since foaming rosin fluxes are usually limited to a 35% solids content, whereas wave fluxing is
operational up to a 60% solids content. Investment and cost of operation can also be a factor as a wave fluxer is several
more times expensive than a foam fluxer.

9.19.6 Brush Fluxing In brush fluxing a rotating cylindrical brush is used to transfer flux to printed board from either a
foaming flux head or from a static bath. Brush fluxing should only be used when special requirements preclude the use of
the more-popular fluxing methods.

9.19.7 Spray Fluxing The most common spray fluxing method consists of rotating a fine stainless-steel screen drum in
liquid flux with air jets inside the drum. Upward-pointing air jets then force the flux to fill the screen’s openings onto the
printed board in the form of small droplets. The amount of flux transferred is controlled by the rotational speed of the drum
and the amount of air pressure.
Spray fluxing should be used where long lead lengths preclude the use of foam fluxing and the fine control of the amount
of flux applied is required. Initial and operating spray fluxing cost is comparable to that of wave fluxing. However, this
method requires the use of more equipment and more maintenance than the other fluxing methods.
Direct spray jets and nozzles can also be used. But, the direct nozzle-spraying method is not in general use owing to the
inherent problem of having the flux solidify in the spray nozzle.

9.19.8 Preheating Printed board assemblies are preheated during wave soldering for various reasons, including to:
• Dry off the volatile solvents in the flux;
• Achieve the optimum flux-activity level;
• Reduce the thermal shock to the printed board assembly when it passes over the solder wave;
• Reduce the amount of heat required from the solder wave to raise the metals being joined to the soldering temperature;
• Permit the use of a higher printed board assembly travel speed through the soldering wave and, thus, minimize its time
over the wave; and
• Reduce the incidence of icicle and bridging formation.
When preheated, the thermal energy is generated and transferred to the printed board assembly by several different means,
e.g., hot plates, radiant heaters, forced hot air, infrared reflectors, etc. Whatever method is used, it is necessary to have effi-
cient preheating-element temperature control.

9.19.9 The Solder Wave The solder wave part of the wave soldering process has been in use for over 30 years and has
undergone continual developments and improvements over that time span. Basically, the solder wave performs two main
functions by providing both the heat and solder necessary to form the solder connection. By virtue of its solder circulation
system, the solder wave is consistent in temperature and composition.
Different solder wave configurations have been developed to satisfy the requirements of various applications, printed board
designs, and levels of productivity. The basic solder wave shape is defined by its width (the dimension perpendicular to the
direction of printed board assembly travel); by its height (the maximum distance from the apex of its crest to the nozzle
blades); and by its shape or configuration.
The size of a wave soldering machine is generally defined by the width of the wave it can generate. The shape or configu-
ration of the wave actually qualifies the flow pattern and flow characteristics by which the wave is discharged from the
nozzle.
There is a variety of solder wave shapes that can be classified into the following groups.

9.19.10 Parabolic Wave The original solder wave shape that was designed for use with a horizontal conveyor is the Para-
bolic Wave. It is usually used for comparatively simple single-sided printed board assembly applications.
9.19.11 Bi-Directional Wide Wave The Bi-directional Wide Wave shape results in having solder flowing equally in both
directions. It also results in having a greater printed board contact area and faster processing speeds with both horizontal
and inclined assembly conveyors. (The use of the inclined conveyor assists in reducing icicles and bridges by improving
solder drainage and peel-back.)

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9.19.12 Asymmetrical (Supported) Wave The use of the Asymmetrical (or Supported) Wave results in having more sol-
der flowing against the travel of the assembly through the wave. This produces a greater printed board contact area and offers
the potential for having the highest processing speeds. (The low-flow volume and zero velocity relative to the printed board
in the forward direction produces optimum drainage and peel-back especially when an inclined conveyor is used.)

9.19.13 Special Provisions Dross is produced by the exposure of the molten solder to air. The area of exposure is
increased by turbulence. Modern solder wave shapes reduce this turbulence and, therefore, reduce the volume of dross pro-
duced. The reduction of dross can also be achieved by covering the surface of the solder with a blanket of glass beads or
with a specially-formulated oil.
The use of oil can also reduce surface tension and improve solder drainage for the elimination of icicles, bridges and sol-
der buildup. The most-used approach involves the intermixing of the oil with the solder in the pump area so as to disperse
the oil evenly throughout the solder wave.

9.19.14 Printed Board Conveyors Conveyors are used to automatically transport the printed board assembly either hori-
zontally or on an incline through the wave soldering system. In order to achieve optimum results the conveyor must oper-
ate smoothly and have an adjustable speed control.
Wave soldering system conveyors are basically of two types, those in which the printed board is transported in a pallet or
carrier, and those in which the printed board is carried through the system with specially-designed fingers.

9.19.15 Pallet Conveyors With a pallet conveyor, the assemblies are loaded into a pallet or carrier which is subsequently
moved through the machine by an endless-chain drive mechanism. The pallets can be universal or specially designed to
transport one or several printed boards.
Pallets can be used to transport large assemblies, to hold irregularly-shaped printed boards, and to mask areas that must not
be contacted by the solder wave. They also can be used with inline through-hole lead-cutting systems.

9.19.16 Finger Conveyors When used with finger conveyors, the printed board assembly is held and transported by two
endless-chain mechanisms that have shaped fingers attached to them. One side of the conveyor is adjustable so that the
machine can accommodate assemblies of differing sizes. Thus, finger-conveyor systems require that the printed boards have
two parallel sides so that the assembly is effectively held by the fingers.
There are many different sizes and shapes of fingers available to accommodate varying printed board thicknesses and for
special purposes. The use of double-finger conveyors permits the simultaneous soldering of two different printed board sizes.

9.19.17 Other Conveyors While the pallet and finger conveyors are the most commonly used, there are other printed
board assembly conveying methods. For example, pusher-type conveyors are used in very-high production runs on a dedi-
cated assembly line; return-type conveyors are sometimes used to facilitate having the pallet returned for reloading.

9.19.18 Conveyor Control The conveyor of a wave soldering system also serves as a control device. This is necessary
because the time/temperature relationships among conveyor speed, preheating, and the actual soldering operation is
extremely critical in order to achieve optimum assembly results. Thus, for a given printed board assembly the final tempera-
ture after preheating is a function of the conveyor speed and the temperature of the preheater.

9.19.19 Inert Atmospheres A recent innovation in wave soldering technology is the conducting of the wave soldering
operation in an inert gas environment. Although nitrogen is not truly an inert gas, it is often used as the protective gas that
excludes oxygen and thereby prevents oxidation. During wave soldering, this means that the printed boards, the components
and the solder wave, the pot and the connections being soldered do not become oxidized.
One of the prime reasons for the current interest in nitrogen-inerted wave soldering is the improved results that can be
achieved with wider process tolerances using low-solids fluxes as compared to wave soldering in air. The lower the solids
content in the flux, the more probability of successfully eliminating post cleaning, an expensive operation which requires
operators, floor space, electrical power and which creates environmental problems.
The benefit of nitrogen wave soldering is that the solder fillets, either with plated-through hole or surface-mount devices,
are much more consistent and uniform in appearance, and the solder connections are extremely shiny. Also, since there is
less maintenance, the solder pot and nozzle will remain in the same perfectly level position between major maintenance

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intervals that could be several months apart. Therefore, more consistent quality can be obtained over this long time period
than when the solder pot is withdrawn from the machine every few days for maintenance.
There are also substantial cost benefits. Virtually no dross is produced. Therefore, about 50 to 70% less solder is used.
Maintenance costs are greatly reduced as well. Instead of a major clean-out of the solder tank, pump and nozzles every few
days of production, in some instances this is performed only after several months of full production with a two-shift opera-
tion.

9.19.20 Preparation Fluids Preparation fluids are used in some inert wave soldering systems. These are the same as
fluxes. They remove oxides and help promote solder wetting. They are usually made by mixing adipic acid powder in a con-
centration of either 1%, 2% or 4% by weight with alcohol. (A higher percentage of solids is needed specifically to promote
better hole filling in certain nitrogen wave soldering machines.)
These fluids are usually applied to the printed board in any of the several conventional fluxer configurations. They are
required specifically, in the same way as a flux, to promote wetting and to overcome poor solderability on bad boards, but
more specifically on component leads. Most of all, a ‘‘preparation fluid’’ or a low solids flux is needed to help obtain com-
plete hole filling. Adipic acid is often used as an activator in some commercially available fluxes including some low sol-
ids fluxes.

9.19.20.1 Flux Considerations Many users of nitrogen inerted wave soldering systems use a low-solids flux. Independent
reports from three sources indicate that low solids fluxes can give better surface insulation resistance (SIR) values than when
1% adipic acid is used.
The use of a rosin flux, with as much as 35% solids as per military specifications, could possibly exhibit the appearance of
some dewetting on the bottom side of the printed board after wave soldering in a nitrogen-inerted system. It is believed that
the rosin is not displaced from the land area as it would be in air. It is suggested that lower content fluxes would work bet-
ter and would help to eliminate post-cleaning too.
If a printed board has been made recently and exhibits excellent solderability at incoming inspection or has been hot-air lev-
eled, it will exhibit excellent soldering results after wave soldering in nitrogen without any flux whatsoever. However, com-
ponents will usually have poorer or questionable solderability and, for this reason, a flux of some sort will probably be
required.

9.19.20.2 Formic Acid Formic acid is used in some inert wave soldering machines. Some systems advocate the use of
formic acid in gaseous form injected into the solder machine tunnel, specifically around the solder wave, in order to clean
the surface of the solder wave, thereby providing better quality solder connections and lower defect rates than when formic
acid is not used.
In machines with flap doors and carriers which carry oxygen into the inerted zone, or when low quality nitrogen is injected
into the tunnel with turbulent jets, the oxygen contamination becomes high enough to require the use of formic acid to keep
the solder wave clean. It has been shown that, if high quality commercially available nitrogen with an extremely low oxy-
gen content, such as 2 ppm oxygen, is fed into the wave soldering tunnel in a gentle manner around the solder wave, the
level of oxygen contamination is kept very low around the solder wave, thereby eliminating the need for formic acid. It is
also a decided advantage when pallets and flap doors are not needed. This is a technical point in favor of adjustable width
finger conveyor wave soldering systems.
There are three available grades of formic acid ranging in concentration between 85% up to 99.0% purity, the balance being
water. The best one recommended by some users is the most hazardous one, being 99.0% pure.
Formic acid is considered a hazard because the acceptable toxicity level in the work place for formic acid is 5 ppm and this
requires an exhaust system to remove the vapors of the formic acid to ensure that it stays at or below the safe limit in the
work place.
Also, a whitish powder develops on the pallets and, while many claim that this powder is harmless, many are still concerned
about it. Additionally, on systems that use pallets, more and more of this powder collects on the pallets each time they go
through the system.
Currently, on systems using pallets and formic acid, some users are considering installing cleaning systems in the return line
to clean this unknown white powder off the pallets. Then one must consider what this material is and whether they need a
permit to discharge it down the drain.

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9.19.21 System Considerations Although each part of a wave soldering system has a unique function to perform, the
system must be considered as a whole because of the interrelationships of the fluxer, preheater, solder wave and conveyor.
Of particular concern is the correlation of the time temperature relationships. In this regard, the general rule is to solder at
the lowest practical temperature and with the shortest practical dwell time.
The solder temperature can be considered as being virtually constant. As a result, dwell time becomes the prime variable.
It is a function of the contact time with the solder wave and conveyor speed.

9.19.22 Design Considerations The design of the printed board assembly is a critical factor that affects the reliability and
quality of the wave soldering operation. For example, the following must be carefully considered, where applicable:
• The ratio of the size of a printed board hole to the diameter of a through-hole lead.
• The distance from solder connections to the edge of a printed board.
• The distance from a component body to the edge of a printed board.
• The rigidity of the base material at the elevated soldering temperature.
• The degree of retention that is used to prevent component movement during soldering.
• The thermal loading of the printed board.
• The degree to which solder resist coatings (masks) and legend marking are used with respect to not having them bleed
onto surfaces that are to be soldered.
• The relieving of large metal planes, such as ground planes, in order to minimize ‘‘heat sinking’’ effects.
• The configuration of lands.
It is recommended to leave clearance to allow for proper solder wetting when using selective wave solder fixturing. (Con-
sult Selective wave manufacturer for details)

9.19.23 Process Control Wave soldering defects are generally either those that are attributable to the process or those
defects that are beyond wave soldering system control, i.e., they are inherent in the components, printed boards, and assem-
bly design. Thus, with proper process control and the use of a well-designed assembly and printed boards and components
with good solderability, a modern well-controlled wave soldering system will be virtually defect-free.
See Figure 9-23 that describes problems and solutions for wave soldering processes.

9.19.24 Maintenance Depending on the activity, wave soldering system maintenance should be performed daily, weekly
or on a periodic basis.
A. Daily Maintenance – Items to be covered by daily maintenance, when applicable, include:
• Check (and maintain) the specific gravity of the flux.
• Check (and maintain) the level of flux in the flux pot.
• Clean the flux applicator and wipe the brushes.
• Purge oil from the solder pot at the end of each day’s production run; twice daily if there is a heavy production
schedule.
• Check (and maintain) the level of solder.
• Clean the machine, especially the conveyor mechanism. If pallets are used, they should be cleaned.
• Cover or drain the flux pot.
• Clean or replace preheater reflectors.
• Check (and maintain) the level of oil in the oil overflow bucket.
B. Weekly Maintenance – Items to be covered by weekly maintenance, when applicable, include:
• Drain and discard used or contaminated flux from the fluxing unit.
• Clean the diffusing stone and other fluxer components.
• Change the preheater reflector foils.
• Remove all oil from the solder pot surface.
• Scrape the solder pot, sump and pump, and areas around the immersion heaters.

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IPC-820a-09-23

Figure 9-23 Wave Soldering Problems and Solutions Reference Chart

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• Remove, clean, and reinstall all sump baffle screens.

• Visually check (and maintain) the level of solder when there is no oil in the pot.
• Add new flux to the fluxer.
• Drain the air line and oil separator feeding the fluxer.
C. Periodic Maintenance – Periodic maintenance in the form of a major system overhaul should be performed quarterly,
or at least every six months, only by factory-trained personnel and experienced service persons. Such maintenance
involves the total breakdown of the system components for cleaning and the replacement of worn and/or damaged parts.

9.19.25 Solder Dross Reclamation and Recovery Systems are designed and manufactured by various suppliers for sol-
der pot dross reclamation and recovery. These systems efficiently and effectively recycle otherwise waste solder dross back
to reusable solder. The systems may be used in a modern shop floor manufacturing environment particularly with regard to
reliability, ease of operation, maintenance and environmental management.
Reportedly, metallurgical analyses performed by users confirm that recycled solder ingots are of the same specification and
quality as that in the solder bath and can immediately be reintroduced into the solder bath or stored for future use. Spent
dross is routed through a chute to a dross bucket for proper environmental disposal.
The user must consult with the supplier to assure that the system is equipped with necessary safety switches, emergency
stops, automatic over temperature controls and system exhaust to comply with local and federal regulations.
Typical dross recovery systems have capacities to process 15 to 40 pounds of dross per load cycle. The systems usually will
recover 75% of hot solder dross produced by wave soldering machine as reusable solder.

9.19.26 Training The set-up parameters for wave soldering system must be determined and the machine operator
instructed to follow these parameters faithfully. A formal training program must be initiated in order to instruct the machine
operator in the correct operation and maintenance of the system and with respect to the recording and reporting procedures
to be used. The operator must also be able to inspect soldered assemblies and make an assessment of the quality of the sol-
der connections.

9.19.27 Safety Although the wave soldering process is intrinsically safe, there are certain precautions to be observed.
A. Burns – Solder is very hot and can cause extremely-bad burns. As a result, great care must be taken to avoid having
solder splash or be otherwise ejected from the solder pot. Thus, eye protection must always be worn by persons near the
solder pot and the surface of the solder must always be covered during the heat up operation in order to protect against
solder spurting from the melting metal.
B. Lead Poisoning – The greatest danger lies with the possibility of having lead ingested through the skin of persons han-
dling the solder. Thus, gloves must be worn by machine operators, storekeepers, inspectors, etc., who handle solder or
soldered assemblies. The must also wash their hands before eating, drinking, or smoking, and none of these actions can
be allowed to take place in the area of the wave solder machine.
If the wave soldering machine is correctly vented and enclosed, there is no danger of having personnel breathe lead par-
ticles. If, however, it is necessary to work near the solder wave with the enclosure opened, the wearing of a suitable mask
is a worthwhile precaution.
An approved mask and gloves must always be worn when removing dross from the surface of the solder. Dross must also
always be stored in a sealed container.

9.20 Flow-Well/Minipot Flow-well, mini-wave, and mini-pot all refer to the same tool. The tool is used in the repair pro-
cess. The tool’s purpose is to direct liquid solder with the use of a solder nozzle/dam into a small area of the PWB that fits
the footprint of the part that needs replacement. It is usually used in areas of difficult repairs.
The difficulty of the repair is tied directly to the number of pins of the component and if the part is located in a heat sink-
ing ground plane. By using the tool you also save time by not having to desolder and resolder one pin at a time.
There is a caution however, in that overheating can cause copper dissolution to occur. Delamination is also a possibility if
the PWB is left over the solder flow an excessive amount of time.
NOTE: Copper dissolution is a major problem with the lead-free process. Preheating and time/temperature profiles are nec-
essary to reduce scrap.

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9.21 Static Solder Pots A solder pot where the solder does not flow or have the capability to flow is considered a static
solder pot. Static solder pots are generally used for tinning, enamel, and gold removal. The solder pot should maintain the
solder temperature within ± 5 °C [± 9 °F] of the selected temperature and be grounded. Static solder pots are used mainly
during manual (hand) or drag solder operations.
Prior to use, skim the surface of the molten solder to remove layers of dross (oxidation) that forms on the top of the sol-
der. Dispose of dross in accordance with state and federal requirements.

9.22 Selective Soldering A selective soldering process permits successful soldering of through hole and surface mount
component leads, nested among other component fields, to printed wiring board holes and pads, especially when mass reflow
soldering (wave, vapor phase or convection reflow) methods and processes are not feasible for selected assembly compo-
nents.

9.22.1 Key Process Elements Key selective soldering process system equipment elements include:
• Fluxer – A system controlled flux application device, such as an ultrasonic fluxer, to apply flux to the solder connection
areas on the printed wiring board assembly
• Preheater – A system controlled infrared or convection preheater mounted above and/or below the assembly fixture path
from the fluxer to the solder nozzle
• Solder Pot and Nozzle Assemblies – A system controlled solder nozzle assembly to obtain necessary solder fountain height
and appropriately sized for the component contacts and soldering path
• Selective soldering equipment typically utilizes solder nozzles of 2 mm to 10 mm diameter x 25 mm height mounted to a
relatively small form factor impeller assembly which is mounted to a molten solder pot containing approximately 100
pounds of solder
• Assembly Transporting Mechanism – A system controlled fixture to transport the assembly from the loading station, over
the fluxer, past the preheater and to the solder nozzle
• Electro/Mechanical Controls – Programmable automatic and semi-automatic controls to repeatability and reliably run the
selective soldering process

9.22.2 Process Expectations A productivity increase, first time solder joint acceptability and cycle time reduction may
be realized when using a selective soldering process compared to other soldering process such as hand soldering or flow-
ing solder pot methods.

9.22.3 Process Optimization and Control Selective soldering process system users are encouraged to conduct Design of
Experiments (DOEs) with production assemblies to analyze key process parameters at many levels to determine their effect
on optimizing the selective soldering process. An equipment and process control plan should be implemented to maintain
optimum system performance and solder connection quality.

9.23 Reflow Soldering Understanding the basic metallurgical and chemical requirements of reflow soldering is the key to
attaining high product yield. It is essential to ensure that the reflow soldering oven used is capable of delivering the required
profile for a given application. With the advent of more complex surface mount technology (SMT) assemblies, an increased
amount of flexibility is demanded of the oven.
Also important is repeatability. A printed board assembly that is profiled today should be capable of being processed a year
from now and achieve the same results.
As is the case with any other equipment used in the SMT assembly process, a reflow soldering oven cannot be bought ‘‘off
a data sheet.’’ Though specifications tabulated into a matrix should be used to qualify a machine for suitability to a given
range of applications, a ‘‘hands-on’’ evaluation is required to determine which system will offer the highest degree of
repeatability and the greatest amount of flexibility for the range of products that will be processed.
The following procedures are intended to evaluate the potential soldering performance of a reflow soldering oven. Compre-
hensive in nature, they can be performed when assessing ovens for possible purchase, as part of the acceptance procedure
prior to signing off on a selected oven, and as a performance check for systems in-house to detect deficiencies and possible
need for adjustment, maintenance or repair.
While the test procedures offered here deal with process performance, it is highly recommended that they be augmented with
tests and measurements to ascertain whether the manufacturer has complied with the written specifications he has published.

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Peripheral areas, such as edge conveyor parallel and repeatability can be measured by mechanical means. Ease of operation,
layout of controls and software clarity tend to be more subjective in nature but are also critical to the evaluation.
This battery of ten tests is intended to determine the performance of a system comprised of a combination of evolved con-
cepts with regard to the range of parameters normally encountered in a production environment. While it is advantageous
if all of the tests are utilized, individual portions or combinations can be applied as appropriate.
Initial performance factors to be tested include:
• Baseline Profile – The capability of the reflow system to meet the Reflow Specification of an application. This encompasses
thermal gradient across the assembly, rate of heating, rate of cooling, liquidus dwell and conveyor speed.
• Test 1: Oven Stabilization.
• Test 2: Oven Repeatability.
• Test 3: Oven Thermal Symmetry.
• Test 4: Oven Linear Load Sensitivity.
• Test 5: Profile Change Time.
• Test 6: Component Temperature: Body and/or Internal Die to Interconnection gradient.
• Test 7: Electrostatic Discharge (ESD) added by Oven.
• Test 8: Oxygen Purge Time in Nitrogen Contained Ovens and Nitrogen Containment to Specification.
• Test 9: Effect of Nitrogen Containment on Profile Parameters.
• Test 10: Inert (Nitrogen) Atmosphere Load Sensitivity.
9.23.1 The Test Assembly In order to test the compatibility of an oven with an application (or range of applications) it
is highly advantageous that the actual assembly that will be processed in production be used as the test vehicle. Ideally, the
printed circuit board should be populated in the same manner as it will be as it is processed in the oven. If the actual assem-
bly cannot be used (it may not exist yet), locating an assembly that closely resembles it in terms of overall mass, compo-
nent complement and distribution will contribute to the accuracy of the evaluation.
If a number of assemblies will be processed in the oven, it is best to use the one that represents the ‘‘worst case’’ in terms
of complexity. If the range of applications the reflow oven will see in production vary greatly (in terms of overall mass and
mass (component) distribution, it is advisable to instrument assemblies that cover that range and prepare satisfactory profiles
for these applications as well. This exercise will render itself valuable in determining the overall ease of profilability.
9.23.2 Attachment of Thermocouples If accurate measurements are to be made, careful attention must be paid to the
attachment of the temperature measuring and/or recording device. While there will be certain inherent tolerances to every
‘‘link in the chain’’ -length of thermocouple leads, thermocouple wire gage, recording device tolerance variation -some
accuracy can be preserved by proper attachment of the thermocouples.
It is recommended that, for most SMT reflow profiling purposes, Type K twisted-pair or pre-welded thermocouples be used
with 30-awg leads. It is also generally recommended that thermocouple attachment be made to the interconnection being
measured by using a high-melting-temperature solder, i.e., 10Sn/90Pb.
Whether a simple measuring device (digital thermometer or chart recorder) or temperature recording device is used, the pro-
cedure is as follows:
1. If attachment is being made to a previously soldered interconnection, it is important to first remove as much of the origi-
nal solder from that area as possible. Use a suitable removal tool or solder wick.
2. Apply a small amount of liquid flux (RMA) to test point.
3. Solder the thermocouple to the test point with a soldering iron and a small (but sufficient) amount of solder.
4. Route the thermocouple lead towards the rear (in terms of direction of travel) of the assembly. Some practitioners prefer
to terminate the lead at the trailing edge of the printed board in a connector. The lead from the measuring device can then
be quick connected-disconnected at this point. The connectors from the various thermocouples are then either bolted to
the printed board or held in place with high temperature tape, e. g. , Kapton™.
5. Use high temperature tape to provide hold-down and strain relief to the thermocouple leads at appropriate locations on
the assembly.
If a bare laminate or ceramic substrate is being used, attachment of the thermocouple will have to be made using conduc-
tive epoxy. Follow the adhesive manufacturer’s instructions for curing and use as small an amount as possible for the ther-
mocouple attachment. Use high-temperature tape for strain relief on the thermocouple leads at appropriate points.

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The use of high-temperature tape is not recommended for making the actual thermocouple attachment. An accurate mea-
surement of the interconnect or substrate temperature will not be taken. Tape may be placed over a soldered or epoxy-bonded
thermocouple connection for added durability, if desired.
It is recommended that at least two thermocouple locations be used for profiling an assembly. Ideally, though, five locations
should be monitored. The interconnections observed should be locations that will represent the greatest temperature extremes
during reflow.
Due to a preponderance of surface area, substrate corners will generally heat faster and higher than the inner areas of the
assembly and at least one thermocouple should be located at a component to board interconnection near a corner or edge.
Components comprise mass and can be construed as ‘‘heat sinks’’ on the board. A thermocouple should be located near the
center of the substrate at an interconnection of a large component, perhaps among a group of components if the board is
thus populated.
9.23.3 Baseline Profile For tests using a populated assembly, a baseline profile must first be established. This profile can
also be used in tests utilizing unpopulated substrates as well.
A ‘‘Reflow Specification’’ should be developed for the assembly being used for each test. This is a prerequisite for profil-
ing. It is important to establish what the full liquidus temperature (T1) should be per the solder paste being used. This is
obtained from the solder paste manufacturer’s data sheet and represents the minimum temperature each soldered intercon-
nection must reach at peak reflow and is typically 15-25 °C higher than the alloy’s melting point.
The top of the ‘‘envelope’’ is determined by the Most Vulnerable Component (T2). Design Engineering should locate the
component or material on the assembly with the lowest thermal threshold. A temperature that is 5 °C less than T2 should
not be exceeded during the reflow soldering process.
The solder paste manufacturer should be consulted further for recommended preheat and preflow temperatures and durations.
These will vary among the different types of fluxes. With some formulations, particular attention must be given to preflow
duration.
The rate of heating may also be a critical consideration in some applications. While many assemblies will suffer no ill effects
with a rate of rise of 4 °C, some users specify heating rates that do not exceed 2 °C, particularly when ceramic components
are present.
An example of a ‘‘Reflow Specification’’ and ‘‘Profile Objective’’ for a 63Sn/37Pb solder paste with RMA flux might be:
• Reflow Soldering Specification
– Minimum Peak Temperature (T1): 200 °C.
– Maximum Peak Temperature (T2): 220 °C.
• Profile Objective
– Preheat Temperature: between 100-120 °C.
– Preheat Duration: not to exceed 1 minute.
– Preflow Temperature: between 150-170 °C.
– Preflow Duration: not to exceed 2 minutes.
– Gradient Across Assembly: not to exceed 20 °C (based upon T1-T2 envelope).
– Rate of Heating: °C.
– Liquidus Dwell Duration: approximately 60 seconds or less.
Following the oven manufacturer’s recommended procedure, it is now possible to derive a profile that meets the Reflow
Specification and Profile Objectives for that assembly. The ease of profiling facet of the evaluation will become quite evi-
dent at this point. The number of passes and amount of difficulty entailed in getting the desired profile not only reflects on
the complexity of the assembly and the suitability of the oven to that specific application, but may also be indicative of the
overall flexibility of the system.
If it appears to be impossible to meet the Profile Objective, review the parameters of the specification to see if the process
envelope can be widened. If not, the oven should be scrutinized and possibly eliminated from consideration.
It is now necessary to examine the profile established. In terms of gradient, though a tolerable window has been established
(between T1 and T2) the closer the peak temperatures are to T1 the more ideal the situation. Since, in terms of temperature,
‘‘what goes up must come down,’’ a lower gradient and resulting peak temperature will contribute to shortening the liquidus

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dwell duration. Of course controlled and expeditious cooling has a profound effect on bringing the solder connections below
solidus.
Fast cooling profoundly promotes fine grain growth in the solder fillet (contributing to a stronger interconnection) and
reduced liquidus dwell (which minimizes intermetallic growth, excessive oxidation and exposure of the assembly to high
temperatures). Attention should be paid to the rate of cooling. Generally speaking, the upward ‘‘speed limit’’ should also
apply on the downslope. Thermal stress works in both directions.
For evaluation purposes, the same instrumented assembly should be used throughout the examination. Comparisons will be
made to the satisfactory profile obtained which will be referred to as the baseline profile.

9.23.3.1 Test 1: Oven Stabilization Reflow ovens, regardless of the heat transfer methods employed, require an interval
in which to come up to operating temperature whenever cold started. This is called the Stabilization Time.
This procedure is as follows:
1. With the oven off and at ambient (room) temperature, enter the profile recipe of the baseline profile. This will include
emitter temperature settings, conveyor speed, and, where adjustable, convection blower speed. Turn the oven on to acti-
vate the profile. At this time, start timing.
2. After 20 minutes has passed from the initiation of the profile, run the instrumented assembly through the oven. Compare
the profile, particularly the peak (Reflow) temperature points with those of the baseline profile.
If the profiles match (within 2 °C) the oven can be considered ‘‘stabilized.’’ If the profiles do not match, without altering
the oven settings, run the instrumented assembly through again after a 10 minute interval. If a profile that matches the base-
line profile is still not obtained, repeat this procedure at 10 minute intervals until the oven is deemed stable.
Note and record the time it has taken the oven to stabilize. In production, this interval will have to be taken into account
prior to introducing product for processing in the reflow system.

9.23.3.2 Test 2: Oven Repeatability A reflow oven should perform in a consistent and repeatable manner. If a combina-
tion of infrared radiation, convection and conveyor speed produces a set of results (profile) on a given application, it should
produce the same results on that product every time the profile recipe is set up on the oven.
Some ovens have some susceptibility to outside conditions, i.e., exhaust facilities, air flow in the room, etc., with some oven
designs more vulnerable than others. Thus, this should be taken into account and controlled.
In this test, the oven stability should be examined. The precision of control that has been incorporated into the system will
be reflected.
This procedure is as follows:
1. With the profile entered and the oven stabilized (that is operating parameters attained for the profile) establish the base-
line profile. Record the peak temperatures reached for each thermocouple test point on the assembly.
2. Without adjusting or changing the profile recipe, over a duration of at least 4 hours, at half-hour and hour intervals, run
the assembly through the (unloaded) oven. Record the peak temperatures for each thermocouple test point on the assem-
bly.
(NOTE: Other tests, such as Loading and Symmetry Tests, can be run in between the Repeatability runs as long as the oven
set-points are not altered.)

9.23.3.3 Test 3: Reflow Oven Thermal Symmetry In an inline process, it may be difficult to control the orientation of an
assembly as it is fed from the component placement system to the oven. Hence, an acceptable reflow profile should be
attainable regardless of the printed board’s orientation in the oven.
This procedure is as follows:
1. With the oven stabilized, run the baseline profile and obtain a plot. Rotate the instrumented assembly 90 degrees from
the normal direction of flow. Without altering settings, run the board through the oven again and obtain a profile plot.
2. Compare the plots and record the thermocouple peak readings.
3. Rotate the board 90 degrees again so that it is now 180 degrees around from the normal process flow direction. Without
altering oven settings, process the board and obtain plot. Repeat this same procedure with the assembly running
270 degrees from the normal process flow direction.

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Again, when plots are compared, they should all be fairly close. It should be ascertained that the Reflow Specification can
be met regardless of the orientation of the printed board with respect to process flow.

9.23.3.4 Test 4: Oven Linear Load Sensitivity This procedure will examine how well regulated the control and transfer
of heat energy is in the oven. The oven should be tested under conditions resembling those that will exist on the produc-
tion line in terms of volume. The results, in terms of the temperature profile, should be consistent.
This procedure is as follows:
1. With the oven stabilized, process and plot the instrumented Test Assembly with the baseline profile.
2. Run the instrumented assembly through again immediately followed by un-instrumented ‘‘Load’’ assemblies at intervals
(spacing) equal to the length of the Test Assembly. The Load Assemblies can be bare substrates the size of the instru-
mented printed board. Ideally, though, they should be populated (though un-instrumented) assemblies similar (in mass
and mass distribution) as the Test Assembly. If such boards are not available, bare substrates can be prepared with a mass
or masses on them that allows them to approximate the mass of the Test Assembly.
3. After 10 Load Assemblies have been placed in the oven, pass the Test Assembly through, allowing the same board spac-
ing as before and immediately following it with additional Load Assemblies. Be sure that the Test Assembly has returned
to ambient temperature before processing it.
4. After an additional succession of 10 Load Assemblies, process the Test Assembly through the oven (again assuring that
it has first returned to ambient temperature). Do not follow with Load Assemblies.
5. Compare the profile plots of the Test Assembly at first, 11th and 22nd printed board. Assure that the profiles have not
varied significantly. Board-to-board deviation should be minimal. (NOTE: If the feed rate of the oven, as determined by
the output of the component placement system, is such that printed board spacing will be less than one printed board
length, this test should be conducted at the anticipated feed rate. )
6. After an interval of 15 minutes has passed that the oven has remained empty (idle), pass the Test PCB through the oven.
Compare the plot to those previously obtained. Again, the resulting deviation should be minimal.

9.23.3.5 Test 5: Profile Change Time If different profiles are to be used in the course of the production day, the time it
takes the oven to stabilize at the new settings affects the process line setup time. Ideally, one profile recipe may cover a
range of applications but if that is not the case, it is important to know what the oven ‘‘changeover time’’ is.
This procedure is as follows:
1. With the oven loaded and stabilized with the baseline profile, obtain a plot of the Test Assembly.
2. Raise the zone temperature settings of each vertical heat zone by 50 °C. Upon initiation of these settings, begin timing.
3. After a 10 minute interval, process the Test Assembly and obtain a profile plot. After the Test Assembly has returned to
ambient temperature, process it again. Compare the plot to the previously obtained one (with the higher settings). If the
results were not similar, repeat the test after an additional 10 minute interval. Repeat the procedure until two consecu-
tive profile plots are obtained indicating that the oven has stabilized at the new setting. Note the timed interval required
to achieve this.

9.23.3.6 Test 6: Component Temperature Just as the actual combination and/or ratio of heating methodologies varies
among oven manufacturers, so will the resulting heating effect on the assembly’s substrate, materials and components. For
example, some ovens will heat components higher than their respective solder interconnections, some will allow the com-
ponent to remain significantly cooler and some bring component temperature into equilibrium with the solder temperature.
Typical factors that affect this include the ratio of infrared to convection present in the oven, wavelength and intensity of the
infrared (IR) emissions, as well as mass and absorptivity of the actual components.
If a particularly low MVC (Most Vulnerable Component) temperature has been derived for a given application, it is recom-
mended that the component from which the MVC value was derived be tested.
This procedure is as follows:
1. Attach a thermocouple to the body of the component using conductive epoxy cured per the manufacturer’s recommen-
dation. Also attach a thermocouple to one of the solder interconnections of that component (junction of the lead and the
pad) using a high temperature solder alloy per the procedure described earlier. Attach the thermocouple leads to an
appropriate recording device.

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2. With the oven stabilized at the baseline profile, pass the board through the oven. Observe the actual temperature of the
component body as well as the gradient between the body and interconnection temperatures. Also, assure that the inter-
connection temperature attained Full Liquidus (T1) temperature.
In some (rare) cases, the MVC will be determined to be the internal die temperature of an active component. To prepare a
component for internal temperature testing, first drill a small diameter hole through the top of the component using a
Dremel™ tool or similar precision drill. Drill through the thermoset epoxy of the component body to a depth appropriate
for accessing the component die.
3. Carefully attach a thermocouple to the die using conductive epoxy and cure per the manufacturer’s instructions. A non-
conductive epoxy can be used to fill in the upper portion of the hole in the component body. Attach a thermocouple to
one of the component interconnections (lead to pad junction) using a high temperature alloy solder per the procedure
described earlier. Pass the board through the thermally stabilized oven set to the baseline profile and record the results.
Assure that the internal component temperature remains at a safe temperature while the corresponding interconnection
attains Full Liquidus (T1) temperature.

9.23.3.7 Test 7: ESD Testing One of the detrimental effects that has been observed in some model ovens is the genera-
tion of electrostatic discharge (ESD). A combination of poor management of the mass of heated convection air and improp-
erly grounded oven components can cause havoc when ESD sensitive components are present on the printed board assem-
bly being processed. If this is likely, a test for ESD generation in the oven under evaluation should be mandatory.
A hand-held ESD presence scanning device can be used for this test. Such devices are available from firms that specialize
in antistatic control and feature a sensor on one end and a meter that reads out the detected ESD voltage on a scale.
This procedure is as follows:
1. With the oven stabilized at the baseline profile, and the operator properly grounded, begin loading a series of at least 8
serialized assemblies onto the on load portion of the oven. (NOTE: actual assemblies or unpopulated glass epoxy sub-
strates can be used.)
2. With the ESD scanner properly calibrated, pass it over the surface of each printed board (per the scanner manufacturer’s
instructions) prior to it entering the tunnel.
3. Record the maximum scanner reading for each assembly (ideally 0 volts if the person or system loading the substrates
is properly grounded). As each assembly exits the oven tunnel, take a similar reading and record. Note whether or not the
presence of ESD has been detected.
Another type of device for ESD detection actually attaches to the printed board and travels through the oven. Simulating a
static-sensitive component, these tools are available in different ranges of ESD sensitivity. A window in the device signals
that the specified level of ESD has been reached.

9.23.3.8 Atmosphere Containment Due to a preponderance of ‘‘specmanship’’ in the area of atmosphere containment, it
is imperative that the purchaser of such an equipped reflow soldering system test for conformance to the specification under
which the system was sold. Ideally, the user will have his own oxygen analyzer. The analyzer should be calibrated and great
care should be taken when shipping it to an oven manufacturer and/or acceptance site and hooking it up. The user should
be well-versed in the operation of the analyzer prior to the oven test.
NOTE: There are a number of different types of oxygen analyzers but the most common type used for SMT reflow sys-
tems are the ‘‘chemical cell’’ and ‘‘zirconium’’ types. Chemical Cell type analyzers have the characteristics of being slow
to react (in terms of rendering a reading of oxygen levels) but, in turn, are highly accurate.
Zirconium based analyzers, though not as accurate as chemical cell systems, are very quick to react. Usually, the accuracy
available in a zirconium based system is within the tolerances to be useful for measuring oxygen levels in the ranges found
in SMT reflow ovens.
Whichever type of analyzer is elected for use, it should be ascertained that the analyzer is compatible with the gas tempera-
ture range that will be encountered in the reflow system, (from 20 to approximately 300 °C.)
The nitrogen containment specification stated in terms of parts tunnel will have ‘‘sweet spots’’ and ‘‘weak spots,’’ but the
specification should hold throughout the heated tunnel.
This means that if the source purity is ‘‘less than 5 ppm O2’’ and the oven is specified to ‘‘less than 15 ppm O2’’ a probe
placed anywhere in the oven where the reflow process takes place will show less than 20 ppm (O2). This includes preheat,

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preflow, reflow but excludes cooldown (unless otherwise specified), baffle-boxes, etc. Hence testing for oxygen levels just
in reflow (or worse) at or near the nitrogen input to the tunnel is inaccurate and ineffective.
The other half of the equation is the consumption level required to maintain that given oxygen level. This directly relates
to the cost of operation. Thus, it is important to establish what volume of nitrogen is required to attain the desired inert
atmosphere. The oven should maintain the nitrogen containment specification under loaded and non-loaded conditions.
When the oxygen content is reduced to 500 ppm or less the solder wetting improves.
Any or all of the tests just described can be performed on an oven which is in an inerted state. The nitrogen level should
not vary unless prescribed by the manufacturer and agreed upon with the user.
It is recommended that at least some of the tests be done on the system while it is inerted and compared to the results of
the same tests done on a passivated oven (equipped for inerting but operating in a normal oxygen laden atmosphere). The
profiles and results should be very similar and repeatable.

9.23.3.9 Test 8: Oxygen Purge Time In order to establish the time required for the oven to purge oxygen, the following
procedure should be adhered to:
1. With the oven thermally stabilized in an oxygen atmosphere, place oxygen analyzer probe(s) into the oven tunnel to
sample at the linear center of the oven.
2. Turn on the oxygen analyzer and also begin introduction of nitrogen into the oven (in accordance with the oven manu-
facturer’s instructions).
3. Begin timing.
4. Observe readings on the oxygen analyzer. When the residual oxygen level reaches the manufacturer’s specification
(source purity + oven containment) note the elapsed time interval, but do not stop timing.
5. Immediately move the analyzer probe location to the beginning of the preheat section of the reflow tunnel. After allow-
ing for the analyzer to stabilize, note the oxygen level reading at this location. If the specification has been met, note the
elapsed time. If oxygen levels are higher than the specification, continue to time until the specification is met.
6. Now move the probe to the center of the last vertical heat zone (Reflow section). After allowing the analyzer to stabi-
lize, observe the oxygen level reading. If within specification, note the elapsed time. If it is not within the specification,
continue timing until the specification is met. (NOTE: if a significant time is required for this last portion of the test, it
is recommended that the preheat level be retested again.)
Once the specified residual oxygen level has been reached throughout the process portion of the reflow oven, the oven can
be considered oxygen purged and stabilized. The time required to achieve this should be taken into account anytime pro-
duction requires a switchover from air to nitrogen oven atmosphere.

9.23.3.10 Test 9: Effect of Oven Gas Containment Ideally, the reflow oven should perform similarly when operating
with an air or nitrogen atmosphere. In reality, the operating parameters associated with the profile of a given assembly may
change radically when the operating atmosphere is changed.
This is particularly true when convection flow must be reduced (in order to reduce residual oxygen levels at a reasonable
consumption rate). The degree to which the oven must be adjusted adds an extent of complexity when conversion to an inert
atmosphere must be made.
This procedure is as follows:
1. With a baseline profile obtained, proceed with purging the oven of oxygen and displacing it with nitrogen.
2. When the oven has stabilized (both in terms of temperature and nitrogen) run the test assembly through the equipment
and obtain a profile plot.
3. Compare the plot obtained to the baseline profile plot.
4. If the inerted oven profile is not within an acceptable tolerance of the baseline profile, proceed to adjust the oven con-
trolled variables per the manufacturer’s instructions (if any).
5. Continue the profile adjustment until the baseline profile has been replicated.
Note the adjustments made on blower settings, emitter temperatures, exhaust volume, and/or conveyor speed. This amount
of ‘‘re-profiling’’ will be typical with that particular oven whenever an assembly must be converted to nitrogen reflow
operation.

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9.23.3.11 Test 10: Atmosphere Load Test An oven should maintain the specified level of nitrogen (as expressed in ppm
of residual oxygen) regardless of whether it is idling, passing a single board through or running a production run. Some
ovens have been observed to suffer in terms of going out of specification when operated under load as the boards passing
through adversely affect its ability of nitrogen containment. It is therefore important to evaluate the nitrogen containment
aspect with product passing through the oven.
This procedure is as follows:
1. With the oven thermally stabilized and oxygen purged to specification, locate the probe of the oxygen analyzer in the
preheat and preflow sections, as well as the last vertical heat zone (reflow) of the oven. Observe that the specified ppm
rate of oxygen has been attained and begin passing PCBs through the oven. (NOTE: For this test, unpopulated substrates
of a size representative of typical product can be used.)
2. Feed twenty assemblies into the oven at one printed board length space apart. Monitor the oxygen levels on the oxygen
analyzer. (A chart recorder or other logging device is recommended.)
3. Observe whether or not the oxygen levels remain within the oven specification for nitrogen containment. There should
be no deviation regardless of whether the oven is operating under heavy or light load.
9.23.3.12 Conclusion A vast number of tests and procedures can (and are) used for evaluating reflow soldering ovens. As
time constraints may not allow very extensive testing, the procedures used should indicate performance in terms of how well
the system will actually solder the assembly.
Such factors as how thermally uniform the emitters are, what the actual Convection to IR ratio is (as opposed to what the
manufacturer claims), what the thermal uniformity across the width of the oven tunnel is, what the blower velocity is, etc.,
are key components of oven performance. However, they are only some of the contributing factors to the ‘‘bottom line’’ -
what actually happens at printed board level.
Thus, a proper ‘‘road test’’ of the reflow soldering system being considered is essential. A hands-on evaluation will help
assure compatibility of the chosen system with present and future anticipated applications.
9.23.4 PIN-In-PASTE The statement refers to an assembly process (pin/paste-in-hole) that is sometimes used in the fabri-
cation of mixed technology boards. Mixed technology occurs when leaded and/or leadless SMT components and leaded PTH
components are on the same assembly. The objective of the assembly process for pin/paste-in-hole or intrusive soldering is
to simultaneously apply solder paste onto both the PTHs and the SMT lands. Next, both leaded PTH components and SMT
components are placed in/on the PCB and the assembly is reflow soldered.
9.23.5 Hold Down of Surface Mount Leads Component leads must not be held down during solder solidification because
of inherent reliability issues. Those solder connections will have residual stress that will cause latent failure during the prod-
uct life.
9.24 Other Reflow Soldering Methods A number of other technologies have been developed in pursuit of perfecting the
reflow soldering operation. Each technology has its advantages and inherent limitations.
9.24.1 Hot Bar Reflow Soldering-Resistance ‘‘Hot Bar’’/Pulse soldering Hot bar reflow soldering offers the ability to
control the thermal input into the solder connection without concurrently heating (and possibly damaging) the substrate,
component, or adjacent solder connections.
9.24.1.1 Variables There are many hot-bar soldering variables that contribute to attaining the basic goal of a uniform
temperature profile over the length of the hot-bar thermode. They are:
• Solder volume
• Solder height
• Solder composition
• Shape and uniformity of component terminal
• Thermal capacity from land to land
• Thermode thermal profile
• Solder volume, height and composition and component terminal shape and uniformity are controlled by process and speci-
fications. The thermal capacity is minimized by using preheat of the assembly in order to reduce differences in tempera-
ture across the assembly. However, controlling all of these variables will not be effective if the thermal profile of the
thermode has steep thermal gradients.

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9.24.1.2 Thermode Types There are three basic types of hot-bar thermodes, i.e., hot-ram, parallel-gap, and pulsed-heat
thermodes.
A. Hot-Ram Thermodes – The hot ram is a constant-heat thermode that is maintained at the soldering temperature. This
type of thermode is brought into contact with a pressure plate/hold-down that contacts the solder connection during the
heating or reflow time. There is no control of the thermal profile during reflow soldering with this type of thermode.
B. Parallel-Gap Thermodes – Parallel-gap thermodes pass electrical current directly through the material being soldered.
The ‘‘IR’’ (current x resistance) through the material generates the thermal energy for reflowing the solder in order to
make a connection. One drawback of this method is that it terminates one connection at a time. Thus, depending on the
number of solder connections being made, using this type of thermode can be a very time-consuming process.
C. Pulsed-Heat Thermodes – The use of pulsed-heat thermodes is probably the most common form of hot-bar reflow sol-
dering. This is because it is less demanding than using the parallel-gap thermode and offers more control than does the
use of the hot-ram thermode.
The thermode is preheated and lowered onto the component’s leads. The downward force on the leads is allowed to reach
a preset value before electrical energy is pulsed through the thermode material in order to generate the heat required for
solder reflow.
The thermode then remains down in order to hold the leads in place during solder cooling. After a preset cooling time has
elapsed, the thermode is retracted from the component leads.
Pulsed-heat thermodes can be made for single or multiple-side component lead termination. However, as the end of the ther-
mode becomes larger (longer) the voltage drop across it increases and this can damage sensitive circuit devices. The effects
of heat sinking on the larger blade will also produce steeper thermal gradients that may result in uneven soldering.
A folded thermode can be used to lower the voltage drop, such that the current flows across the width of the thermode blade
instead of along the width. This type of pulsed-heat thermode will not see any non-uniform heat sink effects because the
voltage drop is so small.
9.24.1.3 Resistance Soldering - Description In this process, an electric current is passed through the device leads or a
‘‘heater bar.’’ The resistance of the leads (generally of the material or the contact resistance) is then used to produce the heat
required for soldering. This method can be applied to either individual connections (called ‘‘single point soldering’’) or mul-
tiple connections along one or multiple sides of a leaded component. A thermocouple is generally attached to the heater bar
(or thermode) near where the leads will be soldered and a ‘‘feedback’’ control system is used to control temperature. Hav-
ing the heater bar too hot will burn flux constituents into the substrate.
Resistance soldering is almost exclusively used for the soldering of surface mount leaded devices, with the leads typically
extending away from the device body (e.g., the ‘‘gull wing’’).
In general, there are two types of resistance soldering systems:
• Single point soldering systems, which are designed to solder one lead at a time. These use either the heater bar or a ‘‘par-
allel gap’’ soldering system, where the current passes through the device leads.
• Multiple lead soldering systems, which are similar in method to the resistance bar system, except that the bar extends
across a number of leads on one side of a part. Some systems allow for soldering all four sides, typically using four inde-
pendently operated bars.
Solder is supplied by pretinning either the device or pad or is added by using solder paste or preforms. Already reflowed
materials (solder from tinning or preforms) are typically preferred over paste, due to the lower outgassing and lower volume
required.
9.24.2 Laser Reflow Soldering The basic principle underlying the use of lasers for soldering is that light energy can be
absorbed into a material and converted to heat. By employing a light beam in the visible or infrared portion of the electro-
magnetic spectrum to carry this energy from its source to the point of delivery, we can use optics to focus and direct it to a
very small point. Since the laser emits coherent radiation, a beam of energy which has a minimal divergence can travel large
distances without getting significantly wide; thus maintaining its energy level as it moves away from its source.
In order to appreciate the potential of employing lasers in a reflow soldering operation, it is important to redefine some of
the traditional approaches to viewing ‘‘efficiency’’ as it relates to energy conversion. The ability of a laser to convert elec-
trical energy into output light energy is relatively ‘‘inefficient,’’ with the best lasers achieving only a 2-15% energy conver-
sion efficiency. However, virtually all the output light energy can be delivered to a small spot, e.g., as small as 0.05 mm
[0.002 in] or even less.

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Consequently, for applying heating energy to small areas, there are no methods as ‘‘efficient’’ as lasers. This ability to very
selectively apply energy has won the laser a widespread application in the production of microelectronics. Researchers have
proved that laser soldering offers even greater benefits in the control of intermetallics and grain structure that provide fail-
ure rates that approach or are better than those associated with the use of solderless (wire) wrap connections.

9.24.2.1 Laser Soldering Principles Generally, there are two types of lasers that are being used for these manufacturing
operations: Carbon Dioxide (CO2) and Neodymium-doped Yttrium Aluminum Garnet (Nd:YAG). Both operate in the infra-
red region of the electromagnetic radiation spectrum, invisible to the human eye.
The Nd:YAG provides its primary light output in the near-infrared region at 1.06 microns. This wave-length is readily
absorbed by conductive materials, such as tin-lead, copper, beryllium copper, nickel, and other metals. On the other hand,
the 10.6 micron output wavelength of the CO2 laser is more easily absorbed in insulative materials, such as plastics, ceram-
ics, epoxy, fiberglass, etc. At 1.06 microns, the solder has a lower reflectance (higher absorption) than the printed board.
However, at 10.6 microns the reflectance of the solder is substantially higher (or absorption significantly lower). (The effects
of these differences will be discussed later.)

9.24.2.2 Laser Soldering Calculations For microelectronics applications, there has been enough research performed so
that the required powers can be closely estimated by systems manufacturers. However, it may be useful for manufacturing/
packaging engineers to establish initial parameters for a particular task.
The laser spot diameter can be determined from the equations below for lasers operating in the multimode phase.
S=fϕ
In the fundamental TEM00 mode:
S=1.27λf/D
Where:
S = Minimum focused spot diameter (at l/e2 points).
f = Focal length of the lens.
ϕ= Laser beam divergence (at i/e2 points), in radians.
λ = Wavelength of the laser.
D= Input beam diameter of the lens.
The depth-of-field is defined as the focal range over which the spot diameter remains within a factor of √2 of the minimum
spot diameter.
Depth-of-field = 8λ/π z f2/D2 = 2.5λ z (F#)2
The number is theoretical, and does not necessarily correspond with the actual working depth-of-field, which is affected by
both the material and laser parameters such as peak power, pulse duration and average power. However, it is a good guide
for selecting the right objective lens for focusing onto the work.

9.24.2.3 Conveyor Although the conveyor mechanism is not usually an area where problems develop, it can be the source
of soldering problems if not properly operated and maintained.
For example, if a finger conveyor is too tight, the boards will have a tendency to bow as they are going over the wave sol-
der pot. This phenomena occurs when the finger conveyor is too tight and, as the board goes up through the system, it
expands (there is not enough room for this expansion). As this expansion happens, the board bows down into the wave sol-
der pot, creating a change in the contact area with the wave, which also changes the dwell time in the solder, impacting the
soldering of the board. Defects typically found due to this situation are indicators something is not correct in the conveyor
operation.
These defects include:
• Icicles on the bottom side.
• Solder source side shorts.
• Solder balls on the solder source side.
• Solder hole fills on outer edges of the board.

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• Missing solder on outer edges of the board.

• Excess solder on the trailing edge of the topside of the board.
Another conveyor issue to address is the speed of the conveyor in relation to the amount of product being conveyed within
the system. If the conveyor is full of boards, the preset conveyor speed may be different as the weight of the products slows
the conveyor. This will impact the thermal profile established for the particular product.
If fixtures are used, verify that they are not hot when reused for product conveyance. The implication being that a hot fix-
ture going over a foam fluxer will knock down the foam head, and consequently, the board will not be fluxed and prepared
for soldering.

9.24.3 Vapor Phase Soldering

9.24.3.1 Description Vapor phase soldering uses the condensation of vapor from a boiling fluid to heat the PWA and
components up to solder reflow temperatures. In principle, the PWA is lowered into the vapor over the boiling fluid using
either an elevator or conveyor, where it dwells until reflow is achieved and is then removed. Vapor phase soldering is used
for both surface mount and plated-through hole assembly and was originally developed for the soldering of backplane PWAs
using solder preforms4.
The vapor used is generated by boiling ‘‘primary’’ or ‘‘reflow’’ fluids, which are generally organic compounds in which the
carbon-bound hydrogen atoms are replaced with fluorine atoms. These materials are colorless, odorless, non-flammable,
chemically inert, and non-toxic.
Due to the expense of the reflow fluid, a variety of methods are used to keep the vapor contained in the system (vapor loss
constitutes one of the largest operating expenses). These methods include cooling coils, long, enclosed tunnels (inline sys-
tems), automated covers, and sacrificial vapor blankets (batch systems). The sacrificial vapor blanket (‘‘dual phase’’) system
uses a secondary vapor blanket, which is usually added over the boiling fluid and contained with a secondary set of cool-
ing coils. The product generally dwells in this zone on the way out of the system to allow for the primary vapor to drain
back into the reflow sump preventing/reducing drag out losses. Due to the restrictions on CFC materials such as Freon TF,
non-CFC substitutes are available, but most new systems rely on increased cooling coils and a system of tunnels and/or cov-
ers to control fluid loss.
The heat-up rate for a solid body in a vapor phase system can be modeled using the following equation5:

Ts = ((TF - To) * (1 -e(-t/to))+to

(δ z c z V)
to =
(h z A)

When
Where:
TS = Temperature of solid at time t, °C
t = Time, seconds
T0 = Starting temp, °C
c = Specific heat, J/(kg z K)
h = Heat transfer coefficient, W/(m2 z K)
TF = Boiling/Vapor point of reflow fluid, °C
to = Characteristic time where TS is = 63% of TF, seconds
δ = Density of solid, kg/m3
V = Volume, m3
A = Area of body, m2

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It should be noted that when soldering is involved, the heat-up profile predicted by this equation would also have a delay
at approximately the melting point. The length of the melting point is proportional to the difference between the melting
point of the solder and the boiling point of the fluid. This delay is predicted by the equation:

(λS z δ z V )
tL =
(h z A (TF − TS))

Where:
tL = Time for solder to change phase from solid to liquid, seconds
δ = Density of solid, kg/m3
h = Heat transfer coefficient, W/(m2 z K)
TS = Temperature of solid at melting point of solder, °C
λS = Heat of fusion of solder, J/kg
V = Volume, m3
A = Area of body, m2
TF = Boiling/Vapor point of reflow fluid, °C
9.24.3.2 Troubleshooting Typically, problems in vapor phase soldering take three forms:
• Dissolution of termination materials (especially on chip devices and gold leaded parts), leading to poor solderability and
lowered solder connection strength.
• Open solder connections caused by the solder not staying in the pad area but flowing up the lead (also known as solder
wicking).
• Lifting of one end of chip devices, creating an open circuit (tombstoning).
Table 9-9 lists some specific problems and suggested solutions.
Table 9-9 Problems and Solutions in Vapor Phase Soldering
Problem Probable Cause Typical Solutions
Poor solderability on Excessive dissolution of termination material into Reduce dwell time after achieving reflow.
leads. solder. Use parts with barrier layer (typically Ni) between
termination material and solder joint.
‘‘Crusting’’/Lack of solder Dissolution of flux by condensing reflow fluid. Lower mass of work piece (e.g., remove/reduce
paste reflow. tooling).
Change to a reflow fluid with lower rosin solubility.
‘‘Tombstoning’’ or tipping Solder reflows at one end of device before the Revise pad size to reduce pad extension and
up of chip devices. other end and wetting force tips part. thus tipping force.
Use solder paste, which slows the rate of reflow,
giving the other side of the chip time to ‘‘catch
up.’’
Open circuits on leaded Leads not in contact with paste or pad having Use solder paste, which slows the rate of reflow,
SMD devices. lower effective mass and heat-up faster than giving the other side of the chip time to ‘‘catch
substrate, solder flows preferentially to hotter up.’’
area.

Recent developments in vapor phase system design have begun to include inline IR preheaters. These preheaters both bake
out solder paste and raise the initial temperature of the PWA, which lowers the heating rate. It has been reported that the
use of this hybrid IR/vapor phase system combines the best of both IR and vapor phase as it greatly reduces the incidence
of ‘‘tombstoning’’ and open solder connections.
9.24.3.3 Critical Parameters for Vapor Phase Process Control By its very nature, the vapor phase process has few criti-
cal process parameters. The heat-up rate is primarily controlled by the design of the part being soldered (size, material, mass,
etc.). In setting up the parameters for a new assembly, the operator only controls the speed at which the hardware is intro-
duced to the vapor and the time it dwells during reflow and cool-down.
The dwell time to achieve reflow should be kept as short as possible while achieving complete reflow (usually monitored
by either visually monitoring the progress of reflow or thermocoupling the PWA). The dwell time in the system after reflow
(out of the reflow vapor zone) is critical to ensure that the assembly is not inadvertently shaken prior to solder solidifica-
tion.

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Most of the fluids also break down to some degree under thermal loading (use), releasing perfluoroisobutylene (PFIB), a
pulmonary irritant with an accumulated lethal concentration of 0.5 ppm over six hours. Vapor phase systems incorporate
venting systems to control PFIB release but overheating can increase the rate of PFIB generation. The heating elements in
the vapor phase system should be run at an ‘‘idle’’ system when product is not actually being soldered to reduce PFIB gen-
eration. Rosin contamination can build up on heater surfaces, causing localized ‘‘hot spots,’’ and should be monitored and
controlled. Contaminated fluid can usually be reprocessed by the fluid vendor or locally by distillation/filtration to control
rosin accumulation.
Fluid loss is also critical, both as an operating cost and a safety hazard. Reflow fluids are typically slippery, and condensa-
tion on surfaces, like floors around the system, can be dangerous. Fluid loss is generally caused by drag-out (a function of
conveyor speed) or excessive venting.

9.24.4 IR Soldering

9.24.4.1 Description IR soldering relies on the absorption of infrared radiation into the substrate, components, solder, and
flux to heat the assembly to soldering temperatures. IR radiation is sometimes broken down in classes by wavelength. For
practical purposes, IR wavelengths greater than 100 µm are not used.
The principle of operation of IR soldering systems is that a surface at temperature T will emit radiation. The Stefan-
Boltzman law gives the heat flux generated by this radiation:

q = aT4

Where:
q = Heat flux density, W/m2
a = Constant (for ‘‘black body’’), 5.7 X 10-8 W/(m2 z °K4)
T4 = Temperature of source, °K

The energy transfer between this source and another body (assuming both are ‘‘black bodies’’ or perfect absorbers of IR) is
given by:

Q = F1,2 z A1 z σ z (T14 z T24)

Where:
Q = Thermal energy, W
F1,2 = View factor, unitless
A1 = Area absorbing the IR energy
σ = Constant (for ‘‘black body’’), 5.7 X 10-8 W/(m2 z °K4)
T1 = Temperature of source #1 (emitter), °K
T2 = Temperature of source #2 (recipient), °K

The absorption factor varies as a function of surface texture (rougher surfaces absorb more energy), material, and wavelength
of IR radiation.
The addition of inert atmospheres for soldering using IR is also being introduced. The benefits derived are:
• Lower oxidation of the devices, creating the ability to use less active fluxes, as well as reducing the area of spread of the
flux, thus decreasing the area needing to be cleaned, as well the impact of solder balling.
• As the combustibility of the fluxes are reduced in a nitrogen atmosphere, higher processing temperatures (up to 300 °C)
may be realized.
• The discoloration of the epoxy surfaces is reduced.

9.24.5 The IR Reflow Process A great deal of attention has been focused on equipment variations and the inherent
advantages and disadvantages of the different methodologies. For example, IR reflow soldering systems can be classified
with respect to being:
• Lamp IR – Utilize line-source emitters, typically IR lamps.
– Emissions are typically in the low-to mid-IR range.
– Printed board heating is mostly by radiant energy.

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• Reflector-Lamp IR
– An evolution of the Lamp IR system.
– Reflectors or walls, heated by the lamps, become secondary emitters.
– Chamber atmosphere heated as well.
– Printed board reflow is accomplished by a combination of radiation and convection.
• Convection IR
– Typically use area source emitters.
– Emissions mid-to far-IR range.
– Chamber atmosphere heated as well.
– Air movement induced by exhaust draw, thermal convection, and/or by fans or blowers
– Heating of printed board by both IR and Convection.
• Forced Convection
– Utilize heated plenum boxes with (typically) metal face panels to heat air/gas.
– Relies primarily upon heated gas medium to heat and reflow the printed board assembly. Air is moved with fans and
blowers.
– Some incidental IR emissions present.

9.24.5.1 Reflow Profile Though somewhat flexible and ‘‘forgiving,’’ the heating of the assembly to effect reflow should
be a controlled process that adheres to a properly defined reflow profile. Figure 9-24 illustrates a typical reflow profile for
a forced-convection IR reflow soldering operation.

Temp. 230
T1 = Full Liquidous Temperature
Degrees C 220 T2 = Corresponds to Most Vulnerable Component
T2
210
200 T1

(183) Solder melts 183

Dwell at Liquidous
170
170
150
150
Preflow Soak
Duration
< 1 min.
120
Preheat
Soak Activators React
100

3C/sec.
Maximum Ratio of Rise

50

20

0
PREHEAT PREFLOW REFLOW COOLDOWN

Time (3-6 Min. Duration) IPC-820a-09-24

Figure 9-24 Typical Tin-Lead Reflow Soldering Thermal Profile

The profile is composed of four distinct sections: preheat (ramp), preflow (soak), reflow and cooldown. Each part of the pro-
file is designed to achieve a specific set of functions with the combined goals of obtaining a sound solder connection and
preserving the functional integrity of the components.
9.24.5.2 Preheat (Ramp) As the assembly enters the oven tunnel (at ambient temperature) the heat transfer process begins
as energy is introduced to the assembly. To reduce the risk of thermal shock to components, delamination of the printed

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board, and to prevent ‘‘skin effect’’ of the solder, control of the rate of heating is most critical in the preheat portion of the
profile. Thus, many component manufacturers, particularly suppliers of ceramic capacitors, recommend a rate of heating in
Ramp/preheat of less than 4 °C per second. The rate of heating should be application driven with consideration given to
component complement.
Most users initiate a preheat ‘‘soak’’ period. Upon reaching approximately 100-120 °C (with RMA fluxes), assembly tem-
perature is maintained for several seconds to allow energy to transfer throughout the assembly. In addition to allowing for
early reduction of occurring thermal gradients in the assembly, some flux formulations benefit and specify this soak period,
particularly those with a less than 85% metal content. The preheat soak helps prevent slumping. A preheat soak is usually
a less critical requirement with formulations having a higher percentage of metal content.
Throughout the preheat stage, activators commence ‘‘scrubbing’’ and some solvents begin evaporation. In some solder paste
formulations, some of the flux activators may begin oxide reduction at this stage.

9.24.5.3 Preflow (Soak) Prior to attaining reflow temperatures, the assembly is allowed to ‘‘soak’’ for a period of time.
Printed board assemblies with polymer based substrates require time to allow heat transfer to occur throughout the assem-
bly and approach near-equilibrium. The remainder of the noncontributing solvents contained in the solder paste are driven
off. Activators react with the surface to clean component and land interfacing surfaces.
As the temperature of the solderable interconnections are brought to just below the solder melting point, fluxes are brought
to full activation and wetting begins.
The temperature range and duration of this stage varies among types of fluxes and among different solder paste manu-
facturers’ formulations. Generally, RMA fluxes become fully activated in a preflow soak at temperatures between 150 and
170 °C, Figure 9-25. Some RMA formulations achieve optimum results when the preflow soak is held to less than one
minute.

IPC-820a-09-25

Figure 9-25 Typical Type RMA Flux Thermal Profile

Some OA (Organic Acid) fluxes exhibit similar preflow characteristics to the RMA fluxes. Many OA flux formulations, Fig-
ure 9-26, are optimized with a gradual slope in which temperature rises from approximately 100 to 170 (+0/-15) °C. The
duration of preflow is very critical to OA fluxes and will typically be approximately one minute though this will vary among
different manufacturers’ formulations as some recommend minimizing the duration, Figure 9-27.

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IPC-820a-09-26

Figure 9-26 Typical Type OA Flux Thermal Profile

IPC-820a-09-27

Figure 9-27 Typical ‘‘No-Clean’’ Flux Thermal profile

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9.24.5.4 Reflow As the temperature of the solder paste on the interconnect passes the solder alloy’s melting point and
enters a molten state, the assembly begins the Reflow portion of the process. With 63Sn/37Pb eutectic solder this occurs at
183 °C.

During the Reflow stage, all solderable portions of the assembly reach their desired peak temperatures. Most solder manu-
facturers recommend bringing the interconnect temperature approximately 15 to 25 degrees above the alloy melting point to
achieve ‘‘Full Liquidus’’ and assure good solder flow and aid fillet formation. (This is noted as ‘‘T1’’ in the profile
examples.) The supplier should be consulted regarding the actual temperature for a particular formulation.

The duration of time at which a solderable interconnect resides above the melting point of the solder paste is called the
‘‘Dwell at Liquidus.’’ The Liquidus Dwell extends through the Reflow portion of the profile and into the Cooldown portion
until the solder reaches solidus. This is the most critical portion of the reflow profile.

First of all, these are the highest temperatures endured by the assembly during the process so the duration at these elevated
temperatures should be minimized. As the majority of the activators have reacted (except in Reactive Atmosphere systems,
Figure 9-28) there is usually no real advantage to prolonging liquidus. It is while the solder is in a molten state that inter-
metallic growth is promoted.

While intermetallic formation occurs in the solder interconnection over time naturally, a sustained Liquidus Dwell period
essentially gives it a ‘‘head start.’’ The longer the duration, the more intermetallic growth takes place. The resulting inter-
metallic, typically 65Sn5Cu, is a non-solderable alloy and thus excessivity threatens the durability of the solder interconnect
as it is also brittle in nature. As cooling of the interconnection to below solidus is also part of this duration, the actual dwell
for a particular application will also be factored by the thermal gradient present and the mass of the assembly.

IPC-820a-09-28

Figure 9-28 Typical Reactive Atmosphere Flux Thermal Profile

9.24.5.5 Cooldown As the assembly passes peak temperature and out of the heated tunnel, it begins to cool, eventually
passing the point where the solder solidifies. Cooling can be aided by fans, blowers, inert gas curtains, refrigeration, normal
exposure to ambient air or a combination of several such mechanisms.

It is currently recommended that the rate of cooling not exceed -4 °C/sec so that thermal shock can be avoided. While being
cautious from a component perspective, rapid cooling promotes a finer grain growth in the connection contributing to a
stronger interconnect.

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The actual duration time and temperature range for each zone not only varies among the different types of fluxes used, but
also among the formulations of different manufacturers. The extent of this variation virtually prohibits ‘‘generic’’ profiles
particularly for organic activated flux formulations.
However, Figures 9-22 through 9-25 also illustrate ‘‘composite’’ profiles for RMA, water soluble (OA), and ‘‘no-clean’’
fluxes as well as for a reactive atmosphere system. The information used to derive these profiles is based upon discussions
with several solder paste manufacturers. The user should consult his supplier concerning actual time and temperature dura-
tions recommended for the solder paste being used. It is important to note that most fluxes allow for a fairly substantial
‘‘envelope’’ concerning temperatures at the different stages though actual duration may be, in some cases, more stringent.
9.24.5.6 Reflow Specification The development of a Reflow Specification should be a requisite for any facility using
mass reflow. This specification mandates the temperatures the assembly will be exposed to at the peak of the reflow cycle.
T1, the ‘‘Full Liquidus Temperature’’ is the minimum peak temperature that any solderable interconnection must achieve to
effect ‘‘full liquidus.’’ This is affected by such factors as solder paste alloy, metal content, particle size, flux, surface tension
and fluidity of the solder. As noted earlier, this number will vary among different formulations and should be supplied by
the solder paste manufacturer.
T2 corresponds to the ‘‘Most Vulnerable Component’’ (MVC) maximum peak temperature. Through consultation with
Design Engineering and vendors, the component that has the lowest thermal threshold and is most likely to be thermally
damaged is identified.
The MVC might be a through-hole mounted component with a low material melting point, i.e., an electrolytic capacitor, a
plastic connector, switch, label, or some other heat-sensitive part or material. The lowest common denominator within the
assembly will determine the highest temperature that any part of the assembly should be exposed to. A buffer of -5 °C should
be taken from that threshold to establish the MVC temperature used in the specification.
In establishing a reflow specification, the tolerable thermal gradient that can be sustained is self-established. Too often the
gradient across the PCB assembly is treated as an abstract. In attempting to achieve minimum gradient, more important
parameters are sometimes treated as secondary objectives.
For example, priority should be given to reducing the liquidus dwell time. However, preflow soak periods need not be elon-
gated for the sake of a reduced gradient and possibly jeopardize optimum time durations with respect to solder pastes and
glass transition.
9.24.5.7 Minimizing Degenerative Effects The relationship of a procedure with the process it is part of should be a ben-
eficial one and not degenerative. The various physical and thermal attributes of the reflow system make it potentially vola-
tile and a lack of control could result in harm to the assembly.
9.24.5.8 Rate of Heating Thermally, the most critical part of the profile is the dwell at liquidus. High temperature expo-
sure is greatest here. Liquidus dwell is comprised of the entire time that solder and interconnect are at temperatures above
the melting point of the alloy. As intermetallic growth is predominant during this period, it is important to minimize the
duration. In addition, extended exposure to the high temperatures experienced in this portion of the profile will also contrib-
ute to degradation of the substrate laminate.
By accelerating the rate of heating from preflow to peak temperature as well as the rate of cooling as the PCB assembly
exits the heated portion of the system, significant reduction of liquidus dwell time can be attained. The more substantial the
mass of the assembly, the greater the effect. Besides impeding intermetallic growth inherent in longer liquidus durations, the
accelerated cooling promotes finer grain growth and hence solder connections of greater integrity.
9.24.5.9 Mechanical Considerations Mechanically, conveyor design (manufacturer dependent) and adjustment (operator
dependent) are obvious areas of concern. Lack of repeatability and overall integrity of the edge conveyor will result in
dropped boards. This results in either partial destruction of the assembly or, at the very least (where a belt conveyor or other
‘‘catch’’ device ‘‘rescues’’ the assembly), mass displacement of components usually to the point of ‘‘beyond repair.’’ In
addition, the conveyor should be smooth and not contribute vibration that might upset component location prior to or dur-
ing reflow.
9.24.6 MVC Temperature Determination In some applications, the Most Vulnerable Component temperature might be
determined by the internal heat sensitivity of an active device and hence, the internal temperature tolerances should also be
noted. Of primary concern are active multi-terminal devices in which overall performance life and reliability may be
adversely affected if internal die temperatures experience excessive heat.

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If possible, when such devices are present on the printed board being profiled, the die is accessed by drilling through the
package and a thermocouple is attached with a thermally-conductive adhesive. A thermocouple can then also be attached to
one of the device’s lead-to-land interconnections and the thermal gradient noted. Ideally, the die should remain cooler than
the interconnect being soldered.

9.24.7 Air/Atmosphere Quality A number of systems recirculate the heated oven atmosphere back into the process por-
tion of the tunnel. In some systems, this can be as much as 80 to 90 percent of the air that is exhausted out of the system.
Volatiles are normally given off in the reflow soldering process. These vaporized materials are carried by the convection
currents and are exhausted.
Thus, the direction of exhaust flow through the system with respect to product flow direction may be of minor consequence
in terms of the volatiles condensing on the PCB assemblies in process. However, reintroducing a large percentage of the
volatiles through recirculation of previously exhausted atmosphere may contaminate work in process. This becomes particu-
larly critical on secondary side reflow of double-sided printed board assemblies and when a ‘‘no clean’’ approach is being
taken. Safeguards, such as adequate filtering of recirculated exhaust gases (if used) should be taken.

9.24.8 Monitoring and Control Though previously described as ‘‘forgiving,’’ the reflow process must be controlled. With
fine and ultra-fine pitch devices and the resulting ‘‘less material to work with,’’ the process window becomes narrower. It
is generally considered a good policy to monitor the actual process.

9.24.9 Profiling Devices Wireless data-trackers, i.e., devices that attach to a printed board assembly with strategically
placed thermocouples, follow the product through the oven and record temperature, and are commonly used for the initial
profiling procedure. Generating comprehensive and informative plots and management information, they can be used to audit
the process. Ideally they are sent through the oven during the course of the production run and the data compared with that
obtained when the profile was optimized. Though disruption to the product flow is minimized, this method of monitoring is
random rather than continuous.
Another profiling device uses both an instrumented printed board and stationary thermocouple probes placed inside the
length of the oven tunnel near the conveyor. Besides being used as a profiling tool, comparing board temperatures to set
points and to observed temperatures inside the oven, this device can actually monitor the heated air temperature throughout
the different zones of the tunnel. It displays deviation and/or drift of the oven environment relative to the amount of so-called
convective heating the oven uses to heat product.

9.24.10 Temperature Control The ‘‘bottom line’’ in process control in reflow is the actual printed board assembly tem-
perature itself. Have adequate temperatures been attained for successful activation of fluxes and thorough reflow? Ideally,
this should be monitored on a continuous basis and yet should not impede production.
Infrared pyrometers take advantage of the fact that, when heated, materials emit energy within infrared wavelengths. Thus,
for example, IR pyrometers can be incorporated into the process control system. Such systems can also operate in a ‘‘Con-
trol’’ mode where, in addition to temperature monitoring, closed-loop operation is initiated. By observing and correcting
temperature in ± °C increments, action can be taken long before detrimental effects can impact reflow. Control of the pro-
cess is maintained.

9.24.11 Inert Atmosphere Operation While some have found reflow soldering in an inert atmosphere beneficial to
achieving a better wetting angle, the current trend towards implementing nitrogen in the reflow oven is being driven by two
distinct processes -the use of ‘‘no-clean’’ fluxes and bare-copper assembly processes.

9.24.12 No-Clean Processing ‘‘No-Clean,’’ of course, implies that the assembly soldered with such a formulation will not
require post-soldering cleaning. This involves the use of low and very low residue fluxes.
A number of factors will ultimately affect feasibility for a given application. External cosmetic appearance, solder connec-
tion quality and testability, in light of the remaining residue, will be dictated by user standards and requirements.
The process itself may be altered with the inception of ‘‘No-Clean’’ solder paste formulations. Current direction indicates
that users can expect some differences in rheology and printability of these pastes.
Reflow characteristics are also likely to be different with ‘‘No-Clean’’ and related technologies. While some low-residue sol-
der paste formulations are available that work well in ambient (oxygen laden) atmosphere, many ‘‘No-Clean’’ solder pastes
require reflow to take place in an inert nitrogen atmosphere.

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Also, while some ‘‘No-Clean’’ solder paste formulations have been successfully tested at approximately 300 ppm of oxy-
gen, the higher the concentration of inert atmosphere, the wider the process window. Optimum results, in terms of very low
residue, have been attained with nitrogen levels of less than 20 ppm oxygen.
9.24.13 Processing Bare Copper The use of bare-copper assembly processes has been prompted by the need for
improved coplanarity on the printed board substrate when placing fine-pitch surface mount devices. (Hot air leveling of sol-
der during printed board fabrication does not usually attain adequate levels of coplanarity when 0.5 mm [0.020 in] pitch
components are being attached.)
In the processing of bare-copper assemblies, the printed board is fabricated in the usual manner except for the adding of the
tin-lead coating. The substrate is, instead, coated with a sealant which prevents the copper from oxidizing. Assembly is ‘‘as
usual’’ with solder paste deposition (screen or stenciled) and component placement.
During reflow the sealant vaporizes at about 100-120 °C (during the preheat stage) exposing the copper to the solder paste.
Thus, with the copper now exposed, reflow must be done in an inert atmosphere.
How oxygen-free the oven atmosphere needs to be varies among users with some affecting successful results in atmospheres
comprised of approximately 500-700 ppm oxygen. Refined specifications call for a nitrogen atmosphere with less than 50
ppm oxygen anywhere in the process where the printed board assembly is elevated above 150 °C.
9.24.14 Inert Atmosphere Control With the market demand for reflow systems able to contain a tight, inert atmosphere,
a good deal of ‘‘specmanship’’ has arisen. An oven will have ‘‘sweet spots’’ and weak spots in terms of residual oxygen
measured. An oven’s capability should be stated in terms of maximum residual oxygen in the heated process area of the
tunnel, e.g., ‘‘Containment should be noted as the amount of residual oxygen, stated in parts per million (ppm) as measured
anywhere in the process area (heated tunnel) of the reflow oven.’’
A probe connected to an oxygen analyzer can be placed anywhere in the heated tunnel where the reflow process takes place
(preheat, preflow, Reflow) and the ‘‘worst case’’ oxygen measurement will be the manufacturer’s specification added to the
purity level of the supply gas. If, for example, an oven is specified to be able to contain nitrogen to 15 ppm of oxygen and
the source purity is 5 ppm oxygen, then any measurement made within the process area of the tunnel should read 20 ppm
oxygen or less. This number should stand when the stabilized oven is operating under load and unloaded, and at operating
temperature.
Some reflow oven designs do not lend themselves to tight atmosphere containment. The other half of the equation (from a
user’s perspective) is gas consumption. As the volume of nitrogen used to attain a given oven atmosphere level increases,
the associated operating cost goes up.
Many users audit the system through periodic checking of the nitrogen level with an oxygen analyzer connected to a single
probe capable of accessing various points within the process area of the oven tunnel. Several systems are available with
online monitoring of residual oxygen levels with several probes within the tunnel multiplexed to an oxygen analyzer. Sample
areas are either selected manually or automatically polled through software. Measurements are data logged for later play-
back and alarms can be set for detecting deviation outside acceptable bounds.
9.24.15 Machine Selection When getting started with infrared soldering of surface mount assemblies, and if production
quantities are low, any low-cost belt machine will probably provide adequate results. However, if there are many different
boards or production volume is expected to be high or there is a wide variety in the product mix, there are many factors to
be considered in the selection of a machine capable of high manufacturing yields.
9.24.16 Conveyor Type The wire mesh belt-conveyor machines were the first to be introduced, and they generally cost
less than other types of reflow soldering machines. Loading can be by hand or automatically transferred from another
machine or conveyer. For surface mount assemblies with components mounted on each side, a special fixture will be
required so that the components are not displaced by the belt.
Adjustable width conveyors are more expensive. They are often used in conjunction with automatic conveyor systems pro-
viding smooth loading and unloading of the surface mount assembly.
A well-designed adjustable width machine grips or supports the bare board along the edges with a minimum of interference
when components are placed closely along the edge. The pins or supporting points holding the board should be very small.
All adjustable width machines should have a conveyor which does not drop boards. A dropped surface mount assembly usu-
ally means that the assembly is totally destroyed. Depending on the type of heaters used, damage or breakage to the heat-
ers may also occur.

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The adjustable width rail mechanism should be designed so that the rails remain straight during production at operating
temperatures. The rails should not warp. Sometimes longer support pins are used to compensate for warping rails to prevent
the board from dropping. However, note should be made of the pin length supporting the edge of the board. Occasionally,
other forms of distortion can result in the chain or supporting pin becoming deflected or twisted which then may cause a
board to drop.
During evaluation of an infrared machine, select a typical temperature profile and, once the machine has reached steady state
conditions, run 100 bare boards, all the same width, through the machine at a conveyor speed representative of that profile.
If no boards drop, one can assume that the machine is designed correctly.

9.24.17 Wavelength Since 1984, there has been a debate as to the correct wavelength for best reflow soldering of surface
mount assemblies. Equipment manufacturers with quartz lamps promoted the concept of rapid response. Equipment supplied
with flat surface emitters claimed that lower source temperatures caused less damage to the board assembly.
In the past few years, much has been learned about the proper control of both types. Some equipment has secondary emit-
ters. Other equipment has air convection to eliminate the shadowing effect around or under large components.
Only through proper evaluation of any machine using a quantity of typical surface mount assemblies, can one ascertain the
answer to the above question, that is, by proving that the machine reflow solders as it should with none of the disadvan-
tages.

9.24.18 Longitudinal Process Temperature Profiles When one thinks of the temperature profile in an infrared reflow
machine, one immediately visualizes the profile through the length of the conveyorized machine, either that defined by the
set points on the controllers for each stage through the machine or the temperature measured on a printed board. All equip-
ment suppliers furnish graphical profiles measured on a board through their machine. For low production volumes, this may
be adequate.
However, for high volume, temperature response is a serious concern. To properly test a machine for quick response would
be to place thermocouples on several loaded assemblies. The distance between assemblies should be as they would be in
production.
For a system with very rapid response, the assemblies with thermocouples mounted could be run consecutively. If the time
response of a system is longer, one might wish to consider fully loaded surface mount assemblies between those which have
the thermocouples attached.

9.24.19 Lateral Temperature Profiles Lateral temperature profiles are generally provided by equipment manufacturers
indicating the temperature across a printed circuit board as it travels through the infrared reflow soldering machine. The lat-
eral temperature profile across a board should be within a few degrees temperature variation. Some equipment manufactur-
ers show the temperatures obtained with six thermocouples across a given board. A flat lateral profile is the objective.
On equipment with a flat mesh belt conveyor, the heaters generally extend beyond the width of the conveyor belt. Since
most heaters have end effects, the central zone of the heater usually provides a flat lateral temperature profile. For example,
a 300 mm [12 in] wide conveyor mesh belt might have a 400 mm [16 in] heater. The difference of 50 mm [2 in] at each
end of the heater leaves the remaining center portion of the heater with the ability to produce a flat temperature profile. This
is shown in Figure 9-29.

IPC-820a-09-29

Figure 9-29 Lateral Temperature Profiles

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The flattest portion of this temperature profile is obtained by running the product down the center of the belt conveyor.

9.24.20 Other Concerns The time that is required for a machine to reach the steady state operating temperature depends
on the wattage density of the heaters. Low heater wattage density will take longer to reach the desired temperature. While
an excess of wattage density will provide a shorter heat-up time, the temperature overshoot is more difficult to control unless
the thermocouple is located in the best place to sense the temperature conditions of the whole environment, that is, the heater
source, the presence of the assembly or assemblies passing by as well as the atmosphere in the heater zone. This can only
be achieved through the proper placement of the thermocouple and proper selection of temperature controllers which have
the ability to be programmed for optimum effectiveness and response.
In addition to the heat-up time, the time to re-establish a new steady state condition after changing the control settings or
longitudinal temperature profile through the system is of concern to those running with high volume production quantities.
Naturally, it takes longer for the machine to cool down to a new steady state temperature.
Some equipment is available with a top which is easily opened for maintenance such as to change a heater or a thermo-
couple. Most machines are available with standard electrical controls while others are available with computer controls.

9.24.21 Can the Equipment Do the Job? The engineer or technician who is involved with manufacturing of surface
mount assemblies should be concerned that the equipment which is already in place or planned to be purchased is capable
of performing the task properly with associated high manufacturing yields and he will want to undertake studies to verify
the process and the results. Assuming that the above concerns have been properly addressed, tests should be undertaken.
Many companies are designing test boards to verify what can be done and what cannot be done with the equipment already
in house. For new designs with tighter packaging density and other difficult limitations, the above concerns can be verified
by checking out the prototype boards on new equipment.
When checking out new equipment and comparing the capabilities from several machine suppliers, it is recommended to
take twenty-five assemblies to each demonstration facility, allow their technicians to set up the equipment with about five
boards and then run the rest without changing any of the process parameters. Verify the quality on the remaining boards
processed under identical conditions. Count the defects and relate them in parts per million (PPM).
It is recommended to buy the equipment that can give the lowest defect rate, not the cheapest machine available. It is not
the cost of the equipment which will prove to be expensive, it is the cost of poor quality and low yields.

9.24.22 Critical Parameters for IR Process Control In the establishment of the solder schedule, the main issues are to
create a solder schedule with an effective trade-off between rapid heating rates to reduce oxidation and affect reflow on all
device types, and the need to protect substrates and parts.
Once a solder schedule or thermal profile has been established for an oven, the main concerns are to ensure that the air (or
gas) flow rate and heater efficiencies remain constant to ensure repeatable processing. If gas mixtures are used, they also
could be monitored

9.25 SMT

9.25.1 Surface Mount Assemblies Acceptance Requirements For information on the acceptability requirements for sur-
face mount assemblies, see IPC J-STD-001, IPC-A-610, and IPC-CM-770.

9.25.2 High Voltage or High Power Applications High power applications may require designs that will vary from the
requirements of IPC-2221. Manufacturers may use alternative designs in compliance with high voltage requirements. All
processes should be documented.

9.25.3 Quality Assurance (Visual Inspection)

9.25.3.1 Visual Inspection Visual inspection is a method used to evaluate process results and product for materials and
anomalies to identify workmanship or process concerns. Visual inspection may be accomplished on a sampling of the
assemblies as permitted by the assembly documentation and specification requirements.

9.25.3.2 Fractured Solder Connection Movement of the connection elements may cause this defect after the solder has
solidified. As the name indicates, the solder connection will evidence fractures and cracks in the fillet. This is not a com-
mon defect, but it is an indication of a serious processing problem if it occurs during the assembly process.

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9.25.3.3 Excess Solder in Contact With the Component Body This generally applies to through-hole mounted compo-
nents. By design, some SMDs may have exceptions to this requirement.

9.25.3.4 Disturbed Solder Connection Disturbed solder connections generally occur when one or both of the elements
being soldered move during the solidification of the solder connection. Stress lines characterize the connection and localized
granular zones, which may include minute fractures. The connection typically has the appearance of being wrinkled, indi-
cating that motion existed while the solder was solidifying.

9.25.3.5 Cold Solder Connection A cold solder connection is a connection in which the solder has not properly flowed
and wetted the surface and the solder does not feather out on the connection elements. It is characterized by a grayish porous
appearance and is typically formed in hand solder operations, not mass soldering. The unique appearance may be caused by
impurities in the solder, inadequate cleaning and/or insufficient heat during soldering.

9.26 Process Verification Inspection

9.26.1 Magnification Aids and Lighting When magnification is required for assembly and inspection, the lighting inten-
sity and magnification power should be based on the size of the item. Most standards list the magnification power for dif-
ferent items based on the width of circuit land or pad. The magnification power levels defined by IPC J-STD-001 and IPC-
A-610 are considered sufficient to allow an inspector to positively identify characteristics and differentiate between a defect,
process indicator, and acceptable condition.
The acceptable minimum level of illumination in which operators and inspectors should be expected to perform their tasks
is 1,000 lm/m2 which is approximately 93 foot-candles. Illumination can be measured using a photographic light meter.
Usually manufacture or inspection of small features suggests the need for increased light intensity. The type of light source
used can play an important role in assembly and inspection. A light source that has a color temperature of 3000 °K (such
as quartz halogen) provides a full color spectrum that is beneficial in identifying flux residue and other residual contami-
nants. For assemblies with mixed land widths, the greater magnification may be used for the entire assembly.
Referee magnification power is used to verify product previously identified with a questionable condition at the inspection
magnification power. If there is remaining uncertainty regarding whether a condition should be classified as a defect, or if
additional visual information regarding what caused the defect can be gained, then the condition can be evaluated using the
referee magnification power as specified by the applicable standard.

9.26.2 Sampling Inspection - Process Control The primary goal of process control is to continually reduce variation in
the process to reduce defects, rework, cost, and the risk of damage caused by rework.
A process control plan should include or reference documentation that contains the following:
a. The proper training of personnel with responsibilities in development, implementation, and utilization of process control
and statistical methods commensurate with their responsibilities.
b. Quantitative methodologies and evidence to demonstrate that the process is capable and in control.
c. Improvement strategies to define initial process control limits and methodologies, which should lead to continuous pro-
cess improvement and subsequent defect reduction.
d. Criteria for switching to or from sample-based inspection are defined in terms of process control limits.
e. The occurrence of a defect(s) in a sample inspection can prompt 100% inspection of the lot for that defect condition in
accordance with the process control plan.
f. Systems to correct the occurrence of process indicators. This also applies to out of control processes and discrepant
assemblies.
g. An audit plan to monitor process characteristics is documented.

9.26.3 Statistical Process Control (SPC) - Refer to IPC-9191.

9.3 References
1. Frear, Jones, Kinsman, ‘‘Solder Mechanics: A State of the Art Assessment.’’
2. Ferguson, Mark, ‘‘Manufacturing Concerns When Soldering With Gold Plated Component Leads or Circuit Board Pads,’’
IPC-TR-1103, 1996.

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3. J. Glazer, ‘‘Effect of Gold on the Reliability of Fine Pitch Surface Mount Solder Joints,’’ SMI Conference, 1991.
4. Wright, A. W., Mahajan, R. L., Wenger, G. M., ‘‘Thermal and Soldering Characteristics of Condensation Heating Fluids.’’
5. Lea, C., ‘‘A Scientific Guide to Surface Mount Technology,’’ Electrochemical Publications, 1988, Figures 5.6 and 5.6, pp.
235-254).

10 OTHER ASSEMBLY AND JOINING METHODS

This Section provides general information that pertains to the techniques (other than soldering) that are used for the assem-
bly and joining of components to electronic printed board assemblies.

10.1 Wire Bonding (Chip and Wire) Electrical interconnections from a device to a substrate are critical in bare-die assem-
bly. In many applications, wire bonding, commonly called ‘‘chip and wire,’’ is used for this purpose.
The traditional dominance of wire bonding is explained by its several advantages over competing technologies:
• Adaptable to diverse metallizations,
• Easily reworkable,
• Able to visually inspect for bond quality,
• Easily performed non-destructive bond integrity tests,
• History of satisfactory field reliability,
• Extensive base of technical expertise and installed equipment in existing production operations.
However, there are disadvantages in wire bonding chips to printed boards, not the least of which is that the leads that are
used to bond the chips to the board are typically about 0.025 mm [0.001 in] in diameter and they are fragile and cannot
withstand physical abuse. There are alternative interconnection systems that address both heavy wire, i.e., 0.05 mm [0.002
in], and ribbon wire. These techniques are often used when high power devices are being assembled. They are rather appli-
cation specific and require a unique set of considerations. An alternative is the use of redundant wires to distribute current
when bonding pad size allows.
Additionally, the die that will be wire bonded must be precisely positioned on the bond site on the substrate. This position-
ing includes X-Y axis placement, rotational placement, as well as die flatness or parallelism to the board substrate.
To achieve the economies inherent in wire bonding technologies, the bonding process must be automated. Automated pro-
cesses require extensive study to develop the necessary control limits to maintain high yields.
The three basic wire bonding technologies, (i.e., thermocompression, ultrasonic, and thermosonic) derive their names from
the method the energy source employed to terminate gold or aluminum wire between the die and substrate. Figure 10-1
describes wire bonding variables that must be controlled in all wire bonding types.

10.1.1 Thermocompression (TC) Bonding Thermocompression bonding is accomplished by pressing the wire against the
bond site metallization at an elevated temperature. Almost all TC bonding is performed using gold wire, and almost all wire
loops are formed using a ‘‘ball bond’’ at the first bond site, and a ‘‘stitch bond’’ at the second.
The bonding tool is a capillary, normally heated to 200 to 225 °C, made of alumina, tungsten carbide, or other refractory
material, and the bonding surface is heated to 300-400 °C. Because of these high temperatures, organic based substrates are
not used with this process. High temperature materials such as ceramic or porcelainized steel may use this process. Gold
wire is particularly suitable for TC bonding because it deforms readily under the bonding capillary at elevated temperatures,
and there is no surface oxide on the wire to inhibit its joining. Figure 10-2 describes the mechanics of thermocompression
wire bonding.
The advantages of using thermocompression ball bonding include:
• It is omnidirectional, i.e., after the first bond is made, the bonding head may move in any direction to make the second
bond.
• No unique fixturing is required during bonding.
• It is a relatively easy process to develop and control.
Disadvantages include:
• It requires a high working temperature.
• It is sensitive to surface contamination.

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IPC-820a-10-01

Figure 10-1 Wire Bonding Variables

• It has relatively slow bond cycles, i.e., a long time during

which the bonding force is applied.
• Only gold wire can be used since it will not ball aluminum 3
1 2 BEND
wire properly during the flame-off operation.
DIE DIE DIE
10.1.2 Ultrasonic Bonding Ultrasonic wire bonding uses
ultrasonic energy to weld wire to the chip pad and printed
board land. The process takes place at room temperature. 4 6
5 COLLARS

Aluminum wire is used almost exclusively for ultrasonic BEND

bonding, though gold wire is workable and copper wire has

been used successfully. The ultrasonic bonding process is
DIE
shown in Figure 10-3. IPC-820a-10-02

The advantages of using ultrasonic bonding include: Figure 10-2 Mechanics of Thermocompression Wire
Bonding.
• It is a room-temperature process.
• It is least sensitive to surface contamination.
• It is workable with smaller lands than thermocompression ball bonding (e.g., for a 0.025 mm [0.001 in] diameter wire a
land size of 0.04 x 0.08 mm [0.0016 x 0.003 in] is practical).
The disadvantages include:
• It is unidirectional, i.e., after the first bond is made, the bonding head must move in only one direction toward the second
bond site.

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1. Home position
Wire Clamp

Bonding Closed
Tool
Wire
Device Pad
Substrate

2. Tool in first position 3. Bond

Force Open

Wire fed through

tool

4. Tool goes to loop position 5. Substrate is moved to

second bond position

6. Tool moves to second 7. Second bond; wire clamp then

search position moves back breaking wire
at the tool back radius

Force

p
am
Lb. Cl osed
Cl

IPC-820a-10-03

Figure 10-3 Mechanics of Ultrasonic Wire Bonding

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• Component or package-wall proximity must allow for bonding tool and wire-clamp clearances.
• Acoustical energy measurement problems make the process difficult to characterize and control.

10.1.3 Thermosonic (TS) Bonding The principal features of ultrasonic and thermocompression bonding are married in
thermosonic bonding. Gold wire ball-and-stitch bonds are made as in the thermocompression technique, but the capillary is
driven by a burst of ultrasonic power at each bond to augment metal joining. As a consequence, the substrate temperature
may be lower than in thermocompression bonding. Thermosonic bonding has been particularly successful in attaching wires
to hard-to-bond thick film hybrid substrate metallizations.
The advantages of using thermosonic bonding include:
• It uses moderate bonding temperatures.
• It is omnidirectional.
• It is less sensitive to surface contamination than thermocompression wire bonding.
The disadvantages include:
• It requires a minimum land size of 0.1 x 0.1 mm [0.004 x 0.004 in].
• It requires the control of acoustical energy.
• It requires special circuit fixturing.
• It has some wire looping limitations.

10.1.4 Choice of Wire Bonding Method A comparison of the different bonding methods and their advantages and disad-
vantages are listed in Table 10-1.
Table 10−1 Wire Bonding Technologies*
Automatic
Thermocompression Thermosonic Ultrasonic
Parameter (Gold Wire) (Gold Wire) (Gold & Aluminum Wire)
Excessive capillary heat may
cause annealing (softening) of Must control acoustic energy &
Develop & Control Easiest to Control
the wire and affect ball force
formation.
Speed** z20 wires/minute (manual rate) z600 wires per minute*** z240 wires per minute***
Current carry
z0.55 amps z0.55 amps <0.40 amps
(0.001 inch)
Heated work stage 300-400 °C No heat required (typical for
Heat required 150 °C work stage
(pulse capillary heat optional) aluminum wire)
Acoustic energy required None Controllable Controllable
Less than ultrasonic &
Force required Most force required Less than thermocompression
thermocompression
Straight line bond ±7.5° off true
Direction Omnidirectional (360°) Omnidirectional (360°)
line
Some control - operator Best control (machine Good control (machine
Looping
dependent controllable) controllable)
Ball size dependent wedge Ball size dependent wedge Wedge size dependent width -
Pad size (0.001 inch size = 1.5x to 5x wire diameter size = 1.5x to 5x wire diameter 1.2x to 2.5x wire diameter
Dia.) in length and 1.5x to 3x wire in length and 1.5x to 3x wire length = 1.5x to 5x wire
diameter in width diameter in width diameter
Largest head size max clear Smallest head size minimun Large head size - deep access
Bond head clearance
required clear required available
Sensitivity to
Most sensitive Less sensitive Least sensitive
contamination
Increases with reduced Increases with reduced
Purple plague Most prominent hermeticity and increased hermecity and increased
temperature temperature
* The information in this table is for general application. Some parameters, i.e., heat, force, may be adjusted for specific
applications.
** Each wire requires 2 bonds
*** Automatic Bonding

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The principal advantage of thermocompression and thermosonic bonding over ultrasonic is that, as a consequence of the ball
bond symmetry, the second bond (stitch bond) site may be located anywhere in the 360° arc surrounding the first bond (ball
bond). With ultrasonic bonding, on the other hand, the wire bond is laid down parallel to the bond pad plane. The wire is
constrained to follow the general direction of the first bond footprint axis in moving to the second bond site.
In order to complete a series of bond loops about the periphery of the device when using an ultrasonic bonder, the device
package or the bond head must be rotated. Such manipulations are unnecessary with thermocompression or thermosonic
ball-and-stitch bonders, so interconnecting circuits with these bonding methods is much faster and more easily automated
than with ultrasonic bonding. Labor costs are lower, so gold wire is often used in low-cost devices (where packaging labor
is a significant production cost), and aluminum wire is used in high-priced circuits (in which chip production and other costs
dominate).
While the actual bond strength may be slightly lower, ultrasonic wire bonds are generally stronger than thermocompression
or thermosonic bonds, if only because the aluminum-alloy wire used in the former technique is roughly twice as strong at
a specified diameter as the annealed gold wire used in the latter technologies. Also, ultrasonic bonding facilitates joining
aluminum-alloy wire to an aluminum chip metallization. This is metallurgically superior to gold wire on aluminum.
Finally, aluminum-alloy wire is less likely to sag than gold wire when both are exposed to elevated temperatures and,
because Aluminum alloy is a less dense metal than gold, there is less wire flexing in hermetic packages. For applications
subject to extreme vibration or g-loading, bond length should be limited to 2.5 mm [0.100 in] for aluminum wire.
Ultrasonic wedge bonding with aluminum alloy or thermosonic ball bonding with gold alloy are equally common in bare-
die assembly technology. The choice is usually based on an economic trade-off analysis. Wedge bonding uses lower cost,
stronger aluminum, but has a slower processing speed. The constant repositioning of the device to the wire bonding vector
increases labor costs.
Gold plating of the bond lands may be thinner, e.g., 0.25 micron [10 microinches] when bonding with aluminum wire. When
gold wire is used, the printed board plating thickness is typically 1.0 micron [40 microinches] minimum.
With gold ball bonding, the same diameter wire as in aluminum bonding is used, but the metal expense is higher, and the
wire is weaker and more subject to sag. Sag is an undesirable after-process effect which can lead to inter-electrode short-
ing. Fully annealed gold and aluminum are soft and suffer from sag. As a result, wire bonding processes call for alloyed
metals, such as Aluminum alloy, Even these alloyed wires suffer from sag, if subjected to elevated temperature (200 °C or
more) in fabrication or in use. Sag is possible in ‘‘good’’ wire due to annealing that may occur at the heel or ball of bonded
wire. (This is most common in thermocompression bonding due to the use of a heated capillary.)
Intermixing of aluminum and gold is almost unavoidable in some assembly technology. Bond pads on wafers are either alu-
minum for chip-and-wire or gold for tape automated bonding (TAB). Bonding wire is aluminum or gold, depending on eco-
nomics of packaged products. Printed wiring board lands are usually gold, although copper and solder plating are also used.

10.2 Tape Automated Bonding (TAB) Tape automated bonding is another assembly technology for connecting semicon-
ductor devices to circuit boards. Basically, the process uses a specially plated tape etched in the desired conductor pattern.
The tape may be of a one-, two-, or three-layer construction. The conductors are etched into the pattern and are unsupported
in the center area where the semiconductor is to be attached. TAB accomplishes this by means of a photoimaged and etched
pattern of conductors bonded to a dielectric tape.
This carrier tape is commonly made from polyester (Mylar) or polyimide material. Windows are punched at specific loca-
tions in the tape and a thin copper conductive foil is bonded to the tape. A conductor pattern of leads is etched in the foil,
thus giving the desired interconnection circuitry with beam type leads that extend over the window in the tape. Gold bumps
are typically formed on either the tape or the chip itself.
The integrated circuit is aligned on the tape and thermocompression bonded to the inner leads of the tape. The outer lead
bonding operation transfers the chip with its leads to the substrate. The outer leads are commonly hot-bar soldered or ther-
mocompression bonded to the substrate.

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TAB is a semiconductor assembly and packaging system offering several advantages over wire bonding technology
including:
• TAB assemblies have better electrical properties at high frequencies and are better able to dissipate heat.
• TAB offers the ability to bond to smaller lands, thereby increasing density and decreasing bonding time and cost.
• Lower bond profiles are possible and component reliability is improved.
• TAB assembly allows shorter interconnect lead lengths and the possibility of pretesting and burning-in devices prior to the
final assembly.
The disadvantages include:
• The materials and TAB frames are costly, and the TAB system must be designed for a specific application.
• TAB equipment is generally less flexible than wire bonding equipment.
• The leads must be plated for Outer Lead Bonding (OLB) solderability.
• The die-bonding pads must be plated for solderability.

10.2.1 Inner Lead Bonding (ILB) After the tape is fully fabricated, the next operation is to make the inner-lead bonds
between the die and the etched cantilevered conductors on the tape. However, the die or TAB tape must first be ‘‘bumped’’
in order to facilitate making the inner-lead bonds.

10.2.1.1 Bumping In the development of TAB, practitioners learned that reliable bonds could not be obtained unless
‘‘bumps’’ were added to either the TAB leads or to the wafer die bonding pad area in order to obtain a planar surface.
A. Bumped Die – In the more common bumped-die approach a barrier metal, such as titanium-tungsten, is deposited over
the exposed aluminum. This, plus the addition of 0.025 mm [0.001 in] high gold bumps, helps ensure the reliability of
the TAB connections to the tape during the inner-lead-bonding process. The bumps on the die are electroplated onto the
barrier metal at each land position. Copper bumps can also be used, and both copper and gold can be tin plated. This
seals the bond land and helps enhance TAB’s reliability as an assembly process.
B. Bumped TAB Tape (BTAB) – Another processing approach, puts the bump on the tape rather than on the die. This
approach is known as BTAB. Bumped tape is TAB tape with a copper projection at the end of the lead. The bump is
usually gold or immersion tin plated for inner lead bonding. The bump is formed by selective etching of a thick copper
foil.
In both the bumped-die and bumped-tape approaches, the bumps are necessary to elevate the etched tape conductors above
the die passivation and edge to prevent shorting of the leads as well as to provide access to the bonding plane.

10.2.1.2 Final ILB After bumping, simultaneous or sequential bonding of all internal interconnections is performed by
either thermocompression, thermosonic, ultrasonic, laser or reflow bonding. Leads may be bonded one at a time using a
single-point bonder with any of these techniques. Mass bonding reflow is also possible using thermocompression and reflow
techniques.
Once the die are bonded to the tape, the plating bus points are punched out or otherwise electrically isolated in order to
allow the individual dice to be electrically tested and, if required burned in.

10.2.2 Outer Lead Bonding (OLB) The outer-lead bonding process transfers the die with its leads to the substrate. OLB is
a two-step process usually performed sequentially on the same machine. The first step is to excise and form the leaded die
from the TAB tape or slide carrier.
The die and leads are then transferred to the substrate so that the original relationship of the die to its tape sprocket holes
is maintained. Depending on the TAB mounting configuration, a secondary lead-forming operation may be included. When
required, care must be taken to assure that the leads are shaped down to the board level without shorting them against the
electrically-active edge of the die.
The outer lead bonding process is completed by bonding all the outer leads to the substrate by single point or mass ther-
mosonic or ultrasonic bonding, reflow solder, or conductive adhesive technology.

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10.3 Polymer Bonding Polymer bonding processes can provide for component mounting and/or both Inner Lead Bonding
(ILB) and Outer Lead Bonding (OLB) in TAB devices and even direct chip interconnection to substrates. Polymer bonding
uses specialized organic polymer adhesives to produce the simultaneous mechanical and electrical interconnection of elec-
tronic elements.

10.3.1 Component Mounting with Adhesives The design of the assembly determines whether or not a component mount-
ing adhesive is necessary. Adhesives are commonly used to hold surface mount components in place on the back side of
assemblies when solder paste tackiness is not sufficient or when the surface mount components are wave soldered.
When adhesive is used to bond surface mount components to the back side of an assembly, the following needs to be con-
sidered:
• The adhesive must be a variety that produces bond dots small enough that do not interfere with solderability.
• The uncured adhesive must have sufficient tackiness, or green strength, to prevent component movement before the adhe-
sive is cured.
• The adhesive is cured mechanism or temperature is compatible with the assemblies and components used.
• Since removal of cured adhesive is impractical after soldering, it is important to use adhesive only when necessary.
In addition to component bonding adhesives, thermally conductive adhesive, used to withdraw heat from the component
during circuit operation may be required. Specific bonding requirements for this type of adhesive should be specified on the
assembly drawing.

10.3.2 Outer Lead Bonding with Anisotropic Adhesives Thermoplastic film adhesives may be obtained as an unsup-
ported film on release liner. The film can be transferred to TAB or to the substrate using a heated roller. When the TAB
connection is to be made, the release liner is pulled off, the TAB outer leads are aligned to the corresponding features on
the substrate and a heated pad is brought against the TAB to activate the adhesive. Typically, dies are designed so that con-
tact is made only with the outer leads. Silicone rubber dies are ideal.
Dry film materials can also be screen printed. One approach is to print the anisotropic adhesive onto the printed board lands
where bonding will take place. The entire region for the TAB bonding is printed. Since the adhesive does not conduct in X
and Y directions, it is practical to coat large portions of the printed board. By applying adhesive beyond the immediate
bonding area, greater mechanical strength can be obtained since the insulated TAB portions will be bonded to the board.
After printing, the adhesive is dried and the board is ready for bonding. As with the transfer film, bonding is affected by
lining up the TAB and applying heat and pressure. Alternatively, the adhesive can be applied to the TAB.

10.3.3 Thermally-Conductive Adhesive Bonding Electronic miniaturization has resulted in crowding of many small heat
generating parts into compact areas where heat is difficult to remove. The resulting temperature build-up can cause failure
or reduced reliability of parts as they exceed their maximum recommended operating temperatures. Effective removal of this
heat is important.
Transferring thermal energy from heat generating sources within an electronics package requires crossing a number of inter-
faces. Careful management of these thermal interfaces is of prime importance in maintaining the efficiency, reliability, and
life of heat generating electronic devices.
The most common approach to accelerating heat dissipation is attaching the device to heat sinks. Effectiveness of heat trans-
fer depends greatly on the thermal conductivity of the medium which is the interface between the heat sink and the power
device.

10.3.3.1 Thermal Conductivity and Thermal Resistance The thermal conductivity of a material is defined as the rate at
which heat will pass through a given distance of the material of a given area under the influence of a specified temperature
differential. This property of a material is usually expressed as K, the coefficient of thermal conductivity, and is determined
by ASTM Methods D-2214 and C-408. Thermal transfer is directly related to area and inversely related to distance, i.e., gap
thickness.
Unfortunately, a confusing variety of units are used to express thermal conductivity numerically.

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When the coefficients of thermal conductivity of metals and inorganic solid oxides are expressed in watts per meter- °C, the
values are typically greater than 1. Conversely, the values for most polymers, paper, wood and other organic materials are
less than 1. Table 10-2 presents K values for some common materials.
Table 10-2 K Values for Common
Materials (watts/meter-°C)
MATERIAL K
Air 0.02
Alumina 18
Aluminum 230
Copper 400
Cork 0.04
Polymethyl methacrylate 0.19
Silver 418
Steel 46

Thermal Resistance is the common expression used in the electronics industry to describe the efficiency with which heat is
dissipated. The units are simply °C per watt.
It must be noted that this expression refers to a specific area and thickness, e.g., the area of a TO-3 transistor can with a
0.18 mm [0.007 in] bondline between the components. The expression also indicates two other points:
• The lower the thermal resistance, the more efficient the heat transfer.
• If thickness increases or area decreases at a given wattage, efficiency of heat transfer decreases.

10.3.3.2 Insulating versus Non-Insulating Adhesives In many cases, the simultaneous provision of electrical insulation
between devices and between components and the mounting surface is as important as heat removal.
The obvious method of increasing thermal conductivity to the theoretical maximum would be to decrease the thickness of
the interface to zero; however, this is not acceptable in cases where the joint must also provide electrical insulation, where
the zero gap cannot be conductivity. The electrical insulating properties of the joint and its thermal conductivity must
be balanced against one another. The target is the maximum thermal conductivity at the minimum acceptable electrical
insulation.
For high-voltage applications, effectiveness of electrical insulation is indicated by dielectric strength (volts/distance) and
measured by ASTM D-149. For low voltage applications, the property considered is volume resistivity (ohmcm), as deter-
mined by ASTM D257. With thermally conductive materials, a 0.15-0.23 mm [0.006-0.009 in] gap often provides an
acceptable balance between thermal conductivity and electrical insulation.

10.3.4 Adhesive Application The most important factor to consider in selecting the correct adhesive is how the adhesive
will be dispensed. The three most common dispensing methods are pin transfer, syringe, and screen printing.

10.3.4.1 Pin Transfer In this method, adhesive in a reservoir is picked up on the tips of steel pins and applied to the sub-
strate. In one type of machine, the pins apply dots of adhesive to the bottom of chips before placement. Another type of
machine uses a fixed array of pins to transfer an entire dot pattern to the board. When used together with high speed mass
placement machines, rates of several hundred thousand components per hour are possible.
Pin transfer is very sensitive to changes in adhesive viscosity. The adhesive must be able to withstand repeated stress in the
reservoir without substantial reduction in viscosity.

10.3.4.2 Air-Operated Syringe This versatile method dispenses adhesive dots in sizes and patterns that can be controlled
easily by the operator. Syringe dispensing is accomplished by moving the dispenser downward to the surface of the printed
wiring board. Air pressure is then applied to the syringe, forcing a dot of adhesive through the nozzle. The dispenser is then
retracted and moved to the next dot location.
Syringe application can be used for both manual and machine dispensing. Newer machines can dispense up to 20,000 dots
per hour. Special syringes may be needed to fit different machines. Some machines use syringes to feed positive displace-
ment pumps which dispense the adhesive through a nozzle.

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Syringe nozzles can be designed to apply single or multiple dots with various geometries. Dot shape is also related to adhe-
sive viscosity. An adhesive with a high shear thinning index gives dots that sit higher on the board.

10.3.4.3 Screen Printing This method allows the placement of a large dot pattern by forcing the adhesive through a screen
or stencil with a squeegee. The dot size is determined by the size of the exposed area in the coating on the screen mesh, the
thickness of the coating, and the viscosity of the adhesive. Brass stencils are suitable only with epoxies, because acrylics
can harden on brass. The need for flat boards, high maintenance and setup time, combined with inflexibility of the process,
has limited the use of this method with adhesives, although it is commonly used to apply solder paste.

10.3.5 Curing In the curing station, the adhesive is converted from a liquid to a solid and the bond between the device
and substrate is formed. This bond is required to remain effective until the assembly is soldered. The precise strength and
character of the bond is determined by the needs of the production system. In cases where the surface mount devices are
placed immediately prior to wave soldering, the bond strengths required are generally about two pounds.
However, if the surface mount devices are placed first as in the case of a mixed technology board, the bond must be adequate
to withstand the subsequent processing steps and a strength of at least five pounds is generally required. A bond strength of
five pounds on a 1206 resistor equals a shear strength of approximately 1000 pounds per square inch.
The ideal criterion to use in judging an adhesive’s performance is the number of devices lost during the assembly process.
While this is determined mainly by bond strength, it is also affected by factors like resistance to flexing and shock, and the
adhesive response upon exposure to molten solder. It is also important that this performance is unaffected by minor changes
in the composition of solder resists, fluxes, and other processing chemicals.

10.3.5.1 Heat Curing Adhesive curing by heat is the most common method. The adhesive must be heated so that the bond
line reaches the curing temperature for the time required to reach full bond strength. Bond line temperatures can be checked
by inserting a thermocouple into the adhesive between the component and the board. Warm up and cool down times are
excluded from cure conditions on most adhesive data sheets. Heat can be provided on-line with an infrared oven, or off-line
with a convection oven. Cure condition may range from one and a half to three minutes at 150 °C.

10.3.5.2 Ultraviolet Radiation and Heat Curing Adhesives which cure by both UV and heat allow very fast UV curing
of the portion of the adhesive drop which is exposed at the sides of the component. This effectively prevents chip movement
and adhesive spread on final heat curing. On-line curing requires high intensity UV lamp followed by an infrared oven to
complete the cure. Ultraviolet curing alone gives very weak bonds and does not cure the adhesive under the component.
If heat alone is used with this type of adhesive, the surface of the adhesive exposed to air may remain tacky or uncured. The
recommended process is, therefore, UV followed by heat. For fast curing, the UV intensity should be at least 50 mw/cm2
of long wave (365 nm) UV measured at the adhesive surface. In manual applications, a UV wand can be used, but the UV
source must be brought very close to the adhesive.
Ultraviolet/heat curing adhesives are sometimes chosen even when UV is not a process advantage, because other properties
of the adhesive are seen as superior.

10.3.5.3 Primer (Two-Part) Conventional two-part adhesives which require mixing before application are seldom used in
surface mount assembly because of limited working time and difficulty with mixing. A primer cured adhesive consists of an
adhesive applied to one surface (component or board) and a primer or accelerator applied to the other surface just before
component placement. The primer acts as a catalytic curing agent for the adhesive, which then cures in a few minutes at
room temperature.
Primers are often used with instant adhesives (cyanoacrylates) in manual repair stations. These primers are amines which
accelerate the cure of cyanoacrylates. Cyanoacrylates can be cured by surface moisture without primer but this is sometimes
too slow for repair work.
Primers can also be used to cure acrylic adhesives at room temperatures, but cure can be very slow (over 15 minutes). Prim-
ers for acrylics can be made more effective by adding copper compounds, but that spoils the dielectric properties of the cured
adhesive.

10.3.6 Heat Sink Materials and Processing Metallic heat sinks are most commonly used for accelerating heat dissipa-
tion. Heat sinks are usually attached to heat generating devices by mechanical means such as rivets, clamps, or threaded
fasteners. Because of microscopic irregularities found at the surfaces of the mating parts, there is always air space between

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such mechanically assembled parts. In many cases, actual part contact is only 20% (or less) of the total area. The remain-
ing portion is air, which reduces the transfer of heat because it is an insulator.

Various methods are used to improve heat transfer between power devices and heat sinks. All approaches involve filling the
air space at the interface with a thermally conductive medium. Approaches can be divided into two categories: mechanical
and adhesive.

Mechanical means of increasing heat transfer are those which involve the use of thermally conductive materials in conjunc-
tion with mechanical fasteners. See Table 10-3 for methods of mounting power devices to heat sinks. Typical transfer media
in this category include silicone greases and preformed compressible pads.
Table 10-3 Methods of Mounting Power Devices to Heat Sinks
METHOD ADVANTAGES DISADVANTAGES/CONCERNS
Air space causes poor thermal
Mechanical attachment Helps dissipate heat; Instant attachment
conductivity; fasteners induce stress
Mechanical attachment with silicone Difficult to control process; Contamination
Improved thermal conductivity
grease/mica washer of other parts by grease migration
Mechanical attachment with compressible Good thermal conductivity; No migration Torque adjustment and mechanical
pads problems fasteners still needed
Assemble and improve thermal
conductivity in one-step process; Mixing and pot life considerations; Heat
Adhesive bonding with epoxy
Distributes stresses; No migration cure is an off-line process
problems
Same as epoxy bonding; Fast fixturing;
Adhesive bonding with acrylic Room temperature cure; No mixing; No Ventilation needed for activator
pot life concerns; On-line process.

Equally important to processing characteristics in selecting a thermal transfer medium is performance of the material in
actual use. Four general categories of properties must be taken into consideration: physical, thermal transfer, electrical, and
durability. In certain applications specific criteria may also have to be met, e.g., UL ratings per UL-E57104, and NASA out-
gassing requirements.

10.3.6.1 Thermally Conductive Greases (Heat Sink Compounds) The original method used to improve heat transfer
between a power device and heat sink, and still widely used today, is application of a thermally conductive grease between
the two parts. While the use of grease fills the unwanted air space effectively, it is difficult to control the amount applied,
and the contamination of sensitive components may occur; and, the attraction of dust is an added problem. Processing is
somewhat time consuming. Sheet mica washers, while widely used with grease, are brittle and can crack easily during
torquing of the assembly or when punctured by a burr. Advantages include excellent thermal and solvent resistance.

Properties typical of thermal greases are presented in Table 10-4.

Table 10-4 Thermal Greases and Their Properties
PROPERTY VALUE
Specific Gravity 2.1-2.2
2
Thermal conductivity, Btu/ft /hr/°F/in. 5.2
Thermal resistivity, °C/in./watt 52
Volume resistivity, ohm-cm 1015
Dielectric strength, volts/mil 250
Weight loss, % after 24 hrs at 200 °C 0.6
Maximum use temperature, continuous, °C 200

10.3.6.2 Compressible Pads Compressible pads are available in a wide variety of compositions, shapes and sizes. Most
pads consist of silicone elastomers: unsupported, reinforced with or coated on fabric (typically fiberglass), or used to sand-
wich a film of high dielectric. The silicone rubber provides both thermal conductivity and electrical insulation. Heat trans-
fer is sometimes enhanced with aluminum oxide. For exceptional heat transfer, boron nitride filled materials are available.
Fabric or film reinforcement provides dimensional stability and resistance to punctures caused by burrs. Unsupported sili-
cone sheet offers cushioning from mechanical shock and absorbs differential thermal expansion.

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Use of compressible pads eliminates the problems associated with mica and grease described above. Because the pads are
pliable, surface contact is excellent, even if surfaces are rough. Performance can improve with time as the elastomer con-
forms to irregular contours under the pressure of mechanical attachments. Chemical and solvent resistance is very good.
While processing with compressible pads is rapid and neater than grease, care must be taken to establish and maintain opti-
mum mounting pressure. Over or under torquing can negate desired performance characteristics. Also, a variety of designs
must be stocked, since each type of power device requires a specific shape.
The supplier’s literature should be consulted for performance of specific products. A general summary of physical proper-
ties is given in Table 10-5.
Table 10-5 Physical Properties of Compressible Pads
PROPERTY VALUE
Break, lbs/in, ASTM D-751 or D-1458
coated fiberglass, 0.007-0.009 inch 100
Tensile strength, psi
coated fiberglass, 0.007-0.009 inch 10,000
unsupported silicone, 0.020-0.090 inch 250
Elongation, %
coated fiberglass, 0.007-0.009 inch 2-5
unsupported silicone, 0.020-0.090 inch 200
Thermal conductivity, Colora method,
BTU-in/hr-ft2-°F 9-30
Thermal resistance*, °C/Watt, TO-3 can
0.006-0.010 inch thick 0.25-0.5
Volume resistivity, ASTM D257, ohm-cm 1013-1015
Use temperature range,°C −60 to +200
Dielectric strength, ASTM D-149, volts 2500-4000 (total)
0.006-0.010 inch thick 500 volts/mil
(to 6000 possible)
*If coated with a pressure sensitive adhesive, thermal resistance will be increased slightly by about 0.05 °C/watt)

Adhesives are particularly attractive where two-sided circuit boards are being assembled. However, adhesives can also have
disadvantages: some must be mixed, have limited pot life, and require time and possibly heat for curing.
Ideally, a thermally conductive adhesive used for mounting a device with heat dissipation in mind should have the follow-
ing qualities:
• The adhesive should have either moderate strength for ease of repairability or high strength for permanent assembly;
• The cure speed should be selectable from seconds, for instant fixturing, to minutes to permit orientation of parts;
• The product consistency must be such that it flows readily for automatic application, does not migrate once in place and
wets the surfaces well to ensure good thermal conductivity;
• The adhesive should be usable on a variety of types of surfaces
• Fillets (squeeze out) should become dry to the touch; and
• The product should have a long shelf life.
Besides epoxies and acrylics, special RTV silicones and hot melts are available as well as pressure sensitive adhesives typi-
cally preapplied to compressible pads.

10.3.6.3 Thermally Conductive Adhesives Thermally conductive adhesives such as filled epoxies and acrylics can be an
effective means of providing both attachment and a path for heat dissipation. Unfilled adhesives cannot be used because,
being organic, they are poor conductors of heat. Adhesives eliminate the need to stock a variety of mechanical fasteners,
compressible pads, or mica sheets. Adhesives also help avoid the stresses induced by mechanical fasteners which can dam-
age the components. Performance properties typical of thermally conductive electrically insulating epoxies and acrylics are
given in Table 10-6.

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Table 10-6 Performance Properties of Electrically Insulating Epoxies and Acrylics

PROPERTY EPOXY ACRYLIC
Tensile strength, ASTM D-1002, psa lap shear test 1000-2700 1000-2500
Thermal conductivity, BTU-in/hr-ft2-°F 6-10 5-6
Thermal resistance, calculated °C/watt 0.005 inch gap, 1 in2 – 0.2-0.3
Dielectric strength, volts/mil 400-600 600-700
Volume resistivity, ohm-cm 1013-1015 1012-1013
Use temperature range, continuous, °C 150 150

10.3.7 Adhesive Testing and Evaluation

10.3.7.1 Standard Test Methods Basic joining material properties are usually measured by the accepted standard test
methods shown in Table 10-7. Test conditions, instrument parameters, cure conditions, and specimen dimensions must be
specified as indicated in the test method.
Table 10-7 Standard Joining Material
Evaluation Test Methods
Property Test Method
Dielectric strength ASTM D-149
Dielectric constant ASTM D-150
Dissipation factor ASTM D-150
Volume resistivity ASTM D-257
Surface resistivity ASTM D-257
Tensile shear strength ASTM D-1002
Hardness ASTM D-2240
Outgassing ASTM E-595

10.3.7.2 Variable Test Methods Other test methods, such as those shown in Table 10-8, can be used for the evaluation
of other joining material properties. However, users and suppliers must agree on what method to use.
Table 10-8 Alternate Joining Material Evaluation Test Method
PROPERTY TEST METHOD
Chip bond strength Measure with force gauge or torque gauge
Glass transition (Tg) ASTM D-3418 or D-4065
Coefficient of Thermal Expansion (CTE, alpha) above and below Tg Thermomechanical analysis
Modulus ASTM D-638 or D-4065
Flammability UL testing of recognized board with adhesive on it
Thermal conductivity Comparative method
Ion content Ion chromatography of aqueous extraction
Dot size & shape Measure with optical comparator or microscope
Slumping Measure dot shape vs. time
Measure with viscometer at one or more speeds (ASTM
Viscosity
D-2196 or ASTM D-2556)
Ratio of viscosity at two different speeds; sometimes
Shear Thinning Index
called thixotropic ratio
Corrosivity Copper mirror test or ASTM D-3482

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10.3.7.3 Subjective Tests Subjective tests are usually performed by visual inspection or comparison to a known standard
to evaluate appearance, color, visibility, consistency, reparability, presence of particles, or presence of air bubbles.

10.3.7.4 Corrective Action The following corrective action can often be sufficient to cure common joining material
problems.
A. Stringing
• Nozzle diameter too narrow - Increase nozzle diameter.
• Air pressure too high for nozzle diameter - Reduce air pressure.
• Nozzle distance too far from the printed board - Reduce distance.
• High temperature at nozzle - Reduce temperature.
• Poor quality or aged adhesive - Check data sheet or ask supplier for shelf life policy and storage recommendations.
• Adhesive not designed for high-speed dispensing - Choose less stringy adhesive.
B. Nozzle Clogging
• Contamination by conductors of incompatible adhesives. Replace nozzle or clean it thoroughly after every shift. Use
an ultrasonic cleaner. Severely clogged dispensers or nozzles can be cleaned with Dimethylformamide.
• Nozzle not cleaned properly or regularly - See corrective action above, and clean nozzles after every shift. Take care
not to push cured adhesive up into the nozzle.
• Anaerobic cure in steel nozzles, or use of brass or copper parts. - Most acrylic products are somewhat anaerobic in
nature. They should not be used with brass or copper parts. Steel parts can be washed with a solution of sodium
C. EDTA to prevent anaerobic cure.
• Heat or moisture cure in nozzle - Clean nozzle. Control environment.
• Particles in adhesive - Contact supplier.
C. Some Dots Missing
• Nozzles clogged with cured resin - See corrective action above.
• Printed board not flat - Contact supplier.
• Adhesive dispenser tips worn - Replace with new ones.
• Air in syringes - Centrifuge syringes.
D. Low Strength or Lost Chips
• Insufficient heat in curing - Check circuit temperature with thermocouple and adjust in accordance with supplier’s rec-
ommendations.
• Localized cooling by heat sinks or aluminum electrolytic capacitors - Check circuit temperatures in these regions with
a thermocouple and adjust in accordance with supplier’s recommendations. If this leads to excessive temperatures, use
an infrared (IR) system to heat the top surface while keeping the sensitive devices on the cooler underside.
• Dot size too small - Increase air pressure or pulse length.
• Mold release or coating such as silicone on component. Check with supplier of component and clean release agent or
coating, or switch to another component supplier.
• Poor contact between large components and printed board. Piggyback the dots or switch to adhesive with higher dot
profile and better gap filling capability.
• Many hours between dispense and cure of adhesive. Choose a product with longer open time.
• If using UV, only using one dot of adhesive - Try a larger dot or two dots so that outer edge of adhesive is exposed
to UV energy.
• Omitting UV or heat with UV/heat-curing adhesive - Use both UV and heat.
E. Adhesive Surface Tacky
• Not using UV with UV/heat-curing adhesive - Install UV curing chamber or use adhesive which cures by heat alone.
• If using UV, may not be intense enough or the life of the bulb has ended - Ask supplier for required intensity and/or
change the bulb.

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F. Inconsistent Viscosity or Dot Profile

• Prolonged storage at room temperature - Store epoxies at around 0 °C.
• Frozen epoxy warming up - Allow to reach room temperature before use.
• Squeegee breaks down viscosity - Replace with fresh adhesive or lower temperature to increase viscosity.
• Process temperatures vary - Control temperature.
• High humidity - Reduce humidity or use less sensitive adhesive.
• Same adhesive varies from lot to lot - Contact supplier.
• Dot spreads before curing - Choose adhesive with higher viscosity or yield point, or use UV curing acrylic.
• Operator wants to control viscosity - Raise temperature to lower viscosity or lower temperature to increase viscosity.

10.4 Mechanical Pressure Connections

10.4.1 Solderless Backplane Contact Terminations Soldering is the most-used method for the termination of component
in printed board subassemblies. Wave soldering is used almost exclusively to terminate the backplane to the plug-in assem-
bly interface connectors when all of the backplane interconnection wiring is provided by a multilayer board. When the
printed wiring backplane is used primarily for power distribution purposes and discrete point-to-point wiring is used for the
signal interconnections, soldering was the original method used for terminating the connector terminals to the backplane.
However, where discrete wiring is involved, the last several years has seen the use of soldering being limited and the use
of ‘‘solderless’’ techniques significantly increasing for the making of the printed-wiring backplane connector contact termi-
nations. This is because most backplane assemblies are characterized by high unit volume, rapid and reliable field repair,
and selected changes from custom product specifications that can no longer accept the limitations that soldering presents.
The desire to use solderless termination methods has resulted in the use of pressure-contact ‘‘press-fit’’ geometries that pro-
vide metal-to-metal contact between connector posts and the plated through holes of the printed-wiring backplane. Press-fit
technology has been used since the mid 1960s in association with the use of 0.635 mm [0.025 in] square solderless (wire)
wrap posts. In general, the design of these products should be in accordance with the requirements of ANSI/IPC-D-422
(Design Guide for Press Fit Rigid Printed Board Backplanes).
Such press-fit terminations are basically achieved with the contact posts providing the elastic energy required to maintain
reliable interface pressure with the plated-through hole. In order to ensure reliable ‘‘gas-tight’’ performance the post geom-
etries and printed wiring board processing variables, i.e., drilled hole size, plating thickness, etc., must be tightly controlled.
To facilitate achieving the desired results several different post-to-hole interface configurations have been developed by
various connector manufacturers. These vary from the original ‘‘solid’’ post to the more modern ‘‘compliant’’ types. The lat-
ter include ‘‘splitbeam,’’ ‘‘needle eye,’’ ‘‘C-press’’ and ‘‘bow tie’’ designs.

10.4.1.1 Solid Post Technology Solid post designs, typically rectangular in cross-section, use a post with a diagonal
dimension that is larger than the minimum size of the plated-through to which it is to be terminated. Since the post does not
deform elastically to any appreciable extent during its insertion into the hole, the plated-through hole must expand or oth-
erwise deform to accommodate the interference fit. Consequently, all of the termination energy is stored in the printed-wiring
backplane.
Most of this force is transformed into permanent board deformation with only a small part of it converted to stored energy.
Thus, depending upon backplane thickness and the degree of engagement interference, board damage may occur, as may
low post retention forces.
Therefore, although less costly to produce, the use of solid press fit posts with printed-wiring backplanes have a number of
limitations when compared to the compliant types, such as:
• Higher post insertion forces and, thus, potentially more post buckling;
• Potentially more printed wiring board deformation and damage;
• More localized plated-through hole stresses and plating damage;
• Tighter tolerances must be maintained;
• Greater incident of post loosening due to the board’s inability to store elastic energy;
• Repairability may require the use of over-sized replacement posts or undesirable soldering.

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10.4.1.2 Compliant Post Technology The emergence of ‘‘compliant’’ press-fit designs was brought about by the need to
overcome the limitations of solid-post technology. In these instances, the interface between the contact post and the wall of
the plated-through hole is based primarily on the designed-in deformation of the post rather than of the hole. The degree of
compliance is determined by the ability of the post to deform elastically, thus storing elastic energy to optimize intercon-
nection performance.
The plated-through hole interface portion of compliant post designs are of three basic types, i.e., non-rectangular solids,
crescent shapes, and split beams. The non-rectangular solid types are typified by a geometry that has been engineered to
exhibit some plastic deformation. The crescent types are typified by their ‘‘C-shaped’’ cross-section. The split-beam versions
generally consist of two beams that act as opposing spring members during the flexing that occurs in the insertion flexing
mode.
There are other variations of the solderless interface concepts. However, each version exhibits unique deformation charac-
teristics, both radially and axially, with the ultimate connection performance determined by the degree and location of elas-
tic versus permanent deformation.
While each concept offers a press-fit connection alternative to the use of conventional solid posts, interconnection perfor-
mance as related to the end-product application varies significantly from one post type to another.

10.4.2 Solderless (Wire) Wrapping Subassembly interconnection system technology has been continually evolving since
the early days of discrete hand-soldered point-to-point interconnections between solder posts on the first one part printed
wiring connectors. The impetus toward developing improved wiring methods was supplied by the introduction of the use of
solderless (wire) wrapping processes by Bell Laboratories in the early 1950s.
Solderless (wire) wrapping is one form of making an electrical connection between a conductive wire and a terminal or post
that is secured to a printed board, panel or connector. This system provides reliable electrical connections, the quality of
which can be verified mechanically or electrically during production or subsequent use.
Most electronic equipment subassembly interconnection systems use multilayer printed wiring exclusively, or hybrid com-
binations of printed wiring and aluminum backplane structures with discrete solderless (wire) wrapping technology to form
various cost-effective and reliable end-product variations. However, as described in ANSI/IPC-DW-425 (Design and End
Product Requirements for Discrete Wiring Boards), other methods are used to satisfy special discrete wiring applications.
The choice of a particular combination (or the exclusive use of only one approach) depends on the application. Some fac-
tors to consider are:
• Physical Space
• Circuit Operating Speed
• Power Distribution
• Design Flexibility
• Maintainability
• Repairability
• Production Quantity
• Cost Effectiveness

10.4.2.1 Solderless Wrapping versus Soldering Solderless (wire) wrapping is a process for connecting solid-conductor
discrete wires to a terminal by tightly coiling the wire around the terminal wire a hand tool or machine.
When compared to hand soldering, the advantages of using this solderless wire termination method are clear. For example:
• Solderless (wire) wrapping does not require the use of heat to make the termination. This eliminates the possibility of
component damage and improves operator safety.
• Solderless (wire) wrapping allows for compact terminal spacing, i.e., 2.54 mm [0.100 in], that requires significant opera-
tor skill when terminated with hand soldering.
• Solderless (wire) wrapping can be used to cost-effectively terminate discrete wires through the use of either manual, semi-
automatic, or fully-automatic methods.
• Perhaps most importantly, solderless (wire) wrapping can produce reliable terminations. Due to the controlled use of pre-
cision tooling, such terminations can be made consistently regardless of operator skill levels.

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Due to the qualitative nature of the process, with soldering there is no nondestructive way to guarantee that the electrical
connections are repeatedly sound. In contrast, solderless (wire) wrapping provides a quantitatively measurable, gas-tight,
‘‘cool’’ termination with a design life of 40 years. (Nondestructive ‘‘strip force’’ tests can be used to provide a reasonable
determination of the quality of the wrap-wired termination.)
Conversely there are applications where the use of soldering is advisable. One disadvantage, is the need for wiring posts
that significantly extend beyond the rear of the backplane. This makes solderless (wire) wrapping unsuitable for high-density
packaging applications that require a low backplane profile. Also, the field of wrapped-wire posts can significantly increase
crosstalk/noise levels, especially for high-speed and high-frequency applications.
Another drawback is that each end of the wire must be terminated individually, as opposed to the use of a mass soldering
process that can make simultaneous terminations. Solderless (wire) wrapping with only solid-conductor wire can also be
unsuitable for connections between the backplane and external cabling that is subject to bending and flexing and thus, usu-
ally uses stranded wire for this purpose.

10.4.2.2 Types of Solderless (Wire) Wrapping Two basic types of

wrapped-wire connections are regular and modified. In a ‘‘standard’’ termi-
nation only the bare, uninsulated solid-wire conductor is wrapped around the
terminal post, Figure 10-4.
2
A ‘‘modified’’ termination has from one to two and one-half turns of insu-
lated wire in addition to the bare wire. The modified wrap is used to soften
1
the impact of the first corner of the post and, at the same time, serves as
strain relief against possible vibration and flexing stresses on the wire.
The number of wire turns is a function of the wire size, although the mini- IPC-820a-09-21
mum number of turns is a function of individual requirements and whether
or not a regular or modified termination is made, Table 10-9. Figure 10-4 Solderless Wire Wrap
1. Insulation clearance
2. Wire diameter (viewed from bottom)

Table 10-9 Number of Solderless (Wire) Wrap Turns

Diameter Minimum Number of Turns
Wire Size mm [inches] Class A Class B
301 0.25 0.010 7 stripped turns plus 1/2 insulated 7 stripped turns
281 0.32 0.0126 7 stripped turns plus 1/2 insulated 7 stripped turns
26 0.40 0.0159 6 stripped turns plus 1/2 insulated 6 stripped turns
24 0.51 0.0201 5 stripped turns plus 1/2 insulated 5 stripped turns
1
22 0.64 0.0253 5 stripped turns plus 1/2 insulated 5 stripped turns
201 0.81 0.0320 4 stripped turns plus 1/2 insulated 4 stripped turns
1
18 1.02 0.0403 4 stripped turns plus 1/2 insulated 4 stripped turns
NOTE 1: For 0.025’’ x 0.025’’ wrap post, 22, 20 and 18 wire sizes are not recommended for use. For 0.045’’ x 0.045’’ and 0.030’’ x 0.060’’ wrap post, 30 and 28
wire sizes are not recommended for use.

Quantitative non-destructive minimum strip force requirements can then be invoked to help ensure that an appropriate wire
termination has been made, Table 10-10. Details for the Strip Force test method can be found in Mil-Std-1130.
10.4.2.3 Solderless Wiring Terminals All solderless (wire) wrap terminals (posts) have at least two diagonally opposed
sharp edges to which the gas-tight connection is made. In most application the posts are square in cross-section, typically
0.635 mm [0.025 in] for small wires and 1.15 mm [0.045 in] for large wires.
The exposed wrappable length of the post is a function of the type of wrap, wire size, and the number of levels of termi-
nations to be made. When 24-and 26-AWG wire and three levels of modified termination are used, the extended post length
should be a minimum of 19.0 mm [0.750 in] and a maximum of 22.2 mm [0.875 in]; for the smaller 28-and 30-AWG wires
these values can be reduced to 1.3 mm [0.500 in] and 1.6 mm [0.625 in], respectively.
The metallurgy of the wrapping post depends on the requirements for the other end of the terminal. Thus, for backplane
connector applications, the post base material is generally either beryllium copper or phosphor bronze. Gold plating is used
for optimum reliability. In some instances, the wire termination end of the post is also tin plated or solder coated when wir-
ing changes or field repairs will be made by soldering.

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Table 10-10 Solderless (Wire) Wrap Strip Force

Conductor Diameter Minimum Strip Force (Pounds)
0.045 sq. in.
Wire Size mm [inches] 0.025 sq. in. 0.06 in. x 0.03 in.
30 0.25 0.010 2.0 –
28 0.32 0.0126 3.0 –
26 0.40 0.0159 4.0 6.0
24 0.51 0.0201 5.0 7.0
22 0.64 0.0253 – 8.0
20 0.81 0.0320 – 9.0
18 1.02 0.043 – 15.0

Table 10-11 Solderless Wrap Wire/Terminal Size Relationships

Wire Size Terminal Size, in. Maximun Insulation Diameter Type Wrap
30 0.025 sq. 0.023 Modified
28 0.025 sq. 0.033 Modified
26 0.025 sq. 0.030 Modified
26 0.031x0.062 0.041 Modified
26 0.045 sq. 0.041 Modified
24 0.031x0.062 0.050 Modified
24 0.045 sq. 0.050 Modified

10.4.2.4 Discrete Wrapping Wire The size of the wire used is usually dependent on the application. In telecommunica-
tions applications this is typically in the 22-to 24-AWG range; for most other electronic applications it is from 26-to
30-AWG. Power buses may require the use of heavier gauge wire.
Oxygen-Free High Conductivity (OFHC) copper is the most widely used base metal for electronic applications. However,
tough-pitch copper, certain copper alloys, and copper-steel conductors are also used.

10.4.2.5 Wiring Grids For optimum wire routability, solderless (wire) wrap backplanes have the terminal posts located on
one of the recommended grid configurations. Such grids are generally either in a rectangular or staggered pattern.
The rectangular (or square) grid systems have rows of terminals that coincide with backplane grid lines, with a terminal
located at each basic grid intersection. The staggered grid system has alternate rows of terminals that are offset in one
direction.
Each arrangement has distinct advantages over the other. The square grid has the greatest post density in a given area of the
backplane. However, this usually limits wire dressing or placement to certain specific channels because of the close termi-
nal spacing.
The staggered grid, with its reduced terminal density, has a greater wire-routing channel width. This is advantageous with
circuits where electrical noise and crosstalk problems are critical, as there is less parallel wiring within a given channel.

10.4.2.6 Wiring Equipment There is a wide variety of solderless (wire) wrapping and unwrapping tools available for
backplane applications that vary from simple screwdriver-like hand tools to fully-automatic systems. However, convenient
power driven manual and semiautomatic models are the most widely used and applicable for all but the highest volume dis-
crete wiring purposes.

10.4.2.6.1 Wire Wrapping Considerations for Hand, Semiautomatic, and Fully Automatic Processes
• What type of insulation is used on wire? - Exotic insulations may impact the per wire cost due to higher raw material cost.
• How large is the panel? - In addition to possible physical machine limitations, it is important to remember that long wires
increase machine movement and may impact the per wire cost.
• Is a from-to list available? - A from-to list is the most efficient input media for wire wrapping sequence tape generation.
It is also a necessity for computer generated circuit analyzer drive tapes.
• What wire size is to be wrapped? - In general, smaller sizes are more difficult to wrap and may impact the per wire price.

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• Are twisted pairs or special routings present? - Software generation and per wire cost increases are involved.
• Is a panel available for geometry program generation? - Development of geometry program from a panel gives the high-
est confidence level, and facilitates testing of the program.
• Is a from-to list available on a punched card deck? - This method of transferring data gives a high confidence level.
• Does the customer have a wire wrapping specification? - If not, should we use our own internal spec, EIA spec, MIL spec,
etc.
• Does the customer wish to supply his own software? - The tape must be in the computer wrap binary format. If other tape
formats are available, it is necessary to check out the feasibility of conversion to computer wrap binary.
• What routing style is desired? - Routing style affects price per wire.
• How many wires are on the panel? - Wire count determines computer run charge.
• If the panel is to be automatically tested, can customer supply mating connectors and/or paddle cards? - Availability of
mating connectors from customer will drastically reduce the price of the test interface cable.
• If panel is to be automatically tested is it I C socket or card cage configuration? - While card cage configurations are eas-
ily accessed with adapter cables I C socket types must be accessed via spring pin fixtures.

10.4.2.6.2 Manually-Operated (Hand) Wrapping Tools Hand wrapping tools are especially useful for small-lot produc-
tion, prototyping, and repair purposes. Unwrapping tools are often of the manually operated type since this operation is typi-
cally only done occasionally.
An enhanced type of hand-operated equipment is the trigger-actuated, manually-powered, wrapping tool. However, the use
of these tools is not recommended for the termination of a large number of wires, especially large wires, because of the
associated wear and operator fatigue factors.
When this is the case, battery-, electric-and pneumatic-powered hand tools are commonly used. Battery-powered tools are
best for low-quantity applications that are not too taxing on the power source, even though rechargeable batteries can be
used. The lack of a power cord adds to their portable, quiet, and safe operation.
Electric alternating-current power tools are the most widely used wrapping units. They are typically quieter and lighter than
their pneumatic-powered alternatives.

10.4.2.6.3 Semiautomatic Wrapping Equipment The use of semiautomatic solderless (wire) wrapping equipment is basi-
cally associated with the use of X-Y coordinate locating machines that are used in conjunction with powered hand tools. As
already noted, use of these machines can dramatically increase wiring rates and reduce wiring errors when compared to the
use of the hand tools in an unaided manner.
There are two basic types of semiautomatic equipment, i.e., those with a ‘‘fixed head’’ and those with a ‘‘moving pointer.’’
With a fixed head the backplane moves with respect to the wrapping tool; with a moving pointer the tool position moves
with respect to the backplane.
When used with numerically-controlled systems, the semiautomatic machine reads the encoded location and decision data,
locates the wiring point, and provides the operator with the necessary information to perform the wire termination, such as
length of wire, whether or not it is the first or second warp on the wire, and the wiring sequence number. Unfortunately,
there are no controls over the routing configuration of the wire between its end termination points.
Because of various factors, the use of semiautomatic solderless (wire) wrapping machines are an economical choice for a
wide range of wiring volumes. In fact, even in high-volume applications, the use of several semiautomatic units is preferred
to the use of one fully-automatic machine.

10.4.2.6.4 Fully Automatic Wire Wrapping Considerations The fully automatic wiring operation is performed without the
aid of human assistance. This includes cutting reel-fed wire to predetermined lengths, stripping both ends of the wire, form-
ing the wire into its routing configurations, positioning the wire and both of the wrap heads simultaneously over desired
terminal posts, lowering the wire and wrapping tools to the desired level of the post, and terminating both ends of the wire
at one time. (The main role of the ‘‘operator’’ is to load unwired backplanes into the machine and unload wired ones.)
• Was subject panel initially designed for automatic wrapping? - The parameters required for automatic wrapping cannot be
built into a panel after the fact.
• What is panel size and active wrap area? - Maximum panel size is 26 x 26 inches and maximum active wrap area is 22 x
22 inches.

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• Is the panel fabricated packaged and delivered with positioning within a 0.010 radius? - Pins may have to be adjusted to
specification.
• Is more than one grid spacing present on the panel? (For example 0.100 x 0.125 inch) - Since the panel is rotated during
the wrapping cycle, pin displacement must be equal in the X and Y directions. This is necessary to employ the routing
fingers when the X and Y directions swap during rotation.
• What is wire size to be applied? - It is an expensive proposition to change a machine to a wire size other than what it was
built for.
• What is the tolerance of the outside dimension of the required wire? - The machine requires wire with a dimensional tol-
erance of ± 0.001 inch with 80% concentricity.
• Is more than one wire size present on the panel? - The machine cannot do more than one wire size at a time. With mixed
sizes on the same panel, the remaining gages would have to be done on another automatic machine, a semi-automatic
machine, or by hand.
• Are twisted pairs employed on the panel? - Twisted pairs cannot be applied by the automatic equipment. They would be
applied by semi-automatic machines or by hand.
• What are outside pin dimensions? (For example 0.025 x 0.025 inch for 30 gage wire) - Tooling must conform to pin size.
• Do all pins exhibit the same outside dimensions? - The machine is capable of wrapping only one pin size at a time.
• What is the tolerance of the pin diagonal measurement? - The wrapping bits will accept a tolerance of no greater than ±
0.001 inch.
• Are all pins the same height? - Only one pin height can be set for a given run.
• Do any components protrude above the base of the pins within the wrap area? - Any protrusion above the base of the pins
will cause the cut and stripped wire to be pulled from the Wire-Wrap bits, since the wire is cut to the exact length to make
the wire run and loaded into both bits simultaneously. Wrap height can be raised to clear components as long as the Wire-
Wrap pins are long enough to accommodate the required number of wraps.
• What routing style is required? - The machine is capable of picture frame routing only.
• Are there any restricted areas on the panel? - Restricted areas will bring about a need for an extensive programming effort.
The use of this type of machinery is best suited for applications where labor costs and production levels are the highest and
where the operations are highly repetitive. However, in addition to the general basic processing considerations already enu-
merated, there are additional factors to be taken into account when fully-automatic machines are used.

10.4.3 Conductive-Elastomer Pressure Connections Elastomeric connectors make a multiplicity of contacts between
two mating surfaces by merely sandwiching the electrically-conductive elastomeric elements between the surfaces. Thus, the
use of soldering and other permanent connection processes are eliminated, making it easy and fast to disconnect and recon-
nect the components. Other advantages of elastomeric connectors include the ability to connect conductors on very small
pitches (down to 0.1 mm [0.004 in]), minimum printed board area and height used, exclusion of atmospheric contamination,
minimum high-frequency signal distortion, inherent surface mount-ability and resistance to shock and vibration.
Generally redundant contact is made, that is, there are several conductive paths between any two mating lands. It is not nec-
essary to line up the pads with the element paths. All that is required is registering the mating lands to each other.
Silicone rubber is used in the great majority of elastomeric elements because of its long term stability and resistance to deg-
radation by ultraviolet (UV) light, oxygen and most chemicals it is likely to contact. Silicone rubber has a wide continuous
use temperature range of from -55 °C (or lower) up to +175 °C, a low dielectric constant of from 2.7 to 3, a low loss tan-
gent, and a high volume resistivity of over 1012 over a wide temperature and frequency range and up to 100% relative
humidity. Silicone rubber is swollen but not permanently degraded by hydrocarbons.
There are several types of elastomeric elements that are used to make connections to electronic assemblies:
A. Layered Elastomeric Elements (LEE) – These are composed of alternating conductive and non-conductive layers of
silicone rubber from 0.05 to 0.25 mm [0.002 to 0.010 in] thick. LEEs containing carbon in the conductive layers yield
a resistance of from 200 to 10,000 ohms. Thus, they find their only large usage connecting liquid crystal displays to their
driving circuits.
A resistance of from 0.05 to 1 ohm is produced if the carbon is replaced with silver filler. The silver-filled LEEs are
extensively used to connect electroluminescent displays, printed boards, chip carriers, hybrid circuits and components
under test.

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B. Metal-on-Elastomers – These elements consist of metal traces on-the surface of a silicone rubber core. The traces of
some metal-on-elastomer devices are directly on the silicone surface; on others the conductors are on a plastic film that
is wrapped around the core.
The metal-on-elastomers can be flat and make connection between surfaces in the same plane or they can have an oval
or round cross section and make connection between opposing surfaces. The metallization is generally gold on nickel on
a copper base, but other materials are available. Resistances as low as 0.005 ohms are possible, depending on the geom-
etries of the element and the contact pads.
Metal-on-elastomers are used in many of the silver LEE applications where a lower resistance is needed.
C. Metal-in-Elastomers – In these elements metal wires traverse the silicone rubber body. The wires can be round or rect-
angular and composed of copper, nickel, gold, stainless steel or other metals. If the wires are arranged in a matrix, they
can make contact to pads over an area rather than just in a row.
D. Z-Directional Material – This connecting element is produced in sheet form and conducts only in the direction of the
applied pressure, i.e., the Z direction, producing electrically isolated contacts over large areas. The available sheet thick-
ness generally ranges between 0.13 to 1.5 mm [0.005 and 0.06 in].

10.4.3.1 Design Constraints As the elastomeric connectors must remain clamped throughout their operation, a means of
applying adequate pressure over the atmospheric conditions is required. As many hydrocarbons will swell the elastomeric
elements, the elements must be put into place after the assembly has been subjected to these solvents, e.g., after post-
soldering flux removal.
Slots should be available to retain the elements in position and stops provided to assure proper element deflection. The sub-
strates (e.g., printed boards) must be rigid enough to maintain sufficient pressure on the elastomeric elements or the use of
a backing plate may be necessary.
Means must be provided to align the mating lands so that the elastomeric element conductive paths can connect them. This
is most conveniently done by utilizing mechanical features on the substrates.

10.4.3.2 Common Usage/Process Consideration Elastomeric connectors found their first and widest use in connecting
flat screen displays to their driving circuits. They are used in increasing amounts in connecting printed boards, particularly
in hand held devices. Chip carriers, hybrid circuits and other ceramic substrates are being socketed with elastomeric ele-
ments for permanent attachment, and test and burn-in applications.
Elastomeric connectors can rarely be used in packages designed to accept conventional connectors. Surface pads, alignment
features, clamping means, and element positioning features must be provided.

10.4.3.3 Special Usage Elastomeric connectors are gaining acceptance in many areas where there is a need for close
spacing and/or high frequency are critical requirements, such as in pad grid array sockets, test sockets for gull-wing pack-
ages on a pitch of 0.63 mm [0.025 in], connection between printed boards in test sets that operate in the gigahertz range,
direct contact to chip contacts, and test and burn-in tape automated bonding (TAB) applications.

10.4.3.4 Common Problems/Misuse and Solutions The most frequent cause of elastomeric connector malfunction is
insufficient clamping pressure. This condition occurs when the supporting substrates are not stiff enough to maintain the
proper deflection of the elastomeric element. Having an excessive span between the hold downs will cause this problem; a
maximum span of 50 mm [2 in] should be used with 1.5 mm [0.06 in] thick FR-4 printed boards. If a thinner or less rigid
laminate or a greater span is used, it may be necessary to back up the contact area with stiffeners.
During testing at elevated temperature and/or humidity the printed board laminate often loses a large percentage of its stiff-
ness and may warp. This will result in the contact lands moving away from the elastomeric element, disconnecting the cir-
cuit.
Plastic housings and fasteners must also be carefully designed and specified to assure that adequate pressure is maintained
over the life of the equipment. Plastic will creep under long stress exposure. The creep is accelerated at elevated tempera-
tures.
Although the elastomeric elements make redundant connections and, therefore, do not have to line up with individual con-
tact lands, the mating substrate lands must be aligned. Many manufacturers assume that the lands are accurately positioned
with respect to the substrate sides. This is often not true, especially on flat screen displays. As the land pitch decreases, the
accuracy of alignment must be increased. Optical targets are frequently used.

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Every elastomeric element has some amount of ‘‘skew.’’ That is, the conductive lines are not perfectly perpendicular to the
sides of the elements. The skewed lines can produce connections between the wrong lands. As the distance between the sub-
strates increases, the conductive lines lengthen, and the misregistration increases. Thus, for very-fine land pitches, the dis-
tance between substrates should be kept to a minimum and the skew of the elements held below a critical level.
Dirt and dust on the elastomeric elements will produce high resistance or open circuits. It is common practice to clean the
elements before installation. Dust and loose dirt can be removed by dipping the elements in alcohol and drying them.
The silver particles in silver-filled layered elastomeric elements can become contaminated with air borne sulfur in the same
way that silverware is affected. The resulting silver-sulfide layer will increase the resistance of the element and cannot be
removed. To avoid this problem, the silver containing elements should be stored in an air-tight container or in a closed
package with a material that will remove the sulfur from the air.
If the slot containing the elastomeric element is not wide enough, the lateral movement of the rubber under deflection will
fill the slot and not allow adequate contact.
10.4.3.5 Troubleshooting Table 10-12 provides a brief guide to troubleshooting problems that may occur during the use
of elastomeric connectors.
Table 10-12 Elastomeric Connector Troubleshooting Guide
Problem Possible Causes
No or high contact resistance 1. Element too short.
2. Holder slot too narrow.
3. Contamination on the elastomeric element or contact lands.
4. Insufficient pressure on elements.
5. Span between hold-downs too large.
6. Substrates not sufficiently rigid.
7. Sulfide formation on silver-filled elements.

Incorrect Lands Connected 1. Substrates misaligned.

2. Too much skew in the elastomeric element.

11 CLEANLINESS REQUIREMENTS
Why Clean?
In general, the manufacturing processes used on electronic assemblies are a series of chemical processes. Each step in the
operation has the potential for leaving harmful materials on the PWA that can compromise assembly reliability. Cleaning is
often needed to remove such harmful residues and improve reliability. Cleaning is also used to remove residues as an aid
to inspection.
The main objectives to cleaning are based on the costs of investment and control. The most expensive feature of washing
is the drying. The boards and the assembly of components must be suitable for washing, ideally with no capillaries under
the components or open via-holes that may trap the solvent. When using organic solvents the environmental and safety costs
must be considered.
Customer contracts often require the assembly to be cleaned and tested for cleanliness.
Most assembly processes can be divided into two general categories: those that incorporate a cleaning process and those
that do not. Both assembly categories are capable of producing high reliability hardware. The post-soldering cleanliness des-
ignator allows a customer or manufacturer to specify the process to be used on their hardware.
The cleanliness of parts is necessary both before and after soldering. Poor cleanliness is a common cause of solderability
problems. Effective cleaning after soldering may be necessary to promote good adhesion of conformal coating, prevent leak-
age paths, and avoid corrosion.
If the assembly has to be cleaned, the user has to clean the assembly (the cleaning solution chosen should remove the harm-
ful flux residues), while leaving the other materials and components alone. The cleaning media should be capable of remov-
ing any electrically conductive residues (ionic residues) and non-conductive (non-ionic or organic) residues.
Historically, with high solids rosin fluxes, if cleaning was not performed, or the user did not perform cleaning within an
hour of mass soldering, the flux residues polymerized and became virtually impossible to remove. Some fluxes retain this
characteristic, so if cleaning is required for the product, the cleaning process should be started soon enough to prevent such
polymerization. Practically speaking, cleaning should follow mass soldering as soon as possible.

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All items to be cleaned must be cleaned in a manner that will prevent detrimental thermal shock and/or detrimental intru-
sion of cleaning media into components that are not totally sealed. The items cleaned should be capable of meeting the
cleanliness requirement as specified herein.
After the completion of mass soldering (reflow or wave soldering), the components and laminate will still be very hot;
immediately immersing an assembly in cooler cleaning solutions could cause degradation in both the laminate and possibly
the components. All materials have different CTEs; and if the temperature changes rapidly, cracking is possible, as the mate-
rials expand and contract at different rates. Since this is true for all hardware, a requirement for all hardware is that it must
be cooled before coming in contact with significantly cooler cleaning media.
Contaminants are generally categorized as polar or non-polar. Polar contaminants are those compounds that have a non-zero
dipole moment. They may be ionizable or non-ionizable. Non-polar compounds have no associated dipole moment and will
not dissociate into charged particles or carry a current.
Non-polar contaminants include compounds such as rosin, oils, and waxes, which are usually insulators. Problems associ-
ated with non-polar contaminants include causing open circuits in connectors or contacts, failure of conformal coating adhe-
sion, and white residues.
Historically, white residues have been a topic of debate (good vs. bad). For high solids rosin fluxes (e.g., RMA), the white
residue was most often residual rosin in the form of abietic acid, which was not corrosive. For low solids fluxes, the flux
residue that remains on the boards may turn white after exposure to high humidity or aqueous cleaning. This form of white
residue is likewise considered to be benign.
Ionizable polar contaminants are usually salts that are introduced to the assembly during the production process. Common
sources of these salts include flux activators, salts from the skin, and plating salts left over from fabrication. Ionizable con-
taminants can cause corrosion, electrical leakage, and measling of the conformal coating. Mineral acids (extremely corro-
sive) and bases are other ionizable polar contaminants. Non-ionizable polar contaminants are normally less corrosive than
ionizable contaminants, but can still migrate under the influence of an electric field and result in current leakage.

11.1 Definitions

11.1.1 Solvency Solvency is the ability of the cleaning agent to dissolve soils. It depends on the solubility match of the
solvent to that of the soil.

11.1.2 Solvent Stability The stability of a solvent is defined by its ability to resist breakdown from contact with equip-
ment and product to be cleaned, its ability to withstand elevated temperatures and other process conditions, and it is related
to flammability. The industry generally strives to primarily use non-flammable cleaners.

11.1.3 Film Drying Characteristics This is a property of solvents that deals with two phenomena at the same time: the
solvent’s ability to flush away dirt from the surface and its rate of vaporization. Unless the solvent can carry off the dirt
without first evaporating, streaking occurs. For instance, in the process of draining from the surface, if the solvent evapo-
rates usually it will leave the dirt behind in irregular (patchy) patterns.
This phenomenon is directly related to the evaporation rate or vapor pressure, which in turn, is dependent on the boiling
point of the solvent. Low-boiling solvents tend to streak more than higher-boiling ones.

11.1.4 Soil Capacity This refers to the quantity of a compound that a solvent can hold at room temperature (remember
that solubility usually increases with temperature). This is also sometimes referred to as the ‘‘loading’’ capacity of a clean-
ing agent.

11.1.5 Surface Tension or Solvent Wetting Wetting is the ability of the solvent to spread quickly over a surface because
of low wetting surface tension. The degree of wetting is often measured by contact angle (water bead test). Solvents that
have low surface tension will have a small contact angle, while solvents with high surface tension have a large contact angle
(tend to bead up). Total cleaning is dependent on both the ability of the solvent to access the soil (surface tension related)
and dissolve it (a solubility issue) or just physically remove it. This is important in regards to judging the solvent’s ability
to penetrate into crevices and displace other materials. In general, the cleaning action of a liquid depends on both the clean-
ing process (mechanical energy) and surface tension (accessibility). Such factors as agitation, fluid movement (flushing
action), and temperature will affect the length of the cleaning cycle.

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Closely related to solvent wetting is capillary action. Capillary action is the tendency of the solvent to be drawn into small
spaces by surface tension. The capillary action of a solvent is necessary for a solvent to clean under components and on
densely populated boards. Low surface tension improves wetting by capillary action.

11.2 Historical Perspective on Cleaning For many years, the same materials and processes were used in the manufactur-
ing of PCBs. PCBs had solder surfaces requiring relatively aggressive rosin-based fluxes to strip the oxides from the sur-
face metal in order to form a reliable solder joint. Because these fluxes were corrosive in nature, they had to be fully
removed in order to decrease the risk of electrolytic failures (corrosion, metal migration, and electrical leakage). Visual
examinations were made for signs of visible flux residues. Failure to do so meant the user had an unreliable assembly at
great risk of failure. The solvent of choice was one of the Ozone Depleting Compounds (ODCs), not necessarily because it
was a superior cleaner, but because it had a desirable blend of properties. Manufacturing leaders of that time developed tests
to determine the cleanliness of PCBs and the effects of flux residues. These tests and measures were based on the high-solids
rosin fluxes.
In the 1970s water-soluble (non-rosin) fluxes started entering the manufacturing sphere, but remained more in the commer-
cial realm, since the military and medical manufacturers shied away from the unknown (for good reason). When the Mon-
treal Protocol and Clean Air Act dictated the elimination of ODCs, the assemblers had to change manufacturing methods.
The flux suppliers began to provide a bewildering array of flux formulations, allowing fluxes to be tailored to specific appli-
cations. The cleaning agent suppliers came up with a variety of cleaning methods, including solvent, semi-aqueous, and
aqueous methods. See Section 11.5.
With this new found choice of materials and processes, there was a new obligation to determine: what constituted a clean
assembly, what processes were compatible, and what effects the new materials had on reliability. The existing specifications
for acceptability (chemical, electrical, and visual) were based on rosin chemistry. More importantly, the paradigms of the
rosin era remained. Low solids fluxes were designed for a no-clean process and left visible residues. The residues were often
benign, but the rosin paradigm stated that visible flux residues were bad, so many assemblies were cleaned anyway to
remove the (largely) cosmetic residues.
As research was conducted on the new fluxes, materials, and processes, it became apparent that there were no ‘‘golden’’
numbers or a one-size-fits-all acceptability criteria. For this reason, specifications became based more on testing protocols
to demonstrate reliability than for a single pass-fail number. The underlying philosophy of J-STD-001 illustrates this
approach. The specification puts process demonstration on the manufacturer, allowing the manufacturer and customer to
agree on what test methods and acceptability criteria will be used for such a demonstration. To give adequate coverage to
the issues of flux selection, cleaning dynamics and materials compatibility would be an enormous task, well beyond the
scope of this handbook.
The IPC maintains a wealth of technical papers and handbooks to guide the individual or company in understanding the
subtle, but critical, elements of process testing and process effects. In addition, as a volunteer organization, IPC maintains
a network of experts in virtually all aspects of electronics assembly technology. This network can be tapped electronically
by subscribing (at no cost) to IPC TechNet, which is a worldwide electronic forum of engineers, chemists, and process pro-
fessionals actively involved. The IPC technical staff can give details on subscribing, as well as provide contacts for those
individuals who do not have access to electronic mail.
Cleaning agents can be solvent, semi-aqueous, or aqueous (see 11.5), and cleaning methods can be manual (hand), batch, or
in-line. The cleaning solution chosen must be able to remove the harmful residues from the assembly. Residues include both
electrically conductive residues (ionic) and the non-conductive residues (non-ionic). At the same time, the solution cannot
be so aggressive that it attacks the circuit board materials or markings. This is one aspect of process compatibility that should
be demonstrated, per 11.6.2.
Even some modern, non-ODC solvents can remove ink-based markings from parts. To avoid the loss of the marking,
process-compatible tapes or a clear epoxy covering over the part marking may be effective. Other markings, such as labels,
may be added to the part to supplement the initial part marking. Where part suppliers are willing to change the part mark-
ing inks, users have been able to obtain parts with markings that withstand these solvents. When part suppliers have been
aware of the problem, they have often been willing to adjust their selection of marking inks.

11.3 Toxicity One misunderstood area regarding solvents is their safety. There is much reliance on the threshold limit val-
ues or maximum allowance concentration. This is a suitable rating for the safety of liquids after they have evaporated in air.
It is actually the ppm quantity of solvent that can be inhaled in an eight-hour workday without causing deleterious effects.

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An additional critical factor is the speed with which solvents evaporate from a given surface or cleaning equipment to con-
taminate the air. Thus, a low-vapor-pressure, high-boiling liquid may be much safer, by several orders of magnitude, than
high-vapor-pressure, low-boiling solvents, because it takes much longer to reach a dangerous level in the air. At present there
is no practical scale or method that includes this consideration. Common sense and caution are urged. A low boiling point
is an important property of solvent blends that contain polar and nonpolar ingredients. Thus azeotropes are mixtures that
should especially be scrutinized for their physical and chemical properties before being used.

11.4 Ultrasonic Cleaning Ultrasonic cleaning utilizes acoustic energy, which can vary in terms of frequency and power
level. Some combinations of frequency and power are known to destroy the gold wire bonds between the active silicon die
and the package. Hence, ultrasonic energy has historically been banned from high reliability electronics. Ultrasonic clean-
ing can be used on PWBs and subassemblies, provided they do not contain active components.
Research has shown that there are some combinations of frequency and power that do not harm active circuitry. The provi-
sion exists that ultrasonic cleaning can be used, provided the manufacturer has data to show that the combination of fre-
quency, power, and cleaning solution does not detrimentally affect the component or assembly. Newer ultrasonic cleaners
sweep a frequency range.

11.5 Forms of Cleaning There are three primary forms of cleaning: aqueous, semi-aqueous, and solvent. These forms of
cleaning are detailed in 11.5.1 through 11.5.3.

11.5.1 Aqueous Cleaning Aqueous cleaning uses water as the primary cleaning agent. This can mean cleaning with pure
water, or water with detergent additives, or saponifier solutions. Aqueous cleaning is done most often for water-soluble
fluxes, but can also be used on rosin and low residue fluxes when using the appropriate additives. Aqueous cleaning is gen-
erally a multistage operation, with the bulk of the cleaning occurring in the first wash operations and the later operations
devoted to rinsing.
It is highly recommended that all aqueous cleaning systems utilize RO quality water (500 Kilohm-cm to 2 Megohm-cm) or,
preferably, deionized water (>2 Megohm-cm). Tap water contains impurities that interfere with the solvating capability of
water and can interfere with the efficiency of additives, such as saponifiers or leave behind undesirable materials.

NOTE: While high purity deionized water is desirable, ultra-high purity water, on the order of 15-18 Megohm-cm can be
detrimental. Water of this purity level can attack surfaces, including stainless steel.
As a minimum, an aqueous cleaning operation should contain thorough deionized water rinsing. Critical considerations
include:
• Susceptibility of materials and components to water or additives.
• Susceptibility of the system to temperature, if cleaning with hot solutions.
• The drying of the assembly following cleaning. The exit blowers are often inadequate for drying under low stand-off or
large footprint components. For more information on the various aspects of aqueous cleaning, the reader is referred to
IPC-CH-65.
The equipment used for aqueous cleaning uses a constant flow of fresh water and saponifier (detergent) into the wash sys-
tem, while monitoring the ionic contamination (resistivity) of the out flow waste water. A sample of known resistivity is used
to periodically calibrate the out flow resistivity tester.
The wetting agents break down the surface tension of the water and allow it to loosen dried residues. Surfactants react
(combine) with surface contaminants and reduce the adhesion characteristics of the contaminants. Sequestering agents react
with soluble contaminants to prevent their recontamination of the assembly and aid in ‘‘carrying away’’ the contaminant. A
saponifier is typically composed of three essential elements: wetting agents, surfactants, and sequestering agents.
The level of the saponifier in an aqueous system should be monitored. Some systems use batch additions of saponifier
instead of a continuous monitoring and addition system.
When a batch addition type system is used, the square footage of assembly surface area processed should be tracked. If too
much saponifier is added to the system, PWAs may be affected (i.e., discoloration, surface texture changes, etc.). If there is
too little saponifier, there will be a loss of cleaning system effectiveness. Flow rate measurements are the most effective
technique for both verifying that the spray nozzles have not become plugged and that the overall system is functioning
properly.

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11.5.2 Semi-Aqueous Cleaning Semi-aqueous cleaning is generally a two-stage cleaning process. In the first stage, a sol-
vent, such as a terpene or aliphatic hydrocarbon, is used to solvate a soil and keep it in suspension. In the second stage, the
solvent must be rinsed from the board, usually by water. This removes the solvent and the suspended residues in the sol-
vent from the board. It is generally necessary that the solvent be totally rinsed from the assembly.
Semi-aqueous solvents are most often used to solvate and remove the traditional high-solids rosin fluxes. This type of clean-
ing was first used as the industry moved out of CFC-based cleaning, but maintained use of the rosin fluxes. The use of
semi-aqueous cleaning on non-rosin fluxes is not prohibited, but the manufacturer would have to determine the appropriate-
ness of the solvating power of the solvent to the residues to be cleaned. In general, semi-aqueous solvents are designed for
high solids flux residues.

11.5.3 Solvent Cleaning Solvent cleaning is usually performed by vapor degreasing if the solvent can maintain a vapor
blanket, or by immersion cleaning. A solvent cleaning system is differentiated from aqueous and semi-aqueous processes in
that there is no water used. The solvent dissolves the soil and flows from the sample surface or is sprayed off with virgin
solution. The usually high vapor pressure of the solvent results in the evaporation of the solvent in a short period of time,
leaving the sample dry. Unfortunately, most non-CFC solvents that have high vapor pressures (thus giving fast drying) are
also flammable, presenting a fire or VOC hazard.

11.6 Cleaning Agent Considerations Cleaning agents fall into two groups: non-polar and polar solvents. Examples
include perfluorocarbons and water respectively. Typical non-polar soluble soils include oil, grease, wax, and rosin.
A typical ionizable solute is table salt. Free ions of sodium and chloride are formed upon the solution of the salt in water.
Other ionic compounds include acids and other activators used in fusing fluids or fluxes.
Few non-blended industrial solvents can be polar and non-polar as well as safe to humans and factories (e.g., fire hazards).
Unfortunately, the simple alcohols that fall into this category (polar and non-polar portions in the same molecule) are flam-
mable and less suitable for mass use. If we try to achieve a double cleaning action with a single liquid, we must use clean-
ers that are actually blends of both polar and non-polar solvents.

11.6.1 Types of Solvents Solvents may also be classified as single component solvents or azeotropic or non-azeotropic
blends. Since polar solvents are most effective at removing polar contaminants and non-polar solvents remove non-polar
contaminants, a blend is often most effective for removing both types of contaminants.

11.6.1.1 Azeotropic Blends An azeotrope, by definition, is a precise quantitative mixture of two or more liquids that have
a modified boiling point. The azeotrope boils at a lower temperature than its constituents do. The composition of the vapor
is the same as that of the liquid; therefore, the ingredients cannot be separated by distillation. This allows for distilling for
reuse without changing the composition.

11.6.1.2 Non-Azeotropic Blends When non-azeotropic blends are boiled, one component vaporizes more quickly than the
other, causing the vapor blend to be a different composition than that of the liquid. Non-azeotropic blends must be moni-
tored for correct composition and analyzed and reblended if distilled for reuse.

11.6.1.3 Water-Based Cleaners Water is a good cleaner for removing polar contaminants. Other materials, such as rosin
and oils, are insoluble in water. Water can be made to dissolve these materials by the addition of a saponifier, which is an
alkaline material that reacts with the non-polar residues to form a soapy material easily removed by water wash. Caution
must be used in this method, since the saponifier is highly ionic and, if not thoroughly rinsed with clean water, can leave
ionic contamination on the assembly.
The most important consideration in selecting a cleaning agent and process is to ensure that it does an adequate job of
removing the anticipated contaminants. For PWBs, the major contaminant is flux residue from the soldering operation, so
the choice of cleaning method depends largely on the type of flux used.
The fundamental rule in selecting a cleaning agent/process is like dissolves like. This means that polar solvents should be
used to remove polar contamination and non-polar solvents to remove non-polar contamination. If both polar and non-polar
contaminants are present, an agent that has both properties should be chosen.
The selection of the right solvent for an application is a complex process. There is also a wide range of physical and chemi-
cal properties that require consideration.

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11.6.2 Cleaning Agent Compatibility Of primary importance is compatibility with the components and PWB materials to
be cleaned. This cannot be over-stressed. The stronger solvents, capable of removing more soils, often attack some material
or coating on the work. The more aggressive solvents dissolve some types of plastics and marking inks, while certain other
components are not suitable for water cleaning. When used with an incompatible cleaning process, such components must
be hand soldered on to the PCB after the cleaning process has been completed. The rate of attack of the various solvents
on materials is the basic reason for the variety of cleaners used in electronics.
The harmful effects of harsh cleaning agents can be found in IPC-PE-740.

11.6.3 Vented Components Some components (e.g., Flip Chip Ball-Grid-Arrays, etc.) may have built-in vent holes into
which cleaning solvents (e.g., deionized water and saponifier) can enter and cause internal capacitors in the component to
corrode and ultimately fail. The cleaning process needs to address the use of such parts. It may be necessary to mask the
vent holes prior to cleaning, or eliminate the use of a saponifier, if possible, since the saponifier can lower the surface ten-
sion of the water, as compared to DI water alone such that the saponifier can enter the vent holes and may not be removed
by the cleaning process.

11.7 Cleaning Agent Delivery Considerations There are five primary methods used to deliver a cleaning agent to the
PCB/PWA: in-line, batch, hand (spot), vapor degrease, and ultrasonic.

11.7.1 In-Line Cleaning In-line cleaning refers to a conveyorized machine used in high production environments. High
pressure sprays (3.2-7 kg/cm2) simultaneously deliver cleaning agents from top and bottom. Some units will apply the spray
streams while the assemblies are immersed in cleaning solution, usually referred to as spray-under-immersion. In-line clean-
ers consist of one or more wash stages, where the primary soil removal occurs, followed by multiple rinse sections. The
final stages of the line usually consist of high-speed blower fans blowing hot air to dry the boards.
Generally speaking, in-line cleaners will give a more consistent result than any other kind of cleaning. Unfortunately, such
machines are usually very high in capital costs to implement, such that only higher volume shops can afford them. In addi-
tion, the pumps and motors make this a noisy option.

11.7.2 Batch Cleaning Batch cleaners are similar to dishwashers. Small lots of boards or assemblies are placed into racks
inside a chamber. The samples are washed for a set time in some form of cleaning agent, which is sprayed onto the assem-
bly surfaces. Following the washing, the samples are similarly rinsed, usually with water or alcohol. Some batch cleaners
follow rinsing with drying with inert gas (nitrogen), but most boards are force-air dried. Batch cleaners are much less
expensive to purchase and have lower maintenance costs but give more variable performance (boards near center are cleaner
than boards near the edge) and the units are less suited to medium or high production volumes.

11.7.3 Interim or Spot Cleaning Interim cleaning with isopropyl alcohol and a brush is a standard technique for tempo-
rarily relocating contaminants, though it does not remove contaminants (the contaminants must be flowed or washed away).
The greatest benefit of interim cleaning with isopropanol is it limits the ability of rosin flux to polymerize and may be used
to delay final cleaning. It is very important to use a good grade of alcohol.

11.7.4 Vapor Degreasing Items are cleaned in a vapor degreaser by suspending them over a sump of boiling solvent. The
cool surfaces of the item being cleaned cause the vapor degreaser to condense. The condensate washes away the dirt. The
item being cleaned eventually reaches the vapor temperature, at which time the vapor ceases to condense on the surface. At
this point, the dry item can be removed from the degreaser without taking any solvent with it, or it may be cooled for another
vapor cycle by immersing in cool solvent (spray or dip). Items cleaned in the vapor come into contact with only the clean,
distilled solvent. There is also minimal loss of solvent in a properly maintained degreaser.
The essential elements in a vapor degreaser are the boiling sump, the vapor zone, the cooling coils, and the cold sump. The
boiling sump produces a vapor zone above it, the height of which is limited by the cooling coils, which condense the dis-
tilled vapor and return it to the cold sump. Solvent can be drawn from the cold sump for spraying the parts to cool them.
Speed of board entry and exit are important in limiting vapor loss.

11.7.5 Ultrasonic Cleaning Ultrasonic cleaning is an effective technique for maximizing cleaning fluid flow or contact
with assembly surfaces. Through the creation of wave fronts (longitudinal (sonic) waves of higher density solution) and
cavitation areas (low density areas), some ultrasonic systems will create a pumping-like action within the cleaning solution.
This wave action aids in creating a flow of the cleaning solution between closely spaced items. The primary disadvantage

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that has been attributed to ultrasonic cleaning systems is the potential to damage parts. This damage potential is not fully
understood and is often considered to be more related to poorly controlled systems. It is believed that cavitation and reso-
nance of internal wire bonds in semiconductor devices with the ultrasonic waves is the source of the part failures. As such,
its applications are generally limited to cleaning bare boards or boards incorporating only terminals and connectors without
internal electronic elements.
The use of ultrasonic cleaning has some limitations. The user must show that the energy level and frequency chosen are not
detrimental to hardware. IPC-TM-650, Methods 2.6.9.1 and 2.6.9.2, can be used to investigate and qualify ultrasonic clean-
ing processes.

11.7.6 Cleaning Process Development Sample boards should be used to test the cleaning process prior to the start of
production runs. By determining the effectiveness of the cleaning system alternatives prior to production, the most cost-
effective method may be realized. During the initial development of manufacturing processes to support SMT manufactur-
ing, parts should be removed from the board after cleaning to verify the effectiveness of the cleaning process. Due to the
fine pitch of the part leads (if any) and the small part-to-board spacings, cleaning systems are often limited in their effec-
tiveness. Closed loop aqueous cleaning systems and solvent recovery systems may be employed to limit the amount of
material that must be disposed. Significant cost savings may be realized through the use of these systems.

11.7.7 Removal of Contaminants from Underneath Parts The removal of contamination from underneath parts is depen-
dent on:
• The rate at which the contaminants dissolve into solution.
• The amount of contaminants relative to the volume of fluid.
• The time the assembly is in the cleaning system.
• The temperatures and spray pressures of the cleaning fluid.
The volume of fluid that flows beneath the part will be limited by the size of the part, the height of the part from the board,
solution surface tension, and the lead configuration. It is harder to clean under the center of large footprint parts. As such,
as the footprint becomes larger, the stand-off height must be increased to allow solvent flow under the part. When the part
has a large number of fine pitch leads, it will also be difficult to force the cleaning solution under the part. Coaxial connec-
tors are especially difficult to clean under, since they can’t be raised high enough to clean under the part (if the part is too
high, the signal fades). Some coaxial connectors incorporate integral stand-offs to compensate for this difficulty. Manufac-
turers need to sensitize their design departments to the design requirements for cleanability.
11.8 Cleaning requirements

11.8.1 Pre-Soldering Cleanliness Requirements If there is a great deal of residue such as oils on the surface of a com-
ponent lead, the residue can interfere with the formation of a proper solder joint. In addition, if the individual components
and subassemblies have high levels of contamination, it is difficult for the end assembly to meet the pass-fail requirements
for cleanliness.

11.8.2 Post-Soldering Cleaning Historically, if a high-solids rosin flux is not cleaned from a PWA within one hour of
mass soldering, the rosin will polymerize, making it nearly impossible to remove or dissolve without destroying the assem-
bly. This can be true to some extent in modern fluxes, hence the one-hour reference. Highly aggressive fluxes, due to their
acidic nature, need to be removed rapidly to limit the attack of metallic surfaces. The method of cleaning solution delivery,
or other mechanical aids to cleaning, is left up to the manufacturer. Due to typical logistics of assembly, it may be difficult
to do all of the hand soldering operations and cleaning within an hour. The hand soldering cored wire fluxes are not as
immediately harmful (as the wave solder fluxes), so a longer period is allowed, but some measures must be taken to limit
the harmful effects of the flux. An example is isopropanol cleaning of RMA fluxes during hand soldering with a more global
cleaning by the end of the production shift. Less time between solder process and cleaning is better.
Heat-shrinkable solder devices generally need not be cleaned. This exemption arises because these devices are self-sealing.
If there is a poor seal, contaminants may leak out. Since the potential of cleaning the contaminants out of a poorly sealed
device is low, the device should be removed. The quality of the seal is a significant issue when using these devices.

11.8.3 Particulate Matter The only things that should be on a finished assembly are those elements on the drawings.
Unintentional remnants of the assembly process are signs of poor workmanship and may compromise circuit reliability. Sol-
der balls are more prevalent with low residue fluxes. Solder balls can be relatively loose, coming free with shock or vibra-
tion, which poses a risk of shorts. Solder balls are not allowed in this case. Solder balls may also be firmly embedded into

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the solder mask or laminate. As such, they do not roll around, but if they reduce too much or eliminate the insulation dis-
tance between component pins or traces on circuit boards, they are not allowed.

11.9 Cleanliness Verification For an assembly that requires cleaning, the end-item cleanliness (measurement of residues)
must meet the requirements of J-STD-001 and IPC-A-610. Some of the text in J-STD-001 outlines how to go about mea-
suring cleanliness.

11.9.1 Visual Inspection A finished assembly needs to be visually examined for unintentional materials. Items like solder
balls, solder splatters, dust, etc., are indicators of the process, so visual inspection is a requirement for high reliability hard-
ware and is highly encouraged for other classes of hardware. Ionic or organic residues may not always be visible to the
naked eye, requiring analytical test methods for quantification. Previous experience may be necessary to know when this is
called for.
Like many other aspects of this specification, visual inspection can be done on a sampling of the assemblies if part of an
SPC program. If such a process control program is not in place, every assembly produced will require visual examination.
Visual examinations are made with the naked eye. If the assemblies have been subjected to a cleaning process, the user
should not be able to see any evidence of flux residue. If the user has a no-clean process, the user will have visible residues.
For a no-clean process, such visible residues are acceptable.
It should be noted that assemblies processed with a low-solids flux (no-clean flux) are sometimes subjected to a cleaning
process to remove visible residues. This is most often done for a cosmetic reason, rather than for functionality.

11.9.1.1 Testing A SPC program will also define how many samples from each lot must be tested. The residue measure-
ment is done to determine any trends (increasing or decreasing) in residues. Before initiating a re-cleaning, it is advisable
to ensure that the cleanliness test was not skewed by human error. A tightly controlled SPC process, with little change in
residue levels, may have a sampling of less than once per day. A poorly controlled process in which ionic or organic resi-
dues may be highly variable may require more frequent sampling and testing.

11.10 Post-Soldering Cleanliness Designator The Cleanliness designator is a two digit number. The first digit can be 0,
1 or 2. Option 0 represents a no-clean assembly process. Option 1 means clean one side (usually used in conjunction with
a singled sided wave soldered board. Option 2 represents a full cleaning process. Options 0 and 2 will be used far more than
Option 1. The second and following digits of the cleanliness designator define the requirements for cleanliness testing.
0 = NO TEST FOR CLEANLINESS REQUIRED
1 = TEST FOR ROSIN RESIDUES REQUIRED
2 = TEST FOR IONIC RESIDUES REQUIRED
3 = TEST FOR SURFACE INSULATION RESISTANCE
4 = TEST FOR OTHER SURFACE ORGANIC CONTAMINANTS
5 = OTHER TESTS AS DEFINED BY USER/MANUFACTURER AGREEMENT
Examples of cleanliness designators are:
• C-20 Cleaning required; both sides of the board; no cleanliness testing required.
• C-21 Cleaning required; both sides of the board; residual rosin testing required.
• C-123 Cleaning required; solder side only; ROSE and SIR testing required.
• C-212345 Cleaning required; both sides of the board; residual rosin, ROSE, SIR, FT-IR, and a test to be named required.
A manufacturer of Class 3 product must classify what cleanliness designator best describes the assembly process in terms
of cleaning and what tests are used to quantify the residues. The default designator for a process is C-22 (clean both sides
of the assemblies, quantify residues by ROSE). A customer can specify the cleaning and measuring to be done on the deliv-
ered hardware, thus defining the cleanliness designator. Unless a manufacturer goes through the process of generating a data
validation package for designators other than C-22, they must clean the entire assembly and produce ionic cleanliness data.
This stance is dictated by the possible hazards surrounding no-clean technology. Cleaning, a generally safer operation, is
preferred until data shows an assembler can use the no-clean technology successfully. ROSE data is the simplest and least
costly to generate, but may not always be the best form of residue measurement for a flux technology. However, slightly
flawed data giving a general indication is preferred to no data at all.

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11.11 Tests for Cleanliness

11.11.1 Residual Rosin

1 = TEST FOR ROSIN RESIDUES REQUIRED

This test will most often be called out in instances of high solids (>15%) rosin fluxes to determine how much of the rosin
constituent remains after cleaning. Since the rosin content of WSFs and low solids fluxes are quite low, there is seldom a
significant amount of rosin residue left to measure. This test is not recommended for anything other than high solids rosin
fluxes.

11.11.2 Ionic Cleanliness (ROSE)

2 = TEST FOR IONIC RESIDUES REQUIRED

This test is the ROSE or SEC measurement of electrically conductive ionic residues. This test was originally developed as
a process control tool for high solids rosin fluxes and has limited utility with non-rosin fluxes. Due to the history of this test
method, an automated ROSE tester exists in many assembly operations. This data is to be provided unless agreements are
made to waive this testing. ROSE testing is considered the bare minimum test for most hardware, but the user should be
aware of the drawbacks of such testing.

Two possible ROSE methods exist:

• Testing done by an automated instrument (e.g., Omegameter, Zero Ion).
• The original beaker method.
NOTE: Automated instrument testing is greatly encouraged over the beaker method.

All of the existing pass/fail criteria for ROSE testing were developed using room temperature isopropanol-water solutions.
New models of automated ROSE testers (e.g., Omegameter 600 SMD) use a 46 °C solution of isopropanol and water with
spray agitation. The added heat and solution movement increases the amount of ionic contamination drawn into the solution.
It is expected that higher levels of ionic contamination will be found with these testers. No equivalency factor has been
determined for these instruments. The historic pass fail limit of 1.56 micrograms of NaCl equivalence per square centime-
ter (10.06 micrograms of NaCl equivalence per square inch) value should not be applied to these newer instruments.

11.11.2.1 Ionic Residues - Instrument Method When ROSE testing is required in the cleanliness designator, the tested
board or assembly must have less than 1.56 micrograms of sodium chloride equivalence per cm2 of extracted surface. This
pass/fail criteria translates to different numbers for the different automated testers (e.g., Omegameter 600R = 2.17 µg/cm2).
Any value over the appropriate level for the tester is considered a failure.

This form of ROSE testing has the longest history in the electronics industry. ROSE testing was developed in the early 1970s
as a process control tool to measure the amount of conductive material remaining on PWAs processed with rosin-based
fluxes. In the late 1970s, the laboratory test method was automated and several manufacturers produced ionic cleanliness
test equipment (e.g., Omegameter). Variations of the standard test method were generated to reflect the automated process
(IPC-TM-650, Methods 2.3.26.1 and 2.3.26.2).

The ROSE test method can generically be described as immersion of the test substrate in a solution of room temperature
isopropanol (75%) and deionized water (25%). Immersion time is a variable, but the minimum is 10 minutes. The solution
is circulated through a conductivity cell and anion/cation columns. As conductive residues are extracted from the test assem-
bly, the IPA/water solution becomes more conductive, which registers on the conductivity cell. Cleanliness testers vary in
how they go about the extraction process.

The circulation of the IPA solution in a closed loop without going through the anion/cation columns has a gradual accumu-
lation of residues and is called the ‘‘static method’’ (IPC-TM-650, Method 2.3.26.1). Circulation of the solution through the
anion/cation columns during the test, with the amount of conductive residues integrated over time, is called the ‘‘dynamic
method’’ (IPC-TM-650, Method 2.3.26.2).

For an excellent discussion of the issues surrounding ionic cleanliness testing and its shortfalls, the reader is referred to IPC-
TR-583 ‘‘An In-Depth Look at Ionic Cleanliness Testing.’’ This testing was done under the auspices of the IPC Ionic Con-
ductivity Task Group.

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Advantages of ROSE Testing:

• It can be the least expensive of the test methods discussed. (beaker method) (not recommended)
• It is the only method currently available as a production line process control tool.
• It has a large historical database.
• It can show gross levels of conductive materials.
• The method is normally non-destructive
Disadvantages of ROSE Testing:
• The test methods and equipment suffer from a lack of repeatability.
• There are difficulties relating data between different test machines.
• The present test parameters are based on rosin fluxes and are not directly applicable to non-rosin flux technologies.
• The output of the test is ultimately solution conductivity. The user has no idea what compounds are making the solution
conductive. It should also be pointed out that this type of testing gives an AVERAGE value of the conductivity across the
surface tested. It is more than likely that there could be concentrations in specific areas where the levels could be quite
high, although the average value is deemed acceptable.
The final sentence in the first paragraph indicates that there are other forms of ionic cleanliness testing that are acceptable,
presuming the alternative method is as good as or better than the ROSE method for detecting ionizable contamination. Such
methods might be IC or an in-house method. Manufacturer and customer should also agree upon the acceptability of an
alternate test.

11.11.2.2 Ionic Residues (Manual Method) IPC-TM-650, Methods 2.3.26.1 and 2.3.26.2, outline the procedure when
using one of the automated testers. Those test methods are based upon the original laboratory ‘‘beaker method’’ detailed in
IPC-TM-650, Method 2.3.25. This involves pouring a volume of isopropanol/water solution over a circuit board and col-
lecting the runoff solution in a clean beaker. The conductivity of the solution is then measured with a conductivity cell and
meter. This method is not recommended.

Advantages of the Beaker Method:

• This is the lowest existing investment cost for ROSE.
• It is easier to pass this test, compared to the instrument method, since the user is not immersing the board.
Disadvantages of the Beaker Method:
• Unless the user thoroughly understands all of the parameters that can impact a conductivity cell measurement, it is
extremely easy to get erroneous results.
• The measurement of surface area is very imprecise.
• It is difficult to measure large assemblies.
NOTE: For the manual test, J-STD-001 requires a final resistivity of greater than 2.0 megohm-cm for the extract solution.
This equates to the 1.56 microgram of NaCl equivalents per square centimeter value in the Standard.

11.11.2.3 Units for ROSE Data ROSE data is measured in micrograms of sodium chloride equivalents per unit area. To
avoid confusion with other measures of ionic cleanliness, such as ion chromatography (which uses micrograms of the ionic
species per unit area), it is necessary to understand the meaning of ‘‘NaCl Equivalents.’’ In the original development of the
ROSE test methods, the resistivity of the extract solution was measured as contaminants dissolved in solution. The method
developers decided to baseline the response against an easily ionizable salt, and they chose sodium chloride (NaCl).

As an example, let’s say we had a starting extract resistivity of 40 megohm-cm and an ending resistivity of 2 megohm-cm.
Say we used a test substrate with 100 cm2 of surface area. If it took 500 micrograms of sodium chloride to produce the
same 38 megohm-cm drop in solution resistivity, then the output of the ROSE test would have been 500 micrograms of NaCl
per 100 cm2 of area, or 5 micrograms of sodium chloride equivalents per cm2. The ‘‘equivalence’’ refers to an equivalent
drop in resistivity, not to an equivalent amount of NaCl on your assembly.

Therefore, ROSE testing does NOT determine how much sodium, or chloride, or sodium chloride is on the test substrate.
The ROSE test is not ion specific and cannot make such a determination.

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11.11.2.4 Misuse of the ROSE Test As stated earlier, the ROSE test is one of the oldest and most widely used residue
characterization tests in the industry. Unfortunately, it is also the most misapplied and misused residue test in the industry.
It is important that anyone who generates or evaluates ROSE data understands the limitations of the test and when it is not
appropriate to use ROSE data.
The ROSE test was originally developed as a process control tool to determine day to day process variations for assemblies
soldered with high solids (30% solids) RMA flux and cleaned with solvents (e.g., CFC-113). The 10 minute test time was
based on the solubility of high solids rosin flux residues in room temperature isopropanol-water, as was the generation of
the original target control limit of 10.06 micrograms of sodium chloride equivalence per square inch (1.56 µg/cm2).
Unfortunately, this process control limit became a product ‘‘acceptance’’ value and was written into military specifications
and contracts as such. These values, once written into military specifications and standards, became immutably etched in
stone. This use of the ROSE test became an industry practice and perpetuated itself into commercial standards, such as
J-STD-001.
To exacerbate the problem, when the ionic cleanliness testers that automated the test were developed, each had a different
approach or algorithm, leading to the static method and dynamic method. The original value of 10.06 micrograms of NaCl
equivalence per square inch, generated using a beaker and a conductivity dip probe, became a value of 14 when tested with
an Omegameter 200, a value of 20 when measured by an Ionograph, a value of 37 when measured by a Zero Ion, etc.
To further exacerbate the problem, ROSE testing was placed into previous military bare board specifications. A typical value
of 5.5 micrograms NaCl equivalence per square inch was listed as the pass-fail value. None of the ROSE developmental
research addressed bare board residues.
An EMPF report examined all of the ionic cleanliness testers on the market in the late 1980 time frame in a statistically
designed experiment to examine the repeatability and reproducibility of the machines and the method. When the work was
finished in 1991, the IPC Ionic Conductivity Task Group had the following conclusions:
• None of the instruments were accurate or precise, including units of the same model.
• The use of equivalency values to compare Tester A to Tester B was not a valid practice.
• These instruments should be used only for process control within a single facility and should not be used for product
acceptance testing. So, if you had a value of 8 last week, 8 yesterday, and 8 this morning, but this afternoon you had a 15,
something changed in your process and you needed to determine what caused the change. However, 8 today in one facil-
ity with one machine, 15 the same day in another facility with another ROSE tester may not necessarily mean the second
one is worse off.
Another factor in the misuse of ROSE data is that the industry has changed materials from the 1970s. High solids rosin
fluxes with solvent cleaning have been replaced by water soluble fluxes and low solids fluxes in a variety of cleaning and
no-clean assembly processes. These flux technologies have different solubility rates than the high solids rosins and result in
different final ROSE values. In addition, many ROSE testers use heated isopropanol-water solution with spray agitation,
rather than the original room-temperature static isopropanol water solution. It is known that some PWA residues, when
extracted into an isopropanol-water solution, make the solution more conductive, yet are benign on the PWA surface. Yet,
the pass-fail values remain the same as when originally developed in the 1970s.
The IPC Ionic Conductivity Task Group has worked to improve the ROSE test method. They have consolidated the three
separate ROSE test methods into one method and addressed most of the shortcomings of the test method. But the misuses
are well entrenched.
With the above information in mind, here are the most common misuses of the ROSE data:
• Blindly applying the historical 1.56 µg/cm2 pass-fail limit to assemblies processed with water soluble or low solids fluxes,
without some independent correlation study that shows this value to be an acceptable discriminator between acceptable and
unacceptable product.
• Comparing data from Site A with Site B, irrespective of whether using the same instrument model at both sites or totally
different machines.
• Blindly applying historical pass-fail values for bare boards, without some independent correlation study that shows this
value to be an acceptable discriminator between acceptable and unacceptable bare boards.
• Blindly applying the test and specification values without a clear understanding of what the ROSE data means to your
hardware or product.

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11.11.3 SIR Testing

3 = TEST FOR SURFACE INSULATION RESISTANCE
The SIR test uses exposure of a PWB or PWA to elevated levels of temperature and humidity in an attempt to accelerate
electrochemical failure mechanisms, such as electrical leakage, corrosion, or metal migration. The manufacturer chooses, as
the regimen, the SIR test method that best discriminates between good and bad product. Anyone performing SIR testing is
referred to IPC-9201 as a guide to proper test techniques.
SIR testing is an accelerated aging test. A test board or assembly is subjected to elevated levels of temperature and humid-
ity under an applied voltage potential. The intent is to accelerate electrochemical failure mechanisms, which would occur in
field service, in a fairly short amount of time. Failure mechanisms include electrolytic corrosion, electrical leakage, and
metal migration (dendritic growth). SIR testing is often required on quality conformance coupons, standard test boards, or
actual product. While the other cleanliness methods characterize what residues are present, SIR characterizes the effects of
those residues on some of the electrical properties of the test substrate.
SIR testing can encompass a variety of different test protocols, each involving different temperatures, levels of humidity,
and applied voltages. The relative merits of one temperature/humidity profile over another have been extensively debated,
but with resolution as to which methods are superior for different applications just coming to light recently.
The SIR testing requirement in J-STD-001 is totally open. If the manufacturer has an in-house test regimen that has histori-
cally worked as a good discriminator of good vs. bad processes, then such a test regimen is acceptable. The manufacturer
must be able to show that the acceptance criteria for the test profile chosen is a good discriminator and have such back-
ground information available for review. Making such a determination, however, can be a difficult exercise. The customer
and manufacturer should agree on the test profile and pass/fail criteria to be used.
If an SIR test program does not exist, and one must be developed, the test protocol found in J-STD-001 can be used. The
J-STD-001 standard lists no minimum SIR levels or required test substrates. This is a reflection of the ‘‘one-size-does-not-
fit-all’’ concept. It is recommended that whichever be used, the test substrate should approximate actual product and be sub-
jected to production processes, including fabrication, wherever possible.

11.11.4 Surface Organic Contaminants

4 = TEST FOR OTHER SURFACE ORGANIC CONTAMINANTS
There are numerous laboratory-based analytical tests used to determine the amount and type of residue. For organic resi-
dues, the most prevalent method is FT-IR spectroscopy. This method requires relatively sophisticated equipment and trained
operators to interpret the resultant spectra. See 11.11.8 and 11.11.9.5 in this document.

11.11.5 Other Residue Tests

5 = OTHER TESTS AS DEFINED BY USER/MANUFACTURER AGREEMENT
A customer and manufacturer may agree on another test that they feel is a good indicator of product quality. Such tests may
include materials compatibility tests, mass spectroscopy, IC, HPLC, etc. In such a case, the customer may specify the con-
trol limits on such a test.

11.11.6 UV-Vis Spectroscopy This test method is an extraction-based test. The extract solution is most often pure isopro-
panol. The extract solution is analyzed by UV-Vis Spectroscopy. For this testing, a sample of the pure flux is required in
order to make various reference standards. Ultraviolet and visible spectrum light is passed through a test sample solution.
Rosin, as well as some other residues, absorbs UV and visible light wavelengths. The amount of residual rosin can be deter-
mined by comparing the absorbency of the unknown against the reference standards.
Advantages of this flux residue test:
• Relatively inexpensive
• Can be modified to be a production control test
• Can be run by technicians
• Non-destructive
Disadvantages:
• Must have a relative standard for the rosins examined

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• The 10-minute room temperature extraction only partially removes rosin residues.
• The extraction method involves hand agitation, which can produce variable results.
• Generally restricted to rosin residues
• Requires a spectrometer and training
• May not detect polar soils
The residual rosin testing reflects the high-solids rosin paradigm. High reliability and mission-critical hardware need to have
lower levels of residual rosin, which presumably means lower levels of corrosive residues, than can be tolerated for con-
sumer electronics.
Testing for residual rosin is not recommended for ‘‘non-rosin’’ flux technology. Many WSFs and low residue fluxes have
rosin as one of their constituent materials, but the concentrations are far lower than the traditional high-solids RMA or RA
fluxes. By the end of the reflow process, very little rosin remains to be extracted. As such, a test for residual rosin will not
give a useful result.

11.11.7 A General Caution on Extraction-Based Tests Most, if not all, of the cleanliness test methods outlined here are
extraction-based tests. In other words, a test sample is washed or immersed in a solvent solution, usually isopropanol and
water, and the solution is then examined for residues. If a residue will not dissolve in the extract solution within the time
allowed for the test or at the temperature of the test, the analytical methods, which examine the extract solution, are unlikely
to detect the total amount of the residue. The more benign the extraction method, the less likely you are to get ‘‘the big
picture’’ of the residues present.
This is more than a concern for analytical chemists. Residues from fabrication or assembly processes may be baked on or
into a laminate or solder mask. Unless such stubborn residues are attacked by a more effective extraction method (longer,
hotter, more aggressive), the tester may erroneously arrive at the conclusion that the test sample is clean when it is not. When
viewing cleanliness tests, one should always ask the question, ‘‘Is it really clean, or am I just not seeing the residue?’’

11.11.8 Other Contamination High purity acetonitrile is dripped onto a test surface, theoretically solvating organic resi-
dues. The test substrate is then held in a canted position and the runoff collected on a glass microscope slide. The solution
is allowed to evaporate. This test should be carried out in a fume hood. Residual organic contamination should be visible
to the naked eye when viewed from an oblique angle.
Advantages of Surface Organic Contaminant Test:
• Relatively easy to do.
• Can be done by technicians.
• Can be done on a production line (where there is a fume hood).

Disadvantages of Surface Organic Contaminant Test:

• Acetonitrile is a suspected carcinogen.
• The detection of residues often depends on site selection for the acetonitrile application.
• Visual results are subjective and open to interpretation, making pass/fail criteria difficult.
• If residues are detected, the user still won’t know what those residues are.

11.11.9 Other Analytical Tests There are other analytical test methods that can be used to quantify the residues that
remain on a PWB/PWA surface. The methods listed above have a longer history, and so are specifically named, but new
methods are available. The cleanliness designator does allow a manufacturer and user to agree upon one of these alterna-
tive tests as an acceptable measure of PWA residues. In such a case, the manufacturer and customer must agree upon which
numerical or physical results constitute acceptable hardware. The following paragraphs discuss some of these alternative
methods.

11.11.9.1 IC Testing Refer to IPC-TM-650, Method 2.3.28. IC is a more precise analytical method than ROSE testing.
The standard IC extraction uses the same isopropanol (75%) and DI water (25%) solution as ROSE testing, but the extrac-
tion time is 60 minutes and extraction temperature is 80 °C. These parameters will extract more residues than the 10 min-
ute room temperature ROSE extraction. The extract solution can be used for multiple tests - IC, HPLC, FT-IR, etc.

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A small amount of the extract solution (microliters) is injected into a carrier solution, called an eluent. The sample/eluent
mixture is forced through a chromatography column at high pressure, which is packed with a specially coated resin. Differ-
ent materials will pass through the column at different speeds. With sufficient column length, the unknown solution eventu-
ally fractionates itself into the pure constituent elements. At the end of the packed column is a sensitive conductivity cell,
which measures the conductivity of the solution over time. As the various fractions pass out of the column, the conductiv-
ity is logged and a set of characteristic peaks is formed. The resulting graph of conductivity vs. time is called a chromato-
gram. By comparing the response to control solutions, the fractions can be identified and quantified. This is a general over-
view of a complex analytical technique.

Advantages of IC Testing:
• The analysis of the solution is ionic-species specific.
• The user can generally determine what ionic materials are present and in what amounts.
• It allows the user to separate the harmful ionic materials from the benign ionic materials.
• The extraction method tends to be a more thorough removal of residues.

Disadvantages of IC Testing:
• The cost per sample is higher.
• The method is difficult to use as a process monitoring tool.
• IC requires highly trained personnel to interpret results.
• It can only detect electrically conductive residues.
• Proper analysis requires known control solutions.
Results from a number of industry studies involving IC analysis have shown the following guidelines to be reasonable
breakpoints for chloride content.

Chloride residues increase risks of electrolytic failure when exceeding the following levels:
• <0.39 µg/cm2 for low solids fluxes.
• <0.70 µg/cm2 for high-solids rosin fluxes. <0.75-0.78 µg/cm2 for WSF.
• <0.31 µg/cm2 for a bare boards with tin-lead metallization.

Bromide residues increase the risk of electrolytic failures when exceeding 2.3 µg/cm2. Sulfate residues increase the risk of
electrolytic failures when exceeding 0.47 µg/cm2. This seems to be a good guideline regardless of the flux technology used.

Many ion chromatography analyses will include quantification of the weak organic acids (e.g., adipic, formic, glutaric,
maleic acid) that the bulk of low residue fluxes.

Published IPC studies have illustrated research on typical weak organic acid (WOA) levels:
• For SMT processes, typical WOA levels range from 10-40 µg/cm2.
• For most spray flux applications, such as ultrasonic misting, typical WOA levels range from 50-150 µg/cm2.
• Studies have indicated that electrochemical problems do not arise from WOA residues until the levels are above
300 µg/cm2, where the assemblies have been ‘‘drowned’’ in flux. In this case, the danger is unreacted flux residues, which
can be electrically conductive.

11.11.9.2 HPLC Testing Refer to IPC-TM-650, 2.3.27.1. HPLC testing is similar to IC testing, differing primarily in the
detector at the end of the packed column. Where IC uses a conductivity cell, HPLC uses a photodiode array to detect fluo-
rescence. Organic materials will often fluoresce (‘‘glow’’), and the amount of fluorescence is proportional to the amount of
the organic material present. HPLC is primarily used to detect residues that are not electrically conductive. Due to the usu-
ally more rigorous extraction and analytical methods, this is a more precise method of residual rosin determination than
found in the UV-Vis method (IPC-TM-650, Method 2.3.27).

Advantages of HPLC Testing:

• It can detect specific organic species and their amounts.
• It can use the same extract solution used for IC.

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Disadvantages of HPLC Testing:

• The same as for IC.
Samples of the organic contaminants are required to form the reference standards.

11.11.9.3 Test for Polyglycols Some fluxes contain a polyglycol constituent as a surfactant agent. There is sometimes a
cause for concern since such a material can adversely impact SIR measurements. As such, if a manufacturer is using a
polyglycol containing flux, the manufacturer may wish to have the PWAs tested for residual polyglycols.
Polyglycol detection is a variation of IC and HPLC. The polyglycol detector at the end of the packed column uses a com-
bination of lasers and pyrolysis to measure the amount of the glycol species present in the carrier solution.
Advantages of Polyglycol Testing:
• No other chromatographic method exists to measure polyglycol species.
Disadvantages of Polyglycol Testing:
• It is new and has no history.
This method has not yet been submitted for inclusion in IPC-TM-650.

11.11.9.4 GC-MS (Gas Chromatography - Mass Spectrometry) GC-MS is expensive ($100,000+) and requires trained
and dedicated personnel. This method will measure practically anything that can be introduced into the chamber in the gas
phase, but requires a great deal of expertise to separate the meaningful data from the ‘‘noise.’’

11.11.9.5 IR or FT-IR Spectroscopy (Fourier Transform Infrared Spectrometry) Refer to IPC-TM-650, Method 2.3.39,
which is analysis by IR or FT-IR Spectroscopy. The extraction method is the same as IPC-TM-650, Method 2.3.38, which
is the acetonitrile drip method. The runoff solution is collected on a glass slide and analyzed. A beam of infrared light is
passed through the residue. As the frequency of the light is varied, the absorption of the light energy varies. Different
chemical bonds absorb specific wavelengths. By looking at a plot of absorbency vs. wavelength, each organic material has
a specific pattern, similar to a fingerprint. A skilled analyst can match the spectra against known standards and determine the
chemical nature of the residue. If done correctly, the quantity of the residue can also be roughly estimated.
FT-IR analysis can also be done using surface microscopy, which bounces the IR beam off a surface, rather than passing
through the residue. The same absorption of light takes place. This technique is very specialized, which leads to being costly,
and should be done with a non-organic substrate, such as metal or ceramic. If this technique is used on an organic laminate,
there is a masking effect between the organics in the residues and the organics from the resin in the laminate.

11.11.10 Cleanliness Testing for No Clean Assemblies There has been a great deal of discussion on how the cleanliness
requirements of J-STD-001 apply to electronic assemblies produced with benign low solids fluxes and no-clean process
technology, primarily in the area of ionic cleanliness testing by Resistivity of Solvent Extract
The ionic cleanliness test method (ROSE) that is often done following post solder cleaning on assemblies processed with
cleanable fluxes, should not be applied to true no-clean assemblies processed with low solids fluxes for the following rea-
sons:
• The ROSE test, in all its forms, was developed in the 1970s for high solids rosin fluxes and solvent cleaning. The flux
residues today are vastly different from the fluxes used decades ago.
• The nature of the flux residues have changed. The flux residues used in no-clean assembly are largely benign and so the
overall amount of flux residues is irrelevant, within reason. The values required when testing for ionic residues by ROSE
were based on small amounts of flux soils remaining after cleaning operations. No clean assemblies have much higher lev-
els of soils. Modern day low solids fluxes may have 1-5 weak organic acids as part of the flux package, with dozens of
organic acids to pick from. Each of these organic acids have differing solubility rates and so flux would yield a different
value in a ROSE type of test.
• Consequently, it is not valid to apply the ionic cleanliness requirements of J-STD-001 as determined by ROSE testing, to
assemblies manufactured with low solids flux and no cleaning.
With this understanding in mind, what ionic cleanliness value should be applied to a no-clean assembly? This is a value that
has to be agreed upon between the user and the supplier, for the fluxes and technologies being used. Ion chromatography
would be a preferred method for specifying ionic cleanliness. If ROSE testing is chosen, a recommended approach is to do

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a correlation study between the values exhibited in ROSE testing and the results of some product acceptance test which
defines acceptable product quality. The test chosen should incorporated elevated temperature and humidity conditions. Ionic
cleanliness failure mechanisms often fail to manifest in dry conditions. From such a correlation study, upper and lower con-
trol limits can be established for ROSE testing for the flux technologies used.

11.12 Other Guidance on Cleaning The IPC maintains a wealth of information on cleaning and cleanliness related opera-
tions. For a more in depth coverage of cleaning related topics and processes the reader is directed to IPC-CH-65, IPC-PE-
740, and numerous technical papers in the IPC library.
The National Center for Manufacturing Sciences (NCMS) has released voluminous data on compatibility with various
cleaning agents however, this is becoming somewhat dated.
The following text and observations are intended as a short overview to some of the more important considerations in clean-
ing. The reader is referred to the preceding documents for more detailed information.

12 CONFORMAL COATING
Conformal coating is defined as a thin, transparent, polymeric coating that is applied to the surfaces of assemblies to provide
protection from the end-use environment. Typical coating thickness ranges from 12.5 to 200 µm [0.00049 to 0.0079 in].
Processing characteristics and curing mechanisms are dependent on the coating chemistries used. The desired performance
characteristics of a conformal coating depend on the application and must be considered when selecting coating materials
and coating processes. Users are urged to consult the suppliers for detailed technical data.
The coverage of conformal coatings in this document is a condensed overview. For a more extensive coverage of confor-
mal coating materials, characteristics and processes, the reader is referred to IPC-HDBK-830.

12.1 Function of Conformal Coating Conformal coatings have primary and secondary functions, depending on the end-
use application. Primary functions include:
• Inhibit current leakage and short circuit due to humidity and contamination from the service environment
• Inhibit arcing, corona and St. Elmo’s Fire
• Serve as a barrier to liquid water falling on energized circuits
• Serve as a barrier to harmful fluids and gasses and to inhibit corrosion from such materials
• Serve as a barrier against Foreign Objects and Debris (FOD) contacting energized circuits
Secondary functions include:
• Improve fatigue life of solder joints to leadless packages
• Provide mechanical support for small parts that cannot be secured by mechanical means, to prevent damages due to
mechanical shock and vibration.
• Provide mitigation against tin whiskers for lead-free applications
• Provide fungus resistance for components that are not fungus resistant
• Provide supplemental flammability mitigation for components that are not expressly flame-proof
What conformal coating is NOT:
• A band-aid to cure a poor design
• A magical material with no engineering tradeoffs
• A material that keeps out moisture indefinitely

12.2 Conformal Coating Specifications There are a number of specifications that are commonly used for conformal
coatings.
• IPC-CC-830, and IEC 61086-1 are materials qualification specifications. They set the minimum criteria for conformal
coatings to be used in military and/or high performance applications. Having a coating that is qualified to these specifica-
tions does not guarantee that the coating is ‘‘good’’ and will work in the application. The onus is on the original equip-
ment manufacturer (OEM) to determine if the coatings will work for the applications chosen, in the end-use environments,
for the design life of the product.

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• J-STD-001 is a specification that sets a minimum set of criteria for the performance of a conformal coating on electronic
assemblies. Additional performance requirements should be called out in the engineering drawing.
• IPC-9202 is a materials and process compatibility test protocol that can assist the OEM in determining conformal coating
compatibility and performance characteristics.
• IPC-A-610 is a workmanship standard that sets the minimum visual characteristics of acceptable and unacceptable confor-
mal coating workmanship. Additional workmanship requirements should be called out in the engineering drawing.
• IPC-HDBK-830, ‘‘The Conformal Coating Handbook,’’ is the IPC’s compendium reference document on conformal coat-
ing materials, characteristics, and processes.
• The IPC has jointly hosted (with SMTA) conferences (2008, 2010) on cleaning and conformal coating. Conference pro-
ceedings contain good articles on conformal coating fine points.

12.3 Kinds of Conformal Coating At present, there are five predominant classes of conformal coatings. Classes are
defined in IPC-CC-830 as:
1. Acrylics (Type AR)
2. Urethanes (Type UR)
3. Silicones (Type SR)
4. Epoxies (Type ER)
5. Paraxylylene (Type XR)
These classes of coatings are defined by the predominant resin constituent of the coating. As an example, a coating that is
51% acrylic resin and 49% urethane resin is defined as a Type AR acrylic. The two classifying documents do not address
hybrid coatings, specialty coatings, or some of the newer resin formulations on the market. IPC-CC-830 is being amended
to allow new coating families, but none have been added at this point.
Conformal coatings can be one-part, two-part, or 100% solids, as shown here.
• Acrylics
‘‘one-part’’ coatings - resin and carrier solvent
• Urethanes
One Part - urethane resin in a carrier solvent
Two Part - Part A (resin) and Part B (hardener/catalyst) - May or may not be thinned with a solvent for application
• Silicones
One part - silicone resin in a carrier solvent
One part - 100% solids (no solvent)
Two part - silicone resin and hardener/catalyst
• Epoxies
All two part coatings - Part A (resin) and Part B (hardener/catalyst)
• Polyparaxylylene
One part - powder (dimer) that is heated to high temperature for deposition and polymerization

12.4 Finding a Qualified Conformal Coating Where does one start when looking for a conformal coating to meet a par-
ticular design need. Google is not the answer to everything. There are three good starting points in such a search:
1. Look up the qualified products list (QPL). This will give you a listing of conformal coating vendors that have products
for military and high performance applications.
a. (https://qpd.daps.dla.mil/qpd/quick_search/default.aspx?qpl=QPL-46058)
2. Contact the IPC staff. They can give a contact list of those IPC members who are suppliers of conformal coatings and
members of the coating standards committees
3. Join the IPC Conformal Coating Task Group. This gives you ready access to both the coating suppliers as well as
military/high-performance OEMs that use conformal coatings.

12.5 Advantage and Disadvantages All conformal coatings have advantages and disadvantages. Coatings which provide
superior chemical resistance may be very hard to rework. Coatings which provide superior abrasion resistance may cause
undesirable mechanical stresses on fragile components. There is an ‘‘Achilles Heel’’ for every conformal coating. Table 12-1

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shows a general comparison of materials. Individual characteristics will vary depending on the solids content, whether it is
a one-part or two-part coating, the solvents selected, the substrate, the application and cure methods used, etc. Contact the
coating vendor for more information regarding the trade-offs in coating characteristics.
Table 12-1 Comparison of Conformal Coating Materials
Parameter Solvent Acrylic Water Acrylic Urethanes Silicones Epoxies Parylene
VOC Emission S S
Reworkability S
Cost S
Working Life S
Thermal Resistance S
Chemical Resistance S S
Abrasion Resistance S
Salt Environment S
Liquid Water S S
Manufacture Friendly S
Flammability S S
Fluorescence S
Health/Safety
S = area where this coating may be superior

When selecting a conformal coating, the user should consider the following before contacting a vendor:
• What your end use environment will be
• What will the temperature extremes be and durations
• Know what other contaminants may go on the coating
• Know what the design life and anticipated life of the product are
• What are the consequences of failure
• How rugged will the enclosure be, or how open is the enclosure to the end use environment
• Know the frequencies in use on the product and how sensitive the circuit is to variations in dielectric constant and dissi-
pation factor
• Consider the health and well-being of the coating operators. Take a good strong smell of the material you are asking
operators to apply

12.6 Storage and Shelf Life In a manufacturing environment, when considering storage of conformal coatings and the
rated shelf life of the conformal coating, the following should be considered:
• Coating vendors give a shelf life for their product
– For the unopened can
– When stored under the manufacturer recommended environment
– Gray areas exist when you open the can or store it poorly
• Argon or Nitrogen Cover Gases
– Many coatings are sensitive to air and/or moisture
– Putting in a heavy cover gas (argon) or flooding can with nitrogen can extend the working life of a coating after the can
is opened
• Shelf Life Extension
– The rated shelf life of a container of unopened coating is the length of time that a vendor will guarantee that a coating
meets the characteristics of the coating as it was qualified
b In practice, the coating may be several months or years beyond that date, but only testing will determine if an outdated
coating is still useable. Many companies have policies on shelf life recertification

12.7 Surface Preparation Regardless of the coating selected, proper preparation of the substrate surface is critical for
conformal coating performance. Consider the following:

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• Having a clean and dry surface is key to all coatings

• Most OEMs will clean and bake just prior to conformal coating
– Many conformal coatings do not like moisture at all
– 1 hour at 100 °C is fairly typical
– Dry storage thereafter usually overkill (assemblies equilibrate quickly)
• Some coatings do not chemically couple with the surface
– A coupling agent (primer) is often used, such as with Parylene
– Other chemical primers may be used to improve coating adhesion if the time between coating cure and ESS testing is
short
– Adhesion generally develops with time (3 days - several months)
• Plasma Preparation
– Plasma can be used to remove mild surface contamination
b Fast process, no environmental impact, batch processing
b Generally improves the wettability of a surface (dewets, fisheyes)
Can address low surface energy conditions
b Want surfaces greater than 40 dynes/cm (dyne pens work well to test)

12.8 Application Methods There are many different ways in which conformal coating can be applied. Consider the fol-
lowing:
• Dip Coating
– Cannot just dunk and hang on the line to dry like laundry
– Need a controlled viscosity, controlled dip speeds, and controlled drying conditions
– Need to design a board for dip coating
• Spray Coating
– Air atomization and aerosol nature of materials
– Generally have to thin down materials to spray or have formulated for spray
– There are masking considerations, even with programmable machines
– Flammable solvents have ventilation requirements from OSHA/regulatory bodies
• Brush Coating
– More variable depending on operator and hardware
– Can be implemented with very little cost or investment
– Labor intensive
• Machine/Automated Coating
– Programmable machines using spray and needle dispense
– More capital intensive, but very repeatable and reproducible
• Vapor Deposition
– For chemical vapor deposition materials like paraxylylene (Parylene™)
– Capital intensive, but deposits coatings uniformly where many conventional coatings cannot be applied
• Curtain coating, spin coating
– Not usually used for conformal coatings on assemblies
• Application, drying and curing affects coating quality

12.9 Curing Methods The coating vendor can specify those parameters key to providing a proper cure for the coating
selected. Processing a coating outside of the vendor parameters generally results in unpredictable performance of the coat-
ing. The predominant curing methods used are:
• Air Cure
– Solvent evaporation with time

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– Reactive (2 part) coatings where the cure proceeds when the coating is mixed
• Thermal Curing
– Infrared lamps to accelerate solvent evaporation and enhance cross-linking
– Ovens
b Standard forced air ovens - accelerate solvent loss
b Class A ovens (explosion-proof) - recommended when the solvent is flammable
– Can be used to accelerate cure of both 1 and 2 part coatings
• Catalyzed Cure - some two-part coatings
• Ultraviolet (UV) Energy
– UV energy initiates the cure reaction
– Recommend UV coatings that have a secondary cure mechanism to continue curing in areas shadowed from the UV light.

12.10 Process Control As with all manufacturing processes, process control is essential to providing a consistent confor-
mal coating layer. As conformal coatings are often the main defense against a hostile environment, process control is criti-
cal to hardware reliability. Consider the following elements:
• Coating Thickness Measurement
– Coupon Tests - almost everyone uses witness coupons, not the actual assembly
b Micrometers, optical methods, eddy current testing
– On assemblies
b There is no practical method for measuring coating thickness on an assembly other than on a ‘‘flat unencumbered’’ area
of the assembly. As most modern assemblies have become very populated, such areas are rare.
• Testing Adhesion of coating to the substrate
– Also is done predominantly on witness coupons as this test can damage the assembly
– Is a highly variable test (often depends on who does it and how it is done)
– ASTM test is the root - ‘‘X’’ test and checkerboard test - tape based pull tests
• Coating viscosity control
– Viscosity often directly relates to thickness
b Thicker material = thicker coatings = process problems
– If thicker coatings are desired, they should be built using successive thin application with drying between.
b Failure to do so often leads to problems with coating adhesion, bubbles from entrapped solvents, and coating cracking
and peeling in thermal cycling.
• Working Life of the coating
– Coatings with volatile solvents will thicken with time as solvents evaporate
– Recommend not letting coating operators adjust viscosity as this leads to variable thickness
• Tools
– Brushes (clean before first use to remove brush manufacturing residues)
– Brushes and tools need to be cleaned regularly with a suitable solvent
– Sloppy care of tools and work areas leads to poor coating quality
– ESD mats need to be cleaned and periodically replaced
– OSHA has many requirements on operator protection/ventilation for many solvents
• Containers
– Flammable materials = suitable containers
• Wastes
– If wipes/swabs, etc., come in contact with a flammable liquid, they must be treated as a solid flammable waste, but this
varies depending on geographic location.
• Handling Residues

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– After final cleaning, substrates should be handled with gloved hands and clean storage media (bags, totes).
– After coating cure, gloves are no longer needed for handling.
• Inspection
– Most coatings have ultraviolet dye incorporated that glows under UV light (about 385 nm). This glow can make inspec-
tion easier. UV lamps can either be fluorescent or based on UV LEDs (recommended).

12.11 Coating Defects See IPC-A-610 for a coverage of coating defects. Most defects can be classified into these gen-
eral categories:
• Uniformity.
– This relates to the evenness of the coating on the substrate. Spray coating and chemical vapor deposition processes pro-
duce more uniform coatings than manual brush coating.
• Dewetting
– This refers to the liquid coating ‘‘pulling away’’ or ‘‘beading up’’ on an area of an assembly or component. Frequent
causes are component molding release agents, residual fluxes and cleaning agents, and process residues such as silicone
oils.
• Fisheyes
– This refers to a coating condition where there appears to be a ring of coating that is visibly thinner (usually under black
light illumination) surrounding a dot of normal appearing conformal coating. This is most often due to a spot contami-
nation from the same sources that cause dewetting
• Inadequate coverage
– This may relate to coating that is too thin on sharp corners, portions of component bodies, or pin-holes in the coating.
• Bubbles and Voids
– This relates to bubbles in coatings or voids (bubbles that have ‘‘popped’’) in the coatings. The most common causes of
bubbles and voids comes from coating be applied too thickly, entrapping solvents under components. When heated, such
as during oven curing, liquid solvents then expand, forming bubbles. Applying thinner layers of coating with adequate
drying between coats, is the most common remedy for this problem.
• Cracks and Ripples
– This relates to ridges and cracks in the cured coatings. Ridges most often occur as an artifact of curing operations and
relate to the shrinkage characteristics of the coating and the geometry of the components. Cracks most often arise either
from high flexing of assemblies with rigid coatings or in response to severe thermal cycling or thermal shock events.
• Orange Peel
– This relates to a non-uniform appearance in the coating where the coating appears ‘‘wrinkled,’’ similar to the surface of
an orange rind. The underlying causes of orange peel are most often surface contamination, surface energy, or coating
shrinkage characteristics.
• Delamination
– This relates to the coating not adhering to the substrate surface, usually after some environmental stress, such as vibra-
tion, thermal cycling or thermal shock. Underlying causes are most often residual mold release agents on components
and process residues on the assembly. If this happens on a known clean assembly, additional coupling agents (e.g., prim-
ers) may be needed to prevent delamination.

12.12 Coating Rework In many military and high performance applications, due to the service life, complexity and cost
of the coated assemblies, it is necessary to remove conformal coating for repair of the unit. Consider the following:
• Rework methods often depend upon whether you are talking factory or in the field
– Chemical
b Often require harsh chemicals that may not be allowed in some areas
b Exposure must be tightly controlled
b Post stripping cleaning is essential or chemical attack continues
– Abrasion

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b Media blasting in ESD safe equipment

Various blast media exist depending on the coating and substrate
b Becoming the preferred method for military rework depots
– Thermal
b Often called ‘‘burn-through’’ methods
b Most often used on urethanes, some health concerns from smoke
– Mechanical (least desirable)
b Peeling, razor blades, etc.
b High probability of damage
• Post removal cleaning is ALWAYS needed

13 POTTING AND ENCAPSULATION

13.1 Introduction Encapsulation is used in conjunction with various types of assemblies (e.g., printed circuit assemblies
(PCA), and components (e.g., connectors, transformers, etc.). The designer and the users of encapsulation for electronics
applications must be aware of the properties of various types of encapsulation and their interactions with assemblies and
components in order to protect them in the end-use environment for the design-life of the end item. This document has been
written to assist the designers and users of encapsulation in understanding the characteristics of various encapsulation types,
as well as the factors that can modify those properties when the encapsulation is applied. Understanding and accounting for
these materials can ensure the reliability and function of electronics.

13.2 Purpose The purpose of this handbook is to assist the individuals who must either make choices regarding encap-
sulation or who must work in encapsulation operations. This handbook represents the compiled knowledge and experience
of various industry sources. It is not enough to understand the properties of the various encapsulation. You must understand
what you want to achieve by applying the encapsulation and how to verify that you have achieved the desired results.

13.3 Scope Encapsulation, for the purpose of this document, is defined as a material (e.g., epoxy) that is applied in a liq-
uid state and subsequently processed (e.g., cured) to form a rigid or rubber-like state.
Processing characteristics and curing mechanisms are dependent on the encapsulation chemistries used. The desired perfor-
mance characteristics of an encapsulation depend on the application and must be considered when selecting encapsulation
materials and encapsulation processes. Users are urged to consult the suppliers for detailed technical data.
This guide enables a user to select an encapsulate based on industry experience and pertinent considerations. It is the
responsibility of the user to determine the suitability, via appropriate testing, of the selected encapsulation and application
method for a particular end use application.
Encapsulation may have several functions depending on the type of application. The most common are:
• To inhibit current leakage and short circuit due to humidity and contamination from service environment
• To inhibit corrosion
• To improve fatigue life of solder joints to leadless packages
• To inhibit arcing and corona, in particular for high voltage applications
• To provide mechanical support and to prevent damages due to mechanical shock and vibration.
• To provide a mitigation method for the growth of tin-whiskers.

13.4 Terms and Definitions

13.4.1 Adhesion Promotion The chemical process of preparing a surface to enhance its ability to be bonded to another
surface, i.e., A layer of encapsulation.

13.4.2 Adhesion Failure The rupture of an adhesive bond such that the separation appears to be at the adhesive-adherent
interface.

13.4.3 Anisotropic Conducting in the Z-axis only.

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13.4.4 ARUR Abbreviation standing for acrylic resin and urethane resin combination chemistries.

13.4.5 Cross-Linking The formation of chemical bonds between molecules in a thermosetting resin during a polymeriza-
tion reaction.

13.4.6 Cure A change in the physical properties of a polymer by a chemical reaction. Curing can be affected by the appli-
cation of heat through convection or conduction, by the use of radiation such as infrared or ultraviolet energy, or in stan-
dard temperature and pressure conditions.

13.4.7 Delamination A separation between an encapsulation layer and the surface it is adhering to.

13.4.8 Durometer A measure of the degree of hardness or the resistance to be deformed or fractured.

13.4.9 EMC Abbreviation for Electromagnetic Compatibility

13.4.10 Filler A substance that is added to a material to improve its solidity, bulk, or other properties.

13.4.11 Gel Time Time taken for a liquid polymer to begin to exhibit pseudo-elastic properties or to be ’immobilized’.

13.4.12 Glass Transition Temperature Tg The temperature at which an amorphous polymer, or the amorphous regions in
a partially-crystalline polymer, changes from being in a hard and relatively-brittle condition to being in a viscous or rubbery
condition.

13.4.13 Hybrid An encapsulation system with more than one principle resin chemistry.

13.4.14 Hydrophopic-Oleophobic Encapsulations An encapsulation having an aversion to water and oils.

13.4.15 Inhibition Inhibition is defined as the inability for the encapsulation materials to obtain the optimum properties at
the manufacturers’ specified time and temperature.

13.4.16 Mealing A condition in form of discrete spots or patches that reveals a separation at the interface between an
encapsulation and the surface to be coated.

13.4.17 Monomer A chemical compound that can undergo polymerization.

13.4.18 Multi-Layering The process of applying more than one layer of encapsulation to make up the desired thickness.
Some materials need to be applied while the previous layer is still wet, while others need to be completely cured before the
application of subsequent layer.

13.4.19 Oligomer A polymer or polymer intermediate containing relatively few structural units.

13.4.20 Photoresist A material that is sensitive to portions of the light spectrum and that, when properly exposed, can
mask areas from exposure with a high degree of integrity.

13.4.21 Polymer A compound of high molecular weight that is derived from either the joining together or many small
similar or dissimilar molecules or by the condensation of many small molecules by the elimination of water, alcohol, or some
other solvent.

13.4.22 Polymerization The formation of a matrix of cross-linked long chain molecular structure from short chain mono-
mer molecules.

13.4.23 Polysiloxane A polymer whose main chemical linkage is repeating units of SiO atoms bonded together.

13.4.24 Pot Life The length of time a material, substance, or product can be left in an open package or dispenser, while
it meets all applicable specification requirements and remains suitable for its intended use.

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13.4.25 Priming A surface treatment utilizing a surfactant to promote adhesion of encapsulation.

13.4.26 Shadowing Encapsulation:

1. A situation that can occur during spray encapsulation of a PCA when components may hide or ‘‘shadow’’ the area under-
neath them, relative to the spray direction, preventing the surfaces beneath the component from being coated.
2. Also used in reference to curing of encapsulations by UV rays when components may hide or ‘‘shadow’’ the area under-
neath, not allowing it to be exposed and cured by the UV rays.

13.4.27 Shrinkage Reduction in volume as a wet, freshly applied layer dries/cures into an encapsulation film with desired
properties.

13.4.28 Spectroscopy The production and investigation of spectra, or the process of using a spectroscope or spectrom-
eter.

13.4.29 Stripping The process of eroding a material by chemical reaction. Stripping agents can be used to remove certain
types of encapsulation for the purpose of rework or repair.

13.4.30 Surface Tension The natural, inward, molecular-attraction force that inhibits the spread of a liquid at its interface
with a solid material.

13.4.31 Transfer Efficiency The ratio of volume dispensed to the desired volume of encapsulation materials.

13.4.32 Wetting The formation of a relatively uniform, and adherent film of materials on a surface.

13.4.33 Young’s Modulus Modulus of elasticity. A measure of the flexibility of a material. The lower the modulus, the
more flexible the material is.

13.5 Environmental, Health and Safety Considerations Recent environmental regulations such as the Montreal Protocol
and Clean Air Act have had a significant impact on both encapsulation materials and application methods, particularly with
regard to control of Volatile Organic Compounds (VOCs) and ozone depleting chlorofluorocarbon (CFC) compounds. VOCs
are the primary concern, as they react in the atmosphere to form ground level ozone (or smog). CFCs have been found to
deplete earth’s protective ozone layer in the upper stratosphere. Both VOCs and CFCs have been extensively used as sol-
vent carriers. Manufacturers and suppliers of encapsulation materials have responded by developing non-solvent based
encapsulations and environmentally acceptable methods of application, curing and removal.

13.5.1 Emissions Emission is defined as any substance discharged into the atmosphere such as solvents in encapsulation
systems, fluxes, cleaners, etc. Certain types of solvent such as isopropyl alcohol, xylene, etc., are volatile organic compound
(VOC) liquids containing carbon and hydrogen that emit VOC vapors.

13.5.2 Disposal of Hazardous Waste Hazardous waste is defined as any material which is classified as such and stated on
the manufacturers Material Safety Data Sheet (MSDS). Disposal of hazardous waste must be in total compliance with the
local, state and federal regulations.

13.5.3 Governmental Regulations The user must be aware of any limitation with the use of any product or material used
in their process. Frequently asked questions about hazardous waste are answered on the Environmental Protection Agency’s
website at http://www.EPA.gov.

13.6 Types of Encapsulation There are various materials (e.g., epoxy, silicone, etc.) that are used to encapsulate assem-
blies and components. Encapsulation provides a high degree of electrical insulation protection and is usually resistant to
many types of solvents and harsh environments encountered in the product life cycle. The encapsulation materials also act
to immobilize various types of particulates on the surface of the assembly or component and functions as a mechanical sup-
port for the various devices on the board.
Most are resistant to moisture and humidity, which may reduce the potential of leakage currents, ‘‘cross talk,’’ electrochemi-
cal migration, dendrite growth and arcing. These issues are becoming more critical with the reduction in component size,
pitch, circuitry spacing, laminate thickness, and voltage plus the rise in speed (frequency) of signals.

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All resins are cured by an irreversible polymerization reaction with varying degree of cross-linking (thermoset polymers).
The cross-linking makes it difficult to remove the encapsulations when performing repair work. Certain types of raw mate-
rials (e.g., silica, etc.) are sometimes mixed with the resin to improve viscosity, thermal conductivity or CTE mismatch.
Processing, mechanical, thermal and electrical properties need to be considered when selecting the encapsulating materials.
Due to variations in encapsulation chemistry, encapsulation manufacturers or technical data sheets should be consulted for
more information.
See Section 13.16 of this Handbook for other selection considerations relative to end-use environments.

13.6.1 Acrylic Acrylics are normally used where low cost or clarity of the encapsulated item is desired.

Acrylics are easy to apply and rework subsequent to encapsulation can easily be accomplished using solvents. Acrylics dry
rapidly, reaching optimum physical properties in minutes, are fungus resistant and provide long pot life. Furthermore, acryl-
ics give off little or no heat during cure, eliminating damage to heat-sensitive components, do not shrink during cure and
have good humidity resistance. Acrylic encapsulations exhibit low glass transition temperatures (Tg), i.e., 100 °F (37.78 °C)
or less. Above Tg, the large expansion can result in damaging effects.

13.6.2 Epoxy Epoxy systems are usually available as two part compounds. They provide reasonable humidity resistance
and good abrasive and chemical resistance. They are virtually impossible to remove chemically for re-work since any strip-
per that will remove the encapsulation may vigorously attack epoxy-potted components as well as the epoxy-glass board
itself.
Single part epoxy resin encapsulations with temperature-activated hardeners are also available. These encapsulations require
curing at temperatures higher than 150 °F. Single part UV curable encapsulations are available which eliminate curing at
these elevated temperatures.
When most epoxies are applied, a ‘‘buffer’’ material must be used around fragile components to prevent their damage from
film shrinkage during polymerization. Curing at low temperature, if possible, is encouraged to reduce shrinkage.
Curing of epoxy systems requires up to 3 hours at an elevated temperature or up to 7 days at room temperature. Short pot
life creates a limitation on their effective use.

13.6.3 Silicone Silicone encapsulations are extremely useful materials when components must endure extreme tempera-
ture cycling environments. The useful operating range of these materials is -55 °C to +200 °C. They provide high humidity
resistance along with good thermal endurance, making them desirable for PCAs with heat dissipating components such as
power resistors. For high impedance circuitry, silicones offer a very low dissipation factor. They are very forgiving materi-
als in production because they coat over and adhere to most surfaces found on a PCB and offer good resistance to polar
solvents. Secondary cure for the UV curable versions is accomplished with a very effective ambient moisture mechanism.
It should also be considered that high temperature protection may generally demand that the silicone encapsulation be cured
at or near to the maximum temperature it is designed to withstand.
NOTE: J-STD-001 paragraph 10.0 states, ‘‘Equipment used for measuring viscosity, mixing, applying and curing silicone
material should not be used for processing other material.’’

13.6.4 Polyurethane & Polysulfide Polyurethane encapsulations are available as either single or two-component formula-
tions. Both provide good humidity and chemical resistance, plus higher sustained dielectric properties.
Their chemical resistance, however, can be a major drawback since re-work can become difficult and costly.
Early polyurethane compounds exhibited instability or reversion of the cured film to a liquid under high humidity and tem-
perature conditions. Newer formulations eliminate this phenomenon.
Single component materials, while easy to apply, sometimes require 3-30 days at room temperature for optimum cure. Two
component formulations, on the other hand, reach optimum cure properties at elevated temperatures within 1-3 hours, but
with pot lives of 30 minutes to 3 hours.

13.6.5 UV and Solvent Cure A recently developed method of curing is to utilize ultra-violet light. This permits curing of
the material in seconds rather than in minutes or hours. They have been specifically developed for use on flat bare substrates
and are of particular benefit for fiber optic filament encapsulation, as curing can be effected at speeds of up to 400ft/min.

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Their use on PCAs, however, is somewhat limited because of the shadowing effect produced by components and the thick-
nesses used. As a result of this, a catalyst is often required to ensure a chemical reaction to cure the compound in shaded
areas. However, this produces the associated drawbacks of two-part systems such as short pot life and material blending for
correct application. One-part materials have been developed, although they tend to be of an epoxy or polyurethane base.
Two-part products are difficult to repair as subsequently reapplied encapsulations do not etch into the existing material sur-
face, but produce discrete lamination. The reliability of this type of encapsulation is suspect at temperature ranges such as
< -55 °C or > +130 °C as they may become brittle and less flexible.

13.7 Design for Encapsulation Application This section establishes design concepts, guidelines, and procedures intended
to promote appropriate ‘‘Design for Reliability (DfR)’’ procedures and to ensure reliable characteristics of a encapsulated
assembly or component.
Reliability is defined the ability of a product to function under given conditions and for a specified period of time without
failure.
This section addresses reliability-related aspects of product design, process design, as well as material/component selection
and qualification when using encapsulation in accordance with the design guidelines given in IPC-D-279. This section also
identifies other appropriate existing IPC documents as reference for basic detailed information. The effort of this section is
directed at making the designer and the users of encapsulation for electronic applications aware of the various factors that
affect the protection afforded encapsulated items in the end-use environment for the design-life of the end-item.

13.7.1 Design Philosophy Before the product design effort can begin, the designers of the product and assembly process
need to know the customer’s reliability requirements for the product. These requirements should be defined and ranked by
a concurrent engineering or cross-functional team through a process such as Quality Function Deployment (QFD) used to
capture the voice of the customer.
The design team can include, but is not limited to, the members who participate in at least the design activities identified
in the IPC-D-279. In this section, DfA/M stands for Design for Assembly/Manufacturability, DfT for Design for Testabil-
ity, DfR for Design for Reliability.
The design team can consider the general design guidelines presented in the body of this section as a methodology for
achieving its reliability goals. The IPC-D-279 contains information that illustrates the general design steps and process flow
using concurrent engineering. The IPC-D-279 also includes information that illustrates the interactive nature of the design
for reliability process.
Areas that need to be defined are the reliability requirements, the product life cycle, and the product environment. For details
see IPC-HDBK-830.

13.7.2 PCBs Printed Circuit Boards (PCBs) are one of the major subcomponents of an encapsulated printed circuit
assembly (PCA). Other sub-elements of the PCA that are considered in the encapsulation design and selection include, but
are not limited to, surface finish, spacing between component leads or printed wiring features, discrete and integrated cir-
cuit components, and solder joint configuration. However, it is the PCB that is the singular largest feature of the PCA that
is encapsulated and therefore has a significant impact in determining which encapsulation and process of application is most
appropriate to use. The chemical make-up and thermal expansion characteristics of the PCB need to be considered when
selecting the final encapsulate properties.

13.7.2.1 Plating Surfaces Plating surfaces are the metallic areas that remain on the exterior surface of the PCB as well
as through-holes and solder pads after etching and removal of photoresists. These areas are typically bare copper that are
then plated with a protective finish. In some cases, large metallic areas are often plated with other organometallic metals
such as nickel or even solder mask. In most of these instances, the plated surfaces will have some dissimilar metal inter-
faces that will be coated with an encapsulation. In addition, there may be designs in which an encapsulation will either par-
tially or completely cover the plated surface areas. In situations with partial encapsulation coverage, the edge of the encap-
sulation may delaminate or lose adhesion to the surface of the plated metal.

13.7.2.2 Alternate Surface Finishes One of the areas on a PCA to which an encapsulate needs to adhere is the surface
finish of the PCB. Surface finish is the material on exposed metallized areas of the exterior PCB. Newer technologies have
resulted in alternate materials to Sn/Pb being used as the finish on the PCB prior to assembly processing. These materials

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include, but are not limited to, bare copper, immersion tin, immersion silver, immersion gold, electrolytic or electroless
nickel combined with gold and/or palladium, organic soldering preservative (OSP), and other similar types of alloys.
In many situations, some surface finish areas are not being soldered and therefore are part of the overall board substrate.
Depending on the type of board surface finish, there may be dissimilar metal interfaces that could lead to corrosion if not
protected from humid environments. Encapsulation materials would then need to be considered as a corrosion prevention
aid in addition to an environmental protection barrier. The dissimilar metal combination of an alternate surface finish over
bare copper is also a surface in which encapsulation adhesion will also need to be evaluated.
In many cases, these conditions may necessitate conducting a qualification test using a representative PCB sample before
approving the intended encapsulation as ‘‘acceptable for use.’’

13.7.2.3 Spacing Reduced heat extraction from the PCA (and increased junction temperatures) may result if encapsula-
tion covers heat conduction surfaces on the PCA edge or margin which mate with heat sinks such as card-edge clamps and
cold plates. A resolution is to widen conductors which function as heat dissipaters. If possible, it is recommended to limit
ΔT conductor to less than 5 °C.
The other issue concerning the aspect of spacing on PCAs involves the areas between adjacent printed circuit traces or
between solder pads at the PCB level. Other spacing issues are the physical volume between adjacent leads of soldered elec-
tronic components. In all these instances, an encapsulation is usually required to cover these areas. For soldered components
with leads, usually require complete encapsulation coverage without solder bridging between adjacent leads in order to
maintain the necessary dielectric insulation. The type of encapsulation that would be used usually depends on spacing
between the leads (lead pitch) and whether the leads are cylindrical or rectangular. For fine pitched leaded devices, i.e.,
smaller spacing and clearance between adjacent leads, an encapsulation with lower viscosity should be considered to achieve
uniform thickness while providing edge and point coverage.

13.7.2.4 Solder Mask Compatibility issues between solder mask and encapsulation should be considered when designing
a PCB for encapsulation application.

13.7.3 Component Different types of component packages are used in electronic circuitry. The materials used in pack-
ages vary greatly and consist of mold release agents, waxes, plastics, ceramics, marking inks, metals, glass and various other
materials. The degree of encapsulation adhesion, CTE mismatch, shear modulus and general wetting characteristics of these
materials need to be considered when application of encapsulation is anticipated.

13.7.3.1 Component Material Type

13.7.3.1.1 Plastic Various mold release agents are used to assist in the release of these packages from the mold after the
injection molding process. Component suppliers consider these release agents proprietary and are reluctant to reveal the
exact formula used. These agents may impact the degree of wetting and the adhesion of encapsulation (or any adhesive) to
the package. The plastic packages may absorb various process materials such as fluxes and cleaning agents and the release
agents may exit the porous plastic matrix in subsequent heat excursions in processes or end use environments.

13.7.3.1.2 Ceramic When encapsulating assemblies containing ceramic components, one needs to consider the impact of
CTE mismatch to preclude damage (e.g., cracks) to the components.
Ceramic components are sometimes color-coded and the pigments pose problems with the encapsulation. Marking inks,
however, may contain polysiloxane agents, which may cause de-wetting and adhesion loss of the encapsulation, but usually
only occurs in the proximity area of legend markings.

13.7.3.1.3 Metal Metal packages are of the least concern of all types of package materials currently used. Most encapsu-
lation formulations are designed to wet and adhere well to these surfaces. The marking inks and/or decals used should be
considered as localized de-wetting and/or delamination may occur.

13.7.3.1.4 Glass When encapsulating assemblies containing glass bodied components, one needs to consider the impact
of CTE mismatch to preclude damage (e.g., cracks) to the components. Low modulus ‘‘buffering’’ compounds can be used
as an adjunct in end use applications consisting of high vibration and thermal cycling.

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13.7.3.2 Through Hole Components As for other types of components, one needs to consider the impact of CTE mis-
match, material compatibility issues, and voiding due to processing of the assembly.

13.7.3.3 Leaded SMT Components The ‘‘pitch’’ or distance between leads is a design concern for encapsulation. Some
higher viscosity encapsulation materials may not penetrate past and under fine pitch leads and may not migrate under the
device. This causes bubbles to form in the encapsulation during cure as air voids under the device heat up and the air
attempts to escape from under the component. If the bubble does not pop before polymerization, it can bridge conductors
and limit the degree of insulation provided by encapsulation within the cured bubble.
Encapsulating materials may need to be applied by a method (hypodermic needle, vacuum) to ensure that the material flows
to cover all required areas and to minimize the formation of bubbles.

13.7.3.4 Leadless SMT Components Components with terminations formed as an integral part of the body are specified
as leadless. This would include BGA, PGA, and Flip Chip, chip scale package (CSP), chip on board (COB), leadless chip
carrier (LCC), and chip type components.

13.7.3.4.1 Ball Grid Array (BGA) Ball Grid Array devices are leadless. They contain solder bumps on the underside, which
can be peripheral or area dispersed. The finished gap under the device after solder collapse can be 0.5 mm [0.020 in] to 1.3
mm [0.051 in]. This is generally enough to allow good capillary flow of encapsulation under the device depending on how
large the BGA is. BGAs in excess of 650 mm2 [1.01 in2] may limit the amount of encapsulation penetrating under the device
via capillary flow. Post soldering residues are of prime concern as cleaning and inspection under these types of devices can
be difficult or even impossible. Many of these devices are now being ‘‘under-filled’’ with epoxy prior to the encapsulation
operation.

13.7.3.4.2 Pin Grid Array (PGA) Pin Grid Arrays are similar to the BGA except for the fact that pins have replaced the
solder bumps. The characteristics affecting the encapsulation are identical to those of the BGA.

13.7.3.4.3 Flip Chip (COB, CSP) Flip Chip devices are package-less die, which have been bumped with solder on the con-
tact sites. The solder bumps are fluxed and the silicon chip is inverted, placed and passed through solder reflow. The device
is then ‘‘underfilled’’ with an epoxy creating a complete seal and fillet around the device. The encapsulation can be applied
over the die. Adhesion and wetting to the epoxy underfill fillet is usually not an issue.
Underfill can also be applied at the wafer level with B-staged anisotropic adhesives. Some versions also contain flux within
the epoxy matrix, hence ‘‘fluxing underfills’’ which eliminate the fluxing step.

13.7.3.4.4 Dam and Fill This type of device is similar to flip chip except the die is turned face up and connected with
wire die bonds. Because of this, it can be considered a leaded device before encapsulation.
The die is connected on the bottom side with die attach adhesive which is usually a non-conductive epoxy. The wire die
bonds are made from the die face to the substrate or lead frame. Using a high viscosity epoxy, a dam is dispensed around
the outside parameter of the device. The height profile of the dam must exceed the tallest die wires. A second epoxy mate-
rial, which is low in viscosity, is then dispensed within the dam parameter and both materials are cured simultaneously. This
completely encapsulates the device. Rework is not practical.
If encapsulated, the dam and fill epoxy package does not generally pose wetting or adherence problems with the encapsu-
lation.

13.7.3.4.5 Glob Top Glob top is similar to dam and fill with the only difference being a high viscosity epoxy encapsulant
is dispensed in the center of the die. The epoxy should encapsulate the wire die bonds without breaking the fine leads and
flow over the entire device. It is then cured. The height profile of the epoxy glob must exceed the highest bend in the die
wires by 30%. Encapsulation should perform in the same manner as in dam and fill applications.

13.7.4 Electrical The effect of encapsulation on the electrical functioning of a PCB can be either beneficial or detrimen-
tal. This depends primarily on the design parameters of the circuit and the material of the encapsulation. How beneficial or
how detrimental depends on good engineering, as outlined below.
There are several distinct categories of electronic circuits/assemblies that will be briefly discussed with regards to the pos-
sible effects of encapsulation. These include high voltage, high current, RF and microwave, high speed digital, along with
the effect on ESD and EMI. It’s important to note, the effects discussed only apply to circuit traces on the outer layers of
the PCB. The traces which are in direct contact with the encapsulation.

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13.7.4.1 High Voltage (HV)/High Current (HC) ‘‘High Voltage (HV) circuits’’ is one case where encapsulation may be
necessary for the PCA to function in some environments. Encapsulation is used to provide greater insulation between HV
leads than is provided by the air. Such additional insulation is needed to prevent HV arcing, corona and St. Elmo’s fire. The
best method to produce HV circuits with a high degree of robustness is by using encapsulation after assembly. Encapsula-
tion is not to be used in lieu of electrical insulation on high voltage wire.
An important characteristic of an encapsulation used in HV circuitry is its dielectric strength, but for High Current (HC)
circuits, encapsulation is generally detrimental. High current means high heat, and encapsulation interferes with the disper-
sion of that heat. Therefore, good thermal conductivity is the key property for encapsulations used in high current circuits.
Other important factors include high melting point and glass transition temperature (Tg). If the melting point and/or the Tg
are too low the encapsulation may melt or deform from the dissipated heat.
Circuits which are both high voltage and high current need encapsulation with both good electrical insulation to contain the
HV and good thermal conductivity to dissipate the heat generated by the high current. Unfortunately, materials that are good
electrical insulators are typically not good thermal conductors. Therefore, tradeoffs are required based upon the design of
the circuit, how it will be used, environmental conditions, etc. Good engineering in board design, component selection, as
well as materials, is necessary to produce the best PCA.

13.7.4.2 RF and Microwave These types of items should normally not be encapsulated since the encapsulating material
will change the dielectric constant of the circuit.

13.7.4.3 High Speed Digital These types of items should normally not be encapsulated since the encapsulating material
will change the dielectric constant of the circuit.

13.7.4.4 Controlled Impedance These types of items should normally not be encapsulated since the encapsulating mate-
rial will change the dielectric constant of the circuit.

13.7.4.5 EMI/ESD Electronic assemblies which will be handled, repaired, modified, etc., on a regular basis need some
protection from the discharges produced by human beings. The standard model used in ESD control is the human body
model consisting of a 15ρF capacitor through a 1500Ω resistor at a maximum of 35KV. This means that the encapsulation
must withstand high voltage but with only a small amount of charge behind it. Therefore the recommendations given in 6.4.1
are applicable here. Encapsulations are not commonly used for ESD protection.
There is little an encapsulation can do to alleviate EMI. Many factors need to be understood to properly control EMI. One
of those items is how to properly shield a PCA to prevent radiation of EMI or susceptibility to EMI. Shielding a PCA from
EMI requires enclosing the PCA in a conductor that is then connected to ground. In theory a conductive encapsulation could
do an excellent job, but in practice the likelihood of short-circuiting leads of the various components makes this an imprac-
tical process.

13.7.5 Encapsulation Coverage Encapsulating materials should be applied to the areas specified on the assembly
drawing/documentation.

13.7.6 Masking The purpose for masking is to prevent encapsulating materials from un-intentionally adhering to
unwanted areas such as mating interface points, electrical contacts, etc.
Masking will prevent encapsulation from being applied in a specific area. However, a masking process can be labor inten-
sive, especially around intricate assemblies. Therefore, minimizing masking should be a consideration while designing a
PCA. Choosing a mask that is easy to apply and remove could be helpful in the event that masking is needed.
Users are cautioned that certain types of masking such as liquid masking materials that subsequently harden to a rubber-like
consistency can cause problems in the event that they are not completely removed from electrical contacts in connectors,
sockets, and other similar electrical interface areas.
Masking and de-masking is a labor intensive process. Therefore, PCAs should be designed with encapsulation operation in
mind such that the number of areas that need to be masked is minimized.

13.7.7 Drawings & Design Guidelines In order for an encapsulation to be used on a PCA, there must be a reference to a
material and process specification as well as a pictorial drawing. The material specification usually governs all the require-
ments for the encapsulation material. The process specification usually specifies all the requirements associated with apply-
ing the encapsulation material. This specification should also include details for processes preceding and subsequent to the

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encapsulation step. Examples of these would include but are not limited to cleaning after soldering, masking, handling (as
electrostatic discharge safe), de-masking and inspection. A pictorial diagram, as a guideline, should indicate either by chain
line, hatched region, or something similar, the areas to be encapsulated.

13.7.8 Reworkability/Repairability If a PCB and/or the components are to be replaced during the life of the product, then
the encapsulation removal and application procedures must be considered during the product design stage. The first consid-
eration should be the post rework/repair performance as critical or non-critical. This is due to the potential that a re-coated
encapsulation seldom (if ever) seals the surface as well as the original encapsulation. See Chapter 14 of this Handbook for
more discussion on rework and repair.

13.8 Raw Materials Characteristics

13.8.1 Viscosity The viscosity of the encapsulation material needs to be considered based on the end use to ensure mate-
rial flows to where it is required. If viscosity control is required, the following methods can be used.

13.8.1.1 Spindle Measurements Brookfield-style viscometers estimate a fluid’s dynamic viscosity with a rotating disk or
T-shaped spindle. The disc or spindle type, rotation speed, and specimen temperature must be reported when quoting data
generated with these instruments.

13.8.2 Viscosity vs. Rheology There are essentially two methods to determine the suitability of the encapsulation for the
application: either viscosity or rheology. Rheology uses ‘‘flow cup’’ to estimate the viscosity by measuring the time required
for gravity flow through a calibrated orifice (e.g., Ford, Zahn, etc.). It is not practical to attempt a correlation of viscosity
to the rheology of a product.

13.8.2.2 Flow Cup Measurements Flow cup viscometers estimate a fluid’s kinematic viscosity by measuring the time
required for gravity flow through a calibrated orifice. The specimen density and temperature must be reported when quot-
ing data generated with these instruments.
Dynamic Viscosity (cP) = Kinematic Viscosity (cSt) x Specific Gravity of liquid
The accuracy of flow cup measurements is approximately ± 20%.Data generated with this instrument is strongly operator-
dependent. To minimize such dependency the technique defined below is suggested.
Immerse the flow cup in the liquid. Have the stopwatch in your hand as you lift the flow cup from the liquid with the other
hand. Start the clock when the top of the flow cup breaks the surface of the liquid. Lift the cup quickly from the liquid. Stop
the clock when the flow ceases to be continuous and steady.
There are many flow cup viscosity measurement standards. See Appendix B of IPC-HDBK-830 for details.

13.8.3 Effect of Temperature on Viscosity Generally speaking the warmer a liquid gets the lower its viscosity becomes.
Some materials are far more sensitive than others are, but for good comparison of data the temperature at which the mea-
surement is taken should be noted. 25 °C is a common standard.
A temperature compensation chart can be made for a specific ‘‘control’’ material by plotting the viscosity (measured by
whichever method) against temperature. Viscosity vs. temperature depends on the chemistry. Consult your material suppli-
ers for viscosity vs. temperature profiles.

13.8.4 Surface Properties The surface properties of an encapsulation material play a major role in the wetting of the sur-
faces to be coated. Surface tension and surface energy varies with the composition of the materials; not only the chemistry
of the resin, but also the chemistry and quantity of additive. Therefore, viscosity adjustment may alter the wetting charac-
teristic of a material on the surface to be coated.

13.9 Compatibility

13.9.1 Compatibility with Process Materials It is important when reading the following section, to recognize that all
encapsulation seals in as well as out. In order to successfully apply an encapsulation to a PCA, compatibility of the encap-
sulation with various materials on the PCA during the application and curing processes need to be considered. This includes
compatibility with board or component surfaces, solder masks, common contaminants such as flux residues, and chemicals
such as plasticizer, defoamer, and mold release agent.

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13.9.1.1 Solder Masks Encapsulating solder mask assemblies is normally not a concern.

13.9.1.2 Flux Residues In the vast majority of electronic assemblies, the formation of solder joints is assisted by the use
of a flux or flux-bearing solder. The function of the flux is to strip oxides from the fluxed surfaces during the preheat pro-
cess, so that reliable solder joints occur. For most fluxes, it is also desired that the flux material prevent re-oxidation during
preheat.
Fluxes can be generalized to three basic groups: high solids rosin fluxes (e.g., solids content above 15%); water soluble or
OA fluxes; and low residue fluxes (often referred to as no-clean fluxes). To learn more about fluxes, the reader is referred
to J-STD-004 and IPC-HDBK-001.
Each of these flux families leaves some form of residue. In general, high solids rosins and water-soluble fluxes are more
aggressive in nature, and are thus more often subjected to cleaning processes prior to encapsulation. The high solids rosins
are cleaned using solvent, aqueous, or semi-aqueous processes. The water soluble fluxes are most often cleaned using aque-
ous cleaning. The degree to which these often corrosive residues are removed may greatly impact the reliability of the
manufactured hardware. Poor cleaning may lead to electrochemical failure mechanisms, such as current leakage, corrosion,
and metal migration or dendritic growth.
The adhesion of encapsulation to the hardware surfaces can also depend on the completeness of cleaning. A high solids rosin
flux, if not cleaned well, can leave high levels of residual rosin, which may impact adhesion, although most encapsulations
adhere fairly well to rosin. A water-soluble flux may contain high-molecular-weight surfactant elements (which makes the
flux soluble by water). These surfactant agents, such as polyglycols, are hydrophilic (water attracting) and may adversely
affect adhesion. Thorough cleaning should remove both the corrosive ionic elements as well as the non-ionic organic ele-
ments.
Low residue fluxes are benign in nature and are intended for use with a no-clean assembly process. As such, the flux resi-
dues remain on the hardware, often functioning as an intermediate layer between the hardware and the encapsulation. The
amount of flux residue remaining will be a function of the solids content of the flux (most are 1-5% solids), the preheat
dynamics (hotter means less residue); and the reflow environment (air or nitrogen).
Bonding between an encapsulating material and a low residue flux layer may be problematic.

13.9.1.3 Cleaning Media Post solder cleaning and drying procedures may leave residues of contaminants and/or cleaning
media on PCAs to be encapsulated. Compatibility with cleaning media, either solvent or aqueous media, need to be verified.
Incompatible cleaning media may lead to poor wetting of the encapsulation during application, inhibition of cure, poor
adhesion of the cured encapsulation, or long-term reliability problems of the encapsulation.

13.9.1.4 Plasticizer Plasticizers are materials added to plastics and/or elastomers to increase flexibility. The amount may
vary depending on the desired final properties of the material to which it is added. Plasticizers are mobile fluids within a
plastic and as so, migrate to the surface. The presence of plasticizers can potentially lead to compatibility issues such as
lack of adhesion, inhibition or migration to undesired areas of the PCB. Plasticizers may also migrate to the cured encap-
sulation and cause swelling and lifting which will be detrimental to the encapsulation performance.

13.9.1.5 Defoamer Defoamer is an additive to prevent gassing, bubbling and foaming during application. The defoaming
material used should not be detrimental to the encapsulated item. Certain types of defoamers are known to contain hazard-
ous materials such as metal mercury.

13.9.1.6 Mold Release Agent Mold release agents are typically used with the mold tooling (fixture). Precaution should be
taken to ensure mold release agents are not inadvertently applied to unwanted areas to preclude contamination issues.

13.9.1.7 Marking Compatibility should always be verified between the marking material and the encapsulating material.

13.9.1.8 Temporary Masking Compatibility should be verified between the masking material and the encapsulating mate-
rial. Some masking materials contain a substance that is incompatible with the encapsulating materials. For example, natu-
ral latex liquid mask contains alkaline which inhibits the cure of certain catalytic encapsulation products.
Temporary masks may leave some form of residue. It is important to evaluate whether this residue can be harmful to your
process before implementation. An example of this would be tape residue left from the masking process during gold plat-
ing of contact points on the PCB. To have a consistent and good quality encapsulation, it is imperative that the item to be
encapsulated is clean.

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Residues to be aware of:

1. Adhesives
2. Human agents - perspiration, acids and/or oils
3. Lanolin from hands
4. Mold release agents
5. Oils
6. Silicones
7. Surfactants
8. Others depending on the process your supplier is using and the process you are using.
It is suggested that pre-production products be processed prior to the validation of actual production.

13.9.2 Inhibition Inhibition is defined as the inability for the encapsulation materials to obtain the optimum properties at
the manufacturers’ specified time and temperature.
Inhibition is caused by the contamination of the catalyst in heat-cure (addition-cure) encapsulation with trace quantities of
certain types of chemicals. These chemicals interfere with the cure reaction and thus prevent conversion of the material to
the desired solid. Extremely small quantities of inhibitors may be sufficient to produce this effect.
There are certain situations, however, where the cure reaction cannot proceed normally. These conditions occur when mate-
rials called inhibitors are present. In the presence of such an inhibitor, the cure in the immediate vicinity of the inhibiting
material is poor. In this inhibited area the encapsulation remains in its liquid state even though the cure schedule has been
completed. This liquid material will remain liquid regardless of any subsequent attempts to convert it to a solid.
Encapsulations that cure by a free radical mechanism may be subject to inhibition. Encapsulation formulations that derive
their free radicals from UV photoinitiators or organic peroxides are examples. In the presence of atmospheric oxygen, reac-
tive radicals react preferentially with oxygen to form inactive, non-propagating, alkyl peroxy radicals. The most common
signs of oxygen inhibition are a tacky surface or uncured material on the surface after cure. Increasing the UV intensity
and/or cure temperature usually will solve the problem. With proper cure conditions, reactive radicals form much faster than
oxygen can diffuse into the thin film, and complete cure occurs. Alternatively, curing under an inert gas will eliminate oxy-
gen inhibition.

13.9.2.1 Types of Inhibition

13.9.2.1.1 Interfacial Inhibition Interfacial inhibition occurs at the interface between the substrate and the encapsulation.
This is the most difficult type of inhibition to detect. It is most often diagnosed as an adhesion problem rather than a com-
patibility mismatch. Interfacial inhibition can be remedied by cleaning the surface of the substrate, baking out the substrate
to flash off volatiles or applying a barrier encapsulation, e.g., primer and changing the cure system.

13.9.2.1.2 Mild Inhibition Mild inhibition is most often observed when the encapsulation takes longer to cure than what
the material supplier has stated the cure time to be on the Technical Data Sheet. Most cases of inhibition can be overcome
by cleaning the surface of the substrate, baking out the substrate to flash off volatiles, heat accelerating the cure, applying
a barrier encapsulation, e.g., primer, or by the addition of cure accelerator.

13.9.2.1.3 Gross Inhibition Gross inhibition exists when the inhibited area remains in its liquid state even though the cure
schedule has been completed. Options for overcoming gross inhibition include changing the substrate or selecting a non-
addition cure encapsulation, e.g., moisture cure encapsulation.

13.9.2.2 Location of Inhibition Inhibition sometimes occurs on the exposed surface while it is curing in a contaminated
oven. In these cases, the atmosphere within the oven contains sufficient curing agent or catalyst leftover from a previous
product to cause inhibition of the surface of the heat-cure encapsulation. Solutions to this problem are to heat the oven at
its maximum temperature for eight hours to remove residual volatile inhibiting materials or use a dedicated oven.
Residuals left on the assembly are another potential source of inhibition. In most cases it is not the material from which the
substrate is made that has caused the inhibition. But rather, residuals left from other materials that have been processed on
the assembly or from residual oils remaining on the substrate surface such as greases, mold release agents, or hand lotions.

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These same considerations apply to other tools used in the processing of the encapsulation. Equipment such as funnels, dis-
pense tubes, hoses, seals and gaskets will sometimes pick up and retain residuals. They should be scrupulously cleaned or
replaced before being used with heat-cure encapsulation.

13.9.2.3 Causes of Inhibition The most common causes of inhibition are sulfur or sulfur-containing chemical compounds,
amines and certain other nitrogen-containing chemical compounds, acidic materials (usually organic acids) and organotin
Room Temperature Vulcanizing (RTV) silicone rubber catalysts. Exceptions to sulfur or nitrogen compounds that inhibit
heat-cure encapsulation are certain flexible polyurethanes. They are commonly contained in some gloves, finger cots, masks,
sleeving, solder masks, certain fluxes, mold release agents, process hoses, gaskets, O-rings and other rubber products, hand
cream, uncured epoxy and urethane.
As stated before, organic acids are inhibitors. The reaction byproduct of the peroxide catalyst in many heat-vulcanized rub-
ber stocks is an organic acid. Thus, if the rubber has not been properly post-cured, it is possible that acid will remain and
cause inhibition. This problem is particularly acute with hot-air-vulcanizable silicone rubber because the acid formed dur-
ing its vulcanization has a much lower volatility than the acid byproducts of other silicone rubbers. As a consequence, lon-
ger post-cures are needed with hot-air-vulcanizable silicone rubber.

13.9.2.4 Compatibility Check List These materials and components shown in Table 13-1 were evaluated using a heat-
curing product. It is believed that other heat-cure encapsulation will act similarly. The user should verify the compatibility
of encapsulation/board combinations prior to the final selection of the encapsulation.
Table 13-1 Material Compatibility
Polyvinylchloride, plasticized Hot-air-vulcanizable silicone rubber Sulfur Compounds Nitrogen Compounds
Epoxy, amine-cured Neoprene rubber Thiols Amines
Polysulfide MIL-S-8516 Buna N rubber Sulfides Amides
Cellophane tape GRS rubber Sulfates Imides
Masking tape Natural rubber Sulfites Azides
Vinyl electric tape Acid core solder flux Thioreas
Latex vacuum tubing Rosin core solder flux

13.10 Adhesion Several factors affect the ability of an encapsulation to adhere to an assembly. These factors include, but
are not limited to, cleanliness, compatibility between the encapsulation and other interface materials, and degree of cure.
Adhesion properties are important to the final product appearance and function. An encapsulation that does not adhere com-
pletely to the assembly is not protecting that assembly. Improper adhesion can lead to blistering, peeling, cracking, mealing,
and pop-corning of the encapsulation, especially during thermal cycling and heat/humidity treatment. The adhesion require-
ment is defined by the agreement between the applicator and the end user. The end user and applicator should determine
what level of adhesion produces a functional assembly and what test(s), if any, should be used to determine that sufficient
adhesion has been achieved and maintained through any tests or environmental conditioning. The risk for adhesion failure
is not only affected by the strength of adhesion but also by the elasticity of the encapsulation. An encapsulation with high
elasticity is less prone to adhesion failure when exposed to mechanical tension than an encapsulation with low elasticity.

13.10.1 Solder Mask/Substrate Compatibility of the solder mask and substrate with the encapsulation of choice is essen-
tial in order to produce a high quality assembly. Adhesion of the encapsulation to the solder mask is central to the compat-
ibility issue. The large numbers of solder mask, substrate, and encapsulation combinations make a detailed list here imprac-
tical. The end-users should discuss the compatibility criteria of the encapsulation with the encapsulation supplier.
Qualification of a given system including solder mask, encapsulation materials and process parameters should be completed
prior to the implementation of these materials.

13.10.2 Components Poor adhesion/de-wetting of encapsulation to component and component leads can be a problem. In
some cases the problem can be remedied with a change in application method, allowing better penetration of the encapsu-
lation in between fine-pitch leads, etc. Some components may have material on their surface that can inhibit encapsulation
adhesion, such as mold release agents, wax, polysiloxanes (silicones) and marking inks. Component cleanliness is also an
important factor in encapsulation adhesion.
If localized delamination occurs, it is the responsibility of the users to determine acceptability.

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13.10.3 Surface Finishes One of the areas on a PCA that an encapsulation has to adhere to is the surface finish of the
PCB. Surface finish is the material on metallized areas of the exterior PCB layer. Previous generations of these areas on a
PCB were the remaining copper after etching and other PCB processing prior to reflowing tin/lead (Sn/Pb). Newer technolo-
gies have resulted in alternate materials to Sn/Pb being used as the finish on the PCB prior to assembly processing. These
materials include, but are not limited to, bare copper, immersion tin, immersion silver, immersion gold, electrolytic or elec-
troless nickel combined with gold and/or palladium, organic soldering preservative (OSP), and other similar types of alloys.
It should be noted that if these materials are on areas of the PCB where a solder joint is formed, then the processing usu-
ally will modify these finish materials. Most of these modifications are the conventional assembly processing using hot air
Sn63/Pb37 eutectic solder leveling or reflow methods. However, because the surface finish may contain a different metal or
organic material prior to assembly processing, the resulting intermetallic in the solder joint may contain trace elements of
the board surface finish. It is this type of condition and other areas of the PCB with finishes not changed by assembly pro-
cessing that need to be evaluated for encapsulation compatibility. In many cases, these conditions may necessitate conduct-
ing a qualification test using a representative PCB sample before approving the intended encapsulation as ‘‘acceptable for
use.’’

13.10.4 Cleanliness The single most common deterrent to encapsulation adhesion is surface contamination. The presence
of ionic residues, oily materials, and particulates on board surfaces and components can result in corrosion, insulation
breakdown, poor adhesion and subsequently, failure of the encapsulation. Ionic contamination may cause mealing or vesi-
cation of the encapsulation. Oily materials and particulates will not allow most encapsulation to adhere to the surface/
substrate leading to peeling. A thorough cleaning and drying process is the best method available to minimize the adhesion
problems due to residues. Even when using low-residue fluxes/no-clean processes it is very important that the assemblies do
not exhibit any of the flux residues. Small traces of flux residues left on the assembly due to improper cleaning and vola-
tilization of the flux chemistries can lead to poor adhesion of the encapsulation. The cleaning process is also a factor. When
using alternative cleaning methods and chemistries, such as hydrocarbons, terpenes, esters, etc., caution must be observed
with respect to residual solvents. These residual solvents can cause outgassing at elevated temperatures resulting in adhesion
problems such as blisters and vesication. When using aqueous cleaning methodologies proper drying is essential. Encapsu-
lation may have poor adhesion due to the presence of any residual water on the assembly.

13.10.5 Interlayer Adhesion If encapsulation is applied in different layers (i.e., multiple applications of the material are
required) the degree of adhesion between layers and the degree of wetting on previously applied layers is dependent on the
type of chemistry and material selected. Some chemistry needs to be cured completely before the next layer is applied
whereas some chemistry would not adhere to itself while wet. It is not a common practice to utilize surface treatments
between layers for a multilayer encapsulation process.
For rework and repair, when a new layer of encapsulation is applied over an old layer, the degree of wetting and adhesion
may be influenced by the relative surface tension, the condition (cleanliness, wear and tear) of the old layer, and the com-
patibility with the encapsulation removal method (residues of stripping agent, thermal degraded encapsulation, abraded sur-
face, etc.). Adhesion promoters or surface treatments may be used to enhance adhesion. Defining the process for
re-encapsulation should be considered as part of the encapsulation process.

13.11 Methods of Assessing Compatibility and Performance There are literally thousands of ways that you could go
about either defining materials compatibility or testing the compatibility between any set of materials and the processing
environment. Such an assessment becomes more focused if we concentrate only on assessing the ability of the processed
hardware and encapsulation combination to achieve desired performance.
Whenever the assessment of performance is considered, an appropriate choice of test vehicle must be defined; test coupons,
test boards, actual hardware, etc.
It is recommended that designed experiments be run on test boards, with a final verification run on actual hardware.
There are four basic questions to be answered in assessing encapsulation performance:
1. Does the encapsulation adhere reliably to the substrate?
Adhesion can usually be addressed by ‘‘exercising’’ the encapsulation in an environment of changing thermal conditions,
such as temperature-humidity cycling. MIL-STD-202, Method 106, and IPC-TM-650, Method 2.6.3.1, are examples of
cyclical temperature-humidity environments commonly used to test the adhesion of an encapsulation to a substrate. If the
end-use environment has a severe vibration environment, then vibration testing may also be needed to test adhesion and
thermal expansion. Such testing is commonly referred to as ‘‘shake and bake.’’

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2. Does the encapsulation limit the electrical performance of the hardware?

Full functional testing of the hardware should be performed before and after application and curing of the encapsulation
material. If there are no electrical failures as a result of the materials selected and the application and curing process,
then the encapsulation is probably compatible. Performance considerations include increased rise times, propagation
delays, cross-talk, etc.
3. Does the encapsulation protect the hardware from the end-use environment?
Depending on the end-use environment, the encapsulation may be called upon to provide both a mechanical, chemical
and/or moisture barrier. Most test methods simply take the coated hardware and expose it to the environment in question.
The environments may consist of one or more of the following:
• ozone
• mixed flowing gasses
• industrial pollutants
• salt air
• temperature extremes
• humidity conditions
If the hardware can withstand an exposure to such environments, without degradation of the encapsulation properties,
degradation of the electrical properties, or corrosion of the hardware under the encapsulation, then that encapsulation
would be considered acceptable.
4. Do the thermal expansion properties of the encapsulation compromise the hardware?
In some cases, the encapsulation has not been selected to match the thermal characteristics of the end-use environment.
If the encapsulation is too rigid and the substrate thermally expands or contracts, then the encapsulation may crack and
crumble. If the encapsulation expands or contracts too much, it may break solder joints or fragile components such as
glass bodied diodes.
13.12 Processing Appendix C of IPC-HDBK-830 provides a quick troubleshooting guide for the processing of encapsu-
lation. Specific troubleshooting instructions should be obtained from the encapsulation manufacturers or encapsulation
applicators.
13.12.1 Cleanliness Failure in cleaning process may leave undesired residues on the surfaces to be coated as discussed
herein.
13.12.1.1 Cleaning Depending on the type of fluxes used in the soldering process, cleaning of post-solder assemblies
could be carried out with various systems. Guidelines on cleaning solutions could be found in the IPC-CH-65 Guidelines for
Cleaning of Printed Boards and Assemblies.
13.12.1.2 Cleanliness Assessment Techniques There are numerous ways to define cleanliness and different methods of
measuring the residues present on electronic hardware. Which method is chosen depends on whether you are looking for
ionic residues or non-ionic residues.
For organic contaminants, IPC-TM-650, Method 2.3.38, may be used. This is a visual examination of organic contaminant
dissolved in acetonitrile running off the test surface. A sophisticated method will be to analyze the dissolved contaminant
using infrared or Fourier Transform infrared spectroscopy as outlined in IPC-TM-650, Method 2.3.39.
For rosin flux residues, IPC-TM-650, Method 2.3.27, may be used. This test method utilizes UV-Vis Spectroscopy to detect
the presence of rosin residues in an extract solution. A more precise method based on the fluorescence nature of organic
materials is the high performance liquid chromatography (HPLC) method. This cleanliness assessment technique, as outlined
in IPC-TM-650, 2.3.27.1, detects specific organic species and their amounts.
For ionic residues, IPC-TM-650, Method 2.3.25 and 2.3.25.1, may be used. These tests detect the presence of ionizable sur-
face contaminant by measuring the resistivity of solvent extract (ROSE). They are common cleanliness assessment tech-
niques which may be used as process control tools. These methods do not analyze the type of ionic contaminant. If the ionic
residues need to be analyzed and quantified, an ion chromatography method like IPC-TM-650, Method 2.3.28, may be used.
Surface insulation resistance (SIR) testing may also be used for cleanliness assessment; it characterizes the effects of resi-
dues on some of the electrical properties of the test substrate. There are a variety of different test protocols, each involving
accelerated aging from different temperatures, levels of humidity, and applied voltages. An example is IPC-TM-650, Method
2.6.3.

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Each of these test methods may yield some measure of the residues present, but the issue often remains of determining how
much of any particular residue can be tolerated before adverse effects can be expected. Considering the variety of electronic
hardware configurations, it is impossible to select a single cleanliness criteria or cleanliness assessment technique which
covers all configurations. The IPC, in its assembly and joining related specifications, has taken the position that it is the
responsibility of the assembler or OEM to make this determination for their hardware.

13.13 Processing Environment It is suggested that encapsulation be applied in a temperature and humidity controlled
environment. A general rule is problems may occur when RH exceeds 60% during the application process. This may not
apply to moisture cure or water-based encapsulations. When curing an encapsulation, the user must be aware of the manu-
facturer’s recommended curing conditions. Applying encapsulation outside of these conditions may result in encapsulation
properties, which may not be adequate to the end-use application.

13.13.1 Substrate Preparation The preparation of the assembly prior to encapsulation is very critical to good wetting,
adhesion and subsequent reliability of the assembly. The level and type of soldering residues, handling residues, ionic resi-
dues and component mold release agents all play key roles in the success achieved with any encapsulation and/or encapsu-
lation process. The solder mask also has a great impact on how well the adhesion performance of a particular encapsulation
material will be.
With the advent of many low residue flux chemistries, (also known as no-clean), cleaning the assembly prior to encapsula-
tion is not normally performed, but sometimes is still necessary. The level of visible and non-visible residues will vary on
the type of assembly, physical mass of the components and the solder excursion profile. Base line ionic and corrosive spe-
cies measurement and periodic confirmation are still recommended and should be within the IPC prescribed limits. Most
low residue fluxes may turn ‘‘white’’ after solvent extraction testing for NaCl, as a result of the alcohol in the test solution
drying and developing the clear/invisible residues into a white powder. This is an esthetics issue leading many assemblers
not to test at all. The adhesion of encapsulation to these residues is generally very good with all encapsulation. But, how
well the residues are adhered to the solder joints should be considered, to reduce the potential for delamination of the cured
encapsulation material to the solder joint areas during the life cycle of the assembly.
Water-soluble flux processes require water washing and are generally good candidates for encapsulation because the assem-
blies are cleaned of many process residues. The critical factor to consider with this type of process is that the assemblies are
completely dry, prior to encapsulation.
Vapor degreasing techniques prior to encapsulation operations have been outlawed in many countries due to environmental
concerns. The cleanliness of the assembly must still be monitored to insure performance and reliability of the encapsulation
materials used. Compatibility of the encapsulation with these process residues should be checked.

13.13.2 Priming Prior to encapsulation, substrates are typically cleaned to ensure reliability and the best adhesion. To fur-
ther enhance adhesion, priming or adhesion promotion is a sometimes used technique after cleaning.

13.13.2.1 Priming for Silicones To obtain optimal adhesion performance of a silicone encapsulation, a priming step may
be required. Optimal adhesion is normally obtained when only a very thin, uniform coat of primer is applied.
Three steps should be considered if priming is required:
1. Preparing the surface – to provide a clean, dry and in some cases reactive surface
2. Applying the primer – to provide a very thin and uniform surface encapsulation
3. Curing the primer – to provide the ideal bonding surface for the silicone
Optimal adhesion is obtained only when the maximum surface area and surface reactivity are made available at the time of
primer application. Organic and water-soluble contaminants and loose particulates can reduce the effective surface area
available for bonding. Good adhesion can only be obtained when the substrate surface is strong enough to hold a bond.
The primer must evenly coat all available surface area to achieve optimal adhesion. Some surfaces may cause a primer to
bead up. Poor surface wet-out like this will result in only spotty/localized adhesion. If the primer beads up when applied,
solvents or other additives can be added to the primer to improve wet out. Consult the primer supplier for selection of such
additives.
There is a common misconception that can cause considerable problems in the application of a primer; in nearly all cases
‘‘more’’ is definitely not better. Less is best. The best primer performance may be obtained with a cured primer thickness

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of 0.1 to 10 microns, with optimal adhesion at about 1 micron coverage. Often, this thin application can be best accom-
plished by wiping the primer on and then immediately wiping it right back off. When applying a primer by dipping or
spraying, dilution may be recommended to decrease the primer encapsulation thickness. Over application of most primers
will be evidenced not only by poor adhesion, but also by white chalkiness or flakiness on the cured primed surface. Loose
material should be brushed off; however, decreased adhesion performance may still be expected.
Maximum adhesion performance is directly related to the extent of the cure of the reactive species in the primer. Primers
containing silane-coupling agents begin to react with atmospheric moisture as the solvent carrier evaporates. Ideal adhesion
will be obtained during a ‘‘window’’ of extent of primer cure that will be unique to a particular adhesion system, i.e., a given
surface, primer and silicone encapsulation. For a given primer, the choice of silicone to be used with it usually has a greater
influence on the optimal extent-of-cure window than does the choice of the surface material.
The extent of primer cure is controlled by three main cure conditions: temperature, relative humidity, and time. In most
applications, the temperature at which the primer is cured either does not vary severely, or cannot be controlled, as is most
often the case with relative humidity. The amount of time that a primer is allowed to cure, however, can usually be more
carefully monitored. It is recommended that an evaluation of the effects of cure times on adhesion be carried out to maxi-
mize adhesion performance. This can be achieved by allowing the primer to cure at average or normal application condi-
tions for 15, 30, 60, 120, and 240 minutes, and then continuing through the remainder of the normal bonding procedure.
Alternatively, primers can be cured for 15 minutes at 72 °F, 100 °F, 125 °F, and 150 °F, if the normal primer cure is car-
ried out at the elevated temperatures. Oven atmospheres can often be quite dry. This will slow the cure rate down unless
precautions are taken to maintain an adequate relative humidity.
To increase the relative humidity in the primer curing area, suggestions include commercial humidifiers, open pans of water
(large surface area of water) in the oven, and water misters. It should be noted that water condensed directly onto surfaces
to be primed will degrade performance if not removed prior to the primer application.
The optimal cure time established by the above oven curing procedure will be influenced by changes in temperature and
humidity. Two general ‘‘rules of thumb’’ are:
1. Cure may be reduced by 50% per every 20 °F increase in cure temperature given equal relative humidities (actually
18 °F or 10 °C = doubling of most reaction rates)
2. Cure times should be approximately doubled per every halving of the relative humidity
There are no sure predictive means to distinguish between adhesion systems that are or are not sensitive to these conditions.
Therefore, it is recommended the user determine the primer cure times at conditions that approximate the average and the
extremes of the temperature and relative humidity that might be in a given application.

13.13.2.2 Priming for Acrylics No primer is known to be needed for this encapsulation type.

13.13.2.3 Priming for Urethane No primer is known to be needed for this encapsulation type.

13.13.2.4 Priming for Polysulfide For small areas no primer is required. For bonding to Silicones, Flourosilicones or to
achieve a structural bond an adhesion promoter or primer is required.

13.13.3 Plasma Treatment Plasma treatment is the process of placing an assembly in a vacuum chamber and using gas-
eous plasma to micro-etch away all exposed surfaces. Various gases are used to achieve different etch rates. This process is
used as a cleaning and/or surface roughing operation. Because of the process, some areas of the assembly must be masked
to prevent unwanted removal and discoloration. Selective plasma treatment may also be used. This process may not be suit-
able for all applications.

13.13.4 Mechanical Etching Mechanical etching is the process of bombarding an assembly with hard items (e.g., sand or
ceramic pieces) to roughen up surfaces. Because of the nature of the process, some areas of the assembly must be masked
to prevent damage. This process may not be suitable for all applications. This process is also known as Micro-Abrasive
Etching/Removal. Users are cautioned that significant ESD damage may occur to ESDS sensitive items in event the machine
used does not have built-in ESD controls, or otherwise, in the event the controls fail or the humidity drops below 30%. It
is recommended that the voltage generated at the nozzle dispensing the power be verified as within an acceptable range dur-
ing each daily use of the machine.

13.13.5 Masking In certain instances, masking of assembly or component areas may be required to ensure that the encap-
sulating compound does not adhere to areas which its presence can create a problem, such as mechanical interface surfaces,

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electrical contacts, etc. Masks can include plastic boots or covers, a peel-able mask, or masking tape to name a few. Most
masks are introduced manually by an operator, although liquid masks can be applied automatically with a dispensing robot.
Maskants may leave some form of residue. It is important to evaluate whether this residue can be harmful to your process
before implementation.
Be aware that the rear of connectors and via holes can leak encapsulation.
Encapsulates are designed to ingress under components and so will find their way into a break in your masking. Often using
tape and liquid masks together can be the best way to seal areas against dip encapsulation. Create a box with the tape, then
seal with the liquid mask.
Caution should be used when using liquid masks. Liquid masks can flow into vias or other holes. Liquid masks are com-
monly used but must be allowed to dry completely before application of the encapsulation material. Users are cautioned that
liquid masking materials that subsequently harden to a rubber-like consistency may cause problems in event they are not
completely removed from electrical contacts in connectors, sockets and other similar electrical interface areas.
Compatibility should always be verified between the masking material and the encapsulation material.

13.13.5.1 Types of Masks

13.13.5.1.1 Natural Latex Liquid Masks These masks are a solution of natural latex rubber in water, stabilized by an
alkaline component (often ammonia). It is important to make sure that the mask is applied thin enough so that it does not
remain liquid on the board for an excessive period of time, as the alkalinity can be damaging in this situation to certain
substrates (e.g., Copper). Generally a thickness of less than 2-3 mm is OK.
The alkaline component of the mask can also inhibit the cure of certain catalytic encapsulation products so validation of
your mask with the encapsulation material is essential.
Heating of the mask can speed up the cure, but avoid heating above 70-80 °C as this can begin to degrade the latex result-
ing in an effect similar to ‘chewing gum’. This can make the product very hard to de-mask.

13.13.5.1.2 Synthetic Latex Liquid Masks These masks are a solution of a synthetic polymer in water. They are often
used when natural based masks have been shown to inhibit cure of the encapsulation used. Generally, the self-bond strength
and ease of use is not comparable to natural products, but they are not necessarily as alkaline and can be lower in odor.
Again, heating can speed up the cure, although excessive heat too early can cause bubbles in the mask.

13.13.5.1.3 Other Liquid Masks There are a variety of other masks available such as heat cure and water-soluble masks.
It is not recommended to use a water-soluble mask for encapsulation masking, as they are really more suitable for the sol-
dering process. The heat cure masks can be advantageous in terms of process time. UV curable removable acrylics can also
be dispensed and cured as a mask.

13.13.5.1.4 Tape Masks The tape selected for masking should be non-porous to the encapsulation material and should
not produce excessive static when used. Use of static adhesion tapes is not recommended when ESD sensitive components
are present. Ideally, use a tape that shows a color or contrast change on contact with the substrate, this allows the detection
of breaks in the masking before the board is coated.

13.13.5.1.5 Boots, Caps, Plugs, etc. Pre-molded boots and polyvinyl caps are commonly used. An advantage of boots,
caps and plugs is their ability to be reused.

13.13.6 Manual vs. Automated Masking Manual masking methods typically allow the user to utilize whatever is neces-
sary to protect an interconnect or ‘‘keep out’’ area of the assembly from encapsulation. They include, but are not limited to:
molded boots, tapes, caps, plugs, tape dots, latex, UV curable removable acrylics and just about anything else that will do
the job effectively.
The critical concerns are preventing leakage and easily removing them after the encapsulation has been applied and cured.
All the masking media used must be removed in its entirety and should not cause any deleterious effects to the assembly.
Traditional manual methods of masking and de-masking include off-line, batch-type activities done by human manual meth-
ods. These are typically very labor intensive operations depending on the design layout and complexity of a particular board
design. Masking and de-masking operations can sometimes cost more than the encapsulation process itself.

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Automated masking can include pressure/time dispensers or elaborate XYZ platforms to selectively apply the protective
media to the site. Once applied, the masking media must be cured. Most require heat, ambient air or UV curing mecha-
nisms.

13.13.6.1 De-masking When de-masking, caution should be observed to avoid any degradation of the encapsulation,
assembly, or board. Forms of degradation include lifting of materials from substrate, peeling, cracking, lifting of edges, and
physical damage to the substrate and/or components. Careful scoring may minimize degradation.

13.13.7 Recommended Coverage

13.13.7.1 Recommended Thickness Unlike conformal coating, encapsulation is not normally governed by thickness.
Components and assemblies are encapsulated to cover the complete assembly or component unless keep-out areas are des-
ignated. The degree to which encapsulation is required is specified on the assembly drawing/documentation.

13.13.8 Application Methods Encapsulants and potting materials are applied primarily by syringe to control application
location and quantity applied. Syringes typically come in sizes from 1cc to 60cc. Material can be loaded by the user or sup-
plied by a second party with most being premixed and frozen to extend pot life. Tips and needles come as come in a vari-
ety of sizes and the user must size it as a function of quantity and speed of application.
For best control the syringe should be attached to a pneumatic unit which provides a small negative pressure at the end of
each application cycle. This is to draw back material to prevent excess application or dripping. These machines can be
manually or computer controlled and is a function of the overall assembly line integration.
For large volume applications mixing, degassing, pouring followed by a final degassing is the standard method.

13.13.9 Cure Mechanisms Depending on the chemistry of the encapsulation, cure mechanisms can be categorized as fol-
lows. Some materials employ dual cure to ensure complete cure of all the material applied on an assembly.

13.13.9.1 Room Temperature Cure Room temperature cure is a relatively slow process. The encapsulation is cured in an
ambient environment Solvent based encapsulations must be subjected to room temperature cure to evaporate the solvent
prior to any other cure to prevent entrapped solvent. Some encapsulations may be accelerated by the application of mild
heat and/or humidity.

13.13.9.2 Heat Cure Heat is required to cure the encapsulation. In general, these encapsulations may be faster curing than
room temperature or moisture cure encapsulations. Some encapsulations must be heat cured; some may only use heat as a
means of accelerating cure.

13.13.9.3 Heat Accelerable Some room temperature curing may be accelerated by the application of heat. The accelera-
tion of moisture cure encapsulations may require additional humidity. Consult the material supplier for the specific condi-
tions for acceleration.

13.13.9.4 UV Cure Most UV curable encapsulation contains a secondary cure mechanism to cure encapsulation material
that migrates under devices that will not absorb the UV energy. The secondary mechanisms for the photo-initiator modified
encapsulations can be ambient moisture for the silicones (SR), and catalyzed, heat, aerobic, or ambient moisture for the
organic AR, ER, UR, and materials. Aerobic UV chemistries are not totally effective depending on the fillet formation thick-
ness and the ability for ambient air to diffuse through and penetrate the encapsulation fillet. The wavelength, intensity and
duration of the UV source should be verified with the appropriate material supplier.

13.13.9.5 Moisture Cure Unlike conformal coatings that are thin, encapsulation is not curable via a moisture cure because
of the thickness of the material applied.

13.13.9.6 Catalytic Cure Catalytic encapsulation materials cure by a reaction between two parts. Catalytic materials will
start to cure once the two components are in contact with each other. Usually, a primary cure mechanism, such as UV or
heat, is generally incorporated into these materials to speed up the cure. Catalytic reaction allows UV curable materials that
are not irradiated by UV, such as encapsulation ‘‘shadowed’’ under components, to cure with no added process steps or

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induced stress on the components, solder joints, or encapsulation fillets. Catalytic cure is popular with solvent-free organic
materials.

13.13.10 Cure Process Considerations Characteristics of ‘‘cured’’ encapsulation are provided in the material supplier’s
technical data sheet. If the recommended curing conditions of the supplier are not strictly followed, end results will vary.
Cure is defined as completion of chemical reaction and full development of properties. Adhesion is typically the last prop-
erty to develop. This may be several hours to several days depending on the encapsulation chemistry. Consult the material
suppliers for cure schedules. If final testing and or ‘‘burn in’’ are anticipated after the encapsulation operation, the time taken
for the chosen material to reach optimum properties needs to be considered.

13.13.10.1 Cure By-Products Some encapsulation materials can produce by-products as a result of the curing chemistry
employed. Some silicones may produce methanol in small amounts and others evolve cyclics, which can produce a micro-
layer of silica on or near mechanical relays and read/write heads. Because so many chemistries are available, the user should
contact the encapsulation supplier to understand what by-products and volatiles will be produced as a result of a particular
product chemistry.
For products that do form a by-product you should verify what the by-product is and utilize only materials with a
non-corrosive by-product. Many silicones used as encapsulation may liberate methanol as a by-product and this is consid-
ered a neutral-cure or non-corrosive product. Products to avoid in encapsulation applications are acetoxy-cure silicones since
they liberate acetic acid.

13.13.10.2 Exotherm Catalyzed materials or materials that contain two parts can usually generate exothermic heat as part
of the curing reaction.
Material mixed in large bulk (1 liter), can reach very high exothermic temperatures if not used within the pot life and left
to cure in large quantities. It should never be left in fluid delivery systems or reservoirs past the recommended pot life. This
should also be verified with the material supplier.

13.13.10.3 Shrinkage Unlike the thinner conformal coatings, shrinkage during encapsulation is normally not a problem
as long as the encapsulated item contains the minimum amount of material specified on the assembly drawing/
documentation.

13.13.10.4 Premature Surface Cure/Solvent Entrapment Due to the highly competitive nature of electronics manufac-
turing, processes are always monitored for methods to save costs. Reducing the cure/dry cycle is one of the simplest ways
to speed production. Unfortunately, this effort to save money, no matter what it costs, can create serious reliability problems.
Rapid curing can cause a ‘‘skin’’ to form on the surface of encapsulations that will prevent the thinners/solvents from
evaporating. This can result in bubbles/voids in the encapsulation as well as preventing the cross-linking of polymeric chains
for certain types of materials. Some solvents can attack the substrate or solder masks when left exposed over extended times.
Other thinners, such as water, can attract and dissolve ionic contaminates.
Solvent/thinner entrapment can also occur if the encapsulation completely underfills the space between the component and
substrate preventing evaporation. This can lead to problems that are not visible unless the component is removed.
Any proposed changes to a successful encapsulation and curing operation should be thoroughly tested before being imple-
mented into production.

13.13.10.5 Exceeding Cure Recommendations While under-curing an encapsulation may lead to an incomplete devel-
opment of film properties, over-curing may lead to some adverse effects on the performance of encapsulation. Depending on
the chemistry and cure mechanism, exceeding the cure schedule and conditions recommended by the material supplier may
lead to embrittlement, discoloration, formation of ripple, etc.

13.13.11 Application Process Monitoring The monitoring of the encapsulation process should be sufficient to guarantee
consistent and reliable application and cure of these materials. The encapsulation process is usually the last assembly step
in the electronic assembly process and a mistake here could be significant. Therefore, the encapsulation and cure process
should be monitored and documented to insure and demonstrate reliable yields.

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13.13.12 Inspection Guidelines Once an assembly has been encapsulated, it is important to inspect, or evaluate the suc-
cess of the process. Most often, a visual inspection is employed. During inspection, an operator may be evaluating a vari-
ety of criteria, including:
• Encapsulation coverage and integrity of masked areas
• Encapsulation uniformity
• Voids in encapsulation/air entrapment
• Workmanship
Inspection can be done before and/or after curing has taken place. This should depend on your specific process and the ease
of rework and repair of your encapsulation.
Visual inspection is not as common in selective or robotic applications due to the large number of assemblies encapsulated
in the production. In these applications, automatic quality control options are available. Presence sensors can verify that
encapsulation has been placed on the assembly. This cannot, however confirm, uniformity, or placement aside from a par-
ticular spot. Flow meters can verify the volume of encapsulation that has been applied to each assembly, while preventing
out of tolerance parts from continuing in the process.

13.13.12.1 Magnification When using magnification in the inspection process, 2x to 10x enlargement is normally suffi-
cient. Magnification instruments should be at an acceptable resolution to assess the encapsulation process. Aids that permit
simultaneous viewing with both eyes are always preferred, but not necessary.

13.13.12.2 UV/Light Source A fluorescent, shadow-less illumination light source may be used in an inspection process.
The assembly should be placed anywhere from 2 - 6 inch from the light source for optimal evaluation.

13.13.12.3 Workmanship Workmanship of the encapsulation application process needs to be evaluated to ensure that the
applied encapsulation fulfills the specified requirements. Regardless of the application method, the applied encapsulation
should not exhibit de-wetting behavior. The cured encapsulation must meet the accept/reject criteria of IPC J-STD-001.
If de-masking is included in the process, workmanship of the de-masking step needs to be examined to ensure that mask-
ing residue and degradation of the encapsulation or the board or the assembly is minimized. Forms of degradation include
lifting of materials from substrate, peeling, cracking, lifting of edges, physical damage to the substrate and/or components.

13.13.13 Environmental, Health and Safety Processing Considerations There are several safety guidelines that should
be followed during all parts of the encapsulation process. First and foremost is basic cleanliness and caution. All work areas
should be kept reasonably neat, spills should be cleaned up immediately, food or drink should never be in work areas, and
eye protection should be worn at all times in the manufacturing environment. Also, material safety data sheets (MSDS)
should be available for all encapsulations, solvents, strippers, etc., used in the encapsulation process. These MSDSs should
be located in an area which is accessible to individuals working with the chemicals and materials contained therein. Any-
one working with a particular encapsulation, solvent, etc., should review the MSDS on site and be sure to follow the safety
protocols listed for that particular material.
Any application method brings health and safety concerns to the user. Manual operations must address operator issues even
more seriously, as the employee will have direct contact with the spray process. Common hazards associated with encapsu-
lation applications are inhalation/ventilation and skin irritation. Proper ventilation in the area where encapsulation are
applied, cured, and re-worked is very important. Also, most encapsulation are irritants and contact with skin should be
avoided. It is suggested that gloves and other appropriate protective gear should be used when handling encapsulation. Con-
sult with in-house health and safety professionals, if available.

13.13.13.1 EH&S Viscosity Adjustment Refer to your local authorities for regulatory requirements on solvent used in vis-
cosity adjustment.

13.13.13.2 Curing Ventilation Considerations During the curing process of encapsulation solvents are often given off.
Therefore adequate ventilation should be used during this process. When employing ultra-violet curing methods, care should
be taken to avoid eye and skin exposure to the UV energy.

13.14 Encapsulation Properties All polymeric encapsulation have varying physical properties, depending on the poly-
meric backbones and other modifying chemical elements or additives. When selecting an encapsulation for an application,
the designer must be aware of:

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• The physical properties of cured encapsulations. Example: an encapsulation with no resistance to salt air would not be a
good choice for Navy hardware.
• How these properties may change from published values as a result of variables in the encapsulation operation. Example:
rise times and propagation delays may be affected dramatically if an encapsulation is used that is drastically beyond its
shelf life.
• How these properties may change with time as a result of the end-use environment. Example: encapsulations may be
embrittled or darkened with exposure to high heat.
• ‘‘Qualified’’ or ‘‘Approved’’ encapsulations to the various standards and specifications will have been tested to verify that
the following issues have been addressed. It is recommended that the relevant encapsulation manufacturer be asked for a
copy of the test reports.

13.14.1 Appearance/Color The transparency of the encapsulation may be an issue for hardware. Most specifications
require that the encapsulations maintain their transparent properties. Desired appearance and transparency must be main-
tained through various environmental stress screenings.

13.14.2 Dielectric Properties Encapsulation, when applied to an assembly, becomes a part of the dielectric system,
affecting electrical parameters. If this is not taken into account during the design, then the circuit may not function as
desired.

13.14.2.1 Dielectric Withstanding Voltage Dielectric Withstanding Voltage (DWV) is a measure of how well an encap-
sulation will resist conducting electricity, usually at a high test voltage, for a set period of time. DWV should be a consid-
eration when designing high voltage equipment or equipment exposed to high amounts of corona.

13.14.2.2 Dielectric Insulation Resistance Insulation resistance is a measure of the resistance to the flow of electricity.
The higher the insulation resistance, the better the material is as an insulator.
Moisture resistance, sometimes also called moisture and insulation resistance (M&IR), is a measure of how well the insu-
lation characteristics are maintained when exposed to elevated conditions of temperature and humidity. A material with a
low M&IR value would be a poor choice to protect a circuit in a high humidity end-use environment.

13.14.2.3 Dielectric Q-Resonance Encapsulation polymers become part of the dielectric equation when they are applied
to an assembly surface. Some of the dielectric properties of an encapsulation are dependent upon the electromagnetic fre-
quencies experienced. When hardware operates at high RF frequencies, the encapsulation may alter the response of the cir-
cuit as its dielectric properties change with frequency. Therefore, RF assemblies are not encapsulated.

13.14.2.4 Dielectric Constant and Dissipation Factor Dielectric constant and dissipation factor are a measure of how
much a material may slow down electromagnetic propagation or how much energy an electromagnetic signal may lose.
Materials with very low dielectric constants, such as polytetrafluoroethylene (PTFE) or ceramic, have very low dielectric
constant and dissipation factors. An RF signal will not lose much energy and rise/fall times are only minimally effected for
these substrates, which is why they are chosen for high-speed/high-frequency hardware. In contrast, a material with a high
dielectric constant may cause excessive energy loss in RF signals. Since encapsulation materials normally have a high
dielectric constant, encapsulation is not used for this application.

13.14.3 Thermal Properties Thermal properties of an encapsulation are an important characteristic because the encapsu-
lation must be able to withstand local hot spots generated by components or from environmental temperature exposure of
the electronic device it has been applied to. Some end-use applications may involve extreme temperature, or widely rang-
ing temperature, for example, automotive, space and geothermal applications. Thermal profiles, which include ambient and
operational temperature extremes, must be considered when selecting encapsulations. When temperature changes, other con-
ditions, e.g., humidity and pressure may vary too. It is advisable to evaluate all these potential changes and their effect on
encapsulation.
Thermal analysis techniques can be used to determine encapsulation properties with changes in temperature such as:
1. The useful state of cure
2. Glass transition temperature
3. Degree of cure

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4. The amounts of moisture and volatiles present

5. Mechanical properties such as expansion, contraction and modulus.
Examples of thermal analysis techniques are differential scanning calorimetry (DSC), thermal mechanical analysis (TMA),
dynamic mechanical analysis (DMA) and thermal gravimetric analysis (TGA). More information on these techniques can be
found in Appendix D of IPC-HDBK-830.

13.14.3.1 Thermal Stability High temperature can cause short-term changes in encapsulation characteristic such as soft-
ening and potentially lower electrical resistance. Long-term effects of high temperature operation can cause encapsulations
to discolor, embrittle, crack, and shrink, effecting dielectric strength and insulation resistance. Low temperatures can cause
cracking and delamination due to differences in CTE, vibration, or flexing. Thermal cycle testing, using dummy components,
is recommended to determine suitability for each application.
Silicones are generally used for extreme temperature cycling environments. Typically, they can be useful from -55 °C to
+200 °C. Silicones are elastomeric, pliable and present a lower risk for solder joint or component damage at extreme tem-
peratures. Organic materials such as AR and UR offer useful operating temperature ranges from -40 °C to +125 °C.

13.14.3.2 Thermal Shock Thermal shock, higher than 30 °C per minute, may also stress the encapsulation due to a slow
delta temperature rate. This can cause cracking and delamination of some brittle encapsulations from internal CTE mis-
matches. IPC-TM-650, Method 2.6.7.1, is an example of a thermal shock test, which verifies the compatibility of an encap-
sulation with a specific temperature profile.

13.14.3.3 Glass Transition Temperature (Tg) The Glass Transition Temperature (Tg) is the temperature at which an
amorphous polymer transitions between a super-cooled liquid and its glassy solid. As a result, amorphous polymers exhibit
substantially different physical properties above and below this characteristic temperature. The Tg is strongly dependent on
the rate at which the temperature changes through this phase change.

13.14.3.4 Coefficient of Thermal Expansion (CTE) The Coefficient of Thermal Expansion (CTE) is the linear dimensional
change with respect to an original dimension due to a change in temperature. Two measures of CTE are usually provided:
one in the X-Y plane (lateral) and one in the Z-direction (thickness). CTE is also generally reported above and below the
Glass Transition Temperature. Ideally the CTE should be as close as possible to the same between the substrate, component,
solder alloy and encapsulation. Some users express this as Thermal Coefficient of Expansion (CTE).
CTE is an important design consideration because if the thermal expansion characteristics of the encapsulation are radically
different than for the substrate, cracking of the encapsulation may occur, compromising encapsulation integrity, and the
encapsulation may unduly stress component leads, compromising reliability. This is particularly true for the more rigid
encapsulations, such as epoxy. If the end-use environment has large or rapid swings in thermal conditions, a CTE mismatch
can prematurely fatigue an encapsulation or cause fatigue failures in components.

13.14.3.5 Temperature Gradient Temperature gradient across an encapsulation layer may induce undesirable stress to the
encapsulation even when its CTE matches with that of the assembly. This may lead to cracking of the encapsulation.
The rate at which an encapsulation layer stabilizes to a minimum temperature gradient is a function of the specific heat
capacity and the heat transfer coefficient of the encapsulation. Encapsulation with a high specific heat capacity or a low heat
transfer coefficient may have a localized hot spot for a longer period. These properties need to be considered if the end-use
environment has large or rapid swings in thermal conditions.

13.14.4 Flammability An encapsulation covers most of the components and assembly surfaces. Therefore, it has the
potential to either isolate or propagate the effect of any electrical short that might occur. Flammability of the encapsulation
material is thus an important property to consider when selecting an encapsulation, especially if it is for an end use envi-
ronment susceptible to combustion.
Some encapsulations may contain flame-retardants. Flammability of encapsulation can be tested as per ASTM D 635 or FAR
§25.853 and/or certified to UL746C or UL94 (vertical and horizontal burn tests) when required. Users should familiarize
themselves with appropriate specifications for their applications.

13.14.5 Flexibility Since unlike conformal coating, encapsulation is intended to completely surround assemblies and com-
ponents, flexibility is normally not an issue. However, the effect of high modulus encapsulation on glass body components
should be evaluated when wide temperature ranges are expected.

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One must consider modulus and CTE together when designing electronic controllers (especially with fine-pitch components).
13.14.6 Abrasion Resistance Potential for mechanical abrasion should be considered when selecting an encapsulation.
This may occur due to improper handling, storage or shipping and may result in scratches, scrapes, dents, creases, and
marred surfaces which can become areas of concentrated stress or contamination ingress. Encapsulated assemblies in direct
contact with other subassemblies, such as wire harnesses, may abrade the encapsulation. Excessive handling, insertion and
removal of assemblies may also cause abrasion. High velocity air flow caused by venturi situations may erode encapsula-
tions due to dust particles in the air stream.
13.14.7 Hydrolytic Stability Some end use applications may require the encapsulation to be in contact with moisture con-
sistently. Others may have moisture condensing on the surface of the encapsulation occasionally. For both scenarios, the
encapsulation may be required to maintain its properties for a specific length of time. Encapsulations that are not hydrolyti-
cally stable would experience degradation of properties after exposure to a humid environment.
At the molecular level, aqueous layers of water will begin to form when the RH reaches 40%. At 60% RH a layer of water
2 to 4 molecules thick can be present. A layer 3 to 4 molecules thick is enough to cause chemical reactions to begin with
any hygroscopic particulates on the surface. At 80% humidity the aqueous layer is up to 10 molecules thick and deposited
materials will begin to dissolve. This creates free flowing ions which are capable of penetrating encapsulations. The pres-
ence of hydrocarbon compounds will aid the formation of aqueous surfaces layers on materials.
The general rule is when RH is ≥60% problems may occur. Experimentation has shown that submicron dust particles in the
atmosphere can be acidic or basic when exposed to humidity ≥60%. At humidity ≥80% ion flow begins which can lead to
leakage currents, dendritic growth, and corrosion. Any of these conditions; gas, acids, and sub-micron dust, can degrade cir-
cuitry with or without power applied to the circuit. Refer to Section 9.1.3. See also Appendices E through I for more infor-
mation.
IPC-TM-650, Method 2.6.11.1, verifies the hydrolytic stability of an encapsulation by examining the potential of the encap-
sulation to turn into liquid or powder forms when exposed to high humidity at a specific temperature.
13.14.8 Permeability Permeability refers to the ability of one material, such as water vapor, fumes, particles, etc., to flow
through another, such as an encapsulation. All organic materials are permeable to some degree, depending on the chemical
composition involved. Encapsulations such as epoxies may be more resistant to pollutant gasses, such as H2S, than silicones.
Permeability is an important factor to be considered for the selection of encapsulation, especially if it is for applications in
humid or corrosive environments. Permeability of an encapsulation may increase when the encapsulation is degraded by
chemicals in the end-use environment. Moisture and gasses that permeate the encapsulation may accumulate on the conduc-
tive surface of assemblies, leading to leakage currents, dendritic growth, corrosion and delamination of encapsulations over
the surface.
The polymer matrix for all encapsulation types is larger than the size of water molecule. Therefore, all encapsulations are
water permeable. As a result, it is only a matter of when the water vapors get through, not if the vapors get through. How-
ever, with good adhesion and no voids, moisture protection can be achieved. In fact, low permeability of water may be dis-
advantageous since it will take a longer time for an assembly to dry up. When the polymer absorbs moisture, the dielectric
properties can be affected. Thus, it is not recommended to submerge a coated PCA in any liquid material for an extended
period of time. If submersion is a requirement of the end use environment, a sealed enclosure should be considered and long
term compatibility of the encapsulation with the liquid should be evaluated.
Variations in permeability may also occur with temperature changes. If the Glass Transition Temperature (Tg) of the encap-
sulation material is exceeded these variations are quite large.
The permeability of encapsulation can be tested using the following test methods: ASTM E96-Current Revision: Standard
Test Methods for Water Vapor Transmission of Materials ASTM D570-Current Revision: Standard Test Method for Water
Absorption of Plastics ASTM F1249-Current Revision: Standard Test Method for Water Vapor Transmission Rate Through
Plastic Film and Sheeting Using Modulated Infrared Sensor ASTM D3833-Current Revision: Standard Test Method for
Water Vapor Transmission of Pressure Sensitive Tapes
13.14.9 Chemical Compatibility and Chemical Resistance Encapsulation may be exposed to various chemicals in their
end use environment. Examples of chemical exposure include the common ones such as pollutant gas, fuel and cleaning
media, to application specific chemicals such as body fluid and nuclear biological chemical warfare agents. When encapsu-
lations are selected, the chemical compatibility of the encapsulations must be considered if contact with these agents is pos-
sible. Encapsulations are required to be resistant to these chemicals, i.e., not degraded by them, and to be able to protect the
assemblies from any undesired effects of these chemicals.

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Bilateral chemical compatibility may be important in some applications. In these cases, it is important to ensure that the
encapsulation materials would not pollute or degrade the end use environments or other products that they are in contact
with.

13.14.9.1 Fuel Resistance In the end use applications where the coated assemblies have the possibility of coming into
contact with fuel and/or machinery fluid, the compatibility of encapsulation materials with these substances should be veri-
fied by the end users. Petroleum based products, e.g., petrol, jet fuel, diesel fuel, etc, may act as organic solvents that may
attack some encapsulation types. Hydraulic fluids and coolants may also contain chemicals that may degrade the quality of
the encapsulation and thus, long-term reliability of the product.

13.14.9.2 Biological Compatibility For medical applications, there should be a bilateral long-term compatibility and non-
reactive relationship between the encapsulation and body fluids (e.g., blood, urine) and tissues. It must not contaminate the
substrate with outgassing or byproducts from its catalysts, solvents, or plasticizers that could be harmful to the patient.

13.14.9.3 Gas Resistance For applications whereby the assemblies are exposed to gaseous environments, users need to
consider gas resistance from two aspects. First is the permeability of encapsulation to these gases. The gases may not be
harmful to the encapsulation, but may have negative effect on the conductive surface, e.g., gases which dissolve in moisture
and react with surfaces, leading to electrical failure. Second is the chemical compatibility of the encapsulation to these gases.

13.14.9.4 Corrosion Resistance Moisture and ionic species may result in corrosion. Encapsulation may inhibit or delay
penetration of moisture to the assembly surfaces, thereby increasing corrosion resistance. Corrosion resistance is thus heav-
ily dependent on permeability of the encapsulation. Good adhesion, elimination of pin holes/voids, and appropriate thick-
ness would minimize the potential of corrosion.
The ionic species needed in mechanisms of corrosion may permeate onto conductive surfaces from environments outside
the encapsulated assemblies. However, there may also be corrosive species on the assemblies (process residues including
flux, uncured solder mask and handling contamination). Encapsulations can inhibit mobility of ions on the surface and hence
enhance corrosion resistance. Proper cleaning and baking of the assembly prior to encapsulation is highly recommended to
prevent this type of corrosion.

13.14.9.5 Fungus Resistance Most specifications require that an encapsulation not support fungus growth. Some encap-
sulation materials may contain fungus resistance chemicals. Also, fungus resistance of an encapsulation should be consid-
ered for biomedical applications and hardware that is exposed to environments that are conducive to fungus growth. Even
though some encapsulation materials may be fungus static in nature, cleanliness of the coated assemblies should be main-
tained to avoid fungus growth on residues; for example, finger prints might encourage fungus growth. Fungus resistance may
be tested using IPC-TM-650, Method 2.6.1.1.

13.14.10 UV Stability If the hardware will be exposed to ultraviolet radiation, such as outdoor use or space applications,
the encapsulation should not be degraded or measurably altered by exposure to UV light. Some encapsulations have addi-
tives that absorb UV light before it can degrade the polymer structure. These additives are most often called UV inhibitors.
Darkening or yellowing of the encapsulation after exposure to extended UV light is normal. The detrimental effect of UV
exposure on the encapsulation would be demonstrated by embrittlement, cracking, crazing, etc.
Some encapsulations may be stable in outdoor use applications, but not vacuum stable, and thus not suitable for space appli-
cations. Other encapsulations may be unstable in outdoor use applications, but stable in the absence of oxygen and thus suit-
able for space applications. This signifies the importance of considering the entire environment in which the device will
reside.

13.14.11 Radiation Resistance Material properties affected by radiation in space (nuclear particles and electromagnetic
radiation) are mechanical (tensile strength, elasticity, elongation, hardness, etc.), thermal and optical properties.
Polymeric substances exhibit a wide variety of radiation effects that are irreversible. The radiation stability of a polymer is
dependent upon the chemical structure of the material because radiation induced excitation is localized to specific chemical
bond. Addition of energy absorbing aromatic rings to the chemical structure of the polymer greatly increases radiation sta-
bility of the polymer. In general, polymers containing aromatic rings (benzene) are more resistant than those not containing
it.

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Depending on the chemical type of encapsulation used, radiation can lead to chain scission or increased cross-linking, with
chain scission being typified by a softening or tackiness to the encapsulation and cross-linking leading to a more rigid and
brittle encapsulation. When the polymer backbone of an encapsulation is altered by these mechanisms, the physical and
electrical properties can change, affecting hardware reliability. Radiation resistance needs to be considered for hardware that
will encounter high-energy radiation, such as from nuclear reactors, x-ray equipment, all space-related hardware, medical
sterilization, etc.

13.14.12 Outgassing Some encapsulation materials contain plasticizer agents, especially elastomers, thermoplastics, and
other flexible materials. Over the course of time, under certain conditions, the encapsulations may emit these agents, becom-
ing more brittle in the process, as well as possibly contaminating nearby surfaces with the outgassing products. In addition
to these agents, some encapsulations contain unreacted low molecular weight species that may also outgas under certain
conditions.
Some encapsulations outgas significantly, making them unsuitable for space applications. The vacuum of space tends to pull
the agents out faster and causes outgassing. Outgassing species may cause problems where optical clarity is paramount in
systems with lenses, mirrors and viewing ports. Outgassing resistance is also important where unsealed relays, switches or
separable connectors are used. Outgassing products such as cyclics, low molecular weight species and fluorescent chemicals
added to the encapsulation materials may form insulating deposit on electrical contacts, possibly causing electrical failure.
Outgassing can also be a health concern in a closed environment such as onboard ship if the encapsulation materials con-
tain materials that can form a toxic gas during outgassing, in particular if the item is exposed to a fire.
ASTM E-595 or NASA equivalent specifications may be used to screen materials for outgassing. To avoid outgassing, care
should be taken to ensure complete cure has occurred.

13.15 Rework and Repair Most encapsulated items cannot be easily repaired, and therefore, are considered ‘‘throw-away’’
items. However, some minor repair of imperfections on the surface of the encapsulation, or to fill visible voids is possible.

13.15.1 Removal Methods Complete and partial removal methods of the encapsulation from assemblies can be accom-
plished with techniques such as chemical solvent stripping, mechanical abrasion removal, micro-abrasive media removal,
dry ice abrasion, thermal degradation, excimer laser and plasma stripping.

13.15.1.1 Chemical The chemical removal techniques involve swelling the encapsulation with a solvent to chemically
break down the encapsulation and to reduce the adhesion between the encapsulation and the board sufficiently to float the
encapsulation. This technique is applicable to large areas or the entire board. One problem with partial encapsulation
removal is the diffusion of liquid into areas other than the area to be removed. The compatibility of solvent should be veri-
fied with the assembly prior to use.
Either dipping or spraying the solvent onto the encapsulation can be used to remove it. A supersonic spray cleaner may be
used to remove the encapsulation in localized areas of the assembly. Use of chemical strippers should be limited because
they can be corrosive and difficult to clean, especially if they get into non-hermetically sealed components.
AR encapsulation is the simplest to remove via solvent submersion. The solvent softens the encapsulation and allows
removal by additional swabbing or light abrasion with a scraping tool being careful not to damage the substrate. Some
encapsulation may be dissolved fully into the solvent solution and swabbing may not be necessary. After removal the area
is neutralized via ample rinsing with deionized or distilled water and then heated in an oven 82 °C to 93 °C [180 °F to
200 °F] dependent on the substrate’s resistance to temperature). The heating is best performed in a vacuum oven 100 Torr
[30 lbs gauge pressure or 1.934 PSI] for approximately one-hour to assist in pulling off any contaminants.

13.15.1.2 Mechanical Abrasion This involves rotating disks, grinders and cutting tools. Caution needs to be exercised to
prevent removal of substrate material below the encapsulation level and subsequent underlying structure damage. Mechani-
cal methods also include surgical incisions, which are made directly on the solder joints. This method is usually used in
conjunction with solder extraction of the solder fillet through the excised incision.

13.15.1.3 Media Blasting Media blasting utilizes high velocity abrasive media directed through a nozzle to locally abrade
the encapsulation. Media includes plastic pellets, glass beads and ground walnut shell particles. Most systems are designed
to control electrostatic discharge from the rapid movement of the high velocity abrasive media.

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Users are cautioned that significant ESD damage may occur to ESDS sensitive items in event the machine used does not
have built-in ESD controls, or otherwise, in the event the controls fail or the humidity drops below 30%. It is recommended
that the voltage generated at the nozzle dispensing the power be verified as within an acceptable range during each daily use
of the machine.

13.15.1.4 Dry Ice Abrasion Micro-sized carbon dioxide pellets are blasted at localized areas of encapsulation to be
removed. With this technique the encapsulation would be removed by impact coupled to low temperature encapsulation
embrittlement and fracture.

13.15.1.5 Thermal Degradation Thermal degradation involves the use of a heat source to melt the encapsulation, for
those encapsulating materials that can be removed by heating. Since high temperatures may be required for some encapsu-
lating material care needs to be taken to prevent damage to components and the PCB.
Once heat is applied, the encapsulation can be softened and charred to facilitate in the removal of the required areas using
a localized hot air jet or hot-knife at 300 - 400 °C. The encapsulation can be chipped or flaked off the substrates with minor
surface abrasion. After removing the encapsulation the substrate must be solvent cleaned with IPA and neutralized prior to
re-encapsulation.

13.15.1.6 Laser This is an elaborate method of laser ablation removal. The systems are expensive and are generally used
for small-localized areas of encapsulation removal on microelectronic assemblies.
When electromagnetic radiation is absorbed by organic polymers, the polymer molecules become excited (heated). When
the radiation beam has enough power to heat the polymer sufficiently to produce a vapor pressure then the polymer is vola-
tilized. If the photon energy (E=hc/l) is sufficient to break chemical bonds, volatile compounds are produced. Thus laser
radiation can remove encapsulation from assemblies by two mechanisms:
1. Encapsulation melting and vaporization and
2. Chemical photo-degradation of the encapsulation.
Adequate radiation exposure time is required to complete the encapsulation removal from the desired area by either mecha-
nism. Less laser beam power is required for photo-degradation than for ablation. Ultraviolet lasers are required for photo-
degradation whereas other lasers are used for melting and vaporization. By focusing the laser radiation beam, small encap-
sulation areas can be removed. Further upon sweeping the beam the entire encapsulation can be removed by either process.
With either technique, care must be taken to ensure no damage to the PCB and its electronic components.

13.15.1.7 Plasma This method requires a vacuum system, an electromagnetic radiation source, and a gas supply. Either
radio-frequency (103-109 Hz) or microwave frequency (109-1012 Hz) sources can be used. Plasma etching mechanisms are
divided into four categories:
1. Sputtering mechanism
2. Chemical mechanism
3. Ion enhanced energetic mechanism
4. Ion enhanced inhibitor mechanism
In the sputtering mechanism ions mechanically eject encapsulation material at low pressure whereas thermalized neutral
gaseous radicals react with encapsulation material to form volatile products in the chemical mechanism. The ion enhanced
energetic mechanism is characterized by little or no intrinsic surface reaction with neutral radicals until energetic ions
increase the reactivity of the encapsulation producing chemical reactions which form volatile molecules from the encapsu-
lation. By depositing an inhibitor to exclude etchant in working areas, small localized areas can be etched by the ion ener-
getic mechanism. The plasma etching processes are characterized by rate, selectivity, uniformity and surface quality. The
electromagnetic source variables are:
1. Electric field to number density
2. Product of number density and characteristic reactor length
3. Generator frequency, number density product
4. Reactor shape and aspect ratios. Gas pressure directly influences the etching mechanisms.
If this method is used, caution should be taken to avoid damage to the assembly, the PCB, and the components.

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13.15.1.8 Combination Rework Methods In many cases, combinations of the above methods of removal would provide
the most efficient and effective method of encapsulation removal. Each rework situation is different and consultation with
the material supplier is needed to determine the most suitable method(s) of encapsulation removal for a particular encapsu-
lation type or chemistry.

13.15.2 Cleaning after Stripping An encapsulation stripping operation most often involves exposure to solvents, which
soften or dissolve organic polymers. If these materials are left on the substrate, which is also an organic polymer system,
the stripping agent does not know where to stop. Often, these materials contain halides or other materials which can also
attack metals, resulting in corrosion or metal migration on the assembly. Some of the solvents used are conductive and if
not completely neutralized or remove, can result in short-circuits. Therefore, it is critical to completely remove these mate-
rials from the item being stripped.
The cleaning method used depends greatly on the assembly involved and its susceptibility to the cleaning agents or solvents,
and on whether the stripping operation was global or removal from only a limited area.
The manufacturer of the stripping agents can provide information on the best way to neutralize or remove their chemical
materials. In most cases, deionized water can be used as a primary rinsing agent to reduce the amount of the stripping agent,
and most encapsulations are not affected by deionized water. It is recommended that swabbing the stripped area with iso-
propyl alcohol NOT be used. This only tends to re-distribute the detrimental materials, rather than remove them. However,
deionized water combined with an IPA rinse may be needed in some cases to ensure complete removal of both polar and
non-polar contamination. The critical endpoint of the cleaning is to get a substrate that is clean, dry, and ready for
re-encapsulation.
Removal of Type UR encapsulation using certain chemical stripper gel or stripper solvents may leave conductive residues.
It is recommended that the assembly be cleaned with a combination of polar and non-polar solvents under a pressure wash/
rinse/dry cycle to ensure complete removal of any potentially harmful residues from the encapsulation stripping process.
If the board has been globally stripped, then rinsing and cleaning becomes easier. Rinsing with deionized water is recom-
mended to knock most of the stripping agent from the board. If you have access to an ionic cleanliness tester, you can mea-
sure the amount of residual ionic contamination, as well as providing a mild cleaning action. If this option is used, check
the assembly to make sure that it is not water or isopropanol intolerant.

13.15.3 Re-Encapsulation It is often necessary to remove a defective component(s), from a previously coated and cured
assembly to facilitate repair. Once the previous encapsulation has been removed and the defective device has been success-
fully removed and replaced, the site must be cleaned of residual solder fluxes and other contamination and of most impor-
tance if chemical removal methods were used. After cleaning, the assembly must be allowed to dry or dried by using hot
air.
The degree of wetting and adhesion characteristics over the old encapsulation may vary with chemistry. In some cases an
adhesion promoter or mechanical abrasion may be required to treat the new surfaces and the demarcation sites of the intact
encapsulation. Once any adhesion promoter is applied and cured, or abrasion technique is completed, the rework site is ready
for re-encapsulation. It is important that the same or compatible encapsulation chemistry be used for re-coat. The encapsu-
lation material can be applied by a brush or syringe to the rework area and be allowed to slightly overlap the original encap-
sulation edges. For large re-coat sites, the methods used to originally encapsulate the assembly may be used. The encapsu-
lation material is then cured, inspected and is ready for service. Users are urged to check with the material suppliers to
confirm the recommended removal and rework techniques and any recommended adhesion promoters.
CAUTION: Normally, different types of encapsulation should not be intermixed on the same assembly unless the user has
determined that they are compatible with each other. For example, repairing an assembly (e.g., replacement of a part that is
encapsulated), that originally had Type AR encapsulation applied, using Type UR encapsulation, may cause inadequate
adhesion between the two different encapsulation types since the solvents in the Type UR encapsulation can react (i.e., dis-
solve) with the Type AR encapsulation and result in delamination between the coated areas.

13.15.4 Environmental, Health and Safety Rework and Repair Considerations Any rework and repair method brings
health and safety concerns to the user. Common hazards associated with encapsulation rework and repair operations are
inhalation of stripping and/or encapsulation chemicals and skin irritation caused by them, cut or score caused by the abra-
sion tools and media, and burns caused by the thermal parting tool. It is suggested that gloves and other appropriate pro-
tective gear should be used when reworking or repairing encapsulation on PCAs. Consult with in-house health and safety
professionals, if available.

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13.16 End Use Environment End use environment is a vital consideration while selecting an encapsulation. How and
where a product is going to be used determines what properties the encapsulation materials are required to possess. Any
encapsulation should be thoroughly evaluated for end use environment compatibility. Encapsulation manufacturers may be
contacted for specific data on considerations that are not listed in the material data sheet.
A few examples of end use environments for encapsulation are discussed below.

13.16.1 Outdoor Environment If a product is built for outdoor use and the assemblies are not hermetically sealed, encap-
sulation will be exposed to the following conditions.

13.16.1.1 Ultraviolet (UV) Radiation Ultraviolet is an electromagnetic ray with a frequency just outside the visible light
spectrum. Ultraviolet radiation is found in sunlight. It is scattered by the atmosphere to a greater degree than is visible light.
Hence, even if the encapsulation is not directly exposed under sunlight, it will still be susceptible to UV radiation. UV sta-
bility should be a requirement for the selection of encapsulation to ensure it performs in an outdoor environment.

13.16.1.2 Humidity Products for outdoor application are subjected to various degrees of humidity. In temperate and warm
climate zones, 30 to 60% of the time the relative humidity of the outdoor environment is higher than 80% when the atmo-
spheric temperature is above 0 °C. In tropical climates, the humidity is generally higher.
Depending on the degree of humidity exposure, hydrolytic stability and adequate level of permeability should be the
requirements for the selection of encapsulation. Corrosion resistance, which is a function of permeability, may also be
required.

13.16.1.3 Pollutant Gases Atmospheric pollutant gases typically consist of oxides of nitrogen and sulfur (NOx and SOx)
which are byproducts of the burning of fossil fuel. These pollutants generate numerous ionic and hygroscopic microscopic
compounds that absorb moisture and react among each other and transform into corrosive vapor on the surface of the encap-
sulation. Resistance to pollutant gases and nitrogen and sulfur derivative acids should be a requirement for the selection of
encapsulation if air pollution is a concern in the end use environment.

13.16.1.4 Ozone Ozone (O3) is a very reactive gas. It has a short life expectancy when it comes into contact with other
materials. It is capable of reacting with many forms of organics, including polymers and elastomers. Most polymers (e.g.,
encapsulation) have additives to prevent direct attacks from ozone. Check with the encapsulation manufacturer for ozone
resistance if high reliability is expected from a coated assembly operating in an outdoor environment.
When moisture, organic compounds and other reactive gases are combined with ozone a wide variety of chemical reactions
can occur. Some of them are capable of causing a break down in polymeric chains and or cross linkage.

13.16.1.5 Acid Rain Acid rain is a byproduct of combustion effluent and other VOCs (Volatile Organic Compounds)
released into the air. A complex series of chemical reactions begin when these gases are combined with moisture and ultra-
violet light. Ozone (O3), sulfates (SOx) and nitrates (NOx) are the primary acidic constituents of ‘‘acid rain’’ (pH < 5.0).
Because the amount of acid depends on exposure to sunlight (UV), moisture, and warm temperatures there is more acid
generated in the summer then in the winter. The harder and longer the rainfall the less the amount of acid it contains as it
is ‘‘washed’’ or ‘‘scavenged’’ from the air. Fog, drizzle, and mist may also be extremely acidic.
Resistance to corrosion, specifically resistance to nitrogen and sulfur derivative acids should be a requirement for the selec-
tion of encapsulation if air pollution and acid rain is a concern in the end use environment.

13.16.1.6 Marine and Coastal Environment Populated coastal environments are capable of causing damage to electronic
circuitry. Man-made pollutants combined with suspended sea salt and high humidity can create very conductive and acidic
atmospheres. pH factors as low as 1.7 have been measured in fogs in southern California.
Suspended aerosols/particulates can be generally grouped into four categories; organic acids, marine substances, soot car-
bon, and inorganic salt. All these particles could become nuclei to absorb moisture and to further combine and react with
other particles.
Hydrolytic stability, low permeability, acid resistance and moderate level of abrasion resistance are requirements for the
selection of encapsulation for applications in marine and coastal environments.

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13.16.1.6.1 Salt water Salt spray, mist, and suspended crystals may disrupt unprotected circuitry and may corrode the
metals in circuitry. The corrosive effects may be greatly reduced at a distance of 2 - 5 miles inland from the shore. The pres-
ence of microscopic amounts of salt may create intermittent operation depending on temperature and humidity. Humid envi-
ronments provide the aqueous layers necessary for chemical attacks to the encapsulations and circuits.

13.16.1.6.2 Fresh water Fresh water has fewer suspended materials (including salt) than salt water. Again, because of the
higher levels of humidity an aqueous layer may be present.

13.16.2 Automotive Electronic devices intended for automotive applications are exposed to severe service environments.
They are exposed to wide temperature extremes, many types of fluids, and random vibrations.
Automotive application environments are generally classified by temperature. Table 13-2 indicates the temperature classifi-
cations generally recognized by the automotive industry, and the intended application. The lower temperature limit of these
applications is -40 °C.
Table 13-2 Temperature Classifications of Automotive Industry
Class Application Description Upper Temperature Limit
Passenger Compartment
Door Interior
I 85 °C
Headliner
Trunk Interior
Engine Compartment (Non-engine, -transmission Mounted)
II Chassis-mounted (Not Exposed to Heat Source) 105 °C
Areas Exposed to Direct Sunlight (Dashboard, Rear Deck, etc.)
Engine Compartment (Engine-mounted, Away from Exhaust
Manifold)
III 125 °C
Firewall-mounted (Not Exposed to Catalytic Converter)
Chassis-mounted (Exposed to Heat Source)
Engine Compartment (Engine-mounted, Near Exhaust Manifold)
Firewall-mounted (Exposed to Catalytic Converter)
IV 150 °C
Transmission- / Differential-mounted
Internal to Bell Housing
Brake System (Exposure to Oil/Hydraulic Lines/Temperatures) 175 °C
V
Throttle Body, Accelerator, Exhaust Manifold, etc. 205 °C

Besides the requirements of various thermal properties, including flammability, according to the temperature classification,
resistance to fuel and engine fluids is a general requirement for all automotive applications. Abrasion resistance is required
for assemblies in the vicinity of moving parts and in the engine compartment; flexibility may be required in some applica-
tions. For applications exposed to open air, UV stability, hydrolytic stability and low moisture permeability is required.

13.16.3 Avionics Environment Typical requirements for the encapsulation used in an avionics environment include: resis-
tance to fuel and engine fluids, low flammability and permeability, and good thermal and hydrolytic stability. Specific
requirements may include abrasion resistance and non-outgassing, depending on the applications. There are several avion-
ics environmental distinctions, which must be treated separately.

13.16.3.1 Aircraft on the ground Ambient ramp air temperatures may range from -50 °F to +175 °F. Any moisture film
that collects on the surface will be contaminated by existing air pollutants plus materials that have deposited on the surface
of the PCA.
Cleaning and servicing of the aircraft will generate numerous pollutants from fumes, spills and leaks. Some of these sources
are cleaning solutions, fuel vapors, hydraulic fluids, anti-corrosion sprays, solvents, paint fumes, and paint stripper fumes.

13.16.3.2 Equipment Outside the Pressure Containment Compartment During Operations The following changes will
occur in a matter of minutes during the operation of this equipment:
• Temperature changes from +175 °F at ground level to -59 °F at altitude
• High humidity at ground level to very low/freezing conditions at altitude
• 14 psi at ground level to 1 psi at altitude.
Condensation may form under these conditions, especially on descent because the equipment has been ‘‘cold soaked’’ at
operating altitudes. Frequent transition of temperature and pressure can affect the driving forces of penetration and vapor
absorption of contaminants.

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13.16.3.3 Equipment Inside the Pressure Containment Compartment During Operations During the hot summer
months sudden temperature changes (20 °C or more per second) may occur when the aircraft air conditioning system is
turned on. Exposure to blowing condensation will occur when this cold air encounters the warm moist ambient air. During
cold weather operations the reverse actions may occur except the condensation may form on the assemblies, depending on
the humidity of the warm air. Pressure changes may occur from 14 psi to approximately 7 psi.
Airborne particles will gradually build up on the surface of assemblies. Any condensation, spills or leaks may be potential
threats to assemblies.

13.16.4 Space Environment Radiation in space comes from multiple sources - geomagnetically trapped corpuscular
radiation of the Van Allen belts, auroral radiation, cosmic radiation, and solar flares. Most radiation experiments are per-
formed under ambient atmosphere conditions but it is believed that effects of radiation (Section 10.15) in vacuum are not
as severe as in air due to the lack of oxygen and its role in polymer degradation.
Besides radiation resistance, the encapsulation selected for space environment should not outgas in a vacuum environment.
Specific requirements of the encapsulation are dependent on the application of the assemblies; high reliability is generally
expected.

13.16.5 Medical Environment In a medical environment, encapsulation may be in contact with body fluids, radiation and
sterilization media at various temperature ranges. Extremely tight isolation and dimensional tolerances may be required for
some medical devices. A special category of medical applications is devices that are implanted in the body cavity that are
in long term, intimate contact with body fluids and tissues, which require bilateral compatibility of the encapsulation.

13.16.6 Geothermal Environment The geothermal exploration industry requires protection of electronic devices in the
presence of a ‘‘down hole’’ environment. This environment may include high temperature (220 °C), high humidity (RH
100%), salt water, crude oil, natural gas, sulfur compounds, caustic high pH solutions, etc.
The encapsulation selected for geothermal applications should be resistant to hydrocarbon, acid and alkaline, less permeable
to gas and liquid, thermally stable over a wide range of temperature, and dependent on the product, resistant to abrasion.

13.16.7 Nuclear Biological Chemical Warfare Environment Nuclear Biological Chemical (NBC) environments involve
extremely aggressive warfare agents. Encapsulations must provide protection against these as well as the decontamination
agents. Decontamination agents, such as DS2, can be more aggressive than the actual chemical warfare agents. Gas mask
voice transmitters are common devices that require protection from these chemicals.
Low permeability to gas, resistance to radiation and specific chemicals is required of the encapsulation in NBC environ-
ments. It may be necessary in these cases to use a multi-encapsulation system to provide the necessary protection.

13.17 Long Term Reliability and Testing Long term reliability and testing of encapsulation on assemblies is sometimes
defined as how long will an encapsulation, when applied on an assembly, yield continuous ‘‘failure-free’’ electrical/
functional performance while operating under all intended service environments. Depending on the type of industry, there
can be several ways of defining or interpreting long term reliability and testing for reliability. Regardless of the definition,
a common primary parameter is the length of time after which an encapsulation is applied to when a failure occurs.
The long term reliability of the encapsulation depends not only on the encapsulation material’s properties but on the com-
bination of assembly processes, type of assembly, type of environmental exposures and the duration of the exposure. The
contractual requirements (reliability and duration), class type, and the cost of the product should determine the overall level
of effort given to address these issues.

13.17.1 Failure Mechanism Failures of assemblies can be attributed to physical failures or defects of the encapsulation
during continuous operation and in its intended usage environment. High modulus encapsulating materials are known to
cause cracking in the glass component bodies. Failures of encapsulation could be the result of inappropriate selection of
encapsulation for its intended functions and operating conditions, or improper processing of the encapsulation. If the appli-
cation and curing procedures were not performed correctly, there may be incomplete development of desired film properties.
Even if they may not result in observable faults during inspection, these factors may compromise the long term reliability
of the assemblies.
On the other hand, failures of encapsulation could also be indications of contamination and defects on the solder mask or
substrate. The failure mechanisms of the encapsulation and the conditions of the whole assembly need to be evaluated dur-
ing failure analysis.

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13.17.1.1 Wear/Abrasion Improper handling, storage or shipping can cause unnecessary contact with coated surfaces.
This can result in scratches, scrapes, dents, creases and marred surfaces that can become areas of concentrated stress or con-
tamination ingress.
Breakdown of the encapsulation may be an indication of a design flaw. Design consideration must be given to prevent con-
tact of the encapsulation with other objects in the unit, such as wiring, cases, attaching hardware, or any moveable objects.
Internal forced air-cooling can create problems if the airflow is not controlled to prevent venturi type situations. In these
cases, an area of high velocity air can rapidly erode encapsulations due to dust particles.

13.17.1.2 Loss of Transparency/Discoloration Loss of transparency and/or discoloration can be caused by excessive
exposure to dust or airborne particulates on inherent surface tack, UV light, high temperature, and/or exposure to sulfur or
other chemical agents. In some cases, opaque (pigmented) encapsulations may be desired for security purposes.

13.17.1.3 Cracking Cracks in encapsulations have several different sources. The presence of cracks can limit the useful
life of encapsulations. Because they allow contaminates to penetrate the encapsulation and represent a breach of encapsula-
tion integrity, the location, length, and depth of the cracks must be evaluated. It should be noted that most encapsulations
are true thermal plastics and as such, cracks that form due to cold temperatures will ‘‘disappear’’ as the temperature
increases. Even though the cracks are no longer visible, the polymeric links have been broken and contaminates may have
penetrated the encapsulation.

13.17.1.4 Loss of Adhesion Several factors affect the ability of an encapsulation to adhere to an assembly. These factors
include, but are not limited to, cleanliness, compatibility between the encapsulation and other interface material, permeabil-
ity to moisture, and degree of cure. When moisture permeates into the area between the encapsulation and the substrate, a
difference in vapor pressure occurs. Changes in temperature and pressure will then build up the osmotic pressures and force
the encapsulation away from the surface. This form of delamination will be most noticeable where the encapsulation cov-
ers metals because acids may form when there is contamination on the metal surfaces.
Adhesion properties are important to the final product appearance and function. An encapsulation that does not adhere com-
pletely to the assembly does not protect that assembly. Improper adhesion can lead to blistering, peeling, cracking, mealing,
and pop-corning of the encapsulation, especially during thermal and humidity cycling conditions. The risk for adhesion fail-
ure is enhanced by the inelasticity of the encapsulation when exposed to mechanical tension.
The adhesion requirement is defined by the agreement between the encapsulation manufacturer, applicator and the end user.
The end user and applicator should determine what level of adhesion produces a functional assembly and what test(s), if
any, should be used to determine that sufficient adhesion has been achieved and maintained through environmental condi-
tioning.
Adhesion of encapsulation can be tested using ASTM 3359 Method B. This test may not be applicable to certain encapsu-
lation types.
13.17.1.5 Bubbles The presence of bubbles in an encapsulation is a factor of air entrapment, outgassing, mixing and/or
application methods. In many cases, this phenomenon cannot be overcome. Bubbles are generally acceptable when their size
is less than 50% of the distance between conductors at the location and they do not expose conductor, bridge of lands or
adjacent conductor surfaces.
13.17.1.6 Blistering Blistering is generally a precursor to delamination with one slight difference. It can occur in the
encapsulation as well as at the surface encapsulation interface. When blistering occurs in the encapsulation this usually
results in a hole or divot in the encapsulation. In any event blistering is a serious problem and must be corrected immedi-
ately. Blistering is the result of the same situations which cause delamination and must be addressed in the same manner.
13.17.1.7 Charring Charring usually occurs due to overheating although it can also result from a severe chemical reac-
tion. Reworking, using solder, excessive exposure to UV light, corona discharge, combustion and component overheating
are main causes of this problem. Because many forms of contaminates, including carbon, are captured in the encapsulation
material and the polymeric links have been damaged, the charred encapsulation must be replaced.
13.17.1.8 Degradation Degradation is primarily an aging problem due to the types of environmental conditions encoun-
tered by encapsulation materials. It is a combination of temperature, moisture, chemicals, abrasion and vibration. Encapsu-
lations will only withstand a certain amount of abuse from the environment before noticeable effects to circuitry operation
begin to occur. The nature and amount of harsh conditions each type of encapsulation can handle is variable. The resulting
effects to the circuitry will also vary.

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13.17.1.9 Chemical Attack Incompatibility with chemicals in the operating or end use environment may damage the
integrity of the encapsulation. Some chemicals react violently with encapsulation, causing immediate failure of the encap-
sulations, either damaging the assembly at the same time, or leaving the assembly unprotected from other potential threats.
Other chemicals may permeate encapsulations and gradually alter the matrix of the polymers, leaving the encapsulations at
a weakened state, prone to thermal or mechanical failures.

13.17.2 Accelerated Testing In general, the long term reliability cannot be determined in ‘‘real-time’’ conditions. Evalu-
ating long term reliability is usually accomplished by a combination of accelerated environmental test conditions and large
number of endurance cycles after which the encapsulation is physically examined using a number of various analytical diag-
nostic techniques. The encapsulation integrity would be evaluated by conducting visual or microscopic examinations as well
as electrical measurements before, during and/or after exposure to assess percent change. Once electrical failure is identi-
fied, it may be correlated to some type of physical evidence that indicates the encapsulation integrity or adhesion has been
impacted. This practice is sometimes referred to as accelerated environmental testing. The data generated by using these
types of procedures is generally empirical and specific to the performance of the particular encapsulation and the type of
assembly being evaluated.
Accelerated life cycle testing, based on expected end use environments, performed on prototype boards and production
samples, are capable of demonstrating long term reliability. Reliability testing can help to determine the probability of fail-
ure in the field, but not the absolute lifetime of the products.

13.17.2.1 Test Parameters Unfortunately there are several difficulties with establishing parameters for accelerated test-
ing. Often times, acceleration factors between a set of stress conditions (e.g., temperature cycling from 0 to 100 °C) and
mean time between failure (MTBF) are difficult to obtain with precision. Many statistical tools and models are available in
order to aid the user in correlating failure in a test chamber to probability of failure in the field.
The complex synergistic reactions that occur in the field are difficult to duplicate in a test chamber. Therefore the best meth-
odology is to employ a set of test conditions that best emulate the end use environment. For example, the accelerated aging
test plan for an assembly that is employed under the hood of a car should include a high temperature condition (as part of
a thermal cycle or as a high-temperature soak) as well as vibration. Whereas a consumer electronic product that sits in an
office environment does not need to see high temperature conditions or vibration as part of its reliability test plan.

13.17.2.2 Examples of Tests A number of different tests are available to measure the reliability of an encapsulated
assembly. Not every assembly needs to be tested using every condition. Several standards are available that can guide the
user in determining a set of test conditions and parameters (e.g., JEDEC, IPC, ASTM, etc.). A suggested list of test condi-
tions is provided below.
1. Temperature and humidity test
2. Thermal cycling
3. Thermal shock (liquid to liquid, air to air)
4. Highly accelerated stress test (HAST)
5. Highly accelerated life test (HALT)
6. Vibration
7. Salt Fog Endurance
8. High temperature operating life (HTOL)
9. Moisture and insulation resistance
10. Dielectric Withstanding Voltage
11. Flexibility
12. Chemical Resistance

13.18 Bibliography
Barton, A.F.M., Handbook of Polymer-Liquid Interaction Parameters and Solubility Parameters, CRC Press, Boca Raton, FL,
1990.
Brinker, C.J. and G.W. Scherer, Sol Gel Science, Academic Press, NY, 1990.

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Coombs, Clyde F., Jr., The Printed Circuits Handbook, Fourth Edition, McGraw-Hill, 1996.
D’Agostino, R., ed., Treatment and Etching of Polymers, Academic Press, San Diego, CA, 1990.
Hagar, D.B. and N.J. Dovichi, Electrostatic Spray, Analytic Chemistry 66, 1593, 1994.
Harper, Charles A., Electronic Packaging and Interconnection Handbook, Second Edition, McGraw-Hill, 1997.
Kuffel and Zaengl, High Voltage Engineering Fundamentals, Pergamon Press 1984.
Licari, J.J. and L.A. Hughes, ‘‘Handbook of Polymer Encapsulations for Electronics’’ Second Edition, Noyes Publications,
Norwich, NY 1990.
Lindsay, G. A. and M.J. Roberts, J.D. Stenger-Smith, P. Zarras, R.A. Hollis, A.P. Chapin, R.Y. Yee, K. J. Wynne, SPIE Pro-
ceedings 3474, 63, 1998.
Liu, H. and A. Montaser, General Spray, Analytic Chemistry 66, 3233, 1994.
Manos, D.M. and D.L. Flamm, eds., Plasma Etching, Academic Press, New York, 1989.
Mark, J.E., ed., Physical Properties of Polymers Handbook, American Institute of Physics, Woodbury, NY, 1996.
Noyes Data Publishing, Adhesives Technology Handbook, Park Edge, NY, 1985.
Ohring, M., The Materials Science of Thin Films, Academic Press, San Diego, CA, 1992.
Sams, Howard W. & Co., Reference Data for Radio Engineers, ITT: Sixth Edition.
Shugg, W.T., Handbook of Electrical and Electronic Insulating Materials, Third Edition, Van Nostrand Reinhold, 1986.
Vossen, J.L. and W. Kern, eds., Thin Films Processes II, Academic Press, San Diego, CA, 1991.

14 REWORK AND REPAIR

14.1 General Information and Common Procedures

14.1.1 Scope This revision includes expanded coverage for the lead-free processes, and additional inspection guidelines
for operations such as repair that may not have other published criteria. This section does not limit the maximum number
of rework, modification or repair actions to a PCB.

14.1.2 Purpose Although this section is based in large part on the Product Class definitions used in IPC documents such
as J-STD-001 or IPC-A-610, this document should be considered applicable to any type of electronic equipment.

14.1.2.1 Definition of Requirements This section is intended to be used as a guide and there are no specific requirements
or criteria unless separately and specifically called out in a user’s contractual or other documentation. When statements such
as ‘‘must,’’ ‘‘should’’ or ‘‘need to be’’ are used, they are stressing an important point. If these strong recommendations are
not followed the end result may not be satisfactory and additional damage could be caused.

14.1.3 Background This section is designed to help users repair, rework, and modify electronic assemblies with minimum
impact on end use function or reliability.

14.1.4 Terms and Definitions Definitions marked with an * are from the IPC-T-50 and apply to the use of document.

14.1.4.1 PCA Printed Circuit Assembly

14.1.4.2 *Rework The act of reprocessing non-complying articles through the use of original or equivalent processing in
a manner that assures full compliance of the article with applicable drawings or specifications.

14.1.4.3 *Modification the revision of the functional capability of a product in order to satisfy new acceptance criteria.
Modifications are usually required to incorporate design changes which can be controlled by drawings, change order, etc.
Modifications should only be performed when specifically authorized and described in detail on controlled documentation.

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14.1.4.4 *Repair the act of restoring the functional capability of a defective article in a manner that does not assure com-
pliance of the article with applicable drawings or specifications.

14.1.4.5 Class of Product The user (customer) of the product is responsible for identifying the Class of Product. The pro-
cedure selected for action to be taken (modification, rework or repair) must be consistent with the Class identified by the
user/customer.
The three classes are:
Class 1 – General Electronic Products
Includes products for applications where the major requirement is the function of the completed assembly.
Class 2 – Dedicated Service Electronic Products
Includes products where continued performance and extended life is required, and for which uninterrupted service is desired
but not critical. Typically, the end-use environment would not cause failures.
Class 3 – High Performance Electronic Products
Includes products where continued performance or performance-on-demand is critical. Equipment downtime cannot be tol-
erated, end-use environment may be uncommonly harsh, and the equipment must function where required, such as life sup-
port and other critical systems.
14.1.4.6 Board Types There are a variety of printed board types that the procedures in this document apply to. When
selecting the appropriate modification, rework or repair procedure the printed board type being worked should be consid-
ered. Select a procedure that applies to the printed board type as listed on the procedure. Printed board types include the
following: R: Rigid Printed Boards and Assemblies - A printed board or assembly using rigid base materials only. These
may be single-sided, double-sided or multilayered, and may be constructed from base laminate material that spans all
approved commercial grades of laminate and includes glass fabric reinforced epoxy and polyimide resin laminates.
F: Flexible Printed Boards and Assemblies – A printed board or assembly using flexible or a combination of rigid and
flexible materials only. May be partially provided with electrically nonfunctional stiffeners and/or cover lay. These may be
single-sided, double-sided or multilayered.
W: Discrete Wiring Boards and Assemblies – A printed board or assembly using a discrete wiring technique to obtain elec-
trical interconnections.
C: Ceramic Boards and Assemblies – A printed board or assembly using ceramic as the base material with interconnections
separated by dielectric. The board layers are usually formed by alternate printing or depositing of interconnections and
dielectric. The assemblies are either surface mount or die attach. Usually multilayered, these may be single-sided or double-
sided.
14.1.4.7 Level of Conformance Level of Conformance provides the means for selecting an appropriate level of confor-
mance to the original electrical, mechanical, physical, environmental and visual product requirements. Each procedure lists
a Level of Conformance that the product will attain when successfully completed.
The Level of Conformance rating for each procedure is based on the skill of the technician. The ratings are based on long
term industry experience and are not necessarily backed up with testing data.
L: Lowest Level – Significant variance with the physical character of the original and may vary with many of the electri-
cal, functional, environmental and serviceability factors.
M: Medium Level – Some variance with the physical character of the original and most likely varies with some of the func-
tional, environmental and serviceability factors.
H: Highest Level – Most closely duplicates the physical characteristic of the original and most probably complies with all
the functional, environmental and serviceability factors.
Class 3 Products must use procedures rated highest level unless it can be demonstrated that a lower level procedure will not
adversely affect the product’s functional characteristics. Class 2 and 1 Products should use procedures rated Highest level
for assured safety and dependability but Medium and Low Level procedures can be used if it has been determined that they
are suitable for the specific product’s functional characteristics.
14.1.4.8 Skill Level Skill levels will vary widely from technician to technician and from company to company. Therefore
it is recommended that technicians receive appropriate training for their assigned tasks.

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14.1.5 Applicability, Controls and Acceptability Although the terms modification, rework and repair may seem very
similar, applicability of such procedures may not be the same due to conditions and objectives involved. Procedures and
guidelines of this document may be used during manufacturing of products or to products that have failed after being placed
in use. In general, rework or repair controls during manufacturing are different from the controls applied to products that
fail after being placed in service.
When a defect or functional problem is discovered during the assembly process, a decision has to be made whether to rework
or repair the product, use it as is, or discard it. This decision is typically made by a Material Review Board (MRB) as dis-
cussed in various assembly standards. When a product fails after it has been placed in service, the term repair is commonly
applied to actions that restore operations. Unlike the manufacturing process, there is no Material Review Board to disposi-
tion the failed assembly. How that decision is made is beyond the scope of this document.
Whether by an MRB or another process, if a decision has been made to perform a corrective action, and that action involves
removing and replacing a failed component, the rework procedures in IPC-7711 will be applicable.
If a repair or modification action is needed, the procedures in IPC-7721 will provide guidance.
In principle any modification, rework or repair action taken on a product should reestablish the products original character,
‘‘Make it like it was.’’ Physical changes, obvious or otherwise, can adversely affect the products performance or capability
factors.
14.1.6 Basic Considerations

14.1.6.1 Appropriate Approvals When rework, repair, or modification of products is conducted during manufacturing,
appropriate approvals may be required. Unless prohibited by the customer, rework during manufacturing may usually be
performed without prior approval of the customer. Repair actions and modifications generally require prior approval by the
customer.

14.1.6.1.2 Singular Procedures Procedures are usually presented as individual methods. Multiple procedures may be
necessary to complete the task.

14.1.6.1.3 Quality Rework, repair, or modification of printed boards and assemblies should achieve the quality of the
original product.

14.1.6.1.4 Procedure Selection The procedure selected should be on the basis of optimum end product functionality. It
may be necessary to develop specific evaluation criteria depending on the product’s required functions and end use environ-
ment.

14.1.6.1.5 Patience To achieve best results, do not rush the process. Keep in mind that most of the cost for fabrication/
assembly has already been spent, but with care and patience, most of this cost can be salvaged.

14.1.6.1.6 Heat Application Incorrect heat application may cause severe damage to board materials, conductors, compo-
nents, conformal coatings and solder connections.

14.1.6.1.7 Removal of Coatings Coating should be removed from affected areas prior to processing. Coatings will inhibit
solder removal and adversely affect resoldering operations.

14.1.7 Workstations, Tools, Materials and Processes Modification, rework, and repair of PC boards and assemblies is
generally a highly labor intensive operation relying more on individual operator skills than on automation. The use of proper
tools and supplies, many unique to repair actions will often have a significant impact on the function and reliability of the
end product. To enhance the ease of the task at hand and to improve the potential for a successful operation, the following
tools, materials and processes may be required.

14.1.7.1 ESD/EOS Controls Refer to Section 2.2.2 for information about Electrostatic Discharge (ESD) damage preven-
tion. Refer to Section 2.2.1 for information about Electrical Overstress (EOS) damage prevention.

14.1.7.2 Vision Systems The small features in electronic assemblies and the precision needed require use of a vision
magnification system. Appropriate vision systems that provide depth perception, and working ranges of 3 to 30X magnifi-
cation, resolution, field of view and working distance are critical when performing rework, repair or modifications on the
miniature components, circuits, and assemblies. Refer to IPC-OI-645 Standard for Visual Optical Inspection Aids for more
information.

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14.1.7.3 Lighting The circuit assembly needs to be illuminated with sufficient light to see the features and color varia-
tions. A typical minimum acceptable lighting level is at least 1000 Lm/m2. In selecting a light source, the color temperature
of light is an important consideration. Light ranges from 3000-5000 degrees K enable users to differentiate various metal
alloys and contaminants. A black light assists in identifying flux residue and the presence of conformal coating.

14.1.7.4 Fume Extraction Portable fume extraction systems may be attached to soldering iron systems or placed on the
workstation to capture and filter fumes resulting from the assembly soldering process to protect employees from potentially
harmful gases and particulates.

14.1.7.5 Tools Precision soldering is important in today’s modification, rework and repair operations. Technicians may
need an assortment of special use soldering tools appropriate to the variety of tasks at hand. These tools must be tempera-
ture controlled, ESD/EOS safe, ergonomically designed and include a selection of tips to suit each particular operation.
These tools generally use conductive heating (by contact), convective heating (by hot gas) or infrared heating (by focused
infrared lamps).

14.1.8.6 Primary Heating Methods Primary heating methods are those principally responsible for achieving solder reflow
during a component installation or removal process. These are to be distinguished from methods used for preheating and
auxiliary heating which are employed in addition to primary heating methods.

14.1.8.6.1 Conductive (by contact) Heating Methods These heating methods may employ any of several heating tech-
nologies. For conductive heating methods to work effectively, the solder-iron tip must be clean and free of oxidation. For
that reason, the final action before contacting the any connection with a soldering iron is to clean the tip. (See procedure
2.8. of 7711, Part I)
Soldering Irons fall into one of three categories.
Fixed Temperature – Fixed temperature irons do not permit changing the tip temperature.
Selectable Temperature – Selectable temperature soldering irons permit operation at a preselected temperature. Selection of
the temperature is achieved by removal/replacement of an integrated part of the soldering system (soldering tip, temperature
control module, etc.). Typically a selectable temperature soldering iron offers temperature selection in 50 to 100 degree F
increments.
Variable Temperature – Variable Temperature soldering irons permit operation at any temperature within the control range
(typically 500 to 800 F degrees). Temperature change may be either digital or analog control.
Additional examples of conductive tools are:
Soldering Tweezers – common name for a tool that simultaneously uses two separate elements to achieve reflow solder con-
nection.
Soldering tweezers fall into one of two categories:
Thermal Tweezers – A tweezer handpiece that has each tweezer tip heated to a predetermined temperature. Thermal twee-
zers are typically used for removing SMT components from a PCB.
Resistive Tweezers – A tweezer handpiece that has a different electrical potential on each tweezer tip. Heating is achieved
by passing a high density electrical current between the tips (through the item being soldered). Resistive tweezers are typi-
cally used for solder cup terminals and similar components that will not be damaged by the voltage and current present in
the soldering iron.
Solder Pots/Fountains – The alloy type, contamination levels, and temperature need to be monitored to assure they are
compatible with the work being performed.

14.1.8.6.2 Convective (hot gas) and IR (radiant) Heating Methods Examples of convective tools are:
Hot Air Pencil – Common name for the handpiece used to deliver heated gas to connection elements to be soldered. Typi-
cally used to reflow solder paste, but can also be used with solder wire.
Hot Air Guns – Common name for the handpiece used to deliver heated gas to connection elements to be soldered, similar
in concept to the hot air pencil, but usually with greater thermal capacity.
Benchtop Convective – IR or a combination work stations.

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14.1.8.7 Preheating (Auxiliary) Heating Preheating printed board assemblies is sometimes recommended to avoid thermal
shock to temperature sensitive materials and components. Preheating also elevates the thermal mass of the assembly to allow
a rework process to proceed in an acceptable time. Preheating can be accomplished using either an oven, heat lamp, hot
plate, infrared or convective style heating system.
Preheating is required when there is a risk of thermal shock in the substrate, components or both. The goal is to ramp up
the assembly and/or component at an acceptably safe rate until it reaches a target temperature. The assembly (or compo-
nent) is then thermally soaked. This eliminates dangerous temperature gradients which could produce immediate damage,
degradation over time or reduction of reliability. The rate of ‘‘ramp up’’ can be critical. For example many ceramic chip
capacitor manufacturers have traditionally recommended that preheating occur at a rate of no greater than 2-4 degrees
C/second until a given minimum temperature is reached.
Preheating\auxiliary heating is also required when the primary heating method cannot bring all of the solder joints com-
pletely up to proper reflow temperature at all or in an acceptable period of time. This may be due to high mass components,
heat sinking by nearby portions of the substrate, circuit elements, and adjacent components. The goal is to bring the assem-
bly (or a portion thereof) up to a sufficient yet safe temperature at which the rate of heat sinking is low enough that the
primary heating device can affect proper solder reflow in an acceptable period of time. This process may also be used for
through-hole desoldering on heavy multilayer boards with internal ground planes.

14.1.8.8 Hand Held Drilling and Grinding Tool This tool is used for detailed drilling, milling or grinding operations (i.e.,
solder resist and conformal coating removal, grinding out burns or laminate defects, drilling out plated holes, cutting fine
pitch conductors etc.).

14.1.8.9 Precision Drill/Mill System For demanding projects that require the need to make very precise holes, slots,
groves etc., accurate depth control and high speed may be required. A precision drilling/milling system with fixturing to hold
the printed board assembly and an attached microscope may be advisable for those unusually demanding projects.

14.1.8.10 Eyelets and Eyelet Press System Solder plated copper eyelets and an eyelet press/setting tool to repair dam-
aged plated through holes may be required.

14.1.8.11 Gold Plating System Plating gold edge contacts or any metal surface requires the use of materials that may
have environmental and safety concerns and must be handled properly. The power applied to the plating surfaces must be
controlled accurately to expect reliable results. Plating systems typically include; a DC power supply with voltage and cur-
rent meters, plating anodes sized for gold edge contact plating, a solution tray to collect the solution runoff, a support for
the PC board and a tray to hold and store the various chemicals safely.

14.1.8.12 Tools and Supplies A wide assortment of hand tools including tweezers, various pliers, files, dental picks, cut-
ting tools and other common items are used for rework, repair and modification operations.

14.1.8.13 Materials The materials listed below are ‘‘generic’’ in nature. It is recommended that these materials are avail-
able and approved by your company. The use of certain materials includes some increased risk (fire, personnel safety, etc.)
and such materials should not be used unless appropriate safety precautions are enforced

14.1.8.13.1 Solder The procedures in this document are not specific to any alloy type and should be compatible with
commonly used tin-lead or lead-free alloys. When soldering on newly manufactured assemblies the same alloy type needs
to be used. When effecting repair of fielded assemblies, it may be impossible to determine the alloy type.
It is recommended that you look at drawings, labeling or any available documentation for the assembly to attempt to deter-
mine the correct alloy to use. When unknown and without other direction, the standard alloy used in your facility should be
used. IPC-1066 and IPC/JEDEC J-STD-609 (supersedes IPC-1066) are examples of standards used to identify the solder
alloys and coatings on the assembly.

14.1.8.13.2 Flux The type of flux used needs to be appropriate to the solder alloy/process being used, and compatible with
the cleaning and coatings on the assembly.

14.1.8.13.3 Replacement Conductors and Lands Replacement conductors and lands are available in various shapes,
sizes and thicknesses. They are commercially available, and normally fabricated from copper foil and plated with solder or
nickel and gold for edge contact repair. These conductors and lands are available with or without a dry film adhesive on the

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back. Adhesive backed conductors and lands are normally heat bonded to the board surface. Compatible replacement con-
ductors and features may also be salvaged from scrap Printed Circuit boards, if necessary.
14.1.8.13.4 Epoxy and Coloring Agents Many repair operations require the use of high strength, high temperature epox-
ies. For high temperature applications two-part epoxies offer the highest strength, thermal resistance and durability. It may
also be important to have resists or coloring agents so that you can restore the cosmetic appearance of the board. It is best
to cure the epoxies in an oven if possible.
14.1.8.13.5 Adhesives The type of adhesive used needs to be appropriate to the purpose of the adhesive, whether for
thermal management or for attachment of an item such as a heat sink, replacement land/conductor, and jumper wires, etc.
Issues that need to be considered are shelf life of the material, mixing ratios, working life, curing, and compatibility with
cleaning and coating processes that may be required.

14.1.8.13.6 General Any consumables such as wicking braid, wipes and other items listed in the procedures need to be
compatible with the process.

14.1.8.14 Process Goals and Guidelines The process of component replacement involves three basic procedures. These
are component removal, land preparation and component installation. Depending on PCA configuration, conformal coating
removal and replacement may also be required.
The goals of a repair/rework process are:
Nondestructive Process – During any assembly or rework process, no damage or degradation should occur to the board
(both substrate and circuit elements), adjacent components, and the component to be installed or removed. This damage may
be either mechanical, thermo/mechanical or purely thermal in nature and may result in either immediate failure, degradation
in performance over time (latent failure) or a reduction in reliability. EOS/ESD damage must also be avoided by employ-
ing proper work procedures, work stations and equipment controls.
Controllable, Reliable and Repeatable Process – The process can be employed, and when necessary, modified by a trained
operator in a repetitive fashion with consistently acceptable results.
Process Appropriate to Particular Application – The process (or modification thereof) employed is appropriate to the par-
ticular application based on the relevant guidelines described below.
Operator Friendly Process – An operator of average ability can, with proper training and practice, become acceptably pro-
ficient in employing, and when required, modifying the process to suit any particular requirements of a given task.
Efficient Process – The process can be done repeatedly in a production environment quickly and easily at minimal costs
with little or no down-time. Set-up and training time must also be minimal.

14.1.8.14.1 Nondestructive Component Removal Each rework-modification-repair procedure has certain advantages and
precautions. These depend on the particular operation/device/material (lead/terminations design, size, body material, etc.)
component mounting site (adjacent components, access, substrate type, thermal mass, etc.) and the skill level of the opera-
tor. Some procedures depicted in this document may not be applicable to all termination styles.
14.1.8.14.1.1 Surface Mount Components Removal
• Pre-/auxiliary heat assembly and/or component if required.
• Evenly apply heat in a rapid, controllable fashion to achieve complete, simultaneous reflow (melt) of all solder joints.
• Avoid thermal and/or mechanical damage to component, board, adjacent components and their joints.
• Immediately remove component from board before any solder joint resolidifies.
• Prepare lands for replacement component
14.1.8.14.1.2 Through-Hole Components
• Desolder component one joint at a time using vacuum method:
• Pre-/auxiliary heat assembly and/or component if required.
• Heat joint in a rapid, controllable fashion to achieve complete solder reflow.
• Avoid thermal and/or mechanical damage to component, board, adjacent components and their joints.
• Apply vacuum during lead movement to cool joint and free lead.
• Inspect barrel and land for damage.

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14.1.8.14.1.3 Component Removal using Solder Fountain

1. Reflow all joints in solder fountain.
2. Remove old component and either immediately replace with new component, or clear through holes for component
replacement later.
NOTE: Copper dissolution is a concern when using a solder fountain and can be impacted by dwell time, temperature and
alloy in use.

14.1.8.14.2 Component Installation

14.1.8.14.2.1 Land Preparation Land Preparation needs to be performed prior to the installation/replacement of a new
component. Avoidance of thermal and/or mechanical damage to the land and substrate is critical.
1. Remove Old Solder – This may per performed with a soldering iron and braided solder wicking material, or with a con-
tinuous vacuum desoldering technique employing a solder extractor and tip which allows reflow and vacuum aspiration
of the older solder to occur continuously.
2. Clean Lands – Old flux residues leftover after the removal of old solder are cleaned in this step prior to adding new
solder.

14.1.8.14.2.2 Surface Mount Components

1. Prefill lands with solder (preforms, wire or paste).
2. Align and place component to lands (tack if necessary).
3. Apply solder paste to lead/land area if not applied prior to component placement.
4. Pre-/auxiliary heat assembly and/or component if required.
5. Predry applied solder paste.
6. Reflow solder joints (individually, in groups or all together) with concentrated ‘‘targeted’’ heat in a rapid, controllable
manner while maintaining lead/land alignment. Joints should remain at target temperature (above melting point of solder
alloy) for proper time to achieve optimal intermetallic formation.
7. Avoid thermal and/or mechanical damage to component, board, adjacent components and their joints.
8. Clean and inspect.

14.1.8.14.2.3 Through-Hole Components

1. Insert new component into board.
2. Pre-/auxiliary heat assembly and/or component if required.
3. Solder joints (individually, in groups or all together) with concentrated ‘‘targeted’’ heat in a rapid, controllable manner.
Joints should remain at target temperature (above melting point of solder alloy) for proper time to achieve optimal inter-
metallic formation.
4. Avoid thermal and/or mechanical damage to component, board, adjacent components and their joints.
5. Clean and inspect.

14.1.8.15 Cleaning Station/System Regardless of the Class of Product serviced, a cleaning system that is chemically
matched to the flux system(s) in use will be essential to a satisfactory repair. In organizations that perform procedures on
Class 3 Products, it may also be necessary to have a cleanliness test system in order to periodically evaluate the ability of
the cleaning system to meet the requirements/expectations of the user. Interim or in-process cleaning at the workstation
should be used pending completion of the procedure and the final cleaning. Common Procedure section in this document is
an example.

14.1.8.16 Component Removal and Installation The variety of large and small components requires an array of special
use tools and methods for safe, efficient component removal. These tools generally use conductive heating (by contact),
convective heating (by hot gas) or infrared heating (by focusing infrared lamps).

14.1.8.17 Conformal Coating Area The cost, safety concerns and utility services (air pressure/vacuum, power, venting,
UV illuminations, etc.) of equipment associated with both the removal and application of conformal coating suggest too
many organizations that one central conformal coating and encapsulant area be installed.

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14.1.8.18 Selecting a Process The process for rework or repair is dependent upon a variety of factors, in addition to cost
of tools and training. Every process and its associated equipment have advantages and precautions in a particular compo-
nent installation or removal situation. These include:
1. Type of component
– lead (termination) type
– body composition
2. Component size
3. Moisture sensitivity level of component
4. Type of substrate (FR-4, ceramic, etc.)
5. Component mounting site
– thermal mass considerations
– adjacent components
– accessibility of component or joints
6. Whether the component is being installed or removed
7. Whether the component being removed must be salvaged
8. Applicable workmanship specifications
9. EOS/ESD control requirements

14.1.8.19 Time Temperature Profile (TTP) To ensure acceptable results of the rework procedure, it is critical to establish
a time temperature profile for the process.
NOTE: The time temperature profile is dependent, in part on ambient relative humidity. Relative humidity variations of
greater than plus or minus 15% from those prevailing when the TTP was established may require modification of the pro-
cedure defined during TTP.

The following steps are suggested to achieve an acceptable TTP:

1. Select a preheat temperature for both the component and the assembly. (The components, whether ceramic and plastic,
need to be preheated, as does the assembly.)
NOTE: If plastic body or tape bodied components are used, see IPC J-STD-033 Handling, Packing, Shipping and use
of Moisture/Reflow Sensitive Surface Mount Devices for information on handling of moisture sensitive components.
2. Solder paste characteristics must be identified including viscosity, thixotropy, rheology, deposition thickness, and drying
time/temperature; or if using flux cored wire, land prefill solder quantity and prefill co planarity required.
3. Define a cleaning procedure which will meet the end item cleanliness requirements of the customer.
4. Confirm through destructive physical examinations and/or x-ray analysis that the process defined will yield a BGA
attachment which meets any quality requirements imposed. 5.
Define, if used, an accelerated cooling system which does not exceed thermal gradient limits of the most sensitive compo-
nent of the assembly.

14.1.9 Lead Free The rework of circuit boards assembled using lead free solders is similar to common alloys except as
noted below. Generally all that is needed is to understand those differences. The procedures in this document are not spe-
cific to any alloy type and should be compatible with most commonly used tin-lead or lead-free alloys. (See 14.1.8.13.1.)
Those differences are:
1. Lead-free alloys have a higher liquidus (or melting) temperature than traditional tin-lead solder alloys. Therefore, lead-
free alloys may require different dwell times and temperatures to create an acceptable solder connection.
2. Lead-free alloys may require different fluxes and special cleaning processes.
3. Wetting times are generally extended.
4. Solderability indicators such as wetting angles, joint appearance, etc., will generally be different.
5. Higher temperatures and longer dwell times will increase oxidation.
6. Component lead frames as well as circuit board finishes must be compatible with the solder alloy.

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7. Using alternative means of attachment for rework/repair (such as conductive epoxies) may be advantageous due to tem-
perature and other considerations.
8. For both conductive and convective assembly rework/repair, use the inert atmosphere (such as nitrogen) should be con-
sidered to facilitate the process.
14.2 Handling Electronic Assemblies - See Chapter 2 of this document.

14.3 Cleaning - See Chapter 11 of this document.

14.4 Coating Removal

14.4.1 Coating Removal, Identification of Conformal Coating To determine the appropriate coating removal procedure
the coating must first be identified. During original manufacture the specific coating is usually known. Consequently, the
coating removal methods can usually be specified and based on the known coatings being used. Labels conforming to Stan-
dards such as IPC-1066 (superseded by IPC/JEDEC J-STD-609) and IPC/JEDEC J-STD-609 may be present on the assem-
bly to identify the coating material. When identification of the coating is not available, simple observation and testing will
help identify the coating characteristics so that the proper removal procedure can be specified. See Table 14-1 for Confor-
mal Coating Characteristics. See Table 14-2 for Conformal Coating Removal Methods.
Table 14-1 Conformal Coating Characteristics
Conformal Coating Type
Characteristics Epoxy Acrylic Polyurethane Silicone Resin Paraxylyene
Hard X X X
Medium Hard X X
Soft X X
Heat Reaction X X X
Surface Bond-Very Strong X X X
Surface Bond-Strong X X
Surface Bond-Medium X X
Surface Bond-Light X
Solvent Reaction X
Non-porous Surface X X X X
Glossy Surface X X X
Semi-glossy Surface X X
Dull Surface X
Rubbery Surface X
Brittle X X
Chips X X
Peels and Flakes X X X
Stretches X X
Scratch, Dent, Bend, Tear X X X

Table 14-2 Removal Method

2.3.5 2.3.6
Conformal 2.3.2 2.3.3 2.3.4 Grinding Scraping Micro Blasting
Coating Solvent Method Peeling Method Thermal Method Method Method
Paraxylyene 1 2 3
Epoxy 1 2 3
Acrylic 1 2 3 4
Polyurethane 3 1 2 4
Silicone Thin 1 2 3 4
Silicone Thick 1 2
NOTE: The preferred order for applying removal methods to specific coatings is numerically indicated. These removal methods are listed in ascending order.
More than one method may be required.

NOTE: The generic or commercial identification of the coating material is not necessary to accomplish coating removal.

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1. Hardness – Perform penetration test in a non-critical area to determine relative hardness. The harder the coating the more
suitable it is to pure abrasive techniques. The softer and gummier the coatings the more suitable to the brushing removal
procedures.
2. Transparency – Obviously transparent coatings are usually more suitable for removal than the opaque type. Removal
methods used with opaque coatings must be far more controllable and less sensitive to damaging the covered compo-
nents and printed board surfaces and are usually slower.
3. Solubility – Most coatings are soluble; however, the solvent required to dissolve a specific coating may also attack the
board and/or components. Unless directed by other maintenance actions, the solubility test and solvent use should be lim-
ited to isopropyl alcohol. Test coat the surface in a noncritical area by brushing on a small quantity and observing the
solubility action.
CAUTION: Printed board assemblies should not be immersed in harsh solvents.
4. Thermal Removal – Use a thermal parting device with controlled heating and without a cutting edge to determine
whether the coating can be thermally removed. Start with a low temperature, approximately 100 °C, and increase the
temperature until the coating is removed. If the coating flows or gums up the temperature is too hot or the coating is not
suitable for thermal removal.
5. Strip-ability – Carefully slit the coating with a sharp blade in a non-critical area and try to peel back from the surface to
determine if this method is feasible. Due to the adhesion required of coating materials, a strippable technique without
chemical aids is usually very limited.
6. Thickness – Coating thickness is determined by visual inspection. Thin coatings show sharp outlines of the components
and almost no fillet at intersection points of part leads to the circuit board. Thick coatings reduce these sharp outlines and
show fillets where part leads intersect with the board. Coatings thinner than 0.064 cm [0.025 in] are considered thin.
Coatings thicker than 0.064 cm [0.025 in] are classed as thick. The specific coating to be removed may have one or more
of these characteristics and consequently the removal method selected should consider the composite characteristics.

14.4.2 Coating Removal, Solvent Method This procedure uses a solvent to remove surface coatings. This procedure can
be used for spot or overall coating removal of conformal coatings or solder resists. Approved solvents may be used to
remove specific soluble type coatings on a spot basis by brushing or swabbing the local area with the controlled application
of solvent until the area is free of the coating material. If warranted, all the soluble type coating can be removed by immers-
ing and brushing the entire printed board or printed board assembly. To determine the appropriate coating removal proce-
dure the coating must first be identified.

NOTE: Coating removal may require the use of one or more methods.

CAUTION: Determine, on a module by module basis, the hazards to parts, etc., by short term immersion in the removal
solvents. If chloride based or other harsh solvents are used, extreme care must be exercised to prevent damage to base mate-
rial, component parts, plated-through holes, and solder joints. Some solvent coating removal methods can cause expansion
or swelling of the base material which can degrade the printed board or printed board assembly. Under no circumstances
should these solvents be used except in a closely controlled process. It is recommended that the printed board or printed
board assembly be inspected to ensure that no damage has occurred. Before using any solvent refer to Material Safety Data
Sheets.

PROCEDURE – LOCAL SPOT REMOVAL

1. Apply Polyimide tape to outline the area where the coating needs to be removed.
2. Dip the end of a foam swab in stripping solution and apply a small amount to the area of coating to be removed. As an
alternative, a small cotton patch can be cut to the size of the area masked saturated with the stripping solution, and
pressed into intimate contact with the surface of the coating to be removed. The patch will retard the evaporation of cer-
tain solvents and reduce exposure time.
NOTE: Since various substances may be used as coatings, the time required for a given coating to dissolve or soften will
vary. Reapply solvent several times as most solvents evaporate rapidly.
3. Rub the treated surface carefully with a brush or wood stick to dislodge the coating. A wedge shaped applicator tip, knife,
or heated blade may be effective in removing some coatings, particularly polyurethanes.
4. Neutralize or clean the stripped area and dry.

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PROCEDURE – OVERALL REMOVAL

1. A single step for removal of all the coating may be completed by providing a continuous flow of solvent. Alternately,
process the board in a series of tanks containing mild solvent, starting with a high contamination tank and progressing
sequentially to a final, fresh solvent tank.
2. Neutralize or clean the stripped area and dry.

14.4.3 Coating Removal, Peeling Method This peeling removal method for coating can be used only under special cir-
cumstances. Normally this method is used to remove RTV silicone or other thick rubbery like coating materials. The coat-
ing material is removed using a dull knife or otherwise dull blade to slit the coating material and to peel it off the printed
board or printed board assembly. To determine the appropriate coating removal procedure the coating must first be identi-
fied. Refer to procedure number 2.3.1.
NOTE: This method is limited to coatings that are rubbery in nature to allow the coating material to be slit into small sec-
tions and peeled off the printed board assembly.

14.4.4 Coating Removal, Thermal Method This coating removal procedure uses a controlled, low temperature, localized
heating method for removing thick coatings by an over-curing or softening means. Two methods are covered. The first
method uses various shaped, temperature controlled tips, with dull edges to soften and remove the coating. The second
method uses a localized controlled jet of hot air or inert gas to soften the coating material which is pushed away or removed
by a non-marring tool. These methods do not burn or char either the coating or printed board.
CAUTION: Soldering irons should not be used for coating removal as their high operating temperatures will cause the
coatings to char and possibly delaminate the printed board base material. The use of thinned down soldering iron tips or
soldering iron heated thin cutting blades are not recommended since they do not provide controlled heating and may pres-
ent dangerous sharp edges to the assembly surface. To determine the appropriate coating removal procedure the coating must
first be identified.

Thermal Parting Tip

1. Select an appropriate thermal parting tip to suit the workpiece configuration. Set the nominal tip temperature, using the
manufacturer’s recommended procedure.
2. Apply the thermal parting tip to the coating, using a light pressure. The coating material will either soften or granulate.
Polyurethanes will soften and epoxies will granulate. The tip temperature should be regulated to a point where it will
effectively ‘‘break down’’ the coating without scorching or charring.
3. Gradually reduce the coating thickness around the component body without contacting the board surface. Remove as
much coating as possible from around component leads to allow easy removal of the leads. Clip leads of component parts
that are known to be faulty, thus permitting removal of the part body separately from leads and solder joints. Low pres-
sure air or a brush should be used to remove the loosened coating.
4. Once sufficient coating has been removed, leaving only a small bonded joint between the part body and printed board,
heat the component body with the thermal parting tool or hot air jet to weaken the bond beneath the component.
5. Lift the component body free of the printed board using small pliers.
NOTE: Twist the component prior to removal to shear any remaining epoxy bond to the printed board surface.
6. Once the component body has been removed from the board surface, the remaining coating material can be removed by
additional thermal parting. The remaining leads and solder joints are then removed by appropriate solder extraction
means.

Hot Air Method

By control of the gas/air temperature, flow rates and jet shape, the hot air method can be applied to almost any workpiece
configuration on both the component and solder side of the printed board without damage. Extremely delicate work can be
handled in this manner while permitting direct observation of the heating action.
1. Set up the hot air tool per the manufacturer’s instructions. Adjust flow rate and temperature to suit specific coating
removal application.
CAUTION: Never set the gas/air temperature at a level that will cause scorching or charring of the coating material or
reflow the solder connections.

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2. Apply the heated air jet to work area. Apply light pressure using a wood stick or other non-marring tool to remove the
softened or over-cured coating. All coating around individual leads, solder joints and component bodies can be removed
in this manner.
3. When the coating has been removed, use appropriate solder extraction method to remove components if needed.

14.4.5 Coating Removal, Grinding/Scraping Method This coating removal method uses various grinding and scraping
tools, depending on the composition of the coating material. A knife or dental style scraper is normally used when a scrap-
ing method is desired. A hand held drill is normally used when a grinding technique is desired. A wide variety of rotary
abrasive materials including ball mills may be required. To determine the appropriate coating removal procedure the coat-
ing must first be identified.
Scraping
1. Clean the area.
2. Remove the damaged or unwanted coating or solder resist using a knife or scraper. Hold the blade perpendicular to the
coating and scrape from side to side until the desired material is removed. 3.
Remove all loose material and clean the area.

Grinding
1. Clean the area.
2. Insert an abrasive tip into the hand held drill. Abrade away the damaged or unwanted coating. Move the tool from side
to side to prevent damage to the printed circuit board surface.
3. Remove all loose material and clean the area.
NOTE: Rubberized abrasives of the proper grade and grit are ideally suited for removing thin hard coatings from flat sur-
faces but not for soft coatings since these would cause the abrasive to ‘‘load up’’ with coating material and become ineffec-
tive. Rotary brushes are better suited than rubberized abrasives on contoured or irregular surfaces, such as soldered connec-
tions, etc., since the bristles will conform to surface irregularities while removing hard or soft coatings.
NOTE: The procedure for removing thick coatings is primarily to reduce their thickness to a thin coating and then to
remove the remaining thin coating by the scraping method.

14.4.6 Coating Removal, Micro Blasting Method This coating removal method uses a micro abrasive blasting system and
a very fine soft abrasive powder. The powder is propelled through a small nozzle toward the area where the coating needs
to be removed. To determine the appropriate coating removal procedure the coating must first be identified.
CAUTION: Micro blasting will generate substantial static charges. The work area should be flooded with ionized air and
the printed circuit board assembly should be grounded whenever possible.
1. Clean the area.
2. Select the appropriate abrasive blasting powder and nozzle size. Set the air pressure at the desired setting per equipment
manufacturer’s instructions.
3. Apply polyimide tape or other masking material to protect the printed wiring board surface as needed. Masking materi-
als can consist of tapes, curable liquid masks or reusable stencils.
4. If the printed circuit board has static sensitive components, insert the entire printed circuit board into a shielded bag. Only
the area needing rework should be exposed. Ground the printed circuit board to dissipate static charges if needed.
5. Insert the printed circuit board into the blasting chamber and blast away the damaged or unwanted coating or solder resist.
Slowly move the nozzle along the area where the coating is to be removed.
6. Blow off the blasting dust and clean the area.

14.5 Replacment of Conformal Coating

14.5.1 Coating Replacement, Solder Resist This method is used to replace solder resist or coatings on printed wiring
boards. Most replacement coatings can be applied by dipping, brushing or spraying.
1. Clean the area.
CAUTION: Surfaces to be coated must be thoroughly cleaned prior to coating to ensure adequate adhesion, minimized
corrosion, and optimized electrical properties.

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2. If needed, apply Polyimide tape to outline the area where the solder resist will be applied.
3. Mix the epoxy or replacement coating. If desired, add color agent to the mixed epoxy to match the printed circuit board
color.
4. Apply the replacement coating to the board surface as required. A brush or foam swab may be used to apply and spread
the epoxy or replacement coating.
5. Cure the replacement coating per the manufacturer’s instructions.
CAUTION: Some components may be sensitive to high temperature.

14.5.2 Coating Replacement, Conformal Coatings/Encapsulants This method is used to replace conformal coatings and
encapsulants on printed circuit boards.
1. Clean the area.
CAUTION: Surfaces to be coated must be thoroughly cleaned prior to coating to ensure adequate adhesion, minimized
corrosion, and optimized electrical properties.
2. If needed, apply Polyimide tape to outline the area where the coating will be applied.
3. If required, bake the printed circuit board prior to the application of the replacement coating.
4. Mix the replacement coating.
5. Apply the replacement coating to the board surface as required. A brush or foam swab may be used to apply and spread
the replacement coating. For large surfaces, apply the replacement coating with foam swab to create a texture.
6. Cure the replacement coating per the manufacturer’s instructions.
CAUTION: Some components may be sensitive to high temperature.

14.6 Conditioning – Baking and Preheating This procedure covers baking and preheating of printed boards and printed
board assemblies to prepare the product for the subsequent operations. Included are steps for:
A. Baking – Baking is used to eliminate absorbed moisture. Whenever possible, printed circuit boards and printed circuit
board assemblies should be baked prior to soldering, unsoldering, and coating operation to prevent blistering, measling,
or other laminate degradation.
B. Preheating – Preheating is used to promote the adhesion of subsequent materials to the board surfaces and to raise the
temperature of the printed wiring board to allow soldering and unsoldering operations to be completed more quickly.
CAUTION: Baking and preheating procedures must be carefully selected to ensure that temperature and time cycles used
do not degrade the product. Environmental conditions must also be carefully considered to ensure that vapors, gases, etc.,
generated during the heating process do not contaminate the product’s surfaces.
CAUTION: To prevent fluxes or other contaminates from being baked onto the board surface, thoroughly clean the board
or assembly prior to baking or preheating.

14.7 Epoxy Mixing and Handling This procedure covers epoxy mixing and handling. The epoxy covered by this proce-
dure has multiple uses including solder resist repair, base board repair, circuitry over-coating and delamination repair.
NOTE: For high strength or high temperature applications two part epoxies will generally have the best properties.
Printed Wiring Board Preparation
The area where the epoxy is to be applied should be prepared prior to mixing the epoxy. This preparation may include pre-
heating the affected area to improve absorption of the applied epoxy. The entire printed wiring board may also be heated in
an oven or with a heat lamp.

CAUTION: Some components may be sensitive to high temperatures. Avoid skin contact with epoxy materials.

Prepackaged Two Part Epoxy

1. Remove the clip separating the resin and activator. Mix by squeezing both halves together with your fingers. Mix for at
least one minute to ensure a complete mix of the resin and activator.
2. Cut open one end of the epoxy tube and squeeze the contents into a mixing cup. Mix again with a mixing stick to ensure
a thorough mixture of the resin and activator.

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NOTE: For bubble free epoxy, remove the clip separating the resin and activator. Cut open one end of the Epoxy tube and
squeeze the contents into a mixing cup. Slowly stir the mixture with the mixing stick. Be sure to stir the mixture for at least
2 minutes to ensure that all the resin and activator have completely mixed.
3. If needed, add color agent to the mixed epoxy. Stir slowly to prevent bubbles.
CAUTION: Be sure the color agent is compatible with the epoxy mixture.
4. Apply or use as needed.
5. Cure the epoxy per the manufacturer’s recommendations.

14.8 Legends/Markings This method can be used to add, change or replace legend and markings on printed boards or
printed board assemblies. This method uses epoxy ink and an ink stamp to place the legends on the printed board surface
in much the same manner as taking a ‘‘finger print.’’

14.8.1 Stamping Method

1. Clean the area.
2. Scrape off any remaining character or legend with a knife and clean the area.
CAUTION: Abrasion operations can generate electrostatic charges.
3. Select the appropriate characters from the peg stamp set or have a special stamp made up.
4. Mix the epoxy ink. White is the most common color. Spread a thin even coating of the epoxy ink on the ink plate or on
a smooth surface.
5. Gently press the peg stamp into the epoxy coating to coat the character surface.
6. Gently press the peg stamp onto the desired location on the printed wiring board surface.
7. Cure the epoxy ink per the manufacturer’s instructions.

14.8.2 Hand Lettering This method can be used to add, change or replace legend and markings on printed boards or
printed board assemblies. This method uses epoxy ink and a pen to hand letter the legends on the printed board surface.
1. Clean the area.
2. Scrape off any remaining character or legend with a knife and clean the area.
CAUTION: Abrasion operations can generate electrostatic charges.
3. Mix the epoxy ink. White is the most common color.
4. Sharpen a wood stick and dip the pointed end into the epoxy ink. Hand letter the legend or markings as needed
5. Cure the epoxy ink per the manufacturer’s instructions.

14.8.3 Stencil Method This method can be used to add, change or replace legend and markings on printed boards or
printed board assemblies. This method uses epoxy ink and a brush or roller technique. A stencil is used to outline the char-
acters.
1. Clean the area.
2. Scrape off any remaining character or legend with a knife and clean the area.
CAUTION: Abrasion operations can generate electrostatic charges.
3. Select the appropriate stencil or have a special stencil made up.
4. Mix the epoxy ink. White is the most common color. Spread a thin even coating of the epoxy ink on the ink plate or on
a smooth surface.
5. Position the stencil on the printed circuit board surface and hold in place firmly.
6. Roll or brush the ink onto the stencil. Do not smudge characters or apply excess ink.
7. Cure the epoxy ink per the manufacturer’s instructions.

14.9 Tip Care and Maintenance When hand soldering, proper tip care is essential to not only help increase the life of the
tip, but to insure that the best possible connections are being created. Improper tip care or practices can lead to cold solder
joints, thermal shock to the board and components, and cause damage to the pads or PCB laminate.

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The following actions will help to form acceptable solder connections and extend the life of soldering tools.
• Select the lowest possible tip temperature, temperature module or other control method that allows the operator to success-
fully reflow solder in the connection being formed.
• High temperatures and incorrect use reduce tip life.
• Tips should be cleaned and tinned before replacing in the holder.
• Select a tip geometry that fits the component leads and pads being soldered. The tip geometry chosen should provide the
greatest amount of contact area with the land and lead to reduce dwell time while forming the connection.
• Soldering tool tip cleaning practices:
– Quickly wiping hot solder tips on a clean, slightly damp, sulfur-free sponge will thermally shock the tip, causing steam
generated in the wiping process to remove oxidation. This should not be used to clean or remove excess solder from the
tip.
– Deionized water should be used to slightly dampen the sponge. Tap water may introduce chemicals and contamination
to the tip and ultimately affect the solder connection.
– Dirty sponges should be safely discarded as they may have gathered chemicals, lead-bearing alloys or other substances
sometimes considered hazardous.
– Brass brushes and coiled brass wire maybe used to remove excess solder and other contamination prior to wiping on a
damp sponge.
• Use as little force as possible when soldering. Friction causes the tips to wear.
• The more a tip is used, the greater the wear.
• Soldering systems should be turned off when not in use, especially if there is no automatic idle-down when the handpiece
is placed in a holder. A good guideline is to turn soldering systems off when they are not expected to be used for a period
of at least 10 minutes.
• Feed solder to the connection; it should not be fed directly to the tip.
• Tips should not be used as levers, pry bars or screwdrivers as this will crack the plating, reduce life of the tip and will
even cause some kinds of tips to stop operating. Bending a tip with pliers will also damage the plating and cause the tip
to fail. If the tip is a cartridge type tip remove it with the manufacturer’s recommended tool. Pliers and other inappropri-
ate tools can damage the internal circuitry of the tip cartridge.

14.10 IPC-7711 Rework Procedures The following are the rework procedures as portrayed in the IPC-7711 Standard:
3.0 Through-hole Removal
3.1 Through-hole desolder
3.1.1 Continuous Vacuum removal Method
3.1.2 Continuous Vacuum - Partial Clinch
3.1.3 Continuous Vacuum - Full Clinch
3.1.4 Full Clinch Straightening Method
3.1.5 Full Clinch Wicking Method
3.2 PGA and Component Removal
3.2.1 Solder Fountain Removal Method
3.3 Chip Component Removal
3.3.1 Bifurcated Tip
3.3.2 Tweezer Method
3.3.3 Bottom Termination-Hot Air
3.4 Leadless Component Removal
3.4.1 Solder Wrap Method
3.4.2 Flux Application Method
3.4.3 Hot gas (Air) Reflow Method
3.5 SOT Removal
3.5.1 Flux Application Method
3.5.2 Flux Application Tweezer Method
3.5.3 Hot Air Pencil Method

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3.6 Gullwing Removal (Two-Sided)

3.6.1 Bridge Fill Method
3.6.2 Solder Wrap Method
3.6.3 Flux Application Method
3.6.4 Bridge Fill Method - Tweezer
3.6.5 Solder Wrap Method - Tweezer
3.6.6 Flux Application Method - Tweezer
3.7 Gullwing Removal (Four-Sided)
3.7.1 Bridge Fill Method - Vacuum Cup
3.7.1.1 Bridge Fill Method - Surface Tension
3.7.2 Solder Wrap Method - Vacuum Cup
3.7.2.1 Solder Wrap Method - Surface Tension
3.7.3 Flux Application Method - Vacuum cup
3.7.3.1 Flux Application Method - Surface Tension
3.7.4 Bridge Fill Method - Tweezer
3.7.5 Solder Wrap Method - Tweezer
3.7.6 Flux Application Method - Tweezer
3.7.7 Hot Gas Reflow Method
3.8 J-Lead Removal
3.8.1 Bridge Fill Method - Tweezer
3.8.1.1 Bridge Fill Method - Surface Tension
3.8.2 Solder Wrap - Tweezer
3.8.2.1 Solder Wrap Method - Surface Tension
3.8.3 Flux Application Method - Tweezer
3.8.4 Flux & Tin Tip Only
3.8.5 Hot Gas Reflow System
3.9 BGA/CSP Removal
3.9.1 Hot Gas Reflow System
3.9.2 Vacuum Method
3.10 PLCC Socket Removal
3.10.1 Bridge Fill Method
3.10.2 Solder Wrap Method
3.10.3 Flux Application Method
3.10.4 Hot Air Pencil Method
4.0 Pad/Land Preparation
4.1.1 Surface Mount Land Preparation - Individual Method
4.1.2 Surface Mount Land Preparation - Continuous Method
4.1.3 Surface Solder Removal - Braid Method
4.2.1 Pad Releveling - Using Blade Tip
4.3.1 SMT Land Tinning - Using Blade Tip
4.4.1 Cleaning SMT Lands - Using Blade Tip and Using Solder Braid
5.0 Installation
5.1 Install following the requirements of J-STD-001 and J-HDBK-001
5.2 PGA and Connector Installation
5.2.1 Solder Fountain Removal Method with PTH Prefilled
5.3 Chip Installation
5.3.1 Solder Paste Method
5.3.2 Point-to-Point Method
5.4 Leadless Component Installation
5.4.1 Hot Gas (Air) Reflow Method
5.5 Gull Wing Installation

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IPC-AJ-820A February 2012

5.5.1 Multi-Lead Method - Top of Lead

5.5.2 Multi-Lead Method - Toe Tip
5.5.3 Point-to-Point Method
5.5.4 Solder Paste Method/Hot Air Pencil
5.5.5 Hook Tip w/Solder Wire Layover
5.5.6 Blade Tip with Wire
5.6 J-Lead Installation
5.6.1 Solder Wire Method
5.6.2 Point-to-Point Method
5.6.3 Solder Paste Method/Hot Air Pencil
5.6.4 Multi-lead Method
5.7 BGA/CSP Installation
5.7.1 Using Solder Wire to Prefill Lands
5.7.2 Using Solder Paste to Prefill Lands
5.7.3 BGA Reballing Procedure -Fixture Method
5.7.4 BGA Reballing Procedure - Paper Carrier Method
5.7.5 BGA Reballing Procedure - Polyimide Stencil Method
6.0 Removing Shorts
6.1 Removing Shorts
6.1.1 J-Leads - Draw Off Method
6.1.2 J-Leads - Respread Method
6.1.2.1 J-Leads - Braid Method
6.1.3 Gull-Wing - Draw Off Method
6.1.4 Gull-Wing - Respread Method
6.1.4.1 Gull-Wing - Braid Method

14.11 IPC-7721 Modification and Repair The following are the rework procedure numbers as portrayed in the IPC-7721
Standard:
3.0 Blisters and Delamination
3.1 Delamination/Blister Repair, Injection method
3.2 Bow and Twist Repair
3.3 Hole Repair
3.3.1 Hole Repair, Epoxy Method
3.3.2 Hole Repair, Transplant Method
3.4 Key and Slot Repair
3.4.1 Key and Slot Repair, Epoxy Method
3.4.2 Key and Slot Repair, Transplant Method
3.5 Base Material Repair
3.5.1 Base Material Repair, Epoxy Method
3.5.2 Base Material Repair, Area Transplant Method
3.5.3 Base Material Repair, Edge Transplant Method
4.1 Lifted Conductors
4.1.1 Lifted Conductor Repair, Epoxy Seal Method
4.1.2 Lifted Conductor Repair, Film Adhesive Method
4.2.1 Conductor Repair, Foil Jumper, Epoxy Method
4.2.2 Conductor Repair, Foil Jumper, Film Adhesive Method
4.2.3 Conductor Repair, Welding Method
4.2.4 Conductor Repair, Surface Wire Method
4.2.5 Conductor Repair, Through Board Wire Method
4.2.6 Conductor Repair, Modification, Conductor Ink Method
4.2.7 Conductor Repair, Inner Layer Method

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February 2012 IPC-AJ-820A

4.3 Conductor Cut

4.3.1 Conductor Cut, Surface Conductors
4.3.2 Conductor Cut, Inner Layer Conductors
4.3.3 Deleting Inner Layer Connection at a Plated Hole, Drill Through Method
4.3.4 Deleting Inner Layer Connection at a Plated Hole, Spoke Cut Method
4.4 Lifted Land Repair
4.4.1 Lifted Land Repair, Epoxy Method
4.4.2 Lifted Land Repair, Film Adhesive Method
4.5 Land Repair
4.5.1 Land Repair, Epoxy Method
4.5.2 Land Repair, Film Adhesive Method
4.6 Edge Contact Repair
4.6.1 Edge Contact Repair, Epoxy Method
4.6.2 Edge Contact Repair, Film Adhesive Method
4.6.3 Edge Contact Repair, Plating Method
4.7 Surface Mount Pad Repair
4.7.1 Surface Mount Pad Repair, Epoxy Method
4.7.2 Surface Mount Pad Repair, Film Adhesive Method
4.7.3 Surface Mount, BGA Pad Repair, Film Adhesive Method
5.0 Plated Hole Repair
5.1 Plated Hole Repair, No Inner Layer Connection
5.2 Plated Hole Repair, Double Wall Method
5.3 Plated Hole Repair, Inner Layer Connection
5.4 Plated Hole Repair, No Inner Layer Connection, Clinched Jumper Wire Method
6.0 Jumpers
6.1 Jumper Wires
6.2 BGA Jumpers
6.2.1 Jumper Wires, BGA Components, Foil Jumper Method
6.2.2 Jumper Wires, BGA Components, Through Board Method
6.3 Component Additions
6.3.1 Component Modifications and Additions
7.1 Flexible Conductor Repair
7.1.1 Flexible Conductor Repair
8.0 Wires
8.1 Splicing
8.1.1 Mesh Splice
8.1.2 Wrap Splice
8.1.3 Hook Splice
8.1.4 Lap Splice

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ANSI/IPC-T-50 Terms and Definitions for

Interconnecting and Packaging Electronic Circuits
Definition Submission/Approval Sheet
The purpose of this form is to keep SUBMITTOR INFORMATION:
current with terms routinely used in Name:
the industry and their definitions.
Individuals or companies are Company:
invited to comment. Please
City:
complete this form and return to:
IPC State/Zip:
3000 Lakeside Drive, Suite 309S Telephone:
Bannockburn, IL 60015-1249
Fax: 847 615.7105 Date:
❑ This is a NEW term and definition being submitted.
❑ This is an ADDITION to an existing term and definition(s).
❑ This is a CHANGE to an existing definition.

Term Definition

If space not adequate, use reverse side or attach additional sheet(s).

Artwork: ❑ Not Applicable ❑ Required ❑ To be supplied

❑ Included: Electronic File Name:
Document(s) to which this term applies:

Committees affected by this term:

Office Use
IPC Office Committee 2-30
Date Received: Date of Initial Review:
Comments Collated: Comment Resolution:
Returned for Action: Committee Action: ❑ Accepted ❑ Rejected
Revision Inclusion: ❑ Accept Modify

IEC Classification
Classification Code • Serial Number
Terms and Definition Committee Final Approval Authorization:
Committee 2-30 has approved the above term for release in the next revision.
Name: Committee: IPC 2-30 Date:
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Put IPC MEMBERSHIP to WORK for your Company

A trusted leader for more
than 50 years, IPC is the
Keep on top of industry developments …
premier source for industry and how they will affect your company
standards, training, market
research and public policy • Enjoy 24/7 privileges to FREE members-only online resources, including a
searchable archive of original articles and presentations on the latest technical
advocacy — supporting the
issues and industry/market trends.
needs of the estimated $1.7
• Receive FREE exclusive statistical reports available for the EMS, PCB, laminate,
trillion global electronics
process consumables, solder and assembly equipment industries.
industry.
• IPC events, including IPC APEX EXPOTM, technical conferences, workshops,
For less than $3.00 a training and certification programs and executive management summits provide
day, IPC members enjoy unparalleled educational and networking opportunities.
unlimited access to the •S
 tay abreast of global environmental directives, legislation and regulations, and
tools, information and how these specifically impact each segment of our industry’s supply chain.
forums needed to thrive in
an ever-changing electronic Save enough money to easily pay for your
interconnect industry.
membership
“I have a responsibility to • Get discounts of up to 50 percent on IPC standards, publications and training
my customers and my materials.
shareholders. Between the • Save money on online subscription licenses of IPC standards through the world’s
savings on standards, training largest standards reseller — IHS.
materials, APEX and industry
data, IPC membership • Enjoy dramatic discounts on registration fees for meetings, technical
provides immediate 100% conferences, workshops and tutorials.
return on investment for us. It • Benefit from preferred pricing on exhibit space at IPC trade shows and events.
would be irresponsible not to
be a member.”
Joseph F. O’Neil
President
Hunter Technology Corp

“Graphic PLC has enjoyed the privilege of being

an IPC member for more than 30 years and the
technical benefits derived to focus us as a world
player in the manufacture of PCBs have superceded
the cost of membership many times.”
Rex Rozario, OBE
Chairman
Graphic Plc.,UK

“Being a part of the fast-changing global electronics

marketplace requires constant intelligence about
market trends, standards and solutions to the
challenges throughout the supply chain. IPC is an
invaluable partner in providing that intelligence
through conferences, white papers and technical
standards.”
Andy Hyatt
Executive Vice President
Business Development
Creation Technologies
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Increase your knowledge and train your “IPC’s role in defining

industry technical standards,
people addressing industry concerns,
and promoting knowledging
• IPC workshops and international conferences provide an exchange of technical sharing through conferences
information that is unequalled. and training, significantly
benefits member companies
• IPC’s training and certification programs offer a cost-effective, industry- and the industry as a whole,
recognized way to demonstrate your commitment to quality. especially in today’s global
• Facilitate your staff’s continuous learning through IPC’s award-winning CD- outsourcing environment.”
and DVD-based training materials. Dongkai Shangguan, Ph.D.
Vice President
Flextronics International
Expand your network and build your
visibility
• Network with your peers through IPC committees, PCB/EMS management
councils and IPC events.
“Juki gets tremendous value
• Participate in problem-solving exchanges through IPC’s technical e-forums. from our ipc membership
• Get answers to your technical questions from IPC’s … we get quarterly market
technical staff. data which would cost us
thousands of dollars if we
commissioned it on our
Help shape the industry own. The industry standards
generated by IPC committees
• Participate in developing or updating the global industry standards that your allow us to design our
company, customers, competitors and suppliers use. equipment with certainty
that it will meet industry
• Take an active role in IPC-organized environmental and public policy activities
requirements. The returns
to advocate for regulations and legislation favorable to your company and the
for our company are so great,
global electronics community. they are beyond calculable.”
Bob Black
Market your business President and CEO
Juki Automation Systems Inc.

• Use the IPC member logo to highlight your company’s leadership in the
industry.
• Build your brand visibility through IPC’s Products and Services Index (PCB and
EMS companies only), and IPC’s annual trade shows and conferences, including
IPC APEX EXPO.
• Gain valuable exposure by sponsoring market research conferences and
executive management meetings.

Put the resources of the entire industry behind

your company by joining IPC today!
To learn more about IPC membership or to apply online, visit www.ipc.org.

IPC — Association Connecting Electronics Industries® Headquarters

3000 Lakeside Drive, Suite 309 S, Bannockburn, IL 60015
www.ipc.org
+1 847-615-7100 tel
+1 847-615-7105 fax
Visit www.IPC.org/offices for the locations of IPC offices worldwide.
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Association Connecting Electronics Industries

®
Application for Site Membership
Thank you for your decision to join IPC. Membership is site specific, which means that IPC member benefits are
available to all individuals employed at the site designated on this application.

To best serve your specific needs, please indicate the most appropriate member category for your facility.
(Check one box only.)

o Printed Circuit Board Manufacturer

Facility manufactures and sells printed circuit boards (PCBs) or other electronic interconnection products to other companies.
What products do you make for sale? (check all that apply)
o One and two-sided rigid, multilayer printed boards o Flexible printed boards o Other interconnections
o Printed electronics

__________________________________________________________________________________________________

o Electronics Manufacturing Services (EMS) Company

Facility manufactures printed circuit assemblies, on a contract basis, and may offer other electronic interconnection products
for sale.

___________________________________________________________________________________________________

o OEM — Original Equipment Manufacturer

Facility purchases, uses and/or manufactures printed circuit boards or other interconnection products for use in a final
product, which we manufacture and sell.

What is your company's primary product line?______________________________________________________________

___________________________________________________________________________________________________

o Industry Supplier
Facility supplies raw materials, equipment or services used in the manufacture or assembly of electronic products.

Which industry segment(s) do you supply? o PCB o EMS o Both o Printed electronics

What products do you supply?__________________________________________________________________________

o Government, Academia, Nonprofit

Organization is a government agency, university, college or technical or nonprofit institution which is directly concerned with
design, research and utilization of electronic interconnection devices.

o Consulting Firm
What services does the firm provide?_____________________________________________________________________

___________________________________________________________________________________________________
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Association Connecting Electronics Industries

®
Application for Site Membership
Site Information

Company Name

Street Address

City State Zip/Postal Code Country

Main Switchboard Phone No. Main Fax

Company E-mail address Website URL

Name of Primary Contact

Title Mail Stop

Phone Fax E-mail

Payment Information (Purchase orders not accepted as a form of payment)

Membership Dues
Membership will begin the day the application and dues payment are received, and will continue for one or two
years based on the choice indicated below. All fees are quoted in U.S. dollars.
Please check one:
Primary facility: Government agency, academic institution, nonprofit organization
o One year $1,050.00 o One year $275.00
o Two years $1,890.00 (SAVE 10%) o Two years $495.00 (SAVE 10%)
Additional facility: Membership for a facility of an organization that Consulting firm (employing less than 6 individuals)
already has a different location with a primary facility membership o One year $625.00
o One year $850.00 o Two years $1,125.00 (SAVE 10%)
o Two years $1,530.00 (SAVE 10%)
Company with an annual revenue of less than $5,000,000
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*Fax/Mail application with credit card payment to: Please attach b­ usiness card
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*Overnight deliveries to this address only.

Contact membership@ipc.org for wire transfer details 10/10
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Standard Improvement Form IPC-AJ-820A

The purpose of this form is to provide the Individuals or companies are invited to If you can provide input, please complete
Technical Committee of IPC with input submit comments to IPC. All comments this form and return to:
from the industry regarding usage of will be collected and dispersed to the IPC
the subject standard. appropriate committee(s). 3000 Lakeside Drive, Suite 309S
Bannockburn, IL 60015-1249
Fax: 847 615.7105
E-mail: answers@ipc.org
www.ipc.org/standards-comment

1. I recommend changes to the following:

Requirement, paragraph number
Test Method number , paragraph number

The referenced paragraph number has proven to be:

Unclear Too Rigid In Error
Other

2. Recommendations for correction:

3. Other suggestions for document improvement:

Submitted by:

Name Telephone

Company E-mail

Address

City/State/Zip Date
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Association Connecting Electronics Industries

3000 Lakeside Drive, Suite 309 S

Bannockburn, IL 60015
847-615-7100 tel
847-615-7105 fax
www.ipc.org

ISBN #978-1-61193-039-9