TL331B-Q1, TL391B-Q1 and TL331-Q1 Automotive Single Comparators
TL331B-Q1, TL391B-Q1 and TL331-Q1 Automotive Single Comparators
TL331B-Q1, TL391B-Q1 and TL331-Q1 Automotive Single Comparators
1 Features 3 Description
• Qualified for automotive applications The TL331B-Q1 and TL391B-Q1 devices are the
• AEC-Q100 qualified with the following results: next generation versions of the industry-standard
– Device temperature grade 1: –40°C to 125°C TL331-Q1 comparator. These next generation
ambient operating temperature range (B and Q devices provide outstanding value for cost-sensitive
versions) applications, with features including lower offset
– Device temperature grade 3: –40°C to voltage, higher supply voltage capability, lower supply
85°C ambient operating temperature range (I current, lower input bias current, lower propagation
version) delay, dedicated ESD protection cells with improved
– Device HBM ESD classification level 2 negative input voltage handling. The TL331B-Q1
– Device CDM ESD classification level C5 can drop-in replace both the TL331-Q1 "I" and
• NEW TL331B-Q1 and TL391B-Q1 "Q" versions. The TL391B-Q1 provides an alternate
• Wide range of supply voltage, 2 V to 36 V pinout of the TL331B-Q1.
• Low supply-current drain independent of supply This device consists of a single voltage comparator
voltage: designed to operate from a single power supply
0.43 mA Typ (B version) over a wide range of voltages. Operation from dual
• Low input bias current, 3.5 nA typ (B version) supplies also is possible if the difference between the
• Low input offset voltage, 0.37 mV typ (B Version) two supplies is 2 V to 36 V and VCC is at least 1.5 V
• Differential input voltage range equal to maximum- more positive than the input common-mode voltage.
rated supply voltage, ±36 V Current drain is independent of the supply voltage. To
• Input range includes ground achieve wired-AND relationships, one can connect the
• TL391B-Q1 provides an alternate pinout output to other open-collector outputs.
• Output compatible With TTL, MOS and CMOS
Device Information
2 Applications PART NUMBER PACKAGE (1) BODY SIZE (NOM)
• Automotive TL331B-Q1,
• HEV/EV and power train TL391B-Q1, SOT-23 (5) 2.90 mm × 1.60 mm
• Infotainment and cluster TL331-Q1
• Body control module (1) For all available packages, see the orderable addendum at
the end of the data sheet.
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION
DATA.
TL331-Q1, TL331B-Q1, TL391B-Q1
SLVS969G – OCTOBER 2009 – REVISED AUGUST 2023 www.ti.com
Table of Contents
1 Features............................................................................1 6.12 Typical Characteristics, TL331B-Q1 and
2 Applications..................................................................... 1 TL391B-Q1....................................................................9
3 Description.......................................................................1 7 Detailed Description......................................................15
4 Revision History.............................................................. 2 7.1 Overview................................................................... 15
5 Pin Configuration and Functions...................................3 7.2 Functional Block Diagram......................................... 15
6 Specifications.................................................................. 4 7.3 Feature Description...................................................15
6.1 Absolute Maximum Ratings, TL331-Q1...................... 4 7.4 Device Functional Modes..........................................15
6.2 Absolute Maximum Ratings, TL331B-Q1 and 8 Application and Implementation.................................. 16
TL391B-Q1....................................................................4 8.1 Application Information............................................. 16
6.3 ESD Ratings, All Devices............................................4 8.2 Typical Application.................................................... 16
6.4 Recommended Operating Conditions, TL331-Q1.......5 8.3 Power Supply Recommendations.............................18
6.5 Recommended Operating Conditions, TL331B- 8.4 Layout....................................................................... 18
Q1 and TL391B-Q1....................................................... 5 9 Device and Documentation Support............................19
6.6 Thermal Information....................................................5 9.1 Documentation Support............................................ 19
6.7 Electrical Characteristics, TL331B-Q1 and 9.2 Receiving Notification of Documentation Updates....19
TL391B-Q1 ...................................................................6 9.3 Support Resources................................................... 19
6.8 Switching Characteristics, TL331B-Q1 and 9.4 Trademarks............................................................... 19
TL391B-Q1 ...................................................................6 9.5 Electrostatic Discharge Caution................................19
6.9 Electrical Characteristics, TL331-Q1.......................... 7 9.6 Glossary....................................................................19
6.10 Switching Characteristics, TL331-Q1........................7 10 Mechanical, Packaging, and Orderable
6.11 Typical Characteristics, TL331-Q1............................ 8 Information.................................................................... 19
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision F (January 2021) to Revision G (August 2023) Page
• Added reference to Application Note................................................................................................................ 16
IN- 1 5 VCC
GND 2 +
IN+ 3 4 OUT
OUT 1 5 VCC
GND 2
+
IN- 3 4 IN+
6 Specifications
6.1 Absolute Maximum Ratings, TL331-Q1
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VCC Supply voltage(2) 0 36 V
VID Differential input voltage(3) –36 36 V
VI Input voltage range (either input) –0.3 36 V
VO Output voltage 0 36 V
IO Output current 0 20 mA
Duration of output short-circuit to ground(4) Unlimited
TJ Operating virtual junction temperature 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
(2) All voltage values, except differential voltages, are with respect to the network ground.
(3) Differential voltages are at IN+ with respect to IN–.
(4) Short circuits from outputs to VCC can cause excessive heating and eventual destruction.
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
(2) All voltage values, except differential voltages, are with respect to the network ground.
(3) Differential voltages are at IN+ with respect to IN–.
(4) Short circuits from outputs to VCC can cause excessive heating and eventual destruction.
(5) Input current flows thorough parasitic diode to ground and will turn on parasitic transistors that will increase ICC and may cause output
to be incorrect. Normal operation resumes when input current is removed.
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
(1) All characteristics are measured with zero common-mode input voltage, unless otherwise specified.
(2) The voltage at either input or common-mode should not be allowed to go negative by more than 0.3 V. The upper end of the
common-mode voltage range is VCC+ – 1.5 V at 25°C, but either or both inputs can go to 30 V without damage.
1.0 70
-40C 0C 25C -40C 0C 25C
85C 125C 60 85C 125C
0.8
50
0.6
40
30
0.4
20
0.2
10
0.0 0
0 10 20 30 40 0 8 16 24 32 40
Vcc (V) C001 Vcc (V) C002
Figure 6-1. Supply Current vs Supply Voltage Figure 6-2. Input Bias Current vs Supply Voltage
10.000
Output Low Voltage, VOL(V)
1.000
0.100
0.010
-40C 0C
25C 85C
125C
0.001
0.01 0.1 1 10 100
Output Sink Current, Io(mA) C005
300 250
No Load, Output High
280 230
260 210
240 190
220 170
200 150
180 130
160 -40°C 110 -40°C
0°C 0°C
140 25°C 90 25°C
120 85°C 70 VS=3V 85°C
125°C 125°C
100 50
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 -0.2 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
Supply Voltage (V) Input Voltage (V)
Figure 6-4. Supply Current vs. Supply Voltage Figure 6-5. Total Supply Current vs. Input Voltage at 3V
250 250
230 230
210 210
Total Supply Current (PA)
190 190
170 170
150 150
130 130
110 -40°C 110 -40°C
0°C 0°C
90 25°C 90 25°C
70 85°C 70 85°C
VS=5V 125°C VS=5V 125°C
50 50
-0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 -0.5 0 0.5 1 1.5 2 2.5 3 3.5 4
Input Voltage (V) Input Voltage (V)
Figure 6-6. Total Supply Current vs. Input Voltage at 3.3V Figure 6-7. Total Supply Current vs. Input Voltage at 5V
250 300
230
280
210
Total Supply Current (PA)
190 260
170
240
150
220
130
110 -40°C 200 -40°C
0°C 0°C
90 25°C 25°C
85°C 180 85°C
70 VS=12V 125°C VS=36V 125°C
50 160
-1 0 1 2 3 4 5 6 7 8 9 10 11 -1 2 5 8 11 14 17 20 23 26 29 32 35
Input Voltage (V) Input Voltage (V)
Figure 6-8. Total Supply Current vs. Input Voltage at 12V Figure 6-9. Total Supply Current vs. Input Voltage at 36V
0 0
VCM=0V 125°C VS=5V
-0.5 85°C -0.5
-1 25°C -1
0°C
-1.5
-1
-2 -1.5
-2.5 -2
-3 -2.5
-3.5 125°C -3
125°C
85°C -3.5 85°C
-4 25°C 25°C
-4
0°C 0°C
-4.5
-40°C -4.5 -40°C
-5 -5
-0.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 10.5 0 4 8 12 16 20 24 28 32 36
Input Voltage (V) Input Voltage (V)
Figure 6-12. Input Bias Current vs. Input Voltage at 12V Figure 6-13. Input Bias Current vs. Input Voltage at 36V
2 2
TA = 25°C
1.5 1.5 63 Channels
Input Offset Voltage (mV)
1 1
0.5 0.5
0 0
-0.5 -0.5
-1 -1
TA = -40°C
-1.5 63 Channels -1.5
-2 -2
3 6 9 12 15 18 21 24 27 30 33 36 3 6 9 12 15 18 21 24 27 30 33 36
Supply Voltage (V) Supply Voltage (V)
Figure 6-14. Input Offset Voltage vs. Supply Voltage at -40°C Figure 6-15. Input Offset Voltage vs. Supply Voltage at 25°C
2 2
TA = 85°C TA = 125°C
1.5 1.5 63 Channels
63 Channels
Input Offset Voltage (mV)
0.5 0.5
0 0
-0.5 -0.5
-1 -1
-1.5 -1.5
-2 -2
3 6 9 12 15 18 21 24 27 30 33 36 3 6 9 12 15 18 21 24 27 30 33 36
Supply Voltage (V) Supply Voltage (V)
Figure 6-16. Input Offset Voltage vs. Supply Voltage at 85°C Figure 6-17. Input Offset Voltage vs. Supply Voltage at 125°C
2 2
VS = 3V VS = 5V
1.5 63 Units 1.5 63 Units
Input Offset Voltage (mV)
1 1
0.5 0.5
0 0
-0.5 -0.5
-1 -1
-1.5 -1.5
-2 -2
-40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (°C) Temperature (°C)
Figure 6-18. Input Offset Voltage vs. Temperature at 3V Figure 6-19. Input Offset Voltage vs. Temperature at 5V
2 2
VS = 12V VS = 36V
1.5 63 Units 1.5 63 Units
Input Offset Voltage (mV)
1 1
0.5 0.5
0 0
-0.5 -0.5
-1 -1
-1.5 -1.5
-2 -2
-40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (°C) Temperature (°C)
Figure 6-20. Input Offset Voltage vs. Temperature at 12V Figure 6-21. Input Offset Voltage vs. Temperature at 36V
10 10
VS = 3V VS = 5V
Output Voltage to GND (V)
100m 100m
125°C 125°C
10m 85°C 10m 85°C
25°C 25°C
0°C 0°C
-40°C -40°C
1m 1m
10P 100P 1m 10m 100m 10P 100P 1m 10m 100m
Output Sinking Current (A) Output Sinking Current (A)
Figure 6-22. Output Low Voltage vs. Output Sinking Current at Figure 6-23. Output Low Voltage vs. Output Sinking Current at
3V 5V
10 10
VS = 12V VS = 36V
Output Voltage to GND (V)
1 1
100m 100m
125°C 125°C
10m 85°C 10m 85°C
25°C 25°C
0°C 0°C
-40°C -40°C
1m 1m
10P 100P 1m 10m 100m 10P 100P 1m 10m 100m
Output Sinking Current (A) Output Sinking Current (A)
Figure 6-24. Output Low Voltage vs. Output Sinking Current at Figure 6-25. Output Low Voltage vs.Output Sinking Current at
12V 36V
100 100
50 Output set high 50 Output set high
Output High Leakage to GND (nA)
VOUT = VS VOUT = VS
20 20
10 10
5 5
2 2
1 1
0.5 0.5
0.2 0.2
0.1 0.1
0.05 0.05
0.02 0.02
0.01 0.01
-40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125
Temperature (°C) Temperature (°C)
Figure 6-26. Output High Leakage Current vs.Temperature at 5V Figure 6-27. Output High Leakage Current vs. Temperature at
36V
1000 1000
VS = 5V 125°C VS = 5V 125°C
900 900
Propagation Delay, High to Low (ns)
6 6
VREF = VCC/2 VREF = VCC/2
5 5
4 4
Output Voltage (V)
0 0
-1 -1
-0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 -0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1
Time (Ps) Time (Ps)
Figure 6-34. Response Time for Various Overdrives, High-to- Figure 6-35. Response Time for Various Overdrives, Low-to-
Low Transition High Transition
7 Detailed Description
7.1 Overview
The TL331-Q1 is a single comparator with the ability to operate up to 36 V on the supply pin. This standard
device has proven ubiquity and versatility across a wide range of applications. This is due to its very wide supply
voltages range (2 V to 36 V), low Iq, and fast response.
The open-collector output allows the user to configure the output's logic low voltage (VOL) and can be utilized to
enable the comparator to be used in AND functionality.
The TL331B-Q1 and TL391B-Q1 are performance upgrades to industry standard TL331-Q1 using the latest
semiconductor process technologies that allows for lower offset voltages, lower input bias and supply currents
and faster response times. The TL331B can drop-in replace the "I" or "Q" versions of TL331-Q1. The TL391B-
Q1 is an alternate pinout of the TL331B-Q1 for replacing competitive devices.
7.2 Functional Block Diagram
VCC
80-mA
Current Regulator
10 mA 60 mA 10 mA 80 mA
COMPONENT COUNT
Epi-FET 1
Diodes 2
IN+ Resistors 1
OUT Transistors 20
IN−
GND
the input voltage range to as high as VCC – 1.5 V and as low as 0 V. Operation outside of this range can yield
incorrect comparisons.
Below is a list of input voltage situation and their outcomes:
1. When both IN- and IN+ are both within the common mode range:
a. If IN- is higher than IN+ and the offset voltage, the output is low and the output transistor is sinking
current
b. If IN- is lower than IN+ and the offset voltage, the output is high impedance and the output transistor is
not conducting
2. When IN- is higher than common mode and IN+ is within common mode, the output is low and the output
transistor is sinking current
3. When IN+ is higher than common mode and IN- is within common mode, the output is high impedance and
the output transistor is not conducting
4. When IN- and IN+ are both higher than common mode, see Section 2 of Application Design Guidelines for
LM339, LM393, TL331 Family Comparators Including the New B-versions.
6 6
5 5
Output Voltage, Vo(V)
3 3
2 5mV OD 2
5mV OD
1 20mV OD 1
20mV OD
0 0
100mV OD 100mV OD
±1 ±1
-0.25 0.25 0.75 1.25 1.75 2.25 ±0.25 0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00
Time (usec) C004 Time (usec) C006
Figure 8-2. Response Time for Various Overdrives Figure 8-3. Response Time for Various Overdrives
(Positive Transition) (Negative Transition)
Bypass
Capacitor
0.1 μF
9.6 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions.
www.ti.com 15-Aug-2023
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
TL331BQDBVRQ1 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 31BQ Samples
TL331IDBVRQ1 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 TQ1U Samples
TL331QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 T1RU Samples
TL391BQDBVRQ1 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 91BQ Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 15-Aug-2023
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 27-Mar-2024
B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers
Sprocket Holes
Q1 Q2 Q1 Q2
Pocket Quadrants
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 27-Mar-2024
Width (mm)
H
W
Pack Materials-Page 2
PACKAGE OUTLINE
DBV0005A SCALE 4.000
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
3.0 C
2.6
1.75 0.1 C
B A
1.45
PIN 1
INDEX AREA
1 5
2X 0.95 (0.1)
3.05
2.75
1.9 1.9
2
(0.15)
4
3
0.5
5X
0.3
0.15
0.2 C A B NOTE 5 (1.1) TYP
0.00
1.45
0.90
0.25
GAGE PLANE 0.22
TYP
0.08
8
TYP 0.6
0 TYP SEATING PLANE
0.3
4214839/J 02/2024
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.25 mm per side.
5. Support pin may differ or may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0005A SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
(1.9)
2
2X (0.95)
3 4
SOLDER MASK
SOLDER MASK METAL METAL UNDER OPENING
OPENING SOLDER MASK
4214839/J 02/2024
NOTES: (continued)
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0005A SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
5X (1.1)
1
5
5X (0.6)
SYMM
2 (1.9)
2X(0.95)
3 4
(R0.05) TYP
(2.6)
4214839/J 02/2024
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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