The document discusses different topologies of multilevel inverters and their control schemes. It describes the diode clamped, flying capacitor, and cascaded H-bridge topologies. The document focuses on simulating the cascaded multilevel inverter using MATLAB/Simulink for industrial applications.
The document discusses different topologies of multilevel inverters and their control schemes. It describes the diode clamped, flying capacitor, and cascaded H-bridge topologies. The document focuses on simulating the cascaded multilevel inverter using MATLAB/Simulink for industrial applications.
The document discusses different topologies of multilevel inverters and their control schemes. It describes the diode clamped, flying capacitor, and cascaded H-bridge topologies. The document focuses on simulating the cascaded multilevel inverter using MATLAB/Simulink for industrial applications.
The document discusses different topologies of multilevel inverters and their control schemes. It describes the diode clamped, flying capacitor, and cascaded H-bridge topologies. The document focuses on simulating the cascaded multilevel inverter using MATLAB/Simulink for industrial applications.
INVERTER TOPOLOGIES FOR INDUSTRIAL APPLICATIONS Sunita Kumari and Sudhir Y Kumar Electrical Engineering Dept, CET Mody University, Lakshmangarh (Sikar). India
ABSTRACT This paper presents the most common multilevel inverter topologies and its control schemes. The main objective of this paper is to design the three topologies of multilevel inverter for industrial applications. The topologies of multilevel inverters are being used in medium and high power applications such as an active power filter, FACTS devices and a machine current due to their many advantages in terms of low power dissipation on power supplies, low harmonic contents. To control the multilevel inverter, the selected switching techniques play an important role on elimination of harmonic distortion in generated output voltage. According to power demands of inverter, the selection of topology and its control techniques may vary. But, they have some disadvantages to the multilevel inverters for the requirement of isolated power supplies for individual stages. Therefore, the simulation of Cascaded Multilevel Inverter (CMI) is done by using MATLAB/SIMULINK. Key words: Multilevel Inverter, Topologies, FACTS, IGBT/Diode, MATLAB /SIMULINK. Cite this Article: Sunita Kumari and Sudhir Y Kumar. Design and Control of Multilevel Inverter Topologies for Industrial Applications. International Journal of Mechanical Engineering and Technology, 8(6), 2017, pp. 107–116. http://iaeme.com/Home/issue/IJMET?Volume=8&Issue=6
1. INTRODUCTION Many industrial applications have begun to require high power in recent years [1]. Some appliances in the industries however require medium or high power for their operation. Using a high power source for all industrial loads may prove to be beneficial to some motors requiring high power while it may damage the other loads. Inverters are used for many applications, as in situations where low voltage DC sources must be converted so that devices can run off of AC power. The multilevel inverter has been introduced since 1975 as alternative in high power and medium voltage situations [1].
Design and Control of Multilevel Inverter Topologies for Industrial Applications
Figure 1 Classification of Power Converter
The multilevel inverter is like an inverter and it is used for industrial applications as an alternative in high power and medium voltage situations. The multilevel inverter consists of several switches. In the multilevel inverter the arrangement switches angles are very important. Figure 1 illustrates the classification of power converter. Multilevel inverter goes up to high switching voltage by means of a series of voltage steps, each of which is depend on the rating of power devices individually. For multilevel inverter, some topologies are classified in two groups depending on the number of independent dc source as shown in figure 2. The most famous working topologies are diode clamped (NPC), flying capacitor (FC) and cascade H-bridge (CHB). An NPC inverter is basically composed of two conventional two-level voltage source inverter stacked are over the other with some minor modifications. The FC topology is some way similar to the NPC with difference that the clamping diodes are replaced by flying capacitors. CHBs inverters are classified by series connection of two or more single-phase H-bridge inverters. Fundamental switching frequency and high switching frequency PWM methods are used to operate the multilevel inverters. It has lower switching loss and higher efficiency. In the CHB MLI, each level requires a separate dc source and for each dc source a PV cell or battery is to be connected.
2. MULTILEVEL INVERTER TOPOLOGIES
2.1. Diode Clamped Multilevel Inverter Nabae, Takahashi and Akagi in 1981 introduced a 3-level diode-clamped inverter also called the neutral clamped inverter [1]. In the 1990’s several researchers published articles that have reported results for four, five and six-level diode clamped inverters. After reading [1]-[6], we conclude that for a 1-Ф three-level diode clamped inverter, a set of two switches is on at any given time. This type of inverter is suitable on an AC transmission line for transmission of DC current or variable speed motors.
Table 1 Switching pattern for 3-level Diode-Clamped inverters
Sequence of Switches (ON) Load Voltage S1, S2 +Vdc/2 S1’, S2’ -Vdc/2 S2, S1’ or S1, S2’ Zero In Figure 2, the dc output voltage is split into three levels by two bulk capacitors C1 and C2 in series form. The middle point of the two capacitors ‘n’ is called the neutral point. These two diodes D1 and D1’ clamp the switch voltage to half the level of the dc-bus voltage. When switches S1 and S2 turn on, the voltage across a and 0 is Vdc, i.e., Vao= Vdc. In this case, D1’ balances out the sharing voltage between S1’ and S2’ with S1’ blocking the voltage across and blocking the voltage across C1 and S2’ blocking the voltage across C2. Notice that output voltage Van is ac, and Vao is dc. The difference between Van and Vao is the voltage across the capacitor C2, which is Vdc/2. If the output is removed out between a and 0, then the circuit becomes a dc/dc converter, which has three output voltage levels: Vdc, Vdc/2, and 0 as shown in table 1. 3-Ф, three-level diode-clamped converter is also called Neutral –point converter (NPC). The dc bus capacitor is split into two providing a neutral point on the DC side of the inverter,. The diodes connected to the neutral point are called the clamping diode.
Figure 3 3-Ф, Seven-level Diode-clamped Inverter
A 3-Ф 7-level diode-clamped inverter is shown in figure 3. A common dc bus is shared by each of the 3-phases which is subdivided by 6 capacitors into 7-level. Each capacitor voltage is Vdc and each switching device voltage stress is limited to Vdc through the clamping diodes.
Design and Control of Multilevel Inverter Topologies for Industrial Applications
The output voltage levels possible for one phase of the inverter with the negative reference to voltage V0 as a reference is shown in table 2. When the switch is on, 1 is the state condition and when the switch is off, 0 is the state condition. Each phase has 6 complementary switch pairs so that turning on one of the switches of the pair require that its other complementary switch is to be turned off. The complementary switch pairs for phase leg ‘a’ are (Sa1, Sa’1), (Sa2, Sa’2), (Sa3, Sa’3), (Sa4, Sa’4), (Sa5, Sa’5) and (Sa6, Sa’6). An additional balancing circuit can be added or more complex control methods can be implemented for solving the voltage balancing problem. The line voltages Vab, Vbc and Vca consists of a phase-leg a-b, b-c and c-a voltages respectively. An m-level diode-clamped inverter has an m-level output phase voltage and a (2m-1)-level output line voltage. When all the lower switches Sa’1 through Sa’6 are turned on, D5 must block five voltage levels or 5Vdc as per table 2 for phase ‘a’. Similarly, D4 must block 4Vdc, D3 must block3Vdc, D2 must block 2Vdc and D1 must block Vdc. If we designed the inverter, each blocking diode has the same rating voltage, Dn will require n diodes in series and consequently, the number of diodes required for each phase would be (m-1)*(m-2) [7]. Applications: • Static VAR generation • Both AC-DC and DC-AC conversion applications • Converters with harmonic distortion capability • Sinusoidal current rectifiers
Meynard and Foch introduced a flying capacitor based inverter in 1992 [1]. This inverter structure is similar design to a diode-clamped inverter. The clamping diodes have however been replaced with capacitors. The circuit topology of the flying capacitor multilevel inverter is shown in figure 4. The design requires only two switch combinations to create a voltage output. Tracking the output of all the capacitors is complicated, as is pre-charging all of the capacitors [1].
Figure 4 Three level Capacitor–Clamped Inverter
The inverter in Figure 4 provides a three-level output across a and n, i.e., Van= Vdc/2, 0, or –Vdc/2. For voltage level Vdc/2, switches S1 and S2 need to be turned on; for –Vdc/2, switches S1’ and S2’ need to be turned on; and for the 0 level, either pair (S1,S1’) or (S2,S2’) needs to be turned on. When S1 and S1’ are turned on, clamping capacitor C1 is charged and when S2 and S2’ are turned on, it is discharged. The charge of capacitor C1 can be balanced by proper selection of the zero-level switch combination. Right now, for researchers and manufacturers, the multilevel inverter is become more attractive due to their advantages over conventional 3- level pulse width modulation technique (PWM) inverters.
One advantage of the flying-capacitor-based-inverter is that it has redundancies for inner voltage levels or in other words, two or more valid switch combinations can synthesize an output voltage. To the (m-1) dc link capacitors, the m-level flying capacitor multilevel inverter will require (m-1)*(m-2)/2 auxiliary capacitors per phase if the voltage rating of the capacitors is equal to that of the main switches. Applications: • Static var compensation • Variable speed motor drives • High voltage system interconnections • High voltage DC and AC transmission lines
2.3. Cascaded H-bridge Multilevel Inverter
In Figure 6, DC power source is connected to an H-bridge inverter. The single inverter has four switches. By using different combinations of switches, the single inverter can produce three different AC voltage outputs, +Vdc, 0, -Vdc. In contrast, in this paper, each phase of a cascade multilevel inverter requires ‘s’ DC sources for (2s+1) level in applications that involve real power transfer. For the interest purpose we can use of a single DC power source (e. g. battery, fuel cell) with the remaining (s-1) DC sources being capacitors. Consider a simple cascade multilevel inverter with three H-bridges:
Design and Control of Multilevel Inverter Topologies for Industrial Applications
Table 3 Switching Pattern for H-bridge Inverters
Sequence of Switches Load Voltage (ON) S1, S4 +Vdc S2, S3 -Vdc S1, S4 or S2, S3 Zero
Figure 77-level Cascaded H-Bridge Inverter Figure 8 Output Phase Voltage v/s Time
A three-phase structure of a 7-level CMI with 3 SDCSs is illustrated in Figure
9.Multilevel inverter topology has the minimum components for a given number of levels. Cascaded H-bridge MLI topology is based on the series connection of H-bridges with separate dc sources. Since the output terminals of the H bridges are connected in series, the dc sources must be isolated from each other. The need of several sources on the dc side of the inverter makes multilevel technology attractive for photovoltaic applications. Owing to this property, CHB-MLIs have also been proposed in order to achieve higher levels [4]. For simplicity of the circuit and advantages, Cascaded H-bridge topology is chosen for the simulation work. The phase output voltage is synthesized by the sum of individual inverter outputs, i.e.the phase ‘a’ voltage for 7-level cascaded inverter is: Vca=Vca1+Vca2+Vca3 (1) The phase voltage for m-level cascaded inverter is, Vca=Vca1+Vca2+Vca3+Vca4+ ……………. +Vcam… (2)
The most attractive features of Cascaded Multilevel Inverters are as follows:
• They can generate output voltages with extremely low distortion and lower dv/dt. • They draw input current with very low total harmonic distortion. • They generate smaller common-mode (CM) voltage, thus reducing the stress in the motor bearings. • They can operate with a lower switching frequency. IGBT/diode has been chosen as the power semiconductor switches in each H-bridge, since it has more features than other power semiconductor switches.
3. COMPARISON IN MULTILEVEL INVERTER
All three converter topologies have the potential for application in medium and high voltage applications. All devices are assumed to have same voltage ratings but not necessarily same current ratings. Multilevel inverters include an array of power semiconductors and capacitor voltage sources, the output of which generate voltages with stepped waveforms. The commutation of the switches permits the addition of the capacitor voltages, which reach high voltage at the output, while the power semiconductors must withstand only reduced voltages. By increasing the number of levels in the inverter, the output voltages have more steps generating a staircase waveform, which has a reduced harmonic distortion. However, a high number of levels increases the control complexity and introduces voltage imbalance problems. We can be found the level of the voltage on each stage, number of output level and number of switches values by formulas which is used in these topologies as shown in table 4.
Table 4 Comparison of Multilevel Inverter Different Topologies and corresponding level of the voltage on each stage, number of output level and number of switches S. No. Name of the Topology Level of the Voltage on each Number of Number of Stage Output level Switches used 1. Diode Clamped Multilevel VS on each ‘C’ {(Number of Number of Inverter Capacitors, Capacitors, ‘C’ ‘C’)+1} 2. Flying Capacitors Multilevel SVdc/(n-1) S S-1 Inverter Where ‘n’ is the number of switches 3. Cascaded H-bridge SVdc S 4S Multilevel Inverter As compare to other two, CHB MLI requires the least number of components and has the potential for utility interface applications because of its capabilities for applying modulation and soft switching techniques. The cascaded H-Bridge inverter does not use half bridge in each level accept full H-Bridge inverter because of more efficiency in output. In this, we have studied the 5-level, 7-level and 9-level type of Cascaded H-Bridge multilevel inverter, designed and simulated using MATLAB Sim Power Systems.
4. SIMULATED RESULTS The Cascaded 7-level inverter requires three separate dc sources per phase leg; this means that three H-bridge inverters are used for single phase structure. One of the terminal of each single phase three levels cascaded H-bridge multilevel is connected as star, while the other terminal of each single phase cascaded H-bridge multilevel inverter is connected to a three phase series load [8]. This type of cascaded H-bridge multilevel inverter has been designed and simulated using MATLAB Sim Power Systems. The multilevel circuit is illustrated in Figure 10, 11 and 16 (simulated Circuit).
Design and Control of Multilevel Inverter Topologies for Industrial Applications
Figure 10 Simulated Circuit Diagram for 5- Figure 11 Simulated Circuit Diagram of 3-Ф Circuit of 5- level CMI level CMI
Figure 12 Output Voltage Waveform of 5-level Figure 13 Output Branch Current Waveform of 5-level CMI v/s time CMI v/s time
Figure 14 Output Voltage Waveform of 7-level Figure 15 Simulated Circuit Diagram of Active and CMI v/s time Reactive Power Measurement for 7-level CMI v/s time
Figure 16 Simulated Circuit Diagram for 9-level CMI
Figure 17 Output Voltage Waveform of 9-level Figure 18 Output Branch Current Waveform of 9- CMI v/s time level CMI v/s time
5. CONCLUSIONS This paper has demonstrated the state of the art of multilevel power inverter technology. Therefore, after designing these topologies we found that cascaded H-Bridge inverter is better when we compare the reliability, modulation scheme and switching techniques with other topologies. A procedure for calculating the required voltage level on each stage has been described. In the conventional methods as the number of levels are increased the required number of switches also increased. Finally, Matlab/Simulink based model for cascaded 5- level, 7-level and 9-level inverter is developed and simulation results are presented.
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Design and Control of Multilevel Inverter Topologies for Industrial Applications
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