In 8086 when Interrupt flag is set ____________

A The maskable interrupts are recognised by the CPU

B The maskable interrupts are not recognised by the CPU
C The non-maskable interrupts are recognised by the CPU
D None of thses
ANSWER A

In 8086 Parity flag is set when ____________

A The result contain even number of 's
B The result contain odd number of 's
C The result contain all zeros
D both a and b
ANSWER A

Which of the following is the 8 bit microprocessor?

A 8008
B 8080
C 8085
D All of these
ANSWER D

The I/O space of 8086 is ________ .

A 64 K Word ports
B 64 K byte ports
C 32 K byte ports
D 6 K Word ports
ANSWER B

The 8086 is a __________ bit Microprocessor.

A 8 bit
B 32 bit
C 6 bit
D 24 bit
ANSWER C

The operating modes of 8086 is ______________

A Real mode
B Maximum mode
C Minimum Mode
D Both b and c
ANSWER D

The 8086 has ____________ data bus

A 32 bit
B 6 bit
C 64 bit
D 8 bit
ANSWER B

The 8086 has ____________ Address bus

A 20 bit
B 6 bit
C 32 bit
D 24 bit
ANSWER A

The Instruction queue of 8086 is ____________ Bytes

A 8 bytes
B 6 bytes
C 8 bytes
D 2 bytes
ANSWER B

What is the maximum size of each memory segment in 8086?

A 64 kbyte
B 32 kbyte
C 60 kbyte
D 8 kbyte
ANSWER A

What is the size of physical memory in 8086?

A 64 Kbyte
B Mbyte
C 32 Kbyte
D 24 Kbyte
ANSWER B

In 8086, _______ is the example for Non-maskable interrupt.

A Trap
B RST6.5
C INTR
D None of these
ANSWER D

Which processor structure is pipelined?

A all x80 processors
B all x85 processors
C all x86 processors
D None of these
ANSWER C

In 8086 the overflow flag is set when___________

A The sum is more than 6 bits
B Signed numbers go out of their range after an arithmetic operation
C Carry and sign flags are set
D During subtraction
ANSWER B

What is meant by Maskable interrupts?

A An interrupt which can never be turned off.
B An interrupt that can be turned off by the programmer.
C An interuppt is always on
D None of these
ANSWER B
 Which of the following is /are the functions of BIU?
A To send the address of memory or I/O
B To fetch instruction from memory
C To support instruction queuing
D All of these
ANSWER D

The BIU of 8086 consist of ____________

A segment registers
B instruction queue
C Instruction Pointer
D All of these
ANSWER D

The Segment register of 8086 is __________ bit.

A 8 bit
B 6 bit
C 32 bit
D 20 bit
ANSWER B

The queue of 8086 operates on the principle of ___________

A LIFO
B FIFO
C LILO
D FILO
ANSWER B

Feature of fetching the next instruction while the current instruction is executing is called
____________
A Fetching
B Pipelining
C Execution
D Decoding
ANSWER B

The EU unit of 8086 consist of ____________

A ALU
B Flag register
C instruction decoder
D All of these
ANSWER D

A register set of 8086 consists of ____________

A General purpose register
B Pointer register
C Index register
D All of these
ANSWER D

The flag register of 8086 is _________ bits

A 8 bits
B 32 bits
C 6 bits
D 24 bits
ANSWER C

During physical address calculation the segment register content are shifted by _______________
A 2-bits left
B 4-bits left
C 2-bits right
D 4-bits right
ANSWER B

During instruction fetch __________ and __________ registers are used.

A IP , DS
B CS , IP
C SS , BP
D SS , IP
ANSWER B

What is the size of TR in 80386?

A 6 bits
B 32 bits
C 48 bits
D 64 bits
ANSWER A

____________ flag of 8086 is used for single stepping mode through a program
A Zero flag
B Trap Flag
C Sign Flag
D Interrupt Flag
ANSWER B

Which of the following 8086 related statement is/are true?

A segment can overlap
B segment maximum size is 64 kbytes
C segments minimum size is 6 bytes
D All of these
ANSWER D

_________ allow to use separate memory area for program, data, code and stack
A Segmentation
B Pipelining
C Both a and b
D None of these
ANSWER A

For the stack operation in 8086 __________ register are used?

A SS
B SP
C BP
D All of these
ANSWER D

What is the size of physical address in 8086?

A 6 bit
B 20 bit
C 24 bit
D 32 bit
ANSWER B

The contents of different registers are given below. AX = 000H, BX = 2000H, SI = 3000H, DI = 4000H,
BP = 5000H, SP = 6000H, CS = 0000H, DS = 000H, SS = 2000H, IP = 7000H.
Calculate physical address for MOV AX, [5000H].
A 5000H
B 5000H
C 0500H
D 000500H
ANSWER B

The contents of different registers are given below. AX = 000H, BX = 2000H, SI = 3000H, DI = 4000H,
BP = 5000H, SP = 6000H, CS = 0000H, DS = 000H, SS = 2000H, IP = 7000H.
Calculate physical address for MOV AX, [BP] [SI]
A 8000H
B 5000H
C 2000H

D 28000H
ANSWER D

The contents of different registers are given below. AX = 000H, BX = 2000H, SI = 3000H, DI = 4000H,
BP = 5000H, SP = 6000H, CS = 0000H, DS = 000H, SS = 2000H, IP = 7000H.
Calculate physical address for MOV AX, 5000H [BX] [SI]
A 5000H
B 0000H
C 0A000H
D A000H
ANSWER D

What is the output of the following code

AL=88 BCD, CL=49 BCD
ADD AL,CL
DAA
A D7, CF=
B 37, CF=
C 73, CF=
D 7D, CF=
ANSWER B

What is the output of the following code

AL= 49 BCD, BH= 72 BCD
SUB AL,BH
DAS
A AL=D7, CF=.
B AL=7D, CF=.
C AL=77, CF=
D none of them
ANSWER C

What is opcode?
A The instruction that is to be executed
B The value in which an operation acts upon
C A mnemonic that defines a data size
D The compiled assembly code
ANSWER A

What are the names of the 4 segment registers?

A Data, Index, Code, Stack
B Stack, Index, Extra, Code
C Stack, Data, Base, Counter
D Stack, Extra, Code, Data
ANSWER D

The 8086/8088 used two processing units which were known as:
A Left and Right Units
B Segment and Offset Units
C Bus Unit and Execution Interface Unit
D Bus Interface Unit and Execution Unit
ANSWER D

The first processor to include Virtual memory in the Intel microprocessor family was:
A 4004
B 80286
C 80386
D 80486
ANSWER B

The Effective address range in 8086 is _________________.

A 0000H to FFFFH
B 00000H to FFFFFH
C 0000H to 0FFFH
D None of these
ANSWER A

Which segment register is used along with BP register to calculate Physical address?
A CS
B SS
C DS
D ES
ANSWER B

Can ROM be used as stack?

A Yes
B No
C Sometimes yes
D Sometimes no
ANSWER B

The zero flag is reset

A When the result of last arithmetic/logical instruction is zero
B When the result of last arithmetic/logical instruction is not zero
C When the result of last arithmetic/logical instruction produces carry out of MSB.
D None of these
ANSWER B

What is the size of IP in 8086 is __________________

A 32
B 6
C 48
D Both a and b
ANSWER B

Microprocessor speed depends on ______

A Clock
B Data bus wth
C Address bus wth
D Size of register
ANSWER A

What is the range of Memory locations in 8086?

A 00000H to FFFFFH
B 0000H to FFFFH
C 000000H to FFFFFFH
D 00000H to FFFFH
ANSWER A

In 8086 when Auxiliary Flag is set ____________

A If there is carry from lower nibble
B If there is no carry from lower nibble
C Both a and b
D None of these
ANSWER A

In 8086 when Trap flag is set _______________

A The processor enter the free run mode
B The processor enter the single step execution mode
C Both a and b
D none of these
ANSWER B

8088 differs 8086 in _______________

A Data wth on the output
b Supports of Co processor
C Address capability
D Supports of max/min mode.
ANSWER A

For 8086 _________ bus is birectional and __________ bus is unirectional

A Address, data
B Data , address
C Control, data
D Address, control
ANSWER B

What is the function of segment registers?

A To store the starting address of corresponding segment
B To store data required for arithmetic or logical operations
C To store address within the segment
D All of above
ANSWER A

What is the address range of I/O space in 8086?

A 0000h – 0FFFh
B 00000h – FFFFFh
C 0000h – FFFFh
D None of these
ANSWER C

Which registers are used to generate physical address from logical address?
A Segment registers
B Offset register
C Both (a) and (b)
D General purpose register
ANSWER C

ALE stands for ______

A Address latch enable
B Address length enable
C Address lower enable
D Address last enable
ANSWER A

Which flag is not present in 8086 microprocessor but present in 80386 microprocessor?
A Zero Flag
B Sign Flag
C Trap Flag
D Nested Task Flag
ANSWER D

Which of the following is not possible by a microprocessor?

A Reading from Memory
B Writing into Memory
C Reading from Input port
D Writing into Input port
ANSWER D

A 32-bit processor has

A 32 register
B 32 I/O devices
C 32 Mb of RAM
D 32bit ALU and 32-bit registers
ANSWER D

A machine cycle refers to

A fetching an instruction
B clock speed
C fetching, decoding and executing an instruction
D executing an instruction
ANSWER C

The system bus is made up of ______

A Data bus
B Data bus and address bus
C Data bus and control bus
D Data bus, control bus and address bus
ANSWER D

The minimum number of bits required to store the hexadecimal number FFH is ______
A 2
B 4
C 8
D 6
ANSWER C

A megabyte represents ______

A million bytes
B 024 kilobytes
C 230 bytes
D 024 bytes
ANSWER B

The ASCII code of ‘A’ is ______

A 66D
B 4H
C 000 000
D 00 00
ANSWER B

Why 80386 processor is called as 32 bit processor?

A Because 80386 processor has 32 bit ALU
B Because 80386 processor has 32 bit data bus
C Both(a) and (b)
D None of these
ANSWER C

How many break point addresses we can load in debug registers of 80386 microprocessor?
A 4
B 5
C 7
D 8
ANSWER A

What is the use of base registers and offset registers?

A To hold 6-bit relative address present within the segment
B To perform arithmetic and logical operations
C To hold the data temporary
D All of above
ANSWER A

If direction flag is set then

A SI is automatically decremented
B SI is automatically incremented
C DI is automatically decremented
D Both (a) and (c)
ANSWER D

If PE = , then 80386 DX microprocessor operates in _____

A Real mode
B Protected mode
C Virtual 86 mode
D Special mode
ANSWER B

READY# is ________
A Address Bus Ready signal
B Data bus ready signal
C Control Bus ready signal
D All of the above
ANSWER B

In which microprocessor does the concept of pipeline introduced?

A 8086
B 80286
C 80386
D 80486
ANSWER A

The parity bits are used to check that a _____

A Two bit error
B Single bit error
C Multi bit error
D None of these
ANSWER B

________ is the most important segment and it contains the actual assembly language instruction to be
executed by the microprocessor:
A Data segment
B Code segment
C Stack segment
D Extra segment
ANSWER B

A microprocessor contains _______

A most of RAM
B most of ROM
C peripheral drivers
D most of the control and arithmetic logic functions of computer
ANSWER D