LM5030 100V Push-Pull Current Mode PWM Controller

August 2003

LM5030
100V Push-Pull Current Mode PWM Controller
General Description Features
The LM5030 High Voltage PWM controller contains all of the n Internal High Voltage Start-up Regulator
features needed to implement Push-Pull and Bridge topolo- n Single Resistor Oscillator Setting
gies, using current-mode control in a small 10 pin package. n Synchronizable
This device provides two alternating gate driver outputs. The n Error Amplifier
LM5030 includes a high-voltage start-up regulator that oper- n Precision Reference
ates over a wide input range of 14V to 100V. Additional
n Adjustable Softstart
features include: error amplifier, precision reference, dual
n Dual Mode Over-Current Protection
mode current limit, slope compensation, softstart, sync ca-
pability and thermal shutdown. This high speed IC has total n Slope Compensation
propagation delays less than 100ns and a 1MHz capable n Direct Optocoupler Interface
single resistor adjustable oscillator. n 1.5A Peak Gate Drivers
Package: MSOP-10 (Contact factory for thermally enhanced n Thermal Shutdown
LLP availability).
Applications
n Telecommunication Power Converters
n Industrial Power Converters
n +42V Automotive Systems

Connection Diagram
Top View

20058112
10-Lead MSOP

Ordering Information
Order Number Package Marking NSC Package Drawing Supplies As
LM5030MM S73B MUB10A 1000 Units on Tape and Reel
LM5030MMX S73B MUB10A 3500 Units on Tape and Reel

© 2003 National Semiconductor Corporation DS200581 www.national.com

LM5030
Block Diagram

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FIGURE 1.

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 LM5030
Pin Description
Pin Name Pin Description Application Information
Number
VIN 1 Source Input Voltage Input to start-up regulator. Input range 14 to 100 Volts.
VFB 2 Inverting input to the error amplifier The non-inverting input is internally connected to a 1.25 Volt
reference.
COMP 3 Output to the error amplifier There is an internal 5K resistor pull-up on this pin. The error
amplifier provides an active sink.
Vcc 4 Output from the internal high If an auxiliary winding raises the voltage on this pin above the
voltage series pass regulator. The regulation setpoint the internal series pass regulator will
regulation setpoint is 7.7 Volts. shutdown, reducing the IC power dissipation.
OUT1 5 Output of the PWM controller Alternating PWM output gate driver.
OUT2 6 Output of the PWM controller Alternating PWM output gate driver.
GND 7 Return Ground
CS 8 Current sense input Current sense input for current mode control and current limit
sensing. Using separate dedicated comparators, if CS exceeds
0.5 Volt the outputs will go into Cycle by Cycle current limit. If CS
exceeds 0.625V the outputs will be disabled and a softstart
commenced.
RT 9 Oscillator timing resistor pin and An external resistor sets the oscillator frequency. This pin will
synchronization input. also accept synchronization pulses from an external oscillator.
SS 10 Dual purpose Softstart and A 10µA current source and an external capacitor set the softstart
Shutdown pin timing length. The controller will enter a low power state if the SS
pin is pulled below the typical shutdown threshold of 0.45V.

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LM5030
Absolute Maximum Ratings (Note 1) Lead Temperature
If Military/Aerospace specified devices are required, (Soldering 4 seconds) 260˚C
please contact the National Semiconductor Sales Office/ Storage Temperature Range -55˚C to +150˚C
Distributors for availability and specifications. Junction Temperature 150˚C
VIN to GND (Survival) -0.3V to 100V
VCC to GND (Survival) -0.3V to 16V Operating Ratings
RT to GND (Survival) -0.3V to 5.5V
Junction Temperature -40˚C to +105˚C
All other pins to GND (Survival) -0.3V to 7V
VIN 14V to 90V
Power Dissipation (Note 2) Internally Limited
ESD Rating (Note 3)
Human Body Model 2kV
Machine Model 200V

Electrical Characteristics
Specifications in standard type face are for TJ= +25˚C and those in boldface type apply over the full operating junction tem-
perature range. Unless otherwise specified: VIN = 48V, VCC = 10V, and RT = 26.7KΩ
Symbol Parameter Conditions Min Typ Max Units
(Note 4) (Note 5) (Note 4)
Startup Regulator
VCCReg VCC Regulation open ckt 7.4 7.7 8.0 V
VCC Current Limit (Note 2) 10 17 mA
I-VIN Startup Regulator Leakage VIN = 90V 150 500 µA
(external Vcc Supply)
IIN Shutdown Current SS = 0V, VCC = open 250 350 µA
VCC Supply
VCC undervoltage Lockout VccReg VccReg - V
Voltage - 300mV 100mV
Undervoltage Hysteresis 1.2 1.6 2.1 V
ICC Supply Current Cload = 0 2 3 mA
Error Amplifier
GBW Gain Bandwidth 4 MHz
DC Gain 75 dB
Input Voltage VFB = COMP 1.220 1.245 1.270 V
COMP Sink Capability VFB = 1.5V COMP= 1V 5 13 mA
Current Limit
CS1 Cycle by Cycle CS Threshold 0.45 0.5 0.55 V
Voltage
CS2 Restart CS Threshold Voltage Resets SS capacitor; auto 0.575 0.625 0.675 V
restart
ILIM Delay to Output CS step from 0 to 0.6V 30 ns
Time to onset of OUT
Transition (90%)
Cload = 0
CS Sink Current (clocked) CS = 0.3V 3 6 mA
Soft Start/Shutdown
Softstart Current Source 7 10 13 µA
Softstart to COMP Offset 0.25 0.5 0.75 V
Shutdown Threshold 0.2 0.45 0.7 V

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 LM5030
Electrical Characteristics (Continued)

Specifications in standard type face are for TJ= +25˚C and those in boldface type apply over the full operating junction tem-
perature range. Unless otherwise specified: VIN = 48V, VCC = 10V, and RT = 26.7KΩ
Symbol Parameter Conditions Min Typ Max Units
(Note 4) (Note 5) (Note 4)
Oscillator
Frequency1 (RT = 26.7K) 175 200 225 kHz
Frequency2 (RT = 8.2K) 510 600 690 kHz
Sync threshold 3.2 3.8 V
PWM Comparator
Delay to Output COMP set to 2V CS 30 ns
stepped 0 to 0.4V, Time
to onset of OUT transition
low
Max Duty Cycle Inferred from deadtime 47.5 49 50 %
Min Duty Cycle COMP=0V 0 %
COMP to PWM Comparator 0.34
Gain
COMP Open Circuit Voltage VFB = 0V 4.3 5.2 6.1 V
COMP Short Circuit Current VFB = 0V, COMP=0V 0.6 1.1 1.5 mA
Slope Compensation
Slope Comp Amplitude Delta increase at PWM 80 105 130 mV
Comparator to CS
Output Section
Deadtime Cload = 0, 10% to 10% 85 135 185 ns
Output High Saturation Iout = 50mA, VCC - VOUT 0.25 0.75 V
Output Low Saturation IOUT = 100mA 0.25 0.75 V
Rise Time Cload = 1nF 16 ns
Fall Time Cload = 1nF 16 ns
Thermal Shutdown
Tsd Thermal Shutdown Temp. 165 ˚C
Thermal Shutdown Hysteresis 15 ˚C

Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device
is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJA, and
the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperture is calculated using:

Where the value of θJA for the mini SO-10 (MM) package is 200˚C/W. Exceeding the maximum allowable dissipation will cause excessive die temperature, and the
device will go into thermal shutdown.
Note 3: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. The machine model is a 200pF capacitor discharged directly
into each pin. The machine model ESD rating for pin 5 and pin 6 is 150V.
Note 4: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control
(SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 5: Typical numbers represent the most likely parametric norm for 25˚C operation.

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LM5030
Typical Performance Characteristics Unless otherwise specified: TJ = 25˚C.

VCC vs VIN VCC vs ICC (VIN = 48V)

20058105 20058107

Oscillator Frequency vs Temperature

Oscillator Frequency vs RT RT = 26.7kΩ

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20058109

Soft Start Current vs Temperature Deadtime vs Temperature

20058110 20058111

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 LM5030
Typical Performance Characteristics Unless otherwise specified: TJ = 25˚C. (Continued)

Feedback Amplifier Gainphase

20058115

Detailed Operating Description Error Amplifier

The LM5030 High Voltage PWM controller contains all of the An internal high gain error amplifier is provided within the
features needed to implement Push-Pull and Bridge topolo- LM5030. The amplifier’s non-inverting reference is tied to
gies, using current-mode control in a small 10 pin package. 1.25V. In non-isolated applications the power converter out-
Features included are, startup regulator, dual mode current put is connected to the VFB pin via the voltage setting
limit, dual alternating gate drivers, thermal shutdown, soft- resistors and loop compensation is connected between the
start and slope compensation. This high speed IC has total COMP and VFB pins.
propagation delays < 100nS. The Functional Block Diagram For most isolated applications the error amplifier function is
of the LM5030 is shown in Figure 1. implemented on the secondary side ground. Since the inter-
The LM5030 is designed for Current-Mode Control convert- nal error amplifier is configured as an open drain output it
ers which require alternating outputs, such as Push-Pull and can be disabled by connecting VFB to ground. The internal
Half/Full Bridge topologies. The features included in the 5K pull-up resistor, connected between the 5V reference and
LM5030 enable all of the advantages of Current-Mode Con- COMP, can be used as the pull-up for an optocoupler or
trol, line feed-forward, cycle by cycle current limit and sim- other isolation device.
plified loop compensation. The oscillator ramp is internally
buffered and added to the PWM comparator input to provide PWM Comparator
slope compensation necessary for current mode control at
higher duty cycles. The PWM comparator compares the compensated current
ramp signal to the loop error voltage from the internal error
amplifier (COMP pin). This comparator is optimized for
High Voltage Start-Up Regulator speed in order to achieve minimum discernable duty cycles.
The LM5030 contains an internal high voltage startup regu- The comparator polarity is such that zero Volts on the COMP
lator. The input pin (Vin) can be connected directly to line pin will cause a zero duty cycle.
voltages as high as 100V. The regulator output is internally
current limited to 10mA. Upon power up, the regulator is Current Limit/ Current Sense
enabled and sources current into an external capacitor con-
nected to the VCC pin. The recommended capacitance range The LM5030 contains two levels of over-current protection. If
for the VCC regulator is 0.1µF to 50µF. When the voltage on the voltage on the current sense comparator exceeds 0.5
the VCC pin reaches the regulation point of 7.7V, the control- Volts the present cycle is terminated (cycle by cycle current
ler outputs are enabled. The outputs will remain enabled limit). If the voltage on the current sense comparator ex-
unless, VCC falls below 6.1V or if the SS/SHUTDOWN pin is ceeds 0.625 Volts, the controller will terminate the present
pulled to ground or an over temperature condition occurs. In cycle and discharge the softstart capacitor. A small RC filter,
typical applications, an auxiliary transformer winding is diode located near the controller, is recommended for the CS pin.
connected to the VCC pin. This winding raises the VCC An internal MOSFET discharges the current sense filter
voltage greater than 8V, effectively shutting off the internal capacitor at the conclusion of every cycle, to improve dy-
startup regulator and saving power while reducing the con- namic performance.
troller dissipation. The external VCC capacitor must be sized The LM5030 CS and PWM comparators are very fast, and
such that the self-bias will maintain a VCC voltage greater as such will respond to short duration noise pulses. Layout
than 6.1V during the initial start-up. During a fault mode considerations are critical for the current sense filter and
when the converter self bias winding is inactive, external sense resistor. The capacitor associated with the CS filter
current draw on the VCC line should be limited as to not must be placed very close to the device and connected
exceed the maximum power dissipation of the controller. An directly to the pins of the IC (CS and RTN). Also if a current
external start-up or other bias rail can be used instead of the sense transformer is used, both leads of the transformer
internal start-up regulator by connecting the VCC and the Vin secondary should be routed to the sense resistor, which
pins and feeding the external bias voltage (8 - 15V) to that should also be located close to the IC. If a current sense
node. resistor located in the drive transistor sources is used, for
current sense, a low inductance resistor should be chosen.

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LM5030
Current Limit/ Current Sense The RT resistor should be located very close to the device
and connected directly to the pins of the IC (RT and GND).
(Continued)

In this case all of the noise sensitive low power grounds Slope Compensation
should be commoned together around the IC and then a
The PWM comparator compares the current sense signal to
single connection should be made to the power ground
the voltage derived from the COMP pin. The COMP voltage
(sense resistor ground point).
is set by either the internal error amplifier or an external error
The second level threshold is intended to protect the power amplifier through an optocoupler. At duty cycles greater than
converter by initiating a low duty cycle hiccup mode when 50% (composite of alternating outputs) current mode control
abnormally high, fast rising currents occur. During excessive circuits are prone to subharmonic oscillation. By adding an
loading, the first level threshold will always be reached and additional ramp signal to the current sense ramp signal this
the output characteristic of the converter will be that of a condition can be avoided. The LM5030 integrates this slope
current source but this sustained current level can cause compensation by buffering the internal oscillator ramp and
excessive temperatures in the power train especially the summing it internally to the current sense (CS) signal. Addi-
output rectifiers. If the second level threshold is reached, the tional slope compensation may be added by increasing the
softstart capacitor will be fully discharged, a retry will com- source impedance of the current sense signal.
mence following the discharge detection. The second level
threshold will only be reached when a high dV/dt is present
at the current sense pin. The signal must be fast enough to
Soft Start/ Shutdown
reach the second level threshold before the first threshold The softstart feature allows the converter to gradually reach
detector turns off the driver. This can usually happen for a the initial steady state operating point, thus reducing start-up
saturated power inductor or shorted load. Excessive filtering stresses and surges. An internal 10uA current source and an
on the CS pin, extremely low value current sense resistor or external capacitor generate a ramping voltage signal which
an inductor that does not saturate with excessive loading limits the error amplifier output during start-up. In the event
may prevent the second level threshold from ever being of a second level current limit fault, the softstart capacitor will
reached. be fully discharged which disables the output drivers. When
the fault condition is no longer present, the softstart capaci-
Oscillator, Shutdown and Sync tor is released to ramp and gradually restart the converter.
The SS pin can also be used to disable the controller. If the
Capability SS pin voltage is pulled down below 0.45V (nominal) the
The LM5030 oscillator is set by a single external resistor controller will disable the outputs and enter a low power
connected between the RT pin and return. To set a desired state.
oscillator frequency the necessary RT resistor can be calcu-
lated as: OUT1, OUT2 and Time Delay
The LM5030 provides two alternating outputs, OUT1 and
OUT2. The internal gate drivers can each sink 1.5A peak
each. The maximum duty cycle for each output is inherently
limited to less than 50%. The typical deadtime between the
falling edge of one gate driver output and the rising edge of
Each output switches at half the oscillator frequency in a the other gate driver output is 135ns.
Push-Pull configuration. The LM5030 can also be synchro-
nized to an external clock. The external clock must be of
higher frequency than the free running frequency set by the Thermal Protection
RT resistor. The clock signal should be capacitively coupled Internal Thermal Shutdown circuitry is provided to protect the
into the RT pin with a 100pF capacitor. A peak voltage level integrated circuit in the event the excessive junction tem-
greater than 3 Volts with respect to ground is required for perature. When activated, typically at 165 degrees Celsius,
detection of the sync pulse. The sync pulse width should be the controller is forced into a low power reset state, disabling
set in the 15 to 150nS range by the external components. the output drivers and the bias regulator. This feature is
The RT resistor is always required, whether the oscillator is provided to prevent catastrophic failures from accidental
free running or externally synchronized. The voltage at the device overheating.
RT pin is internally regulated to a nominal 2 Volts.

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 Typical Application Circuit
Typical Application Circuit, 36V - 75VIN and 3.3V, 10A OUT

9
20058103

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LM5030
LM5030
ITEM PART NUMBER DESCRIPTION VALUE
C 1 C0805C472K5RAC Capacitor, CER, KEMET 4700p, 50V
C 2 C0805C103K5RAC Capacitor, CER, KEMET 0.01µ, 50V
C 3 C4532X7S0G686M Capacitor, CER, TDK 68µ, 4V
C 4 T520D337M006AS4350 Capacitor, TANT, KEMET 330µ, 6.3V
C 5 T520D337M006AS4350 Capacitor, TANT, KEMET 330µ, 6.3V
C 6 C4532X7R3A103K Capacitor, CER, TDK 0.01µ, 1000V
C 7 C3216X7R2A104K Capacitor, CER, TDK 0.1µ, 100V
C 8 C4532X7R2A105M Capacitor, CER, TDK 1µ, 100V
C 9 C4532X7R2A105M Capacitor, CER, TDK 1µ, 100V
C 10 C0805C102K1RAC Capacitor, CER, KEMET 1000p, 100V
C 11 C1206C223K5RAC Capacitor, CER, KEMET 0.022µ, 50V
C 12 C3216X7R1E105M Capacitor, CER, TDK 1µ, 25V
C 13 C3216COG2J221J Capacitor, CER, TDK 220p, 630V
C 14 C3216COG2J221J Capacitor, CER, TDK 220p, 630V
C 15 C1206C104K5RAC Capacitor, CER, KEMET 0.1µ, 50V
C 16 C0805C101J1GAC Capacitor, CER, KEMET 100p, 100V
C 17 C0805C101J1GAC Capacitor, CER, KEMET 100p, 100V
C 18 C3216X7R1H334K Capacitor, CER, TDK 0.33µ, 50µ
D 1 MBRB3030CTL Diode, Schottky, ON
D 2 CMPD2838-NSA Diode, Signal, Central
D 3 CMPD2838-NSA Diode, Signal, Central
D 4 CMPD2838-NSA Diode, Signal, Central
D 5 CMPD2838-NSA Diode, Signal, Central
L 1 MSS6132-103 Input Choke, Coilcraft 10µH, 1.5A
L 2 A9785-B Output Choke, Coilcraft 7µH
R 1 CRCW12061R00F Resistor 1
R 2 CRCW12064990F Resistor 499
R 3 CRCW2512101J Resistor 100, 1W
R 4 CRCW2512101J Resistor 100, 1W
R 5 CRCW12064022F Resistor 40.2K
R 6 CRCW120610R0F Resistor 10
R 7 CRCW120610R0F Resistor 10
R 8 CRCW12061002F Resistor 10K
R 9 CRCW120623R7F Resistor 23.7
R 10 CRCW12062002F Resistor 20K
R 11 CRCW120610R0F Resistor 10
R 12 CRCW12063010F Resistor 301
R 13 CRCW120610R0F Resistor 10
R 14 CRCW12061001F Resistor 1K
TX 1 A9784-B POWER XFR, COILCRAFT
TX 2 P8208T CURRENT XFR, Pulse 100:1
U1 1 LM5030 REGULATOR, NATIONAL
U2 2 MOCD207M OPTO-COUPLER, QT
OPTOELECTRONICS
U3 3 LM3411AM5-3.3 REFERENCE, NATIONAL
651-1727010 DUAL TERMINALS, MOUSER 3 per ASSY
X 1 SUD19N20-90 FET, N, 200V, SILICONIX
X 2 SUD19N20-90 FET, N, 200V, SILICONIX

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 LM5030 100V Push-Pull Current Mode PWM Controller
Physical Dimensions inches (millimeters)
unless otherwise noted

10 Lead MSOP Package

NS Package Number MUB10A

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systems which, (a) are intended for surgical implant support device or system whose failure to perform
into the body, or (b) support or sustain life, and can be reasonably expected to cause the failure of
whose failure to perform when properly used in the life support device or system, or to affect its
accordance with instructions for use provided in the safety or effectiveness.
labeling, can be reasonably expected to result in a
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