10.

2 MICROWAVE INTEGRATED CIRCUITS (MICS)

Microwave circuits exist in two different forms:
Discrete circuits and
Microwave integrated circuits (MICs
A
discrete circuit consists of packaged microwave active devices/components mounted in coaxial and
waveguide assemblies. The components in discrete circuits can be removed from the assembly
replaced.
 (The main advantages of ICs are that they are smaller in sizeand 1Sually require less power to operate)
Similar to conventionalICs, microwave integrated circuits (MICs) can be fabricated in tWo Ways. They
are as follows:
V Hvbrid MIC (HMIC)
Ve Monolithic MIC(MMIC)
Fabrication materials and component soldering affect electrical properties and overall performance of
the circuit. For example.(microwave circuits often use resistors, capacitors, and inductors, and these
components are implemented differently in HMIC and MMICMMICS are more advantageous com
pared to HMICs based on their design differences and circuit performance capab1lities However, the
design procedure of MMICs is more complex, because all components of entire circumt are fabricated
on a single semiconductor substrate.
Hybrid MIC(HMIC): An HMICconsists of a number of discrete active devices (diodes/transistors)
and passive components (reaonators, capacitors, and circulators) that are fabricated separately and then
integrated onto a common substrate using solder or conductive epoxy adhesive.
The passive elements are fabricated by using thick-film or thin-film technology. Despite being
developed in 1960s, hybrid MIC still provides flexibility in circuit implementation and is also
economical.
Monolithic MIC(MMIC): In MMIC, all active and passive components as well as transmission lines
are built simultaneously on a single crystal substrate using various technologies such as ion implanta
tion, diffusion, oxidation, epitaxial growth, masking, and etching.
Substrate of MMICis defined as a substance on which electronicdevice are built. Materials used are
GaAs, glass, rutile, Alumina, beryllium, ferrite.)
The MMICs are quite different from conventionl ICs. For example, the package density of conven
tional ICs is high; whereas that of MMICs is quite low and highly reliable. The main features of MMIS
are as follows:

Minimal mismatches and minimal signal delay.

There are no wire bond reliability problems.
We can fabricate up to thousands of devices simultaneously into a single MMIC.

10.3 ADVANTAGES AND DISADVANTAGES OF MMICS

Advantages
MMIGs offer the following advantages as compared with discrete circuits and hybrid ICs.
These are economical when produced in large quantities.
They are small in size and light in weight.
uth
They have very good reproducibility. they
Can

They are highly reliable and suitable for space and military applications, because
stand adverse environmental conditions, compared with discrete and hybrid ICs.
They offer more bandwidth.
They exhibit improved performance.
pisadvantages:
Development time is large compared with discrete components.
produce a few ICs.
Itis expensive to
.Choice of equipment is very limited.
capabilities.
They exhibit low power-handling

10.4 COMPARISON
OF MMICs WITH HMICS
comparcd and presented in Table 10.1.
MMIC and HMICtechnologies have been
The
MMICs and HMICs
Tble 10.1 Comparison of
Monolithic MICs
Hybrid MICs
wafers
is laborious, because it contains It is easy to manufacture and fabricate on
Manufacturing in batches
individual components
AIl the interconnections are deposited
Some of the interconnections among components
are deposited, and some are wire bonded
Cost per unit is less
Cost per unit is more
Has lesser size and weight
Has greater size and weight
Design flexibility is less Basically, they use FET's geometry in different
configurations to realize a wide variety of
functions such as amplification, oscillation, and,
hence, they have more design flexibility
Circuits can be tuned for optimum Almost impossible to make any changes after
performance even after manufacturing; manufacturing; that is, circuit tweaking is not
that is,circuit tweaking is possible possible

Broadband performance is limited Broadband performance is good

Reproducibility is good Reproducibility is excellent

10.5 APPLICATIONS OF MMICS

The most important application of MMICs is electronically steered phased array antenna which is
not practical with hybrid technology because of the size and mass of transceiver modules. Military
and space applications are major driving force behind it. In military, MMICs are used in phased array
fadar, decoys, synthetic-aperture radar, remote sensing and instrumentation etc. In military technology.
MMICs are used in synthetiC-aperture radars, phased-array radars, decoys, remote sensing, arnd instru
mentation. Their space applications include astronomy, lowearth orbit mobile systems, radiometers.
cOmmunication satellites, and so on. They are also used in many civil applications such as wireless
LANs, medical systems, Internet systems, mobile phones, smart cards, and GPS.
 tngineerning
Among the applications of clectronically-steered phased-array antenna is important
MMICs,
application. Because of its size and mass of the individual transmitter-receiver modules it is not
the
practical to use hybrid
MMICs are often usedtechnology.
in mobile receivers, and WLAN systems that require small, inex
C phones,and GPS
euts which offer high speed performance These circuits operate in the 5-GHz to 300
GHz frequency band. The
MMIC can easily be fabricated on an Si or GaAs chip with an area of 1 mm
ald a thckness of 100 mm. In designing MMICs commercially
O ootn electrical and layout design. Figure 10.1 illhustrates the available software packKages are used
elements: GaAs-MMIC with the following typical

Si,N, insulator
Thin-film resistor MIM capacitor
Air bridge Microstrip line Gold
Spiral coil
SizN, insulator
Thin-film resistor
lon Implantation

2nd metallization
1s metallization

Ground-plane metallizatio Via

GaAs GaAs substrate
n* -implantation Implanted resistor MIM capacitor
Fiqure 10.1 Monolithic
Microwave Integrated Circuit on GaAs
(i) Transmission lines can be either coplanar lines or microstrip
i) Resistors can be either thin metal films or ion lines.
(iii) planted dircctly in GaAs.
Inductors or coils possibly narrow mIcrostrip lines
(iv) Capacitors contain either a in the form of a loop or a
(v) Thc ground point can be metal-insulator-metal
(MIM) or an inter
spiral.
realized by a metal through the substrate digital structure.
10.6 MATERIALS USED FOR MMICS
The basic materials used for
fabricating MMICS, in general, are divided into
Substrate material four categories:
Conductor material
Dielectric material
Resistive films
10.6.1 Substrate Materials
Asubstrate of
MMICs is a slice of a solid passiveele"
tronic devices are built. Some of the semiconductor substance on which
used substrates are silicon active and
ferric
garnct, silicon, glass commonly
borosilicate, quartz, GaAs, GaN, and so on. alumina,materials
are shown in Table 10.2. carbide, these
Properties of some oI
 Tillrecent times, very few semiconductors (e.g., GaAs) were often used for the realisation of MMIC
components, as they are more suitable for
operation at RF frequencies. Traditional silicon technology
could not be used, because it leads to major 0ssues associated with parasitic capacitance and can also
influencethe ) factor of the componcnts. However, recent advancements in silicon bipolar transistor
(echnology made it possible to realize silicon-based RE MMICs. These advanced silicon technologies
usesilicon wafer of diameters up to 300 mm.

Table 10.2 Propcrtics of substrate materials

Property Si SiC GaAs InP GaN

Semi-insulating No Yes Yes Yes Yes
Resistivity (2-Cm) 10 -10 >10!0 10 -10 107 >100
Dielectric constant 11.7 9.7 12.9 14 8.9
Electron mobility (cm/Vs) 1450 500 8500 4000 800
Radiation hardness Poor Excellent Very good Good Excellent
Density (g/cm') 2.3 3.1 5.3 4.8 6.1
Thermal conductivity (Wcm-°C) 1.45 3.5 0.46 0.68 1.3
Operating Temperature(°C) 250 >500 350 300 >500
Energy gap(eV) 1.12 2.86 1.42 1.34 3.39
Break down field(kV/cm) ~300 >2000 400 500 >5000

For low unit cost, high volume market sectors, the advanced silicon technologies are more attractive.
The choice of substrate materials depends on various factors as in the case of high-power applications,
where wide band-gap materials such as SiC or GaN are used.

10.6,2 Conductor Materials

Conductor materials are used in ICs for electrical connectivity. The ideal conductor materials used
for MIM*CS should have high conductivity, good adhesion to the substrate, good etchability, and
solderability. They shouldhave a low temperature coefficient of resistance so that the properties do
not vary widely with temperature, and they should be capable of being deposited by a number of
methods.
Materials*with good conducting properties and ideal for ICs are copper, gold, silver, aluminum,
platinum, and so on. In microwave circuits some conductor materials are widely used to form both
he conductor pattern and the bottom ground plance and the properties of those materials are shown in
Table 10.3.
The conductor used should be thick enough to the current density. It can be seen in Table 10.3 that
aluminium has relatively good conductivity and good adhesion but, generally, the higher the electrical
conductivity, the poorer is the substrate adhesion, and vice versa. So, to achieve good adhesion with
high-conductivity materials, a very thin film of one of the poorer conductors is used between the sub
Strate and the good conductor; for example. Cr-Cu, Ta-Au. Aluminum has been used as interconnecting
material in ICs, Copper is a better conductor than aluminum, but even a small trade off in the substrate
wll destroy its properties. Therefore, in the chips with acopper interconnect, aspecial protection layer
Detwcen the substrate and copper is used.
 A0.6.3 Dielectric Materials
In MICs, the dielectric materials are used as insulators in capacitors,
couple-line structure, as a pro
tective layer for active devices, and as an insulating layer for passive circuits. Some of the commonly'
used dielectrics in microwave circuits are Sio, SiO,, and Ta,Os. They performn the following functions:
Provide insulation on a substrate that is especially important in a multi-level metallization system
Act as a barrier to dopants during procesSing
Provide surface passivation
Isolate one device from another
The commonly used dielectric materials and their properties are listed in Table 10.4. The desirable prop
erties of dielectric materials have the ability to withstand in high voltages i.e., high breakdown voltage;
ability to undergo processes without developing pin holes; and a low tangent.
Table 10.4 Properties of dielectric materials
Material Relative dielectric Dielectric strength Method of deposition
constant (E) (V/cm)
SiO 6-8 4x 10
Evaporation
SiO, 4 10 Deposition
Si,N, 7.6 10
Vapor phase, Sputtering
Ta,Os 22-25 6x10
Anodization, Sputering
|Al;0, 7-10 4 x 10°
Anodization, evaporation
10.6.4 Resistive Materials
Resistive materials provide the isolation between the contacts in IC circuits. These are used in MMICS
for realizing bias networks, terminators, and attenuators. Some of the
thin-film
used in MICs are NiCr, Cr, Ta, Cr-SiO, and Ti. MMIC resistors are realized withresistive materials
materials haviny
controlled thickness and resistivity, such as Ni-Cr, Ta, or the semiconductor itself with suitable dopiny
The properties required for agood microwave resistor are good stability, low
temperature coeficieno
resistance (TCR), adequate dissipation capability, and sheet resistivity.
 poration Fair

0.7 GROWTH OF MMICs

/MICscan be made in monolithic form or hybrid
gTOWTI On semiconductor
form. In monolithic cirçuits, active
substrate, passive components are either
and components are,
LTOWIIOnit. deposited
on the substrate or
10.7.1 Fabrication Techniques
The MMIC fabrication process includes
different techniques, such as
lon implantation
Difusion
Oxidation
Film deposition
Epitaxial growth
Lithography
Masking and etching
Metallization
lon implantation: It is a process in which controlled amounts of dopants are implanted in the substrate.
Kadiation of sufficient density of ions with required energy on substrate using ion beam is called ion
mplantation. Concentration of impurity ions is determined by the density, whereas the energy deter
Unes the depth of the implantation) Subsequent to implantation, the substrate is heated at high temper
alure. This process causes the substrate to melt and re-crystallize along with implants, thus activating
he implant. Irn silicon based technology, this technique mostwidely used to form active regions of a
tevice like base, emitter and collector regions.
Diffusion: [t is a process in which a substrate is redistributed from an area of a relatively high concen-
tratioOnn to an area of arelativelv low concentration duc to random thermal motion. ItSimilar to ion implan
ation, this is also used for controlling amounts of dop ants in MMIC fabrication consists of diffusing
Puities into pure material to alter the basic pure characteristics of the material. Both processes are
Odope the semiconductor substrate selectively to produce either an n-type or a p-type layer.
 OxidationIt is the chemical process of joining oxygen with another element to form a compound of
the material and oxygen. Oxidation is one of the most basic deposition technology used to form sil
silicon
dioxide on a silicon substrate. This is done by heating (800° C-1100° C) the substrate in an oxidized
atmosphere. for example, in achamber containing water vapor or Oxygen as shown in Figure 10.2,This
process cohsumes some of the substrate as it proceeds and is limited to materials that can be oxidized
Wafers

Water vapor or
Oxygen inlet

Quartz tube
Cap
3-Zone furnace

Figure 10.2 Chamber used for oxidation

Film deposition: Various types of thin films are used to fabricate integrated and discrete devices or
circuits. Thin films are divided into four groups as follows:
Thermal oxides
Polycrystalline silicon
Metal films
Dielectric layer
Deposition is the process in which the material is released from the source and transfe dtowards
a substrate, forming a thin film. There are different
beam evaporation, DC sputtering, and vacuum methods of deposition. They . electron
evaporation.
Epitaxial Growth: Epitaxial layer means the formation of a single crystal layer on top of a single crys
tal substrate. The doping level of the epitaxial layer is different from the substrate on which the epitaxial
layer isformed.
Thi process is used to form films of a thickness ranging from l um to 100 um. Selective epitary
means the growth of a single-crystal semiconductor on a substrate patterned with oxide or nitride, This
process is superior to the local oxidation process in providing isolation. Care should be taken to suppress
the nucleation of silicon on dielectric. The growth process can be controlled by controlling the flow of
gases or controlling the temperature. This process allows deposition of even thin layers. Depending on
the phase of the materialused to form the epitaxial layer, they are classified into Vapor Phase Epitaxy
(VPE), Liquid Phase Epitaxy (LPE), and Molecular Beam Epitaxy (MBE).
 IOcal1Zed Can dl

thography: The literal meaning of lithograpBy is stone writing. The transfer of apattern or an image
om one medium to another, as from a mask to a wafer, is called lithography. In the context of VLSI
sbrication. it means the patterning of shapes on aresist. Several lithography technologies are available,
nd some of them are as follows:
Electron-beam lithography: In this process, an electron-sensitive resist film is applied over the
substrate, and a beam of electrons is made to scan on the surface. This scanning deposits energy on
the resist film in the required pattern. The advantages of this process are that it gives atomic-level
resolution, and an infinite number of patterns can be formed. The disadvantages of this process
are that it is slow, expensive, and complicated.
lon-beam lithography: It is similar to electron beam lithography, where ions are used in place of
electrons. It gives mnore resolution than electron beam lithography.
Ontical lithography: It uses light to form shape patterns on the substrate. Alight-sensitive material
known as a photoresist is used in this process.
J-rgy lithography: In this process, X-rays are used to selectively form patterns on the substrate.
: Masking andEtching: Atransparent glass plate is covered by patterns of opaque areas that prevent
a to pass through. Maskis used tomark areas, to be later etched on wafer, on aphotoresist by using
;amulsion chrome iron oxide silicon to produce opaque areas.
Etching is the process of removing a material by a chemical reaction. During the IC fabrication,
elective openings are required in silicon dioxide. These openings are required to diffuse the impuri
s. During this process, a uniform film of photosensitive emulsion is applied over the wafer. Kodak
 Metallization: In this process, all the active and passive elements of the integrated circuit are intercon
nected using an appropriate metal. The desired pattern ofinterconnections is formed using the photoresist
technique. The realization of an MMICis a process in which the final circuit elements are constructed
by a combination of substrate patterning followed by selective implantation, etching,and metallization.
10.8 MOSFET FABRICATION
Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is one of the important devices in ICs.
In the fabrication of åny C, initially, a large silicon wafer that acts as a substrate is
considered. These
substrates contain an equal number of free charge carriers (electrons and holes). Then, the substrate is
doped with impurities to create concentrated regions ofN (electron) and P (hole) regions.
are required, because the movement of electrons and holes is what These regions
enables transistors to work. Later
steps in fabrication involve many processes such as oxidation, diffusion, and
the MOSFET formation, fabrication procedure of NMOS and deposition. In this section,
CMOS are discussed.
10.8.1 MOSFET Formation
The fabrication of MOSFET involves the
following steps:
Initially, an N-type or a P-type substrate of 100-mm to 200-mm
is taken.
diameter and 0.5-mm thickness
Then, an insulation layer of silicon dioxide is grown on the
The surface is covered with a photoresist material. substrate.
The photoresist layer is then exposed to UV light through a mask.
in those regions where impurity (P or N')diffusion takes place. This mask will have windows
The photoresist material along with underlying silicon dioxide is
Again, a thin layer of SiO; is deposited over the surface. etched away.
 Inteqrated Circuits

. The oxide layer is covered by deposition of

polysilicon.
Then, using the photoctching process, twO windows are opened in the thin oxide region, into
which P' or N impurities are diffused.
Then, aluminum metal is deposited over its surface to a thickness of I
This metal layer is etched to form the required interconnection pattern. micrometer.

10.8.2 NMOS Fabrication Process (or) Growth

The fabrication process of an NMOS involves the following steps:
1. Initially, a substrate is taken and is lightly doped with a P-type impurity such as boron. Impurity
concentrations are in the order of 10®/cm, and they give a resistivityof an order from 25 ohm cm
to 2 ohm cm.
2. Then, a thick oxide layer of thickness 1um is deposited on the substrate which acts as a barrier to
dopants and provides an insulating substrate to other layers may be deposited and patterned on it.
3. Asilicon nitride layer (photoresist) is deposited on the oxide surface. Using the photo-etching
process, regions in which diffusion takes place are defined.
4. UV rays are passed on to photo resist layer through a mask to mark regions for diffusion. Boron
ions are implanted to prevent inversion under the field oxide. The areas that are exposed to ultra
violet radiation are polymerized, but the areas required for diffusion are shielded by the mask and
remain unaffected.

Step 1: P Substrate

Thick oxide (1 um)

Step 2:

> Photoresist

Step 3:

Step 4: UV light

Mask

J. Then, the SiO, Si,N, layers are cleaned, and the wafer surface is exposed in the window definec
by the mask.
Window in oxide
Step 5:

6. After removing the photoresist, a thin layer of SiO, of thickness 0. Ium is grown on the top of th
surface. The polysilicon can be deposited by using chemical vapour deposition (CVD) method
 control over
thickness, impurity
structure of fine pattern with con-
the seleeted area to form gate care of.
Centrations and resistivity should be taken polysilicon. After this thin oxide is
patterning of
7. More photoresist and masking allows areas which leads to formation of source and removedto
drain. Diffusion
isdiffuse
done nbytype
passing
impurities with expOsed
a gas into desired nimpurity at high temperature over surface. The polysilicon
with the underlying thin oxide acts as a mask during diffusion-this process is calledI self-aligning.

Patterned poly (1-2 um) on

thin oxide (800-1000 Á)
Step 6:

nt diffusion (1 umn deep)

Step 7:

and selected areas are etched for souras

8. After growing thick oxide it is masked with photoresist
drain and some areas of polysilicon for connections.
Contact holes (cuts)
Step 8:

Patterned metallization
Step 9: (aluminum 1 um)

Figure 10.9 NMOS fabrication steps

9. Metallization is done all over the surface. This metal (aluminum) layer is then masked and etchet
to form the required interconnection pattern.
Note:

p diffusion p substrate

ndiffusion n substrate

oxide polysilicon

metal

10.8.3 CMOS Fabrication Process (or) Development

The possible approaches for CMOS fabrication are listed below
p well
n well
 ed Circuits
10.15
Twin tub
Silicon on insulator processes
Thebaasic processing steps are of a similar
and
Itwin tub are described below: nature as those used for NMOS.
The two processes p well
P-well process: Steps involved in this
Figure10.l0 and how the p-well acts as process are masking, patterning,
inverter is shown in Figure 10.11.and diffusion and are shown in
Mask 1- Mark the areas for deep p
well diffusion
Mask 2- After thick oxide is
to grow the p-type deposited this mask selects the areas for thin
and oxides on the thick
Msok 3-This mask is used to n-type transistors and wires. oxides
ask 4- It uses a deposit the polysilicon layer over the thin
devices
p-plus(+ve) mask to define all arcas to diffuse p oxide regions
Mask 5- It uses a p-plus (ve)
impurity in order to achieve p
mask to define all areas to diffuse n
devices in p well impurity in order to achieve n
Mask 6- Mark contact cuts.
Mask 7- Mark metal layer pattern
Mask 8- This masking is used to
form the openings to access the
glass (passivation) layer. bonding pads by applying an over

SiO

pwell
> (4-5 um)

Polysilicon

Thin oxide
and poly
silicon

p diffusion
p mask
(positive)

p mask (negative) ndiffusion

Figure 10.10 CMOS p-wellprocess

 Vin
Vop Vss
Vout

Figure 10.11 CMOS p-well inverter showing Vpp and Vss substrate connections

Note: The p-well is used as the substrate for ndevices within the
n-parent
polarity restrictions so that there is a electrical isolation between two areas. substrate with voltage
are now, in effect, two substrates, two substrate connections (Vpp and However, since there
Vss) are required (as shown in
Figure 10.11).
 Monolithic Microwave Integrated Circuits | 10.17

10.9 THIN-FILM FORMATION

Athin-filmiormation is a thin solid layer formed on a substrate. The resistors andinductors developed
usingthi-Tilmtechnology are lumped elements and are extremely useful in MMIC appl1cations. These
humpcdclements can be used up to 20 GHz frequencics, and at these high
ncgligible phase shift. frequencies, the lumped ele-
show a
ments
Theformation of a thin film basically consists of three stages. They are
Nucleation: The molecules of whatever material is to be
he Wafer surface, and they become adatoms deposited on the substrate are absorbed
Grain growth: The adatoms from the previous (isolated atomstositting
stage combine form on a crystal
clusters that surface).
are also called
island clusters.
Continuous film: These island clusters continue to grow and
on the substrate. condense into a thin solid substance
Twoimportant parameters in thin-film formation are step coverage and aspect ratio.
Step coverage:(This is used to measure the uniformity of the thin film.)The uniformity of the film should
becontrolled to a high degree across the diameter of the wafer, because poor step coverage leads to high
inside the device. It is defined as ratio of the minimum thickness deposited on the
side of the step
odeposition on the horizontal surface
A_pectratio: It is ratio of depth to width. The gap between two metal lines is called a contact hole. A
Den contact hole would have a large aspect ratio and is hard to fill.
toMethods of thin-filmdeposition:
Thin-film deposition involves two methods, They are
aten
Chemical vapor deposition (CVD)
Physical vapor deposition (PVD\
In chemical vapor deposition, gases are enabled to react, and the desired film is formed on the
surface
of the substrate, Physical vapor deposition uses physical processes to deposit the film. PVD
are more yersatile than CVD methods.
techniques
Components formed using thin-film process: In MMICs, lumped resistors, lumped capacitors, and
planar inductors are formed using thin-film methods.
10.9.1 Planar Resistor Films
Athin resistive film deposited on a semi insulating substrate forms a planar resistor. The
resistive film
laterials with a resistivity range of 30-1k ohm-meter such as Al, Cu, Au, Ta, ete are mostly used and
ey are widely utilised for termination of power combiners, hybrid couplers, and bias voltage
circuits.
ne design of planar resistors, some factors are considered: (1) the material resistivity, (2) the ther
al resistance of the material, (3) temperature coefficient of the resistive material, and (4) the
frequency
bandwinardth.resistors are classified in to three
groups depends on its fabrication process as follows
hconductor films (ii) metal deposited films and (ii) cermets. There are two methods by which
he
semiconductor
subst planar resistors are fabricated, (i) by forming a conducting epitaxial film on the
Figure 10.13 (a). Metal film aresistors
rate (i) by implanting semi-insulating, highresistivity region within asubstrate as shown in
are formed by evaporating a metal layer over the substrate and
lorming the desired pattern by photolithography.
 Metal Resistor
p> 20

Semi-insulating substrate
(a) Implanted Resistor
Metal

Semi-insulating substrate

(b) Mesa Resistor

Metal

3<p< 100
Semi-insulating substrate
(c) Deposited Resistor
configuration of plane resistor
Figure 10.13 (a) Planar
resistor film is given by the general formula
The resistance of aplanar

(10.2,
W

film: p is the sheet resistivity of the film; anda is the area b

where /is the length of the resistive
width of the film (w).
by thickness of the film (t) multiplied by
Resistive Contacts Substrate
material

Low-resistivity
material Ps

Figure 10.13 (b) Thin-film resistor

10.9.2 Planar Inductor Films

There are various configurations of a monolithic inductor. Figure 10.14 design procedures of some
planar inductor shown in Figure 10.14. The inductors which provide inductances upto 0.5 nH are single
microstrip line, meander, and single-loop inductors which are rarely used. Among these inductors,
meander inductor is used to conserve chip area, but a more better approach is winding the microstrip
line in aspiral which is shown in Figure 10.14 (d), (e), and (). Because of layout simplicity rectangular
spiral is used mostly. Thus, compared to circular layouts, higher losses will be obtained in rectangular
Jayouts i.e., for equal inductance, the metallization loss results are as high as 10%. Theouter dimension sF
 OD.thestrip width w, the number of turns n, spacing between lines s, and the gap between opposing
Lpsofcoupled|lines Gare its parameters.

Signal pad
(a) (b) (c)

OD

Opposite
coupled line G
groups
Underpass
Air bridge
(d) (e) ()

Figure 10.14 Monolithic inductor configurations; (a) Microstrip line; (b) Meander line: c) Single
loop, (d) Circular spiral; le) Octogonal spiral; (f) Rectangular spiral
tor the monolithic circuits, the distinctive inductance values ranges from 0.5to 10 nH. The inductance
fa circular spiral inductor is given by with nturns and outer diameter d, is (Figure 10.15)

do

Figure 10.15 Circular spiral inductor

L= 0.03125n'd, nH/mil (10.3)

ihere d, =5d, =2.5 n(w ts) in mils

n=number of turns
S= separation in mils
W=film width in mils

20,9,3 Planar Capacitor Films

hMMICs, two types of capacitors are generally used. They are the metal-oxide-metal capacitor and
terdigitated capacitor.
capacitor: It uses a dielectric film between two electrodes and forms an overlay
Metal-oxide-metal
re. It is widely used for low impedance circuits, bypass, and dc blocking circuits with higher
as shown
ih:has two electrodes at the top and bottom, and a dielectric layer is in between them
3ure 10.16 (a). The capacitance of the dielectric metal-oxide-metal-capacitor can be expressed by
 (10.4)
C=E, h Farad
where [, = 8.854x 10Fm.
¬, =relative diclcctric constant of diclectric material,
l= metal length.
w=metal width, and
h =height of the diclectric material

Metals

Dielectric
Substrate
Substrate
h Ground plane

(a) (b)

Figure 10.16 (a) Metal-oxide-metal capacitor; (b) Interdigitated capacitor

JInterdigitated capacitor: The interaction area can be enhanced by incorporating a comb shaped elec
shown
trode in between the strip: such a structure is called an interdigital capacitor structure, and it is
in Figure 10.16 (b). These are suitable for applications where low values of capacitance are required,
such as high inpedance matching circuits. The capacitance value varies with some parameters. They
of a
are. w// ratio. gap distance between two conductors, and the number of fingers N. It consists
single-layer structure. and its capacitance is given by
Ct| (10,5)
N-3)K, +K,] pF/cm
where N is the number of fingers, K,= 0.089 pF/cm is the contribution of the interior finger for h >w,
and K, =0.10 pF/cm is the contribution ofthe two external fingers for h> w
w=finger base width in cm
l=finger length in cm
h= finger height in cm