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ELECTRONIC DEVICES

1 SEMICONDUCTOR BASICS

1. INTRODUCTION

Since this chapter is primarily an introduction to solid state devices, it would be preferable not
to delay this discussion with subjects such as atomic theory, quantum mechanics, and electron
models. However, the behaviour of solid-state devices is directly related to these subjects. For
example, it would be difficult to understand how an electron is transported through a
semiconductor device without some knowledge of the electron and its interaction with the
crystal lattice. Therefore, in this chapter we shall investigate some of the important properties
of electrons, with special emphasis on two points:
(1) the electronics structure of atoms, and
(2) the interaction of atoms and electrons with excitation, such as the absorption and emission
of light.
We begin with a review of the basic atomic properties of matter leading to discrete electronic
energy levels in atom. We find that atomic energy levels are spread into energy bands in a
crystal. This band structure allows us to distinguish between an insulator, a semiconductor,
and a metal.

2. THE NATURE OF THE ATOM

In order to explain many phenomena associated with conduction in gases, metals and
semiconductors and the emission of electrons from the surface of a metal, it is necessary to
assume that the atom has loosely bound electrons which can be torn away from it.
Rutherford found that the atom consists of a nucleus of positive charge that contains nearly all
the mass of the atom and hence it will remain substantially immobile. Surrounding this central
positive core are negatively charged electrons. As a specific illustration of this atomic model,
consider the hydrogen atom. This atom consists of a positively charged nucleus (a proton) and
a single electron. The force of attraction between the electron and the proton follows Coulomb’s
law. It can be shown from classical mechanics that the resultant closed path will be a circle or
an ellipse under the action of such a force. This motion is exactly analogous to that of the
planets about the sun, because in both cases the force varies inversely as the square of the
distance between the particles.
Assume, therefore, that the orbit of the electron in this planetary model of the atom is a circle,
the nucleus being supposed fixed in space. It is a simple matter to calculate its radius in terms

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of the total energy W of the electron. The force of attraction between the nucleus and the

electron is e2 4 0 r2 , where the electronic charge e is in Coulombs, the separation r between

the two particles is in meters, the force is in Newtons, and 0 is the permittivity of free space.

By Newton’s second law of motion, this must be set equal to the product of the electronic mass

v2
m in kilograms and the acceleration toward the nucleus, where v is the speed of the electron
r
in its circular path, in meters per second.

e2 mv2
Then, = ... (i)
40 r2 r

Furthermore, the potential energy of the electron at a distance r from the nucleus is − e2 4 0 r

1
, and its kinetic energy is mv2. Then, according to the conservation of energy.
2

1 e2
W= mv2 – ... (ii)
2 4 0 r

where the energy is in Joules. Combining equation (i) with equation (ii) we get

e2
W=– ... (iii)
8 0 r

which gives the desired relationship between the radius and the energy of the electron. This
equation shows that the total energy of the electron is always negative. The negative sign
arises because the potential energy has been chosen to be zero when r is infinite. This
expression also shows that the energy of the electron becomes smaller (i.e., more negative)
as it approaches closer to the nucleus.
However, an accelerated charge must radiate energy, in accordance with the classical laws of
electromagnetism. If the charge is performing oscillations of a frequency f, the radiated energy
will also be of this frequency. Hence, classically, it must be concluded that the frequency of the
emitted radiation equals the frequency with which the electron is rotating in its circular orbit.
But if the electron is radiating energy, its total energy must decrease by the amount of this
emitted energy. As a result, the radius r of the orbit must decrease, in accordance with Equation
(iii). Consequently, as the atom radiates energy, the electron must move in smaller and smaller
orbits, eventually falling into the nucleus. Since the frequency of oscillation depends upon the
size of the circular orbit, the energy radiated would be of a
gradually changing frequency. Such a conclusion, however, is incompatible with the sharply
defined frequencies of spectral lines.

2.1. The Bohr Atom

Above difficulty was resolved by Bohr. He postulated the following three fundamental
laws:

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i. Not all energies as given by classical mechanics are possible, but the atom can possess
only certain discrete energies. While in states corresponding to these discrete energies,
the electron does not emit radiation, and the electron is said to be in stationary or non-
radiating, state.
ii. In a transition from one stationary state corresponding to a definite energy W 2 to
another stationary state, with an associated energy W 1. radiation will be emitted. The
frequency of this radiant energy is given by
W2 − W1
f=
h ... (iv)
where h is Planck’s constant in Joule-seconds, the W’s are expressed in Joules, and f is
in cycles per second, or Hertz.
iii. A stationary state is determined by the condition that the angular momentum of the
electron in this state is quantized and must be an integral multiple of h/2π. Thus,
nh
mvr = ... (v)
2
where n is an integer.
Combining Eq. (iv) and (v), we obtain the radii of the stationary states, and from Eq. (iii)

me4 1
the energy level in Joules of each state is found to be Wn = − . ... (vi)
8h2 20 n2

Example 1:
As the Fermi energy of silver is 8.8 × 10 –19 Joule, then find the velocity of the fastest
electron in silver at 0°K. (Given: Rest mass of electron = 9.1 × 110 –31 kg).
Solution:
1 2E
mv2 = E or v2 =
2 m

2E
v=
m
or,
2  8.8  10−19
=
9.1  10−31

= 1.39 × 106 m/s

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3. ATOMIC ENERGY LEVELS

For each integral value of n in Eq. (vi) a horizontal line is drawn. These lines are vertically in
accordance with the numerical values calculated from Eq. (vi). Such a convenient pictorial
representation is called an energy level diagram and is indicated in figure 1 for hydrogen.
The number to the left of each line gives the energy of this level in electron volts. The number
immediately to the right of a line is the value of n. Theoretically, an infinite number of levels
exist for each atom, but only the first five and the level for n =  are indicated in figure 1.

Figure 1: The lowest five energy levels and the ionization level of hydrogen
The spectrum lines are in angstrom units. It is customary to express the energy value of the
stationary states in electron volts E rather than in Joules W. Also, it is more common to specify
the emitted radiation by its wavelength λ in angstroms rather than by its frequency f (in Hertz).
In these units, Equation (iv) may be rewritten in the form
12, 400
= ... (vii)
E2 − E1
The eV unit of Energy:
The joule (J) is the unit of energy in the MKS system. However, in electronics engineering
problems, the joule is too large a unit. So practical unit for the energy in electronics engineering
is electron volt (eV) and is defined as the energy gained by the electron in moving through
a potential difference of 1V i.e.,
1 eV = |q| × potential difference
= 1.6 × 10–19 (C) × 1 (volt)
= 1.6 × 10-19 (C volt)
1 eV = 1.6 × 10–19 (Joule)

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Example 2:
The longest wavelength that can be absorbed by silicon, which has the bandgap 1.12 eV, is 1.1
μm. If the longest wavelength that can be absorbed by another material is 0.87 mm, then find
the bandgap of this material.
Solution:
1.24 1.24
EG = eV = eV = 1.425 eV
 ( m) 0.87 m

3.1. The Photon Nature of Light

Assume that an atom has been raised from the ground state to an excited level by
electron bombardment. The mean life of an excited state ranges from 10 –7 to 10–10 s, the
excited electron returning to its previous state after the lapse of this time. In this
transition, the atom must lose an amount of energy equal to the difference in energy
between the two states that it has successively occupied, this energy appearing in the
form of radiation.
According to the postulates of Bohr, this energy is emitted in the form of a photon of
light, the frequency of this radiation being given by Eq. (iv), or the wavelength by Eq.
(vii). The term photon denotes an amount of radiate energy equal to the constant h times
of the frequency.

4. ELECTRONIC STRUCTURE OF THE ELEMENTS

The inner-shell electrons are very strongly bound to an atom and cannot be easily removed.
That is, the electrons closest to the nucleus are the most tightly bound, and so have the lowest
energy. Also, atoms for which the electrons exist in closed shells form very stable
configurations. For example, the inert gases He, Ne, Ar, Kr and Xe all have either completely
filled shells or, at least, completely filled subshells.
Carbon, silicon, germanium, and tin have the electronic configurations indicated in Table 1.
Note that each of these elements has completely filled subshells except for the outermost p
shell, which contains only two of the six possible electrons. Despite this similarity, carbon in
crystalline form (diamond) is an insulator, silicon and germanium solids are Semiconductors,
and tin is a metal.
Table 1: Electronic configuration in Group IVA

Element Atomic Number Configuration

C 6 1s2 2s2 2p2
Si 14 1s2 2s2 2p6 3s2 3p2
Ge 32 1s2 2s2 2p6 3s2 3p6 3d10 4s2 4p2
Sn 50 1s2 2s2 2p6 3s2 3p6 3d10 4s2 4p6 4d10 5s2 5p2

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5. IMPORTANT TERMS

5.1. Field Intensity:

• The force experienced by a unit positive charge under the influence of an electric field
is known as the electric field intensity at that point.
• If a charge of q coulomb is kept in an electric field at a point and the force experienced
by the charge, is F (Newtons) then the electric field intensity at that point is given by:
F
E=
q
(N / C )
Or, F = qE
5.2. Potential:
Potential, V(volts) of a point B with respect to point A is the work done against the field
in taking a unit positive charge from A to B.
x


• Consider if A is at x0 and B is at an arbitrary distance x, if follows that V = − E  dx
x0

Differentiating above equation gives

dV
E=
dx

From above equation it is obvious that unit of electric field intensity is/ “volts/meter”.
• The negative sign shows here that the electric field is directed from the region of higher
potential to the region of lower potential.
• For the three-dimensional field,

E = −V

Where  V denotes “Gradient of the potential”.

• Electric field intensity is a vector quantity while potential is a scalar quantity.
5.3. Energy:
• By definition, the potential energy U(joules) equals the potential multiplied by the
charge q under consideration, or
U = qV
• If an electron is under consideration, q is by – q (where q = 1.6 × 10–19 C) and U has
same shape as V but is inverted.
• If mass of the particle is m (kilograms) and it is moving with a velocity v (m/s) in an
electric field of intensity E (V/m); then kinetic energy is given by

1
K.E. = mv2
2

• The final speed attained by particle in the conservative system can be calculated as
below under the condition of equilibrium:
K.E. = P.E.

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1
mv2 = qV
2

2qV
∴ v= meters/sec
m

Example 3:
Considering a uniform semiconductor bar (Rectangular shape).

Figure 2
Calculate the field at the centre of the bar?
Solution:
At the centre of the bar
x = 0.5 μm, V = 1 V.
Hence,
Vc
E=
xc
1V
E=
0.5m
E = 2  106 V
m

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6. THERMAL VOLTAGE VT OR VTH

“Volt-equivalent of temperature”

kT
VT =
q

or VT = kT

k = qk
since,
 k = 1.6  10−19 k

T
or VT = volts
11600

where, T = Temperature in kelvin

k and k ⇒ Boltzman’s constant
k = 8.62 × 10–5 eV/°K
k = 1.38 × 10–23 J/°K
As standard room temperature is T = 300°K
At T = 300°K.
300
VT = = 0.0256 volts
11600
or, VT ~ 26 mV
Hence, the standard room temperature corresponds to a voltage of 26 mV.
⇒ Temperature in Kelvin(°K) = Temp. in °C + 273
[Note: All the properties of semiconductor must be specified at room temperature (i.e. at
300°K).]

7. THE ENERGY-BAND THEORY OF CRYSTALS

X-ray and other studies reveal that most metals and semiconductors are crystalline in structure.
A crystal consists of a space array of atoms or molecules (strictly speaking, ions) built up by
regular repetition in three dimensions of some fundamental structural unit. The electronic
energy levels discussed for a single free atom (as in a gas, where the atoms are sufficiently far
apart not to exert any influence on one another) do not apply to the same atom in a crystal.
When atoms form crystals it is found that the energy levels of the inner-shell electrons are not
affected appreciably by the presence of the neighboring atoms. However, the levels of the
outer-shell electrons are changed considerably since these electrons are shared by more than
one atom in the crystal. The new energy levels of the outer electrons can be determined by
means of quantum mechanics, and it is found that coupling between the outer-shell electrons
of the atoms results in a band of closely spaced energy states instead of the widely separated
energy levels of the isolated atom as shown in figure 3. A qualitative discussion of this energy-
band structure follows.

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Figure 3: Illustrating how the energy levels of isolated atoms are spilt into energy
bands when these atoms are brought into close proximity to form a crystal
Consider a crystal consisting of N atoms of one of the elements in Table 1. Imagine that it is
possible to vary the spacing between atoms without altering the type of fundamental crystal
structure. If the atoms are so far apart that the Integration between them is negligible, the
energy levels will coincide with those of the isolated atom. The outer two subshells for each
element in Table 1 contain two s electrons and two p electrons. Hence, if we ignore the inner-
shell levels, then, as indicated to the extreme right in figure 3(a), there are 2N electrons
completely filling the 2N possible s levels, all at the same energy. Since the p atomic subshell
has six possible states, our imaginary crystal of widely spaced atoms has 2N electrons, which
fill only one-third of the 6N possible p states, all at the same level.
If we now decrease the interatomic spacing of our imaginary crystal (moving from right to left
in figure 3(a)), an atom will exert an electric force on its neighbors. Because of this coupling
between atoms, the atomic-wave functions overlap, and the crystal becomes an electronic
system which must obey the Pauli exclusion principle. Hence the 2N degenerate s states must
spread out in energy. The separation between levels is small, but since N is very large (~ 10 23
cm-3), the total spread between the minimum and maximum energy may be several electron
volts if the interatomic distance is decreased sufficiently. This large number of discrete but
closely spaced energy levels is called an energy band and is indicated schematically by the
lower shaded region in figure 3(a). The 2N states in this band are completely filed with 2N
electrons. Similarly, the upper shaded region in figure 3(a) is a band of 6N states which has
only 2N of its levels occupied by electrons.
Note that there is an energy gap (a forbidden band) between the two bands discussed above
and that this gap decreases as the atomic spacing decreases. For small enough distance (not
indicated in figure 3(a) but shown in figure 3(b)) these bands will overlap. Under such
circumstances the 6N upper states merge with the 2N lower states, giving a total of 8N levels,
half of which are occupied by the 2N + 2N = 4 N available electrons. At this spacing each atom

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has given up four electrons to the band; these electrons can no longer be said to orbit in s or
p subshells of an isolated atom, but rather they belong to the crystal as a whole. In this sense
the elements in Table 1 are tetravalent, since they contribute four electrons each to the crystal.
The band these electrons occupy is called the valence band.
If the spacing between atoms is decreased below the distance at which the bands overlap, the
interaction between atoms is indeed large. The energy-band structure then depends upon the
orientation of the atoms relative to one another in space (the crystal structure) and upon the
atomic number, which determines the electrical constitution of each atom. Solutions of
Schrodinger’s equation are complicated, and have been obtained
approximately for only relatively few crystals These solutions lead us to expect an energy-band
diagram somewhat as pictured in figure 3(b). At the crystal-lattice spacing (the dashed vertical
line), we find the valence band filled with 4N electrons separated by a forbidden band (no
allowed energy states) of extent EG from an empty band consisting of 4N additional states.
This upper vacant band is called the conduction band.

8. INSULATORS, SEMICONDUCTORS AND METALS

Figure 4: Simplified energy band diagram of

(a) Insulator, (b) Semiconductor and (c) Conductor
8.1. Insulators
• An insulating material has an energy band diagram as shown in figure 4(a).
• It has a very wide forbidden-energy gap (~ 6 eV) separating the filled valence band
from the vacant conduction band. Because of this, it is practically impossible for an
electron in the valence band to jump the gap, reach the conduction band.
• At room temperature, an insulator does not conduct. However, it may conduct if its
temperature is very high or if a high voltage is applied across it. This is termed as the
breakdown of the insulator.
• Example: diamond.
8.2. Semiconductors
• A semiconductor has an energy-band gap as shown in figure 3(b).

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• At 0°K semiconductor materials have the same structure as insulators except the
difference in the size of the band gap E G, which is much smaller in semiconductors (E G
~ 1 eV) than in insulators.
• The relatively small band gaps of semiconductors allow for excitation of electrons from
the lower (valence) band to the upper (conduction) band by reasonable amount of
thermal or optical energy.
• The difference between semiconductors and insulators is that the conductivity of
semiconductors can increase greatly by thermal or optical energy.
• Example: Ge and Si.
8.3. Metals
• There is no forbidden energy gap between the valence and conduction bands. The two
bands actually overlap as shown in figure 4(c).
• Without supplying any additional energy such as heat or light, a metal already contains
a large number of free electrons and that is why it works as a good conductor.
• Example: Al. Cu etc.
[Note:
• Conduction band electrons can move along sea of atoms present in the specimen under
consideration while the valence band electrons (restrained electrons) are bound to
parent atom. These conduction band electrons are known as free electrons.
• Since the band-gap energy of a crystal is a function of interatomic spacing, it is not
surprising that EG depends somewhat on temperature. It has been determined
experimentally that EG for silicon decrease with temperature at the rate of 3.60 × 10 –
4
eV/°K.
Hence, for silicon, EG(T) = 1.21 – 3.60 × 10–4 T
And at room temperature (300°K), EG = 1.1 eV
Similarly, for germanium, EG(T) = 0.785 – 2.23 × 10–4 T
And at room temperature, EG = 0.72 eV]

9. SEMICONDUCTOR MATERIALS: Ge, Si AND GaAs

• Semiconductors are a special class of elements having a conductivity between that of a good
conductor and that of an insulator.
• Single crystal and compound crystal semiconductor are two ramifications of semiconductor
depending upon, number of constitutional elements. Examples of single crystal
semiconductors are germanium (Ge) and silicon (Si) whereas compound semiconductors are
gallium arsenide (GaAs), cadmium sulphide (CdS), gallium nitride (GaN) and gallium
arsenide phosphide (GaAsP) etc.

10. INTRINSIC MATERIALS & COVALENT BONDING

• Semiconductor in its purest form (without any impurity) is known as intrinsic semiconductor.

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• An intrinsic semiconductor (such as pure Ge or Si), has only four electrons in the outermost
orbit of its atoms. When atoms bond together to form molecules of matter, each atom
attempts to acquire eight electrons in its outermost shell. This is done by sharing one
electron from each of the four neighboring atoms. This sharing of electrons in
semiconductors is known as covalent bonding. Below figure shows covalent bonding of the
silicon atom.

Figure 5: Covalent bonding of the silicon atom

10.1. Charge Carriers in Intrinsic Semiconductor
• At room temperature (say 300°K) sufficient thermal energy is supplied to make a
valence electron of a semiconductor atom to move away from the influence of its of
its nucleus. Thus, a covalent bond is broken. When this happens, the electron
becomes free to move in the crystal. This is shown in figure below.

Figure 6: Generation of electron- hole pair in an intrinsic semiconductor

(a) Crystal structure, (b) Energy-band diagram
• When an electron breaks a covalent bond and moves away, a vacancy is created in
the broken covalent bond. This vacancy is called a hole.

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• Free electrons and holes are always generating in pairs. Therefore, the concentration
of free electrons and holes will always be equal in an intrinsic semiconductor
n = p = ղi
Where ղi is called the intrinsic concentration.
10.2. Effect of Temperature on Conductivity of Intrinsic Semiconductor
• A semiconductor (Ge or Si) at absolute zero, behaves as a perfect insulator. At room
temperature, some electron-hole pairs are generated. Now, if we raise the
temperature further, more electron hole pairs are generated. The higher the
temperature, the higher is the concentration of charge carriers. As more charge
carriers are made available, the conductivity of intrinsic semiconductor increases with
temperature. In other words, the resistivity (inverse of conductivity) decreases as
the temperature increases. That is; semiconductor have negative temperature
coefficient of resistance.
For Intrinsic concentration
 EG 
− 0 
 kT 
n2i = A0 T3 e  

Where, EG0: Energy gap at 0°K in eVs

k: Boltzman’s constant in eV/°K
A0: Material constant independent of temperature

11. EXTRINSIC MATERIALS

• In addition to the intrinsic carriers generated thermally, it is possible to create carriers in

semiconductors by purposely introducing impurities into the crystal. This process is called
doping. It is the most common technique for varying the conductivity of semiconductors.
• When a crystal is doped such that the equilibrium carrier concentrations n 0 and p0 are
different from the intrinsic carrier concentration ղi the material is said to be extrinsic.
11.1. n-type Semiconductor
• An n-type semiconductor is created by introducing impurity elements that have five
valence electrons (pentavalent), such as antimony, arsenic and phosphorus.
• The effect of such impurity elements is indicated in figure below. Note that the four
covalent bonds are still present. There is, however an additional fifth electron due to
the impurity atom, which is unassociated with any particular covalent bond. This
remaining electron loosely bound to its parent atom (antimony) atom, is relatively
free to move within the newly formed n-type material.
• Since the inserted impurity atom has donated a relatively “free electron to the
structure; so diffused impurities with five valence electrons are called donor atoms.

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Figure 7: Antimony impurity in n-type material

• When impurities or lattice defects are introduced into an otherwise perfect crystal,
additional levels are created in the energy band structure, usually within the band
gap. For example, an impurity from column V of the periodic table (P, As and Sb)
introduces an energy level very near the conduction band in Ge or Si. Such an
impurity level is called a donor level. In case of germanium, the distance of new
discrete allowable energy level is only 0.01 eV ( 0.05 eV in silicon) below the
conduction band, and therefore at room temperature almost all the “fifth” electrons
of the donor material are raised into the conduction band.

Figure 8: Energy-band diagram of n-type semiconductor

[Note: n-type material is as a whole electrically neutral since ideally the number of
positively charged protons in the nuclei is still equal to the number of free and orbiting
negatively charged electrons in the structure.]

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11.2. p-type Semiconductor
• The p-type semiconductor is formed by doping a pure germanium or silicon crystal
with impurity atoms having three valence electrons (trivalent). The elements most
frequently used for this purpose are boron, gallium and indium.

Figure 9: Boron impurity in p- type material

• Note that there is now an insufficient number of electrons to complete the covalent
bonds of the newly formed lattice. The resulting vacancy is called a hole and is
represented by a small circle or a plus sign, indicating the absence of a negative
charge.
• Since the resulting vacancy will readily accept a free electron; so, the diffused
impurities with three valence electrons are called acceptor atoms.
• The resulting p-type material is electrically neutral for the same reasons described
for the n-type material.
• Atoms from Column-III (B, Al, Ga arid in) introduce impurity levels in Ge or Si near
the valence band. These levels are empty of electrons at 0K. At low temperatures,
enough thermal energy is available to excite electrons from the valence band into
the impurity level, leaving behind holes in the valence band. Since this type of
impurity level “accepts” electrons from the valence band, it is called an acceptor
level.

Figure 10: Energy-band diagram of p-type semiconductor

Standard Doping Levels
• Moderate doping: 1 in (106 – 108) : P, N

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• Lightly doped: 1 in 1011 : P–, N–
• Highly (heavily) doped: 1 in 103 : P+, N+
[Note: 1: 106 or 1 in 106 or 1/106 is read as “1 impurity atom in 106 atoms”.]

12. THE MASS-ACTION LAW

In a semiconductor under thermal equilibrium (constant temperature) the product of electrons

and holes concentrations is always a constant and is equal to the square of intrinsic
concentration.

np = 2i

The intrinsic concentration ղi is a function of temperature.

For a p-type semiconductor,

2i
np =
pp

For an n-type semiconductor,

2i
pn =
nn

2i
or, Minority carrier concentration =
Majority carrier concentration
but, Majority carrier concentration  Doping concentration.
1
so, Minority carrier concentration 
Doping concentration

or, Minority carrier concentration × Doping concentration = 2i

In a semiconductor, if majority carrier concentration increases the minority carrier

concentration decreases this is due to the recombination.
Example 4:
The electron concentration in silicon at T = 300 K is n 0 = 5 × 104 cm-3.
i. What will be the hole concentration (in cm-3) in silicon?
ii. Find the nature of material.
Solution:
(i) At T = 300 K the electron concentration is
n0 = 5 × 104 cm-3
At T = 300 K intrinsic carrier concentration for silicon is
ղi = 1.5 × 1010
By using mass action law, we obtain the hole concentration as

n0p0 = i2
2
or, p0 = i
n0

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(1.5  1010 )2
=
5  104
= 4.5  1015 cm−3
(ii) We have the electron and hole concentrations for the silicon as
n0 = 5  104 cm−3
and p0 = 4.5  1015 cm−3

So, we conclude that

p0  n0

i.e. the concentration of hole is greater the concentration of electron. It means hole are in
majority in this material, hence it is p-type material.

13. DIRECT & INDIRECT SEMICONDUCTORS

Let us assume that a single electron travel through a perfectly periodic lattice. The wave
function of the electron is assumed to be in the form of a plane wave moving, for example, in
the x-direction with propagation constant k, also called a wave vector as shown below in the
figure.

Figure 11: Direct Transition with accompanying photon

Figure 12: Indirect transition via a defect level

The band structure of GaAs has a minimum in the conduction band a maximum in the valence
band for the same k value (k = 0). On the other hand, Si has its valence band maximum at
different value of k than its Conduction band minimum. Thus an electron making a smallest-
energy transition from the conduction band to the valence band in GaAs can do so without a
change in k value; on the other hand, a transition from the minimum point in the Si conduction
band to the maximum point of the valence band requires some change in k.

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Thus, there are two classes of semiconductor energy bands:
i. Direct band gap semiconductor and
ii. Indirect band gap semiconductor.
Comparison between these two classes of semiconductors is given below:
13.1. Direct Band Gap Semiconductor
• During recombination’s energy is dissipated in the form of light.
• When electron is falling from conduction band to valence band, the falling electron
directly dissipates energy in the form of light.
• Used for microwave devices and in fabrication of LEDs and LASERs.
13.2. Indirect Band Gap Semiconductor
• During recombination’s energy is dissipated the form of heat.
• When free electron is falling from conduction band to valence band, with the crystals
of the atom and the crystals will be absorbing the energy from the falling electron
and they become heated up and the energy is released in the form of heat.
• Used in all other applications.

14. TRANSPORT PHENOMENA IN SEMICONDUCTORS

The only current contributing particle in case of metals are free electrons. Electrically,
semiconductors on the other hand have both holes and electrons giving rise to the net current.
Where we can enhance one’s (holes/electrons) contribution in comparison to another
(electrons/holes) choosing a trivalent or pentavalent impurity atom for doping purpose. The
transport of the charges in a crystal under the influence of an electric field (a drift current),
and also as a result of a nonuniform concentration gradient (a diffusion current), is
investigated.
14.1. Mobility
If a constant electric field, say E(Volts/m) is applied. As a result of electrostatic force,
the electrons would be accelerated and the velocity would increase indefinite with time,
were it not for the collisions with the ions. However, at each inelastic collision with an
ion, an electron losses energy, and a steady state condition is reached where finite value
of drift speed v is attained. This drift velocity is in the direction opposite to that of the
dE
electric field. The speed at time t between collision is at, where a = is the
m
acceleration. Hence the average speed v is proportional to E.
Thus, v = μE
where μ (square meters per volt-second) is called the mobility of the electrons.
as v = at

qE qE
⇒ v= t a=
m m

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 qt 
⇒ v = E
m

qt
∴ =
m

Where, q is electronic charge (1.6 × 10–19C) and m is the mass of the electron (9.1 ×
10–31 kg).
Important point:
• Mobility of charge carrier is the ability of the charge carrier to move from one place
to another i.e. how fast the charge carrier can move from one place to another.
• Mobility is defined as:
drift velocity
=
fieldintencity

vd m2 cm2
Also,  = → unit or
E V − sec V − sec
• Mobility denotes how quick is the electron or the hole is moving from one place to
another place.
• Drift velocity is the velocity of charge carrier under field intensity.
• Drift velocity is the average velocity of charge carriers.
vmax + vmin
vdrift =
2
• In a semiconductor, mobility of change carriers depends on:
i. Temperature
ii. Doping concentration
• Mobility of charge carriers is a measure of how quick electron (or hole) move from
one place to another.
• Electron mobility is always greater than hole mobility and therefore the electron can
travel fast and contributes more current than a hole.
Example 5:
A DC voltage of 10V is applied across a N Type silicon bar having rectangular cross
section and a length of 1cm as shown in the fig?

Figure 13

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The Doping concentration ND and mobility of electrons are 1016/cm3 and 1000 cm2/V-
sec respectively. The average time in μs taken by the electron to move from one end to
another end of the bar is……….?
Solution:
vd
=
E
10V
Vd = 1000  = 10000 cm2 / sec
1 cm

dis tan ce  cm
so, time = =
speed 10000 cm / sec
−4 −4 100
t = 10 sec = 10 
100
t = 100 s

Mobility versus Temperature graph:

• In a semiconductor, mobility of charge carriers reduces with the temperature (by
neglecting scattering effects).

Figure 14: Variation between mobility and temperature

Mathematically,

  T −m  decrease as non-linear variation.

Where, m= material constant

• Mobility decreases as a non-linear variation with the Temperature.

• By considering SCATTERING EFFECTS, the mobility of charge carriers, firstly

increases and then decreases with the temperature.

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Figure 15: Variation between mobility and temperature

• By keeping impurity atoms as constant and if temperature is varying then mobility

v/s temperature curve will be

Figure 16: Variation of mobility and temperature

• By keeping TEMPERATURE as constant and varying impurity atoms in

semiconductors, the mobility v/s impurity atoms curve will be:

Figure 17

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Example 6:
Assume that mobility of electrons in silicon at T=300 K is μ n =1300 cm2 /V-sec. Also
assume that the mobility is limited by thermal motion of atoms and varies with
temperature. Then the electron mobility (in cm2/V-sec) at T = 400K is ________.
(approximate value)
Solution:
The lattice scattering is related to the thermal motion of atoms.
∴ Mobility varies as T –3/2

∴μ∝T –3/2

Given at T1 = 300K, μn1 = 1300 cm2/V–s

At T2 = 400K, μn2 = ?
−3/2
n1  T1 
= 
n2  T2 
−3/2
1300  300 
= 
n2  400 
1300
n2 =
1.5396
= 844.375
= 844 cm2/V- sec.
Mobility versus E graph:

Figure 18: Mobility versus E graph

• For larger electric field intensities, the mobility of charge carriers be very small and
therefore, the drift velocity of charge carriers will remain almost a constant.
• Mobility of charge car decreases with temperature

  T −m

Where, for Ge: m =1.66 for e and 2.33 for hole

for Si: m = 2.5 for e– and 2.7 for hole
Table 2:

Parameter Ge Si GaAs

Electron mobility (μn) 3800 cm2/V-s 1300 cm2/V-s 5800 cm2/V-s

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Hole mobility (μp) 1800 cm2/V-s 500 cm2/V-s 400 cm2/V-s

 
Ratio  n  2.1: 1 2.6: 1 14.5: 1
 p 
 

• Higher the mobility more is the material suitable for high frequency applications.
• If n p is greater then, material will offer minimum switching time.

Drift velocity versus electric field curve:

In a semiconductor, as field intensities are gradually increasing, the drift velocity:
i. First, linearly increases
ii. Then, sub linearly increases
Enters into saturation

Figure 19
[NOTE:
• In a semiconductor, the mobility of charge carriers depends on various type of
SCATTERING such as:
1. LATTICE scattering
2. IMPURITY scattering
3. SURFACE scattering
• Due to this, the resultant mobility of charge carriers is given by μ and the mathematical
formula is given by:
1 1 1 1
= + + ,
 1 2 3

taken one at a time keeping others as constant.

• As a result, the resultant mobility reduces, and it is always equal to or less than the
least value of mobility given.]

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15. CURRENT DENSITY

If N electrons are contained in a length L of a conductor as shown in figure below. If T is time

taken to traverse distance L, the total number of electrons passing through any cross-section
of wire in per unit time is N/T.

Figure 20
Therefore,

Nq Nqv  L
l= =  v=
T I  T 

l Nqv
∴ Current density = =
A LA

 N 
⇒ J = qv   [Unit of J = amp/m2]
 LA 
N
since, = n(electron concentration in electrons per cubic meter).
LA
∴ J = nqv = ρv
where, ρ = nq is the charge density in coulombs/m3 and v in m/s.
15.1. Conductivity
From the above discussion
J = nqv = nqμE = σE
The above equation is recognized as ohm’s law.
Where, σ = nqμ is the conductivity of the metal in (ohm-meter)–1.
With the effect of applied electric-field, as a result of collisions of electrons with the
lattice ions, electron power is dissipated within the metal and is given by
JE = σE2 Watts/m3
• Conductivity is the reciprocal of resistivity.
• Conductivity denotes current carrying capacity of the material or device.
i. For semiconductors conductivity
σ = nqμn + pqμp
ii. For intrinsic semiconductor

( )
i =  i n + p q

iii. For n-type semiconductor

n >> p

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∴ n n q n

but, n ~ ND

so, n ND qn

iv. For p-type semiconductor

p >> n
p pq p

but, p ~ NA

so, p NA qp

It is clear that conductivity of semiconductor increases with increase in doping

concentration.

15.2. Conductivity Vs Temperature

• As we know that in metals, resistivity of metal increases with increase in temperature.
So, conductivity of metals decreases with increase in temperature.
• In pure semiconductors conductivity mainly depends upon number of charge carriers.
So, in a semiconductor conductivity increases with temperature.
• For 1°C increase in temperature, conductivity of Ge increases by 6% while in Si it
increases by 8%.
• Conductivity of extrinsic semiconductor decreases above normal temperature with
temperature.
15.3. Conductivity of Different Elements
i. Conductivity of metals
σmetals = 107 – 105 – m

ii. Conductivity of semiconductors

σsc = 1 m – 10–6 m

iii. Conductivity of insulator

σinsulator = 10–19 m

[Note:
• In an intrinsic semiconductor conductivity increases with temperature.
• In a lightly doped semiconductor conductivity increases with temperature but in a
heavily doped semiconductor conductivity decreases with increase in temperature.
• Heavily doped semiconductor has metal like properties.
15.4. Law of Electrical Neutrality
As we know that semiconductor as a whole is electrically neutral. So, in a semiconductor
Total positive charge = Total negative charge
ND + p = NA + n

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or, ND – NA = n – p
i. In intrinsic semiconductor,
NA = 0 = ND
∴ n=p
ii. In n-type semiconductor
NA = 0
ND + p = n
but, n >> p
∴ n ~ ND
iii. In p-type semiconductor
NA = 0
p = NA + n
but, n >> p
∴ p ~ NA
Example 7:
Consider a homogeneous gallium arsenide semiconductor at T = 300 K with the following
parameters:
Donor concentration: ND = 1016 cm-3,
Electron mobility: (μn) = 7500 cm2/V-s
Intrinsic concentration: ղi = 1.8 × 106 cm-3
i. Find the thermal equilibrium value of hole concentration in the material.
ii. If an electric field of 10V/cm is applied to the material then, then find the drift current
density
Solution:
(i) For the gallium arsenide semiconductor, we have
Nd = 1016 cm-3
and ղi = 1.8 × 106 cm-3
So, Nd >> ղi
Therefore, the electron concentration is
n0 = Nd = 1016 cm-3
Hence, using mass action law, we obtain the hole concentration as

i2 (1.8  106 )2

p0 = =
n0 1016

= 3.24 × 10-4 cm-3

(ii) Given the electric field,
E = 10 V/cm
The drift current density is defined as
J = σE
where σ is the conductivity, given as

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σ= neμ
= n0eμn + p0 eμp
= n0 eμn (n0 >> p0)
Therefore, we obtain
J = n0eμnE
= 1016 × 1.6 × 10-19 × 7500 × 10
= 120 A/cm2

16. CURRENT

It is defined as the flow of charge per unit time through a conducting medium. In metals current
is carried by only electrons while in case of semiconductors it is carried by both electrons and
holes.
16.1. Drift Current
It is the flow of current through the material or device under the influence of voltage or
field intensity.
16.2. Diffusion Current
When excess carriers are created non-uniformly in a semiconductor, the electron and
hole concentrations vary with position in the sample. Any such spatial variation
(gradient) in n and p calls for a net motion of the carriers from the region of high carrier
concentration to regions of low carrier concentration. This type of motion is called
diffusion and represents an important charge transport process in semiconductors.
The rate of electron flow in the +x-direction per unit area (the electron flux density ϕn)
is given

dn ( x )
n ( x ) = − Dn
dx

Similarly, hole flux density

dp ( x )
p ( x ) = − Dp
dx

where, Dn = electron diffusion coefficient.

Dp = hole diffusion coefficient.
The diffusion current crossing a unit area (the current density) is the particle flux density
multiplied by the charge of the carrier:
dn ( x ) dn ( x )
Jn ( diff ) = − ( − q) Dn = + qDn
dx dx

dp ( x ) dp ( x )
Jp ( diff ) = − ( + q) Dp = − qDp
dx dx

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16.3. Diffusion and Drift of Carriers
If an electric field is present in addition to the carrier gradient, the current densities will
each have a drift component and a diffusion component
dn ( x )
Jn ( x ) = qn n ( x ) E(x) + q Dn
dx

Drift Diffusion

dp ( x )
Jp ( x ) = qp p ( x ) E ( x ) − qDp
dx
The total current density is the sum of the contributions due to electrons holes
J(x) = Jn(x) + Jp(x)
Example 8:
In a N type semiconductor, at T=300K, the electron concentration varies linearly from
2 × 1015/cm3 to 5 × 1017/cm3 over a distance of 1.5mm and diffusion current density is
360 A/cm2.Find its electron mobility?
Solution:
From given data:

Figure 21
dn
Jn diff = (qDn )
dx
5  1017 − 2  1018
360=(1.6×10-19×Dn× )
1.5  10−1

360  1.5  10−1

Dn =
−1.6  10−19  −1.5  1018
Dn = 225cm2/sec
μnVT=225
μn = 8653.846 cm2/V-sec

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Example 9:
KT
Assume electronic charge lql=1.6×10-19C, = 25mV, n = 1000cm2 / V sec . If the
q

concentration gradient of electron injected into the semiconductor sample is -

1×1021electrons /cm3/cm. Find the magnitude of electron diffusion current density?
Solution:
dn
Jn diff =+(-q)×Dn× ; Dn=μnVT
dx
=-1.6×10-19×25×-1×1021
=1.6×25×102
400  102
=
10
Jn diff=4000 A/cm2
16.4. Length of Diffusion

Figure 22
Length of diffusion is given as below,

L = D  cm

Where, D = Diffusion constant for charge carrier (cm 2/sec)

 = Carrier life-time or mean life time of minority carriers (sec).
Example 10:
An n-type silicon sample has diffusion coefficient of electrons 120 cm 2/sec and the
carrier life-time of electron is 30 μsec and the Carrier life time of electron is 30μsec.
Then the diffusion length of the sample (L n) is_____________.
Solution:
Given, diffusion coefficient of electrons
Dn = 120 cm2/sec
Carrier life time of electron,
n = 30 p sec

Diffusion length,

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Ln = Dn n

= 120  30  10−12
= 60 × 10–6 cm
= 0.6 μm
16.5. Einstein Relationship
Since both diffusion and mobility are statistical thermodynamic phenomena, D and μ
are not independent. The relationship between them is given by the Einstein equation

Dp Dn
= = VT
p n

where VT is the “volt-equivalent of temperature”

Example 11:
A silicon P+N junction has carrier lifetime of holes  p=10 μsec and mobility of holes
μp=3500 cm2/ V-sec. If it is operated at room temperature, then find the ratio of
diffusion coefficients of holes (Dp) to the diffusion length of holes (Lp). (Assume VT= 26
m V at room temperature)
Solution:
Given for silicon P+N junction diode,
carrier lifetime,  p=10 μsec
Mobility, μp=3500 cm2/ V-sec

Dp Dp Dp
= =
Lp Dp p p

p VT
=
p

Dp 3500 X 0.026
 = = 3016 cm / sec
Lp 10 X10−6

16.6. The Energy Gap

The forbidden region EG in a semiconductor depends upon temperature. Experimentally
it is found that
For silicon,

EG ( T ) = 1.21 − 3.60  10−4 T

For germanium,

EG ( T ) = 0.785 − 2.23  10−4 T

17. THE HALL EFFECT

According to this effect the statements are:

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If a specimen (metal or semiconductor) carrying a current I is placed in a transverse magnetic
field B, an electric field E is induced in the direction perpendicular to both I and B. This
phenomenon, known as the Hall effect, is used to determine whether a semiconductor is n- or
p-type and to find the carrier concentration. Also, by simultaneously measuring the conductivity
σ, the mobility μ can be calculated.
Consider the figure shown below. Here current l is in +x-direction, magnetic field B is in +z
direction then induced electric field will be in –ve y-direction.

Figure 23
Hence a force will be exerted in the negative y-direction on the current carriers.
The current l may be due to holes moving from left to right or to free electrons travelling from
right to left in the semiconductor specimen. Hence, independently of whether the carriers are
holes or electrons, they will be forced downward toward side 1 of above figure.
If the semiconductor is n-type material, so that the current is carried by the electrons, these
electrons will accumulate on side 1, and this surface becomes negativity charged with respect
to side 2. Hence a potential, called the Hall voltage, appears between surface 1 and 2.
Now under the equilibrium condition

qE = Bvq

VH I
But, E= and J= vρ =
d wd
Combining these relationships, we find

BJd BI
VH = Ed = Bvd = =
 w

Where ρ is the charge density, w is the width of the specimen and d is the distance between

surfaces 1 and 2.

It is customary to introduce the Hall coefficient RH defined by

1
RH =


VHw
Hence, RH =
BI

By hall experiment mobility of charge carriers is given as

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8
=  RH
3

or,   RH

⇒ Hall coefficient, RH  Temperature coefficient of resistance of given specimen.

⇒ For metals, σ is larger, VH is small.

⇒For semiconductors, σ is small, VH is large.

Applications:

Hall effect is used in many applications as following:

• measurement of magnetic flux density.

• measurement of displacement.

• measurement of current.

• measurement of power in Electro-magnetic waves.

• determination of mobility of semiconductor material.

[Note: Minority carrier mobility (μ) and diffusion coefficient(D) can be measured

independently with the help of Haynes-Shockley experiment.]

Example 12:

A n type Ge Sample has a donor density ND = 1021 atoms/m3. It is arranged in a Hall experiment

having a magnetic field B =0.2Wb/m 2 and current density J = 500A/m2. Find the hall voltage

generated when the thickness of sample is 2mm. Also calculate the field intensity induced in

magnitude.?

Solution:
BIRH BIRH BJ  w  d  R H
VH = = =
w w w

VH = BJdR H

1
VH = 0.2  500  2  10−3  21
10  −1.6  10−19

 VH = − 1.25 mV

VH
EH =
d
−1.25 mV
EH =
2  10−3

EH = 0.652 V
m

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18. COMPENSATED SEMICONDUCTOR

• A semiconductor in which both DONOR & ACCEPTOR IMPURITIES are added is called as
compensated semiconductor.
• When donor impurities are added into the P type Semiconductor or Acceptor Impurities are
added into the N type Semiconductor, we get “COMPENSATED SEMICONDUCTOR”.
• In a semiconductor, doping concentration will play the major role in deciding the properties
and applications of the semiconductor.
18.1. In an intrinsic semiconductor:
1. If NA = ND is applied, then the semiconductor is intrinsic, and it is called as
uncompensated semiconductor.
2. If the ND > NA is applied, then the semiconductor is N type compensated
semiconductor.
3. If NA > ND is applied, then the semiconductor is P type compensated semiconductor.

18.2. N type compensated semi-conductor:

Let ND>NA
By law of electrical neutrality:
atul.mishra@prepladder.com
ni2
So, pn= (minority carrier concentration in N type compensated semiconductor)
nn

18.3. P type compensated semiconductor:

Let, NA > ND
By law of electrical neutrality:
ND + p = NA + n
n2
ND + p = NA + i
p
ND.p + p = NA .p + ni2
2

p2 − (NA − ND )p − ni2 = 0
2
(NA − ND )  N − ND  2
p= +  A  + ni
2  2 
→ pP = majority carriers in P type
semiconductor(compensated)
n2
nP = i
pP
→ min ority carriers in P type
Compensated semiconductor

Example 13:
An N type semi-conductor (Si) containing 1016 Phosphorous atoms/cm3 is doped with
1017 Boron atoms/cm3. Calculate the electron & hole concentration. Assume, ղi
=1010/cm3?

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Solution:
NA=1017 atoms/cm3
ND = 1016 atoms/cm3
Since NA>ND
Hence semiconductor is P type Compensated.
So,
2
NA − ND  N − ND  2
P= +  D  + ni
2  2 
2
1017 − 1016  1017 − 1016  10
= +   + (1  10 )
2  2 
pP = 9  1016 / cm3
n 2 1  1020
nP = i =
pP 9  1016
nP = 1.11  103 / cm3

19. MINIMUM CONDUCTIVITY IN SEMI-CONDUCTORS

• The General equation for conductivity of a semiconductor is

 = nqn + PqP ……….(i)
• By Mass Action Law :
ni2
p= …………(ii)
n
considering the semiconductor as N type
Substituting eq (ii) in eq (i) we get:-
ni2
 = nqn + qP
n
d n2
Now, = qn − i2 qP
dn n
again differentiating w.rt n we get
d2 2
= + 3 ni2qP  0
dn2 n
• The condition for minimum conductivity can be obtained by equating d / dn = 0. So,
ni2
qn − qP = 0.
n2
2
n
n − i2 P = 0
n
P
n2 = ni2
n
P
n = ni
n

It is the equation to calculate electron concentration in the semiconductor when conductivity is

minimum.)

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• Substituting above equation in above equation we get:
ni2
p=
n
ni2
p=
P
ni
n
n
p = ni
P

It is equation to calculate hole concentration in the semiconductor when conductivity is

minimum).
• The minimum conductivity equation can be obtained by substituting, So,
 = nqn + pqP
n 
= niqP  + ni P qn
P n
niq n P + niq n P
 npn = 2niq n P

19.1. Equation for donor concentration for N type semiconductor when  is

MINIMUM:

P 
ND = ni − ni n
n P
  n 
ND = ni  P − 
 n P 

19.2 Equation for acceptor concentration for P type semiconductor when  is

MINIMUM:

n 
NA = ni − np P
P n
  P 
NA = ni  n − 
 P n 

20. THE FERMI LEVEL

• Electrons in solids obey Fermi-Dirac statistics. The distribution of electrons over a range of
allowed energy levels at thermal equilibrium is

1
f (E ) =
1+e(E −EF ) /kT

Where k s Boltzmann’s constant (k = 8.62 × 10–5 eV/K = 1.38 × 10–23 J/K).

• The function f(E), the Fermi-Dirac distribution function, gives the probability that an
available energy state of E will be occupied by an electron at absolute temperature T. The
quantity EF is called the Fermi level.
1
• If E = EF then f (E ) = = 0.5 or 50%
2

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If E > EF then f(E) < ½
If E > EF then f(E) > ½
• A closer examination of f(E) indicates that at 0 K the distribution takes the simple rectangular
form shown in figure. At temperature higher than 0K, some probability exists for states
above the Fermi level to be filled.
• For example, at T = T1 in figure there is some probability f(E) that states above E F are filled,
and there is a corresponding probability [1 – f(E)] that states below EF are empty. The Fermi
function is symmetrical about EF for all temperatures; that is, the probability f(E F + ΔE) that
a state ΔE above EF is filled is the same as the probability [1 – f(EF – ΔE)] that a state ΔE
below EF is empty. The symmetry of the distribution of empty and filled states about E F
makes the Fermi level a natural reference point in calculations of electron and hole
concentrations in semiconductors.

Figure 24: The Fermi Dirac distribution function

Figure 25: Schematic band diagram, density of states, Fermi-Dirac distribution and
the carrier concentrations for (a) Intrinsic, (b) n-type and (c) p-type
semiconductors at thermal equilibrium

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20.1. Fermi Level in Intrinsic Semiconductor
In intrinsic semiconductor Fermi level EF is given by

Ec + Ev 1 N 
EF = − kT ln  c 
2 2  Nv 

where, NC = density of states in conduction band

Nv = density of states in valence band
In pure Semiconductor at T = 0K, Fermi level lies in the middle of bandgap.
20.2. Fermi Level in n-type Semiconductor
Fermi level in n-type semiconductor is given by
N 
EF = Ec – kT ln  c 
N 
 D
Where, ND = doping concentration.
• Fermi level in n-type semiconductor depends on temperature as well as on doping
concentration.
• At 0K Fermi level coincides with that of lowest energy level of conduction band.
• As doping increases Fermi level moves towards conduction band.
• Shift in Fermi level in n-type semiconductor with respect to Fermi level of intrinsic
semiconductor is

n
shift = kT ln  
 i 
 

N 
shift ≅ kT ln  D 
 i 
 
20.3. Fermi Level in p-type Semiconductor
Fermi level in p-type semiconductor is given by

N 
EF = EV + kT ln  V 
NA 
 
• In p-type semiconductor Fermi level depends on both temperature as well as on
doping concentration NA.
• As temperature increases Fermi level moves away from E V i.e. towards middle of
band gap.
• As 0K Fermi level coincides with highest energy level EV of valence band.
• As doping concentration increases Fermi level moves toward E V or away of middle of
band gap
• Shift in Fermi level in p-type semiconductor with respect to Fermi level of intrinsic
semiconductor as

p 
shift = kT ln  
 i 
 

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N 
shift ≅ kT ln  A 
 i 
 
Example 14:
What will be the position of Fermi energy level, E Fi with respect to the centre of the
bandgap in silicon for T = 200 K?
Solution:
The concentration of electrons and holes are defined as

 (E − EF ) 
n0 = Nc exp  − c
 kT 
 (E − Ev ) 
p0 = Nv exp  − F
 kT 

At Fermi level position, the electron and hole concentration are equal, i.e.
 (E − EF )   (EF − Ev ) 
Nc exp  − c  = Nv exp  − 
 kT   kT 
If we take natural log of both sides, then

1 1 N 
EF = (E + Ev ) + kTln  v 
2 c 2  Nc 
midgap

1 N 
or EF − E midgap = kTln  v  ….(1)
2  Nc 
At T = 300° for silicon, we have
Nc = 2.8  1019
and Nv = 1.04  1019

Therefore, we obtain
Nv 1.04
=
Nc 2.8

Since the does not depend on temperature, so at T = 200, we get

Nv 1.04
=
Nc 2.8

Substituting it in equation (1), we have

1  200   1.04 
EF − Emidgap =  0.0259e   ln  
2  300   2.8 
= −0.0085 eV

Thus, the intrinsic Fermi level is 0.0085 eV below the centre of the bandgap.

Example 15:
If the Fermi energy in silicon is 0.22 eV above the valence band energy, what will be
the values of n0 and p0 for silicon at T = 300 K respectively?

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Solution:
Given that Fermi energy in silicon is 0.22 eV above the valence band energy, i.e.
EF – Ev = 0.22 eV
So, we obtain the hole concentration as

 (E − Ev ) 
p0 = Nv exp  − F
 kT 
 0.22e 
= 1.04  1019 exp  − 
 0.0259e 
15 −3
= 2.13  10 cm
Now, the energy bandgap for silicon is 1.12 eV, i.e.
Eg = Ec – Ev = 1.12 eV
Therefore, we obtain
Ec − EF + (EF − Ev ) = 1.12eV
or, Ec − EF = 1.12 − 0.22 = 0.90 eV

Hence, the hole concentration is

 (E − EF ) 
n0 = Nc exp  − c
 kT 
 0.90e 
= 2.8  1019 exp  − 
 0.0259e 
= 2.27  104 cm−3
Example 16:
The probability that an energy state is filled at E C + KT, is equal to the probability that
a state is empty at EC + KT. Where is the Fermi level (EF) located?
Solution:
The probability that an energy state is filled at EC + KT is given by
1
f(EC + KT) =
1 + exp (EC + KT − EF ) / KT 
…(1)
The probability that a state is empty at EC + KT is given by
1
1 − f(EC + KT) = 1 −
1 + exp (EC + KT − EF ) / KT 
…(2)
Given that the two probabilities are equal, i.e.
f(EC + KT) = 1 – f(EC + KT)

1 1
(EC +KT −EF )/KT
=1− (EC + KT −EF )/KT
or, 1+ e 1+e

1 e(EC +KT −EF )/KT

=
or, 1 + e(EC +KT −EF )/KT 1 + e(EC + KT −EF )/KT
1 1
=
or. 1 + e(EC +KT −EF )/KT 1 + e[EF −(EC + KT)]/KT

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EC + KT − EF EF − (EC + KT)
=
or, KT KT
or, 2EF = 2(EC + KT)
Hence, EF = EC + KT

21. OPTICAL ABSORPTION

• When a photon with energy h  ≥ Eg is incident on a semiconductor, it can be absorbed.

Since the valence band contains many electrons and the conduction band has many empty
states into which the electrons may be excited, the probability of photon absorption is high.
• As figure 26 indicates an electron excited to the conduction band by optical absorption may
initially have more energy than is common for conduction band electrons.
• Thus, the excited electron loses energy to the lattice in scattering events until its velocity
reaches the thermal equilibrium velocity of the other conduction band electrons.
• The electron and hole created by this absorption process are excess carriers; since they
are out of balance with their environment, they must eventually recombine.
• While the excess carriers exist in their respective bands, however, they are free to contribute
to the conductivity of the material.

Figure 26: Optical absorption of a photon with h  > E0: (a) An EHP is created during
photon absorption, (b) the excited electron gives up energy to the lattice by scattering
events, (c) the electron recombines with a hole in the valence
• A photon with energy less than E g is unable to excite an electron from the valence band to
the conduction band. Thus, in a pure semiconductor, there is negligible absorption of
photons with h  < Eg.
• If a beam of photons with h  > Eg falls on a semiconductor, there will be some predictable
amount of absorption, determined by the properties of the material. To calculate this, let us
assume that a photon beam of intensity l0 (photons/cm2 -s) is directed at a sample of
thickness l. The beam contains only of wavelength λ. Since a photon which has survived to
x without absorption has no memory of how far it has travelled, its probability of absorption

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dl ( x )
in any dx is constant. Thus, the degradation of the intensity − is proportional to the
dx
intensity remaining at x:

dl ( x )
− = l ( x )
dx
The solution to this equation is

l ( x ) = l0 e− x

and the intensity of light transmitted through the sample thickness l is

lt = l0 e− l

• The coefficient a is called the absorption coefficient and has units of cm–1. This coefficient
will of course vary with the photon wavelength and with the material.
• Figure 27 indicates the band gap energies of some of the common semiconductors, relative
to the visible, infrared, and ultraviolet portions of the spectrum. We observe that GaAs, Si,
Ge and lnSb lie outside the visible region, in the infrared. Other semiconductors, such as
GaP and CdS, have band gaps wide enough to pass photons in the visible range.

Figure 27: Band gaps of some common semiconductors relative

to the optical spectrum
Luminescence:
When electron-hole pairs are generated in a semiconductor, or when carriers are excited into
higher impurity levels from which they fall to their equilibrium states, light can be given off
by the material. Many of the semiconductors are well suited for light emission, particularly
the compound semiconductors with direct band gaps. The general property of light emission
is called luminescence.
This overall category can be subdivided according to the excitation mechanism: If carriers are
excited by photon absorption, of the radiation resulting from the recombination of the excited
carriers is called photoluminescence; if the excited carriers are created by high-energy
electron bombardment of the material, the mechanism is called cathodoluminescence; if
the excitation occurs by the introduction of current into the sample, the resulting
luminescence is called electroluminescence.

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Photoluminescence:
For steady state excitation, the recombination of EHPs occurs at the same rate as the
generation, and one photon is emitted for each photon absorbed.
Direct recombination is a fast process; the mean lifetime of the EHP is usually on the order of
10–8 s or less. Thus, the emission of photons stops within approximately 10 –8 s after the
excitation is turned off. Such last luminescent processes are often referred to as
fluorescence.
In some material, however, emission continues for periods up to seconds or minutes after the
excitation is removed. These slow processes are called phosphorescence, and the materials
are called phosphors.

Electroluminescence:
There are many ways by which electrical energy can be used to generate photon emission in
a solid. In LEDs an electric current causes the injection of minority carries into regions of the
crystal where they can recombine with majority carriers, resulting in the emission of
recombination radiation.

Photoconductivity:
When excess electrons and holes are created in a semiconductor, there is a corresponding
increase in the conductivity of the sample. If the excess carrier arises from optical
luminescence, the resulting increases in conductivity is called photoconductivity

Direct Recombination of Electrons and Holes:

The electrons in the conduction band of a semiconductor may make transitions to the valence
band (i.e. recombine with holes in the valence band) either directly or indirectly.
In direct recombination an excess population of electrons and holes decays by electrons falling
from the conduction band to empty states (holes) in the valence band. Energy lost by an
electron in making the transition is given up as a photon.
Direct recombination occurs spontaneously; that is, the probability that an electron and a hole
will combine is constant in time.
Indirect Recombination; Trapping:
The vast majority of the recombination events in indirect materials occur via recombination
levels within the band gap, and the resulting energy loss by recombining electrons is usually
given up to the lattice as heat rather than by the emission of photons.
Any impurity or lattice defect can serve as a recombination center if it is capable of receiving
a carrier of one type and subsequently capturing the opposite type of carrier, thereby
annihilating the pair.
For example, figure 28 illustrates a recombination level E r which is below EF at equilibrium
and therefore is substantially filled with electrons.

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When excess electrons and holes are created in this material, each EHP recombines at E r in
two steps:
(a) hole capture and
(b) electron capture.

Figure 28: Capture processes at a recombination level:

(a) hole capture at a filled recombination centre
(b) electron capture at an empty centre
Since the recombination centres in figure () are filled at equilibrium, the first event in the
recombination process is hole capture. It is important to note that this event is equivalent to
an electron at Er falling to the valence band, leaving behind an empty state in the
recombination level. Thus, in hole capture, energy is given up as heat to the lattice.
Similarly, energy is given up when a conduction band electron subsequently falls to the empty
state in Er. When both of these events have occurred, the recombination centre is back to its
original state (filled with an electron), but an EHP is missing.
Thus, one EHP recombination has taken place, and the centre is ready to participate in another
recombination event by capturing a hole.

****

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ELECTRONIC DEVICES

2 PN JUNCTION DIODE

1. INTRODUCTION TO PN JUNCTION DIODE

Majority carrier electrons in the n-region will begin diffusing into the p-region and majority
carrier holes in the p-region will be diffusing into the n-region. If we assume there are no
external excitation to the semiconductor, then this diffusion process cannot continue
indefinitely. As electrons diffuse from the n-region, positively charged donor atoms are left
behind. Similarly, as holes diffuse from the p-region, they uncover negatively charged acceptor
atoms. The un-neutralized ions in the neighbourhood of the junction are referred to as
uncovered charges. The general shape of the charge density ‘ρ’ depends upon how the diode
is doped. Since the region of the junction is depleted of mobile charges, it is called depletion
region, the space-charge region, or the transition region.

Figure 1
The net positive and negative charges in ‘n’ and ‘p’ regions induce an electric fields in the region
near the metallurgical junction, in the direction from the positive to the negative charge, or
from the n to the p region.
Density gradients still exist in the exist in the majority carrier concentrations at each edge of
the space charge region and producing a “diffusion force” that acts on the majority carriers as

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shown in Figure 1. The electric field in the space charge region produces another force on the
electrons and holes which in the opposite direction to the diffusion force for each type of
particle. In thermal equilibrium, the diffusion force and the field force exactly balance each
other.
Symbol:

The Arrow mark on the symbol denotes, the direction of forward current.
1.1. Equation for contact potential:
Let the PN junction is kept either open circuit condition or unbiased condition.
Mathematically,
V0 = Vbi
N N 
V0 = Vbi = VT In  A 2 D  ← Unit in Volts
 ni 
Also

N N 
 V0 = VTIn  A2 D 
 ni  

NOTE:
• Contact Potential, V0 is a function of temperature.
• Contact Potential, V0 decreases with the temperature.
• For 10C rise in temperature, V0 decreases by 2.5 mV.
1.2 Electric Field:
By the separation of positive and negative space charge region densities, an electric field
E is created in the depletion region. Figure 2(b) shows the charge density distribution
assuming uniform doping and an abrupt junction approximation.

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Flgure-2: (a) p-n junction diode (b) Charge stored in the space charge region
(c) Electric field created in the depletion region due to the presence of uncovered charge
(d) Variations of potential in depletion region
The field intensity curve is proportional to the integral of the charge density curve. This
statement follows from Poisson’s equation.

d2  ( x ) − ( x ) −dE ( x )
= −= ….(1)
dx 2
 dx
Where ϕ(x) is the electronic potential, E(x) is the electronic field,  ( x ) is the volume

charge density, and  is the permittivity.

From figure (2), the charge densities are:
 ( x ) = −qNA ; − x  x  0

 ( x ) = qND ; 0 < x < xn

By integrating Eq. (1), the electric field in the p-region is given by

 (x)
E=  
dx

qNA qNA
E = − dx = x + C1
 

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Setting E = 0 at x = -xp, then
qNA
E=−

(
xp + x ; ) -xp < x < 0

Similarly for n-region, the electronic field is given by,

(x)
E=  
dx

 qN 
E =   D  dx
  
qND
E= x + C2

Setting E = 0 at x = xn. Then
−qND
E=

( xn − x ) ; 0 < x < xn

Maximum electric field will be at x = 0, we have

−qNA −qND
Emax = .xp = .xn
 
From equation (1),
NA.xp = ND.xn
Above equation states that the-number of negative charges per unit area in the p-region
is equal to the number of positive charges per unit area in the n-region.
Fig. 2(c) is a plot of the electric field in the depletion region. For the uniformly doped p-
n junction E-field is a linear function of distance through the junction, and the maximum
electric field occurs at the junction.
The potential in the junction is found by integrating the electric field. In the p-region

 ( x ) = − E ( x ) dx

−qNA
 ( x ) = −

(
. xp + x dx )
qNA  x2 
 (x) =  xp.x +
'
 + C1
  2 

The potential different through the p-n junction is the important parameter, rather than
the potential equal to zero at x = xp. So,
qNA 2
C1' = x
2 p
qNA
 (x) = ( )
2
x + xp ;
and  (-xp < x – < 0)

and the potential in the n-region can be written as

qNA  x2  qNA 2
 (x) =  xn.x − + x
  2  2 p
and

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Fig. 2(d) is a plot of the potential through junction and shows the quadratic dependence
on distance. The magnitude of the potential at x = xn is equal to the built in potential
barrier. Then from above equation, we get
q
V0 =  ( x = xn ) =
2
(
ND xn2 + NAxp2 )
1.3. Equation for width of depletion layer W:
From above relations, we can conclude that,
NA.xp = ND.xn
ND x n
Or x p =
NA

Then from above equations, solving for xp, we get

2   N D  1 
xP =    V0
q  N A  N A +N D 

Above equation gives the width of the depletion region x p extending into the p-type
region.
Similarly, if we solve for xn, we get

2   N A  1 
xn =    V0
q  N D  N A +N D 

xn is the width of space charge region extending into the n-region.

Hence, the total depletion region is:
W = xn + xp
Therefore, from above equations, we get

2ε  1 1 
W=  +  V0 (unit in metres)
q  NA ND 

Where,
ϵ = Permittivity in F/m
ϵ = ϵ0 ϵr
ϵ0 = Absolute Permittivity of free space = 8.854 × 10 -12 F/m = 8.854 ×
10-14 F/cm
And,
ϵr = Relative permittivity of medium
Dielectric constant of material used
ϵr = 11.7 (Si)
NOTE:
• The maximum electric field in the junction
2V0
Emax = − , for the case of zero applied voltage
W

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−2 ( V0 + VR )
Emax = , for the case of applied reverse biased voltage VR
W
where W is the total width of depletion region.
• The depletion region width increases as we apply a reverse-bias voltage
• The magnitude of the electric field in the depletion region increases with an applied
reverse voltage.
Example 1:
Consider the uniformly doped GaAs junction at T = 300°K. At zero bias, only 20 percent
of the total space charge region is to be in the p-region. The built-in potential barrier is
V0 = 1.20V. For zero bias, determine: (a) NA and (b) ND. (Assume ni = 1.8 × 106 cm-3).
Solution:
(a)
20
xp = W = 0.2W
100

(
xp = 0.2 xn + xp )
xp
= 0.25
xn

xp ND
=
xn NA
Also,
xp ND
= = 0.25
xn NA

And V0 is given by
N N 
V0 = VT ln  A 2 D 
 ni 
Using equation (i), (ii) and (iii), we get

 
N  0.25NA 
1.2 = 0.026 ln  A
 2 
 1.8  10(
6
 )
NA = 3.78 × 1016 cm-3
ND = 0.25 × NA
ND = 0.25 × 3.75 × 1016 = 0.94 × 1016 cm-3
Example 2:
Consider a Silicon p-n junction at T = 300°K with doping concentrations of N A = 1016
cm-3 and ND = 1015 cm-3. Assume intrinsic carrier concentration ni = 1.5 × 1010 cm-3 and
let reverse bias voltage VR = 5V and r (si) = 11.7 . For this p-n junction, calculate the

depletion region width.

Solution:
We have

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2 1 1
W=  +  ( V + VR )
q  NA ND  0

Where,
N N 
V0 = VT ln  A 2 D 
 ni 
So, V0 = 0.637 V and VR = 5 V

2  11.7  8.85  10 − 14  1016 + 1015 

∴ W=   ( 0.637 + 5)
1.6  10−19 (
 1016  1015
 ) 

W = 2.83 × 10-4 cm or 2.83 μm
NOTE:
A junction can be provided in between two similar or dissimilar materials.
(1) PN DIODE
(2) Metal SC Diode
Example 3:
A step graded diode (Germanium) having ND = 500 NA with acceptor impurities to the
extent of 2:108 at room temperature. Find its contact potential? Assume, ni = 2.5 ×
1013 /cm-3
Total no. of atoms = 4.421 × 1022/cm3 and VT = 26 mV
Solution:
Given data:
ND = 500NA
So,
2
NA = 4.421  1022  = 8.842 × 1014 /cm3
108
N N 
Hence, V0 = VTIn  A 2 D 
 ni 

 8.842  1014  500  8.842  1014 

V0 = 26  10−3 In  
 ( ) 
2
2.5  1013

V0 = 0.347 Volts
Example 4:
The Donor and Acceptor impurities in an abrupt junction, silicon diode are
1 × 1016 atoms /cm3 and 5 × 1018 atoms/cm3 respectively. Assume that ni = 1.5 ×
1010/cm3; at T = 300 K, KT/q = 26 mV & permittivity of Si = 1.04 × 10 -12 F/ cm. The
Built-in potential & depletion width of diode under thermal equilibrium condition are
………………?
Solution:
Given data:
NA = 5 × 1018 atoms/cm3

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ND = 1 × 1016 atoms/cm3
ϵsi = 1.004 × 10-12 F/cm
ni = 1.5 × 1010 / cm3
N N   5  1018  1  1016 
So, V0 = V ln  A 2 D  = 26  10−3 ln  
 ni   2.25  1020

V0 = 0.858 Volts
Depletion width of Diode:

2  1 1  2  1.04  10−12  1 1 
W=  +  V0 =  +   0.858
q  NA ND  1.6  10−19  5  1018 1  1016 

W = 3.34 × 10-5 cm
1.4. Reverse bias configuration:

Figure 3
When PN junction is reverse biased, the width of the depletion layer increases.

Figure 4

Figure 5

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NOTE:
When PN junction is reverse biased the majority carries of P & N region will move away
from the junction and this increases the region of IMMOBILE CHARGES i.e. the width of
the depletion layer is increased.

Figure 6
In reverse bias PN junction, the internal electric field and external electric field because
of reverse biasing will be in the same direction and therefore electric filed is very large.
The equation of W under reverse Bias is given are –

2  1 1 
W=  +  (|V0 |+|VRB |)
q  NA ND 

|V0| < < < |VRB|

Hence,

2  1 1 
W=  +  |VRB |
q  NA ND 

Also,

2  1 1 
W=  +  Vi
q  NA ND 

Vi = |V0| + |VRB|
The electric field intensity in reverse biased PN junction is given by:

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Figure 7
Note:
• For Germanium diode
Vᴦ = 0.1 to 0.3V
Typical value = 0.2V
• For Silicon diode
Vᴦ = 0.6 to 0.8 V
Typical value = 0.7V
• Cut-in voltage (Vᴦ) is defined as the minimum forward voltage required across the
diode so that a current will flow into the diode.
• Cut-in voltage decreases with rise in temperature. For 1°C rise in temperature, cut-in
dV o
voltage decreases by 2.5 mV i.e. = − 2.5 mV C.
dT
• The reverse bias region of operation is entered when the diode voltage V is made
negative.
• In a reverse-bias diode current is only due to minority carriers.
• Minority carrier current will flow from n to p region.
• I0 (reverse current) is highly sensitive to temperature.
• I0 depend on minority carrier, minority carrier depends on temperature and hence I 0
is also called as thermally generated current.
• I0 is independent of applied voltage.
• I0 approximately increases by 7% for every 1°C increase in temperature.
• I0 doubles for every 10°C rise in temperature.
T2 − T1
I0 ( T ) = I0 ( T ) (2) 10
2 1

• Reverse bias is responsible for blocking the majority carrier in crossing the junction
so reverse bias also called blocking bias.

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• Reverse current I0 is a drift current.
Note: I0 for Ge (in the range of μA) is greater than I0 for Si (in range of nA)
1.5. Forward bias configuration:

Figure 8
Rs = Current Limiting Resistance
VD = Forward Voltage across diode
By KVL we get:
V = VR + VD
V = If Rs + If Rf
Rf = Forward resistance of diode
The General formula of forward current, if (diode current) is:

 AqDp Pn 0 AqDn n p 0   VT 

VD

Also, If =  +  e − 1
 LP Ln   

n i2
p n0 =
ND

ni2
np0 =
NA

So,
 AqDp ni2 AqDn ni2  V / V
If = 
 L

N
+
L

N
(
 e D T − 1 )
 p D n A 

 AqDp AqDn  2 V /V

If = 
L N
+ (
 ni e D T − 1 )
 p D N A Ln 
AqDp
= If due to flow of holes from P side to N side
LpND

AqDn
= If due to flow of electrons from N side to P side
NALn

Also,

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Lp = Dp  p
Ln = Dn n

Hence,
 Aq  2 V / V
 ni ( e D T − 1)
Dp Aq Dn
I = +
f
 ND p NA n 
 
The reverse saturation current in the Forward bias diode is:
 AqDpPn0 AqDnnp0 
Is =  + 
 Lp Ln 

 AqDp AqDn  2
Is =  +
LnNA 
ni
 LpND

AqDp
= is due to flow of holes from P to N side
LpND

AqDn
= Is due to flow of electrons from N to P side
LnNA

 Aq Dp Aq Dn  2
Is =  +  ni
 ND p NA n 
 
A = Cross Sectional Area of Junction
Example 5:
A diode D1 under certain biasing conditions, the voltage drop V D1 = 0.7 V and current
ID1 = 5.6 mA under the same external conditions, another diode D 2 where the doping
level NA + ND are both twice when compared to that of D 1 and has the same forward
voltage drop VD2 = 0.7 V. Assuming the same identity factor (n) for both the diodes,
,the current ID2 is ……..?
Solution:
We know that:

 AqDp AqDn  2  Vd1 

V

I D1 =  +  i
n  e T
− 1
 Lp N D Ln N A   
 1 1   

 AqDp AqDn  2  Vd2 

V

I D2 = +  ni e T − 1

 Lp N D Ln N A   
 2 2   

 AqDp  2  Vd2 
V
AqDn
I D2 = +  ni  e T − 1
 L p 2 N D L 2 N A   
 1 n 1   
VD2 = VD1
1
ID2 = I D1
2
ID2 = 2.8 mA

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1.5.1. Forward voltage across the diode:
We know that
I f  I s eVD / VT

If
 eV0 / VT
Is

So,

I 
VD = nVTln  f 
 Is 

Forward voltage across diode decreases with the temperature

For 10C Rise in temperature, VD is reduced by 2.5 mV (THUMB RULE)
1.6. V- I CHARACTERISTICS OF DIODE:
Known as Volt ampere characteristics of diode

Figure 9

Figure 10

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Figure 11
VY = 1.3 V for GaAs diode
1.6.1. V-I characteristics of Diode (Si):

Figure 12

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1.7. Volt-Ampere Characteristics of a p-n Junction Diode
Below figure indicates the characteristic curve consisting of three distinct regions:

Figure 13: PN Junction Characteristics

NOTE:
When PN junction is reverse biased, the reverse voltage must be always less than
breakdown voltage of device, otherwise the normal diode will be damaged.
1.8. Diode Resistance

Figure 14
• The static resistance of a diode is defined as the ratio V/I of the voltage to the current.
At any point on the volt-ampere characteristic of the diode the resistance R f is equal to
the reciprocal of the scope of a line joining the operating point to the origin.
• For small-signal operation the dynamic, or incremental, resistance r is defined as the
reciprocal of the slope of the volt-ampere characteristic. R  dV/dI. For a semiconductor
1
diode, we find from equation that the dynamic conductance g  where I is forward
r
current
V /  VT
dI I0 e D I + I0
g = =
dV  VT  VT

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for a forward bias greater than a few tenths of a volt, I >> I 0, and r is given
approximately by

 VT
r
I
NOTE:
• The dynamic resistance of Ge diode with a forward current of 26 mA is 1 Ω
• Dynamic resistance in Si diode is more than in Ge diode.
Example 6:
Find the voltage drop across each of the Silicon junction diodes shown in the figure
below at room temperature. Assume that reverse saturation current flows in the circuit
and the magnitude of the reverse breakdown voltage is greater than 5 Volts.

Figure 15
Solution:
VD1 + VD2 = 5V

VD2 = 5 − VD1

For diode D1, ID = I0 eVD1 /  VT − 1 ... (i)

 

For diode D2, ID = I0 e− VD2 /  VT − 1 ... (ii)

 
From equation (i) and (ii),

eVD1 /  VT − 1 = e− VD2 /  VT + 1

eVD1 /  VT + e−5/  VT . eVD1 VT = 2

eVD1 /  VT 1 + e−5/  VT  = 2
 

 2 
VD1 =  VT ln  −5/  VT 
= 36 mV
1 + e 

VD2 = 4.964 V

Example 7:
A Si diode operating at room temperature with forward voltage of 650 mV has a
saturation current of 20 nA. Find its dynamic resistance.?

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Solution:
η=2
VD = 650 mV
I0 = 20 nA

ID = I0 eVD /  VT = 5.367 mA

 VT
r= = 9.688 Ω
ID

Example 8:
A diode has a leakage current of 10 μA at certain temperature. Find the value of leakage
current when the temperature is increases by 25°C.
Solution:
I01 = 10 μA at I1
I02 = ? when T2 = T1 + 25°C
T2 − T1
I02 = I01 (2 ) = 10A  (2 )
3.5
10 = 56.56 A

1.9. Capacitive Effects in the p-n Junction

In a p-n junction, basically two types of junction capacitance are present. One is
associated with the charge stored in the depletion region, and the other associated with
the minority carrier charge stored in the n and p materials as a result of the
concentration profiles established by carrier injection. While the first is easier to see
when the p-n junction is reverse biased, known as transition capacitance and the second
is in effect only when the junction is forward biased known as diffusion capacitance.
The depletion layer in a PN junction will behave as a PARALLEL PLATE CAPACITOR.
0 r A
C= = Capacitance of Parallel Plate capacitance
d
A
Cj = C = = capacitance for diode
W
A = cross sectional Area of junction
W = Width of depletion layer
1.9.1. Transition or depletion layer capacitance:
A
CT = CJ = = Unit farads.
W
A = Cross Sectional Area Of junction
W = Width of Depletion Region
CT ∝ A
CT ∝ 1/W
For better performance of diode or BJT, the value of C T must be as small as possible.
In a reverse biased PN junction, the transition capacitance, C T

CT ∝ V-n

where

V = reverse Biased Voltage

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n = constant

n = grading coefficient

n = 1/2; for Step graded diode (abrupt PN Junction diode)

= 1/3; for Linear graded diode

1.9.2. Diffusion Capacitance

For a forward bias p-n junction a capacitance which is much larger than the transition

capacitance C, comes into picture. The origin of this larger capacitance lies in the

injected charge stored near the junction outside the transition region. It is convenient

to introduce an incremental capacitance defined as the rate of charge of injected charge

with voltage, called the diffusion or storage capacitance C D.

dQ
CD =
dV

dI 
CD = = g =
dV r

dI  VT
where g = the incremental conductance and r = is the incremental resistance
dV I

I
Therefore, CD =
 VT

Where η is a constant dependent upon semiconductor, and VT is volt equivalent

temperature and τ is the mean life-time of minority carriers.

NOTE

• For a reverse bias junction CD may be neglected compared with CT (transition

capacitance).

• For a forward bias junction CD is usually much larger than CT

• Diffusion capacitance CD is proportional to the current I.

Example 9:

Consider a Silicon p-n Junction at T = 300°K with doping concentrations of N A = 1016

cm-3 and ND = 1016 cm-4. Assume that ni = 1.5 × 1010 cm-3 and reverse bias voltage VR

= 5 V. Assume cross-sectional area of the junction is 10-4 cm2. Calculate junction

capacitance for this p-n junction.

Solution:

q   NA ND  1
Cj = A  
2  NA + ND  ( V0 + VR )

 
N N   1018  1015 
Where V0 = VT ln  A 2 D  = 0.026 ln  2
= 0.637V
 n i 
(
 1.5  10
 )
10



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And

1.6  10−19  11.7  8.85  10−14 1016 

Cj = A  
2 (0.637 + 5)  11 

Cj = 3.65 × 10–13F or 0.365 pF

Example 10:

Consider a GaAs p-n junction at T = 300°K having impurity doping concentrations of N A

= 1016 cm-3 and ND = 5 × 1016 cm-3. For a particular device application, the ratio of

( )
junction capacitances at two value of reverse bias voltage must be Cj VR / Cj VR = 3
1 2
( )
where the reverse bias voltage VR = 1V. Assuming ni = 1.8 × 106 cm-3, determine VR
1 2

Solution:

 NA ND 
( )
Cj VR1 =
q
 
1
2 N
 A + N (
D  V0 + VR
1
)
 NA ND 
( )
and Cj VR2 =
q
 
1
2 N
 A + N (
D  V0 + VR
2
)
( )=
Cj VR1 V0 + VR2
C ( V )
j R2
V0 + VR1

 
N N   5  1032 
A D
Where, V0 = VT ln   = 0.026 ln 
2
= 1.21 V
( )
2
 n i   1.8  106 
 

1.21 + VR2
So, (3)
2
=
1.21 + 1

1.21 + VR = 10.89 + 9 ⇒ VR = 18.68V

2 2

1.10. Different Types of Junctions

1.10.1 Step Graded Junction
• Designed with abrupt junction
• Faster than normal diode
• One-sided junction i.e. p+-n junction or p-n+ junction
• Depletion layer penetrate more into the lightly doped region p-n junction

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Flgure-16: Distribution of (a) Space-charge density (b) Electric field and

(c) Potential
• NA >> ND
• Space-charge width

2 1
W ( V + VR ) in reverse bias
q ND 0

• xn >> xp
• W ~ xn
− qND W
• Emax =

p-n+ junction
• ND >> NA
• Space-charge width
• xp >> xn
• W ~ xp

2 1
W
q NA
( V0 + VR ) in reverse bias
qNA
• Emax = − W

1.10.2 Linearly Graded Junctions
A p-n junction in which the impurity concentration does not charge abruptly from donor
to acceptance varies smoothly across the junction, as a linear function of position.

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Figure-17: (a) Impurity concentration of a p-n junction with a non-uniformly

doped p-region (b) Space charge density in a linearly graded p-n junction (c)
Electric field (d) Potential
Example 11:
An ideal one-sided silicon n+-p junction has uniform doping on both sides of the abrupt
junction. The doping relation is ND = 50 NA. The built-in potential barrier is V 0 = 0.752
V. The maximum electric field in the junction is E max = 1.14 × 105 V/cm for a reverse-
bias voltage of 10V at T= 300°K. Determine: (a) NA and ND (b) xp for VR = 10, and (c)
Capacitance per unit area C’j.
Solution:
(a) V0 is given by
 
N N   N  50NA 
−3
V0 = VT ln  A D  = 26  10 ln  A 
 ni 
( )
2 2
   1.5  1010 
 

 50 N2A 
0.752 = 0.26 ln  20

 2.25  10 

50 N2A  0.752 
20
= exp  
2.25  10  0.026 
NA = 4.05 × 1015 cm–3
Now ND = 50 × NA
∴ ND = 2.02 × 1017 cm–3
(b) xp ~ W, since ND >> NA

2 1  1 1 
xp W  ( V0 + VR )   
q NA  ND NA 

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2  11.7  8.85  10−14  (0.752 + 10 )

W= = 1.85 × 10–4 cm or 1.85 μm
1.6  10−19  4.05  1015

A
(c) C j =
W
Cj 11.7  8.85  10−14
or Cj =
A 1.85  10−4
Cj = 5.59 × 10–9 F/cm2 = 5.59 nF/cm2
1.11. Reverse Bias-Breakdown
We have found that a p-n junction biased in the reverse direction exhibits a small,
essentially voltage-independent saturation current. This is true until a critical reverse
bias is reached, for which reverse breakdown occurs [Fig. (18)]. At this critical voltage
(VBr) the reverse current through the diode increases sharply, and relatively large
currents can flow with little further increase in voltage. The existence of a critical
breakdown voltage introduces almost a right-angle appearance to the reverse
characteristic of most diodes.

Figure 18
Reverse break-down in a p-n junction
Reverse breakdown can occur by two mechanisms, each of which requires a critical
electric field in the junction transition region. The first mechanism, called the zener
effect, is operative at low voltages (upto a few volts reverse bias). If the breakdown
occurs at higher voltages (from a few volts to thousands of volts), the mechanism is
avalanche breakdown. We shall discuss these two mechanisms in this section.

2. ZENER BREAKDOWN

When a heavily doped junction is reverse biased, the energy bands become crossed at relatively
low voltages (i.e., the n-side conduction band appears opposite the p-side valence band). As
below figure indicates, the crossing of the bands aligns the large number of empty states in
the n-side conduction band opposite the many tilled states of the p-side valence band. If the
barrier separating these two bands is narrow, tunneling of electrons can occur. Tunneling of

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electrons from the p-side valence band to the n-side conduction band constitutes a reverse
current from n to p; this is the Zener effect.

Figure 19: The Zener effect (a) heavily doped junction at equilibrium;
(b) reverse bias with electron tunnelling from p to n; (c) I-V characteristic
The basic requirements for tunneling current are a large number of electrons separated from a
large number of empty states by a narrow barrier of finite height. Since the tunneling
probability depends upon the width of the barrier, it is important that the metallurgical junction
be sharp and the doping high, so that the transition region W extends only a very short distance
from each side of the junction. If the Junction is not abrupt or if either side of the junction is
lightly doped, the transition region W will be too wide for tunneling.
As the bands are crossed (at a few tenth of a volt for a heavily doped junction), the tunneling
distance ‘d’ may be too large for appreciable tunneling. However ‘d’ becomes smaller as the
reverse bias is increases, because the higher electric fields result in steeper slopes for the band
edges. This assumes that the transition region width W does not increase appreciably with
reverse bias. For low voltages and heavy doping on each side of the junction this is a good
assumption. However, if Zener breakdown does not occur with reverse b of few volts, avalanche
breakdown will become dominant. In the simple covalent bonding model, the Zener effect can
be thought of as field ionization of the host atoms at the junction. That is, the reverse bias of
a heavily doped junction causes a large electric field within W i at a critical field strength,
electrons participating in covalent bonds be torn from the bonds by the field and accelerated
to the n-side of the junction. The electric field required for this type of ionization is on the order
of 106 V/cm.

3. AVALANCHE BREAKDOWN

For lightly doped junction electron tunneling is negligible, and instead, the breakdown
mechanism involves the impact ionization of host atoms by energetic carriers. Normal lattice-
scattering events can result in the creation of EHPs it the carrier being scattered has sufficient
energy. For example, if the electric field in the transition region is large an electron entering
from the p side may be accelerated to high enough kinetic energy to cause an ionizating
collision with the lattice [Fig. 20 (a)]. A single such interaction results in carrier multiplication;
the original electron and the generated electron are both swept to the n side of the junction,

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and the generated hole is swept to the p side [Fig. 20(b)]. The degree of multiplication can
become very high if carriers generated within the transition region also have lionizing collision
with lattice. For example, an incoming electron may have a collision with the lattice and create
an EHP; each of these carriers has a chance of creating a new EHP and each of those can also
create an EHP, and so forth [Fig. 20 (c)]. This is an avalanche process, since each incoming
carrier can initiate the creation of a large number of new carriers.
We can make an approximate analysis of avalanche multiplication by assuming that a carrier
of either type has a probability P of having an ionizing collision with the lattice while being
accelerated a distance W through the transition region. Thus for n in electrons entering from the
p side, there will be pnin ionizing collisions and an EHP (secondary carriers) for each collision.

Figure 21: Electron - hole pairs created by impact ionization: (a) band diagram eta p-n
junction in reverse bias showing (primary) electron gaining kinetic energy in the field of
the depletion region, and creating a (secondary) electron-hole pair by impact ionization,
the primary electron losing most of its kinetic energy in the process; (b) a single Ionizing
collision by on Incoming electron in the depletion region of the junction (c) primary,
secondary, and tertiary collisions

4. ZENER DIODES

• Basically a p-n junction with little increase in doping level (1:10 5) aria fabricated only with
Si.
• Generally designed with normal junction and popularly known as constant voltage device.
• It can be used as reference voltage device.
• Major application is as a voltage regulator circuit and can be used as a clipper.
• Always operated under reverse bias.
• When forward bias it will be working as a normal diode with cut-in voltage 0.6 V or 0.7 V.
• Zener diode is specified in terms of breakdown voltage and maximum power dissipation.

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• Zener diodes are commercially available with breakdown voltages in range of 2.5 V – 300 V.

Figure 22: Circuit symbol of Zener diode

4.1. Characteristics of Zener Diode
• When Zener diode is in reverse bias below the breakdown voltage, the current passing
through the Zener diode is practically zero (nano amperes) and Zener diode is not
conducting and Working as a normal diode.
• When reverse voltage equal to breakdown voltage, the current through the Zener diode
suddenly increases to IZK and this is due to the breakdown phenomenon.
• When reverse voltage exceed breakdown voltage, more current will be passing into the
Zener diode but the voltage drop across it will be maintained almost a constant and it is
around its breakdown voltage Hence Zener diode is known as constant voltage device.

Figure 23
Dynamic Resistance of Zener Diode (Rz) - AC Resistance or Internal
Resistance of Zener Diode

V Z
RZ = 
IZ

For ideal 26ener diode dynamic resistance is zero.

4.2. Equivalent Circuit of Zener Diode
Case-I: When Zener diode is in forward bias

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Figure 24: (a) Zener diode in forward bias and (b) Equivalent circuit
Forward bias zener diode can be replaced by a cut-in voltage
Case-II: When Zener diode is in reverse bias

Figure 25: (a) Zener diode in reverse bias (b) & (c) Equivalent circuit

****

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ELECTRONIC DEVICES

3 BIPOLAR JUNCTION TRANSISTOR

1. BASIC STRUCTURE OF BJT

The bipolar transistor has three separately doped regions and two p-n junctions. Figure 1 shows
the basic structure of an n-p-n bipolar transistor and p-n-p bipolar transistor, along with the
circuit symbols. The three terminal connections are called the emitter base and collector. The
width of the base region is small compared to the minority carrier diffusion length. Generally,
the sequence of length of the three regions are WB < WE < WC.

Figure- 1: Simplified block diagram of (a) n-p-n (b) p-n-p and circuit symbol of (c) n-p-
n and (d) p-n-p bipolar transistors
There are few specific features that differentiate one region from the other region. These are:
(a) Emitter Region
• A region which supplies or emits majority carriers, for example in p-n-p transistor emitter
will supply holes and in n-p-n transistor it supplies electrons.
• Emitter is heavily doped, so that it can emit large number of carriers.
• Impurities are added in the ratio 1:103.

(b) Collector Region

• A region which receives or collects majority carriers coming from emitter

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• It is moderately doped and largest in size.
• Large collector will help in rapid transfer of heat to the surroundings.
• In a transistor, collector junction develops large amount of heat because it operates at higher
current and higher voltage
• If collector is lightly doped its conductivity will decrease, which is undesired,
• If collector is heavily doped, breakdown voltage of collector junction will decrease which is
undesired. Therefore, collector is moderately doped so that it has better conductivity and
collector junction has higher breakdown voltage.
(c) Base Region
• A region through which majority carriers travel from emitter to collector.
• Base is lightly doped and small in size, i.e. it has narrow width.
• The number of electron-hole recombination inside base will be reduced by keeping it narrow
and by doping it lightly.
• Impurities are added in ratio 1:108.
The three terminal connections are called the emitter (E), base (B), and collector (C). The width
of the base region is small compared to the minority carrier diffusion length. The (++) and (+)
notation indicates the relative magnitudes of the impurity doping concentrations normally used
in the moderately doped. The emitter region has the largest doping concentration; the collector
region has the smallest.
1.1. Typical Doping Concentrations for BJT
Figure 2 shows an idealized impurity doping profile in an n-p-n bipolar transistor for the
case when each region is uniformly doped. Typical impurity doping concentrations in the
emitter, base, and collector may be in the order of 1019, 1017 and 1015 cm-3, respectively.

Figure 2: Idealized doping profile of a uniformly doped n-p-n Bipolar Transistor

1.2. Depletion Region

A transistor with its three terminals emitter, base and collector left open is called an
unbiased transistor, or an open-circuited transistor. The diffusion of the majority carries
takes place across the junction due to the concentration gradient of charge carries. Due

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to the diffusion of the majority carries across the two junctions, depletion layer are formed
at both emitter and collector junction as shown in figure 3.

(a)

(b)
Figure 3: An unbiased transistor
Following are some important points about depletion region.
• The depletion layer around the emitter junction penetrates more into the base region
and less into the emitter region. This is because the emitter is heavily doped as
compared to the base.
• The depletion layer around the collector junction penetrates more into the base region
and less into the collector region. This is because the collector is heavily doped,
whereas the base is lightly doped.
• The depletion layer penetrates more into the collector region and less into the emitter
region. Therefore, the depletion layer formed at collector junction is larger that
depletion layer formed at emitter junction.
NOTE: An unbiased transistor is not useful for any practical purpose because the
conduction of current across its junction is very small.

2. TRANSISTOR BIASING

2.1. Modes of Operation

The transistor consists of two p-n junctions, the emitter-base junction (EBJ) and the
collector-base junction (CBJ). Depending on the bias condition (forward or reverse) of
each of these junctions, different modes of operation of BJT are obtained, as shown in
Table 1.

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S.
Mode EBJ CBJ Properties Applications
No.

Reverse Reverse Very high internal

1. Cut-off OFF switch
bias bias resistance

Forward Reverse Excellent transistor

2. Active Amplifier
bias bias action

Forward Forward Very low internal

3. Saturation ON switch
bias bias resistance

Reverse Reverse Forward Very poor transistor Attenuator (Practically

4.
active bias bias action not used)
Table-1: BJT modes of operation
2.1.1. Emitter Efficiency (γ)
The emitter or injection, efficiency γ is defined as
Currentof injected carriers at JE due to carriers of emitter
=
Total emitter current
In case of p-n-p transistor, we have
IpE IpE
= =
IpE + InE IE

where IpE is injected hole diffusion current at emitter junction and InE is injected electron
diffusion current at emitter Junction.
2.1.2 Transport Factor (β*)
Injected carrier current reaching JC
Transport factor β* is defined as, * =
Injected carrier current at JE

In case of p-n-p transistor, we have

IpC
* =
IpE

2.1.3 Large Signal Current Gain (α)

Large signal current gain of a common base transistor is defined as ratio of the negative
of the collector-current increment to the emitter-current change from zero (cut-off) to IE.
IC − ICO
=−
IE

Since IC and IE have opposite signs, then α as defined, is always positive.

• Typical numerical value of a lies in the range of 0.90 to 0.995.
• From above equations,
IpC IpC IpE
= =
IE IpE IE

⇒ α = β*γ
• In below figure arrow indicates direction of current flow through emitter junction when
it is forward bias.

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Figure 4
• ICBO: It is the current flowing from collector to base when emitter is open circuited
ICBO = ICO
• ICEO: It is the current flowing from collector to emitter when base is open circuited.

ICO ICBO
ICEO = (1 +  ) ICO = ICEO = (1 +  ) ICBO =
1− 1−

• A BJT will behave as a diode if collector is shorted to the base (i.e. V CB = 0). Such a BJT
s called diode connected transistor.

Figure 5
• When collector and base are shorted together BJT behaves like a single junction device
because current passing through BJT will be decided by the voltage V BE across JE. In this
case current through diode connected transistor will be equal to the current passing
through JE i.e.
VBE / V T
I = I EO e

where IEO = Reverse saturation current of JE.

Example 1:
A transistor has IB = 25 μA. ICBO = 100 nA and β = 100, calculate a, IC, IE and ICBO.
Solution:
β = 100
 100
= = = 0.99
1 +  101

IC = IB + (1 +  ) ICO

= 100 × 25 × 10–6 + 101 × 10–9 = 2.51 mA

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IE = – (IB + IC)
IE = – (0.025 + 2.51) = – 2.535 mA

ICEO = ICBO + (1 +  ) = 101  100  10−9 = 10.1 A

Example 2:
For an n-p-n transistor connected as shown in the figure, V BE = 0.7 volts. Given the
reverse saturation current of the junction at room temperature (300°K) is
10–13 A, the emitter current is?

A. 30 mA
B. 39 mA
C. 49 mA
D. 20 mA
Solution:
When two terminals of a transistor are shorted, it acts as a diode.
 VO −1   0.7 −1 
I = I0  e VT  = 1013  e 26103  = 49 mA
   
   

2.1.4. Active region

When the emitter-base junction of the transistor is forward biased and the collector-base
junction is reverse biased, the transistor operates in active region. This mode is used
when the transistor has to be used as an amplifier. This bias configuration is shown in
Figure 4 for n-p-n and p-n-p transistors.

Figure 6: Transistors Biased in forward Active mode (a) n-p-n (b) p-n-p

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2.1.5. Saturation Region
As shown in Figure 5, when both the emitter-base junction and collector-base junction
are forward biased, the transistor operates in saturation region. Transistor has a large
current in saturation mode. The transistor is operated in this mode when it is to be used
as a closed switch.

Figure 7: Transistor Biased in saturation mode (a) n-p-n (b) p-n-p

2.1.6. Cut-off region
When both the emitter-base and collector-base junctions are reverse biased, transistor
operates in cut-off region. In this case, the current in the transistor is ideally zero. The
transistor is operated in this mode, when it is to be used as an open switch. Both n-p-n
and p-n-p transistor are biased in cut-off mode as shown in Figure 8.

Figure 8: Transistor Biased in cut off mode (a) n-p-n (b) p-n-p
2.1.7. Reverse Active Region or Inverse Region
When the emitter-base junction of the transistor is reverse biased and the collector-base
junction is forward biased, the transistor is said to be in reverse active mode. This mode
of operation is not often used. In Figure 9, transistors are biased in reverse active mode.

Figure 9: Transistor Biased in Reverse Active Mode

(a) n-p-n (b) p-n-p

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3. OPERATION OF BJT IN ACTIVE MODE

Consider the BJT with base-emitter (B–E) p-n junction forward-biased, and the base-collector
(B–C) p-n junction reverse-biased, as shown in Figure 8.

Figure 10: Biasing of n-p-n Bipolar Transistor in the forward Active mode
3.1. Carrier Concentration
The B-E junction is forward-biased, so electrons from the emitter are injected across
the B-E junction into the base. These injected electrons create an excess concentration
of minority carriers in the base. The B-C junction is reverse biased, so the minority carrier
electron concentration at the edge of the B-C junction is ideally zero.

Figure 11: Minority Carrier Distribution in an n-p-n Bipolar Transistor

Operating in the Forward-Active Mode

3.2. ENERGY BAND DIAGRAM

Figure 12 shows the energy band diagram for a BJT operating under zero bias and forward
bias.

Figure 12: Energy Band Diagram of the n-p-n Bipolar Transistor under Zero and
under a Forward-Active Mode Bias

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4. TRANSISTOR CURRENT RELATION

Figure 13 shows a cross section of an n-p-n transistor with the injection of electrons from the
n-type emitter (hence the name emitter) and the collection of the electrons in the collector
(hence the name collector).

Figure 13: Illustration of Current Flow in n-p-n Transistor

From the figure, we have the current relation
IE = IB + IC
Where, IE = Emitter current
IB = Base current
IC = Collector current
Let us obtain the generalized expression for these currents.
4.1. Collector Current:
Assuming the ideal linear electron distribution in the base, the collector current can be
written as a diffusion current given by

dn ( x )  n ( 0 ) -0 
iC =eDn A BE =eDn A BE  B 
dx  0-x B 
-eDn A BE υ 
= n B0exp  BE  ………(i)
xB  Vt 
Where, ABE is the cross-sectional area of the B-E junction,
nB0 is the thermal equilibrium electron concentration in the base,
Vt is the thermal voltage
Considering magnitudes only, equation (i) can be written as

υ 
i C =Is exp  BE  ………(ii)
 Vt 
NOTE: The collector current is controlled by the base-emitter voltage; that is, the current
at one terminal of the device is controlled by the voltage applied to the other two
terminals of the device. Hence, the bipolar transistor is a voltage-
controlled current source.

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4.2. Emitter Current:
One component of emitter current, iE1, shown in Figure 13 is due to the flow of electrons
injected from the emitter into the base. This current, then, is equal to the collector current
given by equation (i), i.e.

 
iE1 = iC1 = I S1  BE 
 Vt 
Again, iE2 is forward-biased p-n junction current, so we can write (considering magnitude
only)

 
iE 2 = I S 2  BE 
 Vt 
Where IS2 involves the minority carrier hole parameters in the emitter. Thus, the total
emitter current is the sum of the two components, i.e.

 
iE = iE1 + iE 2 = I S exp  BE  ………………………(iii)
 Vt 
From equations (ii) and (iii), we conclude that the ratio of collector current to emitter
current is a constant, i.e.

iC

iE
Where α is called the common-base current gain. Since, we have
i C < iE
So, α < 1
4.3. Base Current
As shown in above figure, the component of emitter current i E2 is a B-E junction current
so that this current is also a component of base current shown as i B1, i.e. this component
off base current is proportional to exp(vBE/Vt). Hence, we define the ratio of collector
current to base current as
iC
=
iB
Where β is called the common-emitter current gain. Since, we have
i C > > iB
So, β > > 1
i.e. the common-emitter current gain is much larger than unity (on the order of 100 or
larger).
NOTE: The n-p-n and p-n-p transistor are complimentary devices. Here, we have
developed the bipolar transistor theory using the n-p-n transistor, but the same basic
principles and equations also apply to the p-n-p devices.

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5. MINORITY CARRIER DISTRIBUTION

In this section, we will obtain the currents in the bipolar transistor which, as in the simple p-n
junction, are determined by minority carrier diffusion. Figure 12 shows the geometry of the n-
p-n bipolar transistor used to calculate the minority carrier distribution.

Figure 14: geometry of the n-p-n Bipolar Transistor Used to Calculate the Minority
Carrier Distribution
The notations, used for BJT, are given in table below. In the following sections, we will obtain
minority carrier distribution in all the three regions for the different operating modes of the
transistor.

Notation Definition
For both the n-p-n and p-n-p transistors
NE, NB, NC Doping concentrations in the emitter, base, and collector
xE, xB, xC Widths of neutral emitter, base, and collector regions
DE, DB, DC Minority carrier diffusion coefficients in emitter, base, and collector regions

LE, LB, LC Minority carrier diffusion lengths in emitter, base, and collector regions

τE0, τB0, τC0 Minority carrier lifetimes in emitter, base, and collector regions
For the n-p-n transistors

Thermal equilibrium minority carrier hole, electron, and hole concentrations

pE0, nE0, pC0
in the emitter, base, and collector

pE(x’), nB(x), Total minority carrier hole, electron and hole concentration in the emitter
pc(x’’) base, and collector

δpE(x’), δnB(x),
Excess minority carrier hole, electron and hole concentrations in the emitter,
δpc (x’’)
base, and collector
For the p-n-p transistors

nE0, pB0, nC0 Thermal equilibrium minority carrier electron, hole, and electron
concentrations in the emitter, base, and collector

nE(x’), pB(x),
Total minority carrier electron, hole, and electron concentrations in the
nC(x’’)
emitter, base, and collector
δnE (x’), δpB(x), Excess minority carrier electron, hole, and electron concentrations in the
δnc (x’’) emitter, base, and collector

Table 2: Notation used in the Analysis of the Bipolar Junction Transistor

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5.1. Minority Carrier Distribution in Forward Active mode
Figure 15 shows the minority carrier distribution of an uniformly doped n-p-n bipolar
transistor.

Figure 15: Minority Carrier Distribution in an n-p-n Bipolar Transistor

Operating in the Forward-Active Mode
We may express the carrier concentrations in the base, emitter, and collector regions as
Base region:
The steady-state excess minority carrier electron concentration is found from the
ambipolar transport equation, the excess electron concentration in the base is given by

nB 0   eVBE   
 nB ( x )   exp   − 1 ( xB − x ) − x 
xB   kT   
Emitter Region:
The excess concentration in emitter region varies approximately linearly with distance, if
xE is small. Hence, we express the excess hole concentration in emitter as

pE 0   eVBE  
 pE ( x ' )  exp  kT  − 1 ( xE − x ')
xE    
Collector region:
The excess minority carrier hole concentration in the collector is given as

 − xn 
 pc ( x '') = − pc 0 exp  
 Lc 

Figure 16: Minority Carrier Distribution in an n-p-n Bipolar Transistor

Operating in the Cut off mode
5.2. Minority Carrier distribution in Cut-off Mode
Figure 16 shows the minority carrier distribution in an n-p-n bipolar transistor in cut off.
In cut off, both the B-E and B-C junctions are reverse biased.

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Thus, the minority carrier concentrations are zero at each space charge edge. The emitter
and collector regions are assumed to be long in this case, while the base is narrow
compared with the minority carrier diffusion length. Since x B < LB, essentially all minority
carriers are swept out of the base region.
5.3. Minority Carrier Distribution in Saturation Mode
Figure 17 shows the minority carrier distribution in the n-p-n bipolar transistor operating
in saturation. Both the B-E and B-C junctions are forward biased; thus, excess minority
carries exist at the edge of each space charge region. However, since a collector current
still exists when the transistor is in saturation, a gradient will still exist in the minority
carrier electron concentration in the base.

Figure 17: Minority Carrier Distribution in an n-p-n Bipolar Transistor

Operating Saturation.
5.4. Minority Carrier distribution in Reverse Active mode
Figure 18 shows the minority carrier distribution in the n-p-n bipolar transistor operating
in reverse active mode. In this case, B-E is reverse biased. And B-C is forward biased.
Electrons from the collector are now injected into the base. The gradient in the minority
carrier electron concentration in the base is in the opposite direction compared with the
forward-active mode.

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Emitter Base Collector

n p n

pC (x'')
nB(x)
pE0 pC0
n B0
pE(x')
(a)

C B E

p n

n Electron Injection

(b)
Figure 18: Minority carrier Distribution in the n-p-n BJT

7. EARLY VOLTAGE

7.1. Base Width Modulation

When BJT is biased in active region the Emitter Junction (J E) is forward-biased but the
collector junction is reverse-biased, then in Fig (19) the barrier width at J E is negligible
as compared to space-charge width W at JC
The transition region at junction is a region of uncovered charges on both sides of junction
at positions occupied by impurity atoms. As the voltage applied across the junction
increases, transition region penetrates deeper into collector and base. As neutrality of
charges must be maintained, so the number of uncovered charges on each, side remains
equal. Since the doping in base is substantially smaller than that of collector, the
penetration of the transition region into the base is much larger than that in collector.
Hence the collector depletion region is neglected in below figure and all immobile charges
are indicated in base region.

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Flgure-19: The potential variation through p-n-p transistor

If metallurgical base width is WB, then the effective electrical base width is W’B = WB –
W. This modulation of effective base width by collector voltage is known as the Early
effect or Base width modulation.
7.2. Consequences of Early Effect
The decrease in W’B with increase in reverse collector voltage has three consequences:
• When |VCB| is increased the effective base width of transistor decreases so there are
less chances of recombination of charge carriers within the base region. As a result a
increases with increasing |VCB|.
• With decrease in base width the concentration gradient of minority carriers is increased
within the base. As we have,
IE ~ IpE
where IpE is diffusion current and is given by
dp p
IpE 
dx WB

where W’B is effective base-width

p
With increase in VCB , increases due to decrease in base-width. As a result, IpE
WB

increases and consequently IE also increases. Hence, we see that IE increases due to
increase in gradient of concentration of holes.
Also in BJT, voltage applied across one junction has effect current Passing through other
junction therefore junctions JE and JC are called interactive junctions.
• At large value of |VCB| depletion region can fully occupy the base region or in other
words for extremely large voltages, W’B may be reduced to zero. This Phenomenon is
known as punch-through or reach through.

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When punch-through occurs, effective base width becomes zero arid collector region gets
electrically shorted to emitter. Due to this shorting, the negative voltage applied at
collector reaches emitter also. This results in heavy current flow which can damage the
transistor.

8. BREAKDOWN VOLTAGE

Following are the two-breakdown mechanism that occur in a bipolar transistor:

(i) Punch-through breakdown
(ii) Avalanche breakdown
8.1. Punch-Through Breakdown
As the reverse-bias B-C voltage increases, the B-C space charge region widens and
extends farther into the neutral base. It is possible for the B-C depletion region to
penetrate completely through the base and reach the B-E space charge region, the effect
called punch-through. Figure 20 shows the geometry for calculating the punch-through
voltage.

Figure 20: Geometry of a bipolar transistor to calculate the punch-through

voltage
Assume that NB and NC are the uniform impurity doping concentrations in the base and
collector, respectively. Let WB be the metallurgy width of the base and let X dB be the
space charge width extending into the base from the B-C junction. If we neglect the
narrow space charge width of a zero-biased or forward-biased B-E junction, then punch-
through, assuming the abrupt junction approximation, occurs when
XdB=WB
Hence, we can write that
1/2
 2  (V + Vpt ) NC 1 
XdB = WB =  s bi . . 
 e NB NC + NB 
where Vpt is the reverse-biased B-C voltage at punch-through. Neglecting Vbi compared
to Vpt, we may express the Vpt as

eW2B NB (NC + NB )
Vpt = .
2 NC

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8.2. Avalanche Breakdown
The condition for avalanche breakdown is given as
M = 2
Where M is the multiplication factor, usually written as

1
M= n
 V 
1 −  CB 
 BVCBO 
Where n is an empirical constant, usually between 3 and 6, and BV CBO is the B-C
breakdown voltage with the emitter left open. Now, if we assume

VCB  VCE
Applying it to above equation, we get the required condition for avalanche breakdown as


n
=1
 BV 
1 −  CEO 
 BVCBO 
Where BVCEO is the C-E voltage at breakdown in the open base configuration. Solving for
BVCEO, we get

BVCEO = BVCBOn 1 − 
Where  is the common-base current gain. Since the common-emitter and common-


base current gains are related by =
1− 
Normally   1, so we have
1
1−  

Hence, above equation can also be written as

BVCBO
BVCEO = n

i.e., the breakdown voltage in the open-base configuration is smaller,
n
by the factor  , than the actual avalanche junction breakdown voltage.

9. IMPORTANT PROPERTIES AND STANDARD CONSTANTS

Following are some standard notations used in the exercise of the chapter.

Notation Definition
NE, NB, NC Doping concentrations in the emitter, base and collector
xE, xB, xC Widths of neutral emitter, base and collector regions
DE, DB, DC Minority carrier diffusion coefficients in emitter, base and collector regions
LE, LB, LC Minority carrier diffusion lengths in emitter, base and collector regions

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τE0, τB0,
Minority carrier lifetimes in emitter, base and collector
τC0

Pe0, nE0, Thermal equilibrium minority carrier hole, electron and hole concentrations in the
pc0 emitter, base and collector for n-p-n transistor

nE0, pE0, Thermal equilibrium minority carrier electron, hole and electron concentrations in the
nC0 emitter, base and collector for p-n-p transistor

Α Common base current gain

Β Common emitter current gain
 Emitter injection efficiency factor
ατ Base transport factor
Δ Recombination factor
Cμ B-C junction capacitance
Cs Collector to substance capacitance
Cje B-E junction capacitance
xac B-C space charge width
αF Common base current gain in forward active mode
αR Common base current gain in reverse active mode

JnE Current density due to the diffusion of minority carrier electrons in base at x = 0

JnC Current density due to the diffusion of minority carrier electrons in base at x = x B

The difference between JnE and JnC, which is due to the recombination of excess minority
JRB carrier electrons with majority carrier holes in the base. The JRB current is the flow of
holes into the base to replace the holes lost by recombination

JpE Current density due to the diffusion of minority carrier holes in emitter at x’ = 0

JR Current density due to the recombination of carries in forward biased B-E junctions.

Jpc0 Current density due to the diffusion of minority carrier holes in collector at x’’ = 0

JG Due to the generation of carries in the reverse-biased B-C junctions.

τec Emitter-to-collector time delay
τe Emitter-base junction capacitance charging time
τb Base transit time
τd Collector depletion region transit time
τc Collector capacitance charging time

Table 3

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10. SUMMARY OF DIFFERENT CONFIGURATIONS IN BJT

10.1. The Common Base Configuration

In Figure 21 (b) a p-n-p transistor is shown in a grounded-base configuration. This
circuit is also referred as Common Base (CB) configuration, since the base is common
to the input and output circuits For a p-n-p transistor the largest current components
ore duo to holes. Since holes flow from emitter to collector and down towards ground
out of the base terminal, then referring to the polarity conventions of Fig (21). We have
seen that
IE is positive, IC is negative and IB is negative for a forward-based emitter junction. VEB
is positive and for a reverse-based collector junction. VCB is negative. For an n-p-n
transistor all current and voltage polarities are negative of those for a p-n-p transistor.

Figure- 21: BJT in common base configuration

10.1.1. Properties of CB configuration
• Lowest input resistance (Ri < 100 Ω)
• Highest output resistance (R0 > 1 Ω)
• Lowest current gain (α < 1)
• Highest voltage gain
• Medium power gain (Typical value 68)
• Output and input voltages are in phase i.e. phase shift is 0°.

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• In CB amplifier current gain is less and therefore bandwidth is large and hence CB
amplifier is widely used as high frequency amplifier.
10.1.2 Applications
• As a non-inverting voltage amplifier
• As a high frequency amplifier
• As an impedance matching device between low resistance to high resistances.
10.1.3 Alpha (α)
• In the dc mode the levels of IC and IE due to the majority carries are related by a
quantity called alpha and defined by the following equation:

IC
oc =
IE

• For practical devices alpha typically extends from 0.90 to 0.998, with most values
approaching the high end of the range.
• For ac situations where the point of operation moves on the characteristics curve, an
ac alpha is defined by

 IC
ac =
 IE VCB = constant

• The alpha is formally called common base amplification factor or current gain of
common base transistor.
NOTE: The transistor’s amplifying action is basically due to its capability of transferring
its signal current from a low resistance circuit to high resistance circuit or vice-versa.
Contracting the two terms transfer and resistor results in the name transistor; that is,
transfer + resistor → transistor
10.2. The Common-Emitter Configuration
Most transistor circuits have the emitter terminal common to both input and output.
Such a common-Emitter (CE) or grounded-emitter, configuration is indicated in Fig.
(22).
In common-emitter configuration, the input current and output voltage are taken as
independent variables, whereas the input voltage and output current are the dependent
variables. We write
VBE = f1(VCE, IB)
IC = f2(VCE, IB)

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Figure-22: Common-Emitter Configuration.

10.2.1 Properties
• Moderate input resistance (around 1 kΩ).
• Moderate output resistance (50 kΩ to 500 kΩ).
• Moderate current gain (Typical value 49).
• Moderate voltage gain.
• Highest power gain (Typical value 4226).
• Output and input volta9es are out of phase i.e. phase shift = 180°.
10.2.2 Application
It is the most common and frequently used amplifier circuit.
10.2.3 Beta (β)
• In the dc mode the levels of IC and IB are related by a quantity called beta and defined
by the following equation
IC
dc =
IB

ac beta is defined as follows:

 IC
ac =
 IB VCE = constant

• Range of β is to 300.
• β in terms of a is

=
1−

or  =
 +1

• β is called the current gain of transistor in CE mode. It is the most important

specification of the transistor.
• β is also denoted by hFE and always
βdc > βac or hFE > hfe

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• Beta is a particularly important parameter because it provides a direct link between
current levels of the input and output circuits for a common-emitter configuration. That
is,
IC = βIB
and since IE = IC + IB = βIB + IB
we have IE = (β + 1)IB
10.2.4. Effect of Temperature on ‘β’
IC

IB

The average time, a carrier takes to travel from emitter junction to collector i.e. to travel
through base region is called transits time ‘τt’, which is given as

WB2
t =
2DB

where, τt = Transit time

WB = Base width and
DB = Diffusion constant
In average time one hole moves from emitter junction to collector junction in ‘τ t’ sec,
therefore in one sec 1/τt holes can move from emitter to collector junction.
Holes that reach collector junction will form ‘IC’, therefore,
1
IC 
t

The average time, a hole or electron will exist before recombination is called lifetime.
τp = Lifetime of holes
τn = Lifetime of electrons
In average time, one hole-electron recombination occurs in τp sec, therefore in one sec
1/τp recombination can happen. Hence base should be supplied with 1/τ p electrons in
one sec to keep it neutral and these electrons will form base current, so
1
IB 
p

By using above equations, we get

p

t

• To achieve large ‘β’ transit time should be reduced by decreasing base width.
• When temperature increases carrier life-time increases and hence β increases.
• In indirect semiconductor such as Silicon and Germanium, recombination occurs
through an intermediate energy level present in forbidden band
• During recombination free electronics moves into intermediate level and then into hole
or vacancy present in valance band.

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• But when temperature increases, the electrons which are moved into intermediate
level will come back to conduction band this process is called thermal re-excitation.
• Thermal re-excitation will prevent recombination and thereby life-time increases and
as a result β also increases.

Figure 23
10.3. Common-Collector Configuration
Another transistor configuration, shown in Figure (24), is known as the Common-
Collector (CC) configuration. In this circuit, the load resistor is in emitter circuit rather
than in collector circuit, if we continue to specify the operation of circuit in terms of the
currents which flow the operation for common-collector is much same as for common-
emitter configuration. When base current is ICO, the emitter current will be zero, and no
current will flow in load. As the transistor is brought out of this back-biased condition
by increasing the magnitude of the base current, the transistor will pass through the
active region and eventually reach saturation. In this condition whole supply voltages,
except for a very Small drop across the transistor will appear across the load.

Figure–24: Common Collector Configuration

10.3.1. Properties
• Highest input resistance (50 kΩ to 500 kΩ).
• Lowest output resistance (< 100 Ω).
• Highest current gain.
• Lowest voltage gain.

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• Voltage gain is less than 1 or very close to 1.
• Lowest power gain (Typical value 48).
• Output and input voltages are in phase i.e. phase shift is 0°.
• Common collector configuration is also known as emitter follower.
• Emitter follower is basically a Current Controlled Voltage Source (CCVS).
10.3.2 Applications
• As an audio frequency power amplifier.
• As a butter (impedance matching device between high resistance to low resistance).
• In designing of voltage sweep circuits.
• As a high input resistance device.
• As a “Boot strap emitter follower”.
10.3.3 Gamma (γ)
• ‘γ’ is called the current gain of common collector configuration and is given by

IE I + IB
= = C =1+
IB IB

• Relationship between α, β and γ of the transistor

1
 = 1+ =
1− 
NOTE: In a transistor if various current gains are arranged in the ascending order then
the correct sequence is α < β < γ

****

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ELECTRONIC DEVICES

4 MOSFET

1. BASICS OF MOSFET

Basically, there are two types of FET, they are JFET and MOSFET. MOSFET stands for metal
oxide semiconductor field effect transistor, which is one of the most important devices used in
design and construction of integrated circuit for digital computers.
In the MOSFET, there is no direct electrical connection between the gate terminal and the
channel of the MOSFET which were present in the JFET, this is due to the fact that MOSFET
uses an additional insulator layer of SiO 2 which provides good electrical isolation, this is the
reason why the input impedance of MOSFET is very high as compared to the JFET.
MOSFET are classified into two types.
(i) Depletion type MOSFET (D–MOSFET)
(ii) Enhancement type MOSFET (E- MOSFET)
The term depletion of enhancement defines their basic mode of operations.

2. COMPARISON BETWEEN DMOSFET OF EMOSFET

D-MOSFET E-MOSFET
(i) It can operate in depletion and
It can operate in enhancement mode only.
enhancement mode.
(ii) There is pre-existing There is no pre-existing channel
(iii) Depletion gate in always reverse
Gate is forward biased with the drain.
biased with drain.
(iv) ID < IDSS ID > IDSS

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3. DEPLETION TYPE MOSFET (D-MOSFET)

3.1. Basic construction

Fig 1: n-channel depletion type MOSFET

The basic construction of the n-channel depletion type MOSFET is shown in fig1. For the
n-channel D-MOSFET substrate (which is highly doped acts as a base) is p-type.
Substrate is the foundation upon which the device will be constructed. In some cases,
the substrate is internally connected to the source terminal.
However, may discreet devices provide on additional terminal labelled substrate, resulting
in four terminal devices.
Source (s), drain (D) terminal are connected through metallic contacts to n-doped region
linked by n-channel. The gate is also connected to a metal contact surface but remains
insulated from n-channel by a very thin SiO2 layer. This SiO2 layer acts a dielectric that
sets up opposing electric fields within the dielectric when exposed to an externally applied
filed.
3.2. Basic operation & characteristics

Fig 2:- n-channel depletion type MOSFET with

VGS=0V and an applied VDD.

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A n-channel DMOSFET with gate to source voltage (V GS) is zero and an applied voltage
VDD is sown in figure.
As the voltage across drain to source terminals (V DD or VDS) is applied, the attraction is
occurring for positive potential at the drain by the free electron of n-channel and current
is similar to that established through the channel of the JFET.
Now consider when drain source voltage (VDS) is held constant and Gate source voltage
(VGS) is varied and suppose is has been at (–1) V first.
Now the negative voltage at gate will tend to pressure electron toward the p-type
substrate because the dielectric creates the opposite sign on the left side while same sign
on the right side. Now the opposite charge attracted and like charge are repel and due to
this result recombination phenomenon take place which is shown in fig 3.

Fig 3:- Reduction in free carries in channel due to a negative

potential at the gate terminal.
A level of recombination between electrons and holes will occur depending on the
magnitude of the negative bias established by V GS that will reduce the no of free electron
in the n-channel available for conduction. Thus, the value of drain current is decreased
with increasing negative bias for VGS as shown in fig.4.
However, when are applied positive value of gate to source voltage (V GS), the positive
gate will draw additional electrons from the p-type substrate due to reverse leakage
current and new carriers established through the collision between the accelerating
particles.
The application of positive VGS has enhance the level of free electrons (charge carries) in
the channel compared to when VGS = 0V. Due to this reason positive gate voltage on the
drain or transfer characteristics to often referred to as the enhancement region.
Drain characteristics of depletion type MOSFET
Figure (a) shown the drain characteristics for the n-channel depletion type MOSFET. It is
the curve between drain current ID and drain source voltage, VDS with constant gate to
source voltage VGS.

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For VGS, between (zero to negative) volts, MOSFET operates in depletion mode.
for VGS, between (zero to positive) volts, MOSFET operates in enhancement mode.

Fig. 4:- Drain and transfer characteristics of n-channel depletion type MOSFET
Drain characteristics of D-type MOSFET are similar to that of JFET. The only difference
that JFET does not operate for positive values of gate to source voltage V GS.
Transfer characteristics of D-type MOSFET
Figure (a) shows the transfer characteristics for n-channel depletion type MOSFET. It is
also called transconductance curve.
From fig (a) it is clear that the region AB is similar with JFET. the value I DSS represent the
current with VGS = 0
The drain current at any point along the transfer characteristics is given by
2
 V 
ID = IDSS 1 − GS 
 VP 

(Note: When VGS = 0V

Then ID = IDSS
Due to this fact, it is called normally ON MOSFET)

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4. ENHANCEMENT TYPE MOSFET

4.1. Basic construction

Fig 5: n-channel enhancement type MOSFET

The enhancement type MOSFET has no depletion mode and it operate only in
enhancement mode. The n-channel enhancement MOSFET consist of a highly doped p
substrate into which two highly doped n-regions are diffused. The main difference in D
type & E type MOSFET is that in D type channel is already founded, however in E-type,
there is no physical channel.
The source (s) and drain (D) terminal are again connected though the metallic contacts
to n-doped regions.
The SiO2 layer as still present to isolate the gate between drain and source, but now it is
simply separated from section of the p-type substrate.
4.2. Basic Operation and Characteristics
The structure of n-channel E-MOSFET is shown in figure 5 which consist of a moderately
doped p-type silicon substrate into which two heavily doped n+ regions, the source and
drain are diffused. Between the two regions there is narrow region of p type substrate
called the channel, which is covered by the insulating layer of SiO 2 called gate oxide.
Polycrystalline silicon (polysilicon) electrode is referred as gate over this oxide layer which
is not composed of a single crystal. Since the oxide layer is an insulator, the DC current
from the gate to channel is essentially zero.
As the positive potential is applied between gate and source, due to the pressure of SiO2
layer, it attracts the charge carrier (i.e. electron) from the substrate.
The SiO2 layer and its insulating qualities will prevent the negative carriers from being
absorbed at the gate terminal.
As VGS increase in magnitude, the concentration of electron near the SiO2 surface increase
until the induced n-type region can support a measurable flow between drain and source,
which result in the formulation of inversion layers.
This inversion layer is formed when a certain gate to source voltage (VGS) is applied.

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The minimum value of VGS at which inversion take place is known as threshold voltage
(VT).
As the channel to not existed with VGS = 0V and enhanced by the Appling positive V GS
voltage therefore this type of MOSFET is called on enhancement type MOSFET.

Figure 6:- Channel formation in the n-channel enhancement type MOSFET.

As VGS is increased beyond the threshold level the density of free carriers in the induced
channel will increase, resulting in an increased level of drain current.
But if we hold VGS constant and increase the level of VDS, the drain current will eventually
reach saturation region as occurred in JFET & D-MOSFET.
IN SHORT:
(i) At VDS < VGS – VT
• An increase in VDS causes the ID to increase linearly and the MOSFET behave as a
resistance.
• This region is called linear region or resistive region or non-saturated region.
(ii) At VDS = VGS – VT
• This result in a slow increase of ID with increase in VDS.
(iii) At VDS > VGS –VT
• Further increase in VDS produce no change in current and the current saturation occur.
• This region is also called saturation region
• In this region the drain current flow is ideally independent of the VDS.

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Drain and transfer characteristics of E-MOSFET

Figure 7:- Drain characteristics of enhancement type

n-channel MOSFET.

Figure 8:- Transfer characteristics of EMOSFET

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5. COMPARISON OF NMOS & PMOS

NMOS PMOS
Linear region
(i) Linear region
VSG > |VTP|
VGS > VTN and VDS < VGS – VTN
VSD < VSG – |VTP|
W V2 
ID = nCox ( VGS − VTN ) VDS − DS  W V2 
L  2  ID = pCox ( VSG − | VTP |) VSD − SD 
L  2 
(ii) Saturation region Saturation region
VGS > VTN VSG > |VTP|
VDS > VGS – VT VSD > VSG – |VTP|
1 W 2 1 W 2
ID = nCox
2 L
( VGS − VTN ) ID = nCox
2 L
( VSG − | VTP |)

(iii) Transition point Transition point

VDS(sat) = VGS – VTN VSD(sat) = VSG – |VTP|
(iv) Enhancement mode Enhancement mode
VTN > 0 VTP < 0
(V) Depletion mode Depletion mode
VTN < 0 VTP > 0

Where, L = technology dependent parameter (1 to 10 µm)

W = technology dependent parameter (2 to 500 µm)
r ( siO ) = 3.9  oxide permitivily
2

= 3.9 × 8.85 × 10–12 F/m

W µr ( siO2 )
µncox = =
2 tox

tox = oxide thickness (2 to 50 nm)

6. MOSFET AS VOLTAGE VARIABLE RESISTANCE

It is observed that magnitude of ID depends on the density of electron in the channel, which in
turns depends on the magnitude of VGS.

Figure: 9

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For VGS = VT, the channel is just induced and the current conducted is still negligibly small.
As VGS increases to VT, more electrons are attached into the channel. Because of this conductance
of channel is increased and equivalent resistance is reduced.
The conductance of the channel is proportional to the excess gate voltage (V GS – VT), also known
as effective voltage or overdrive voltage.
Current ID ∝ (VGS – VT)
And VDS cause ID to flow
The resistance is infinite for VGS ≤ VT and its value decreases as VGS exceeds VT
RON resistance of MOSFET
When the voltage applied between VDS is kept small, device operates as linear resistor whose
value is controlled by
1
R ON =
W
µnCox ( V – VT )
L GS
W
& gm = µnCox ( V – VT )
L GS

7. THRESHOLD VOLTAGE

The threshold voltage depends upon the number of parameters

• Gate conducting material
• Gate insulation material
• Gate insulator thickness-Channel doping
• Impurities at the silicon-insulator interface
• Voltage between the source and substrate
(Note: In addition, the absolute value of the threshold voltage decreases with an increase in
temperature. This variation is approx –4mV/°C for high substrate doping levels and –2mV/°C
for low doping levels.)

Where,
VT(mos) = Ideal threshold voltage of MOS capacitor
Vfb = Flat band voltage
QfC = Fixed charge due to surfaces that are infected because of imperfection in the silicon
dioxide interface and doping.

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ϕmS = ϕgate – ϕsi = work function difference between gate material and silicon substrate
Note:
• VT(MOS) is the threshold voltage where is no work function difference between the gate and
substrate materials.
• Bulk potential accounts for doping of the substrate. It represents the difference between the
Fermi energy level of doped semiconductor and the Fermi energy level of the intrinsic
semiconductor.
• Energy required for an electron to move from fermi level into free space is called work
function = qϕs.)

ID
Transconductance, gm =
VGS VDS = const

W
gives, gm = [VGS – VT ] = nCox [V – VT ]
L GS
(in linear region refer figure 10)

W 2ID
gm = 2nCox I =
L D VGS – VT

(Note: For a given MOSFET, gm is proportional to the square root of the dc bias current. At a

W
given bias current gm is proportional to ).
L

W W
= constant = constant
L L
(a) (b) (c)
Figure 10
1
gm
VGS – VT

W W
= var iable → gm
L L
• gm is the figure of merit of MOSFET
• Indicates how well a device convert a voltage to a current or in other words gm is the
property by virtue of which an MOSFET convert an input voltage to an output current
• gds is the property by virtue of which an MOSFET convert an input voltage to an output drain
current.

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8. TRANSCONDUCTANCE

The MOSFET transconductance is defined as the change in drain current with respect to the
corresponding change in gate voltage, or
ID
gm =
VGS

The transconductance is sometimes referred to as the transistor gain. If we consider an n-

channel MOSFET operating in the non-saturation region, then we have
ID WnCox
gmL = = .VDS
VGS L

The transconductance in saturation region of operation is given by

ID (sat) WnCox
gms = = (VGS – VT )
VGS L

In the saturation region, the transconductance is a linear function of V GS and is independent

of VDS.
Properties of Transconductance
• The transconductance is a function of the geometry of the device as well as of carrier
mobility and threshold voltage.
• The transconductance increases as the width of the device increases.
• It also increases as the channel length and oxide thickness decrease.

9. SHORT CHANNEL EFFECT

The drain current in linear/non saturation region is given by

W V2 
iD = µnCox ( VGS – VT ) VDS – DS 
L  2 

This is the ideal relation for long channel devices, whose channel length is greater than 2 µm.
In long channel device, the horizontal electric field in the channel induced by the drain voltage
and the vertical electric field induced by the gate voltage can be treated independently.
There are several effects due to short channel device.
(i) As drain voltage increases, the effective threshold voltage decreases. This effect also
influences the current-voltage characteristics.
'
(ii) The process conduction parameters kn and kp' (i.e., k
'
n = µnCox ) are directly related to the

carrier mobility and we know that carrier mobility values are function of vertical electric field
in the inversion layer. As the gate voltage and vertical electric field increases, the carrier
mobility decreases.
(iii) Another effect that occurs in short-channel devices is velocity saturation, velocity
saturation will lower the VDS(sat) volt value.

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10. BODY EFFECT

We have assumed that the substrate/body of a MOSFET is connected to the source. In order
to maintain the cut-off condition for all the substrates to channel junctions, the substrate is
usually connected to the most negative power supply in NMOS and most positive in PMOS.
Under normal conditions – i.e. VGS > VT the depletion layer width remains constant and
charge carriers are pulled into the channel from source. However, as substrate bias V sb (Vsource
-Vsubstrate) is increased the width of the channel layer also increases, resulting in an increase in
the density of trapped carriers in depletion layer. For charge neutrality to hold the channel
charge must decrease. This increases the gate channel potential drop i.e. increase in V T. This
effect is called body effect.

VT = VtO +   2f + Vsb – 2f 

 

2qNA s
Where,  = called body effect parameter
Cox

Where, q = 1.6 × 10–19 C

NA = doping concentration of p-type substrate
ϵS = Permittivity of silicon
ϕf = physical parameter (typically 0.3V)
Summary of Body Effect
• As Vsb increases threshold voltage VT increases.
• Can cause a degradation in circuit performance
Methods of Reducing Threshold voltage (VT)
• The silicon nitride approach makes use of a layer Si3N4 and SiO2, whose dielectric constant
is about the twice that of SiO2.
• Polycrystalline silicon doped with boron is used as a gate electrode instead of aluminium.

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11. CMOS INVERTER

The complementary MOS using P-MOS and N-MOS is shown below

Figure 11: CMOS Inverter

PMOS – Called load transistor or Pull – up device
NMOS – Called Driver transistor or Pull – down device

Figure 12
Summary of CMOS Inverter operation

Region Condition P-MOS N-MOS o/p equation

A 0 < Vin < VTN linear Cut-off Vo = VDD
VDD
B VTN  Vin  linear Saturation Eqn.(A)
2
VDD
C Vin = saturation Saturation Vo≠ f (Vin)
2
VDD
D  Vin  VDD – | VTP | saturation Linear Eqn (B)
2
Vo=VSS or
E Vin > VDD –|VTP| cut-off Linear
0V

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Equation (A):

 V  
Vo = Vin – | VTP | + (Vin – VTP )2 – 2  Vin − DD – VTP  – n (Vin – VTN )2
 2  p

Equation (B):

p
Vo = Vin – | VTP | + (Vin – | VTP |)2 – (Vin – VDD – VTN )2
n

12. COMPARISON OF JFET AND MOSFET

JFETs and MOSFETs are quite similar in their operating principles and electrical characteristics.
However, they differ in some aspects, as discussed below:
• JFETs can only be operated in the depletion mode whereas MOSFETs can be operated in either
depletion or in enhancement mode. In a JFET, if the gate is forward biased excess carrier
junction occurs and the gate current is substantial. Thus, channel conductance is enhanced to
some degree due to excess carriers but the device is never operated with gate forward biased
because gate current is undesirable.
• MOSFETs have input impedance much higher than that of FET. This is due to negligible leakage
current (typically 10–15 A).
• JFETs have characteristic more flatter than those of MOSFETs indicating a higher drain-
resistance.
• When JFET is operated with a reverse bias on the junction, the gate current is larger than it
would be in a comparable MOSFET. The current caused by minority carrier extraction across a
reverse biased junction is greater, (per unit area) than the leakage current that is supported
by the oxide layer in a MOSFET.
For the above reason and also because MOSFETs are somewhat easier to manufacture, they
are more widely used than the JFETs.

13. IMPORTANT TERMS

• Accumulation Layer Charge

The induced charge directly under an oxide that is in excess of the thermal-equilibrium majority
carrier concentration.
• Bulk Charge Effect
The deviation in drain current from the ideal due to the space charge width variation along the
channel length caused by a drain-to-source voltage.
• Channel Conductance
The ratio of drain current to drain-to-source voltage in the limit as VDS → 0.
• Channel Conductance Modulation
The process whereby the channel conductance varies with gate-to-source voltage.

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• CMOS
Complementary MOS; the technology that uses both p-and n-channel devices in an electronic
circuit fabricated in a single semiconductor chip.
• Cut-off Frequency
The signal frequency at which the input ac gate current is equal to the output ac drain current.
• Depletion Mode MOSFET
The type of MOSFET in which a gate must be applied to turn the device off.
• Enhancement Mode MOSFET
The type of MOSFET in which a gate voltage must be applied to turn the device on.
• Equivalent Fixed Oxide Charge
The effective fixed charge in the oxide, Q’ss, directly adjacent to the oxide-semiconductor
interface.
• Flat-band Voltage
The gate voltage that must be applied to create the flat-band condition in which there is no
space charge region in the semiconductor under the oxide.
• Inversion Layer Charge
The induced charge directly under the oxide, which is the opposite type compared with the
semiconductor doping.
• Inversion Layer Mobility
The mobility of carriers in the inversion layer.
• Maximum Induced Space charge Width
The width of the induced space charge region under the oxide at the threshold inversion
condition.
• Metal-semiconductor Work Function Difference
The parameter ϕms, a function of the difference between the metal work function and
semiconductor electron affinity.
• Oxide Capacitance
The ratio of oxide permittivity to oxide thickness, which is the capacitance per unit area, C ox.
• Saturation
The condition in which the inversion charge density is zero at the drain and the drain current
is no longer a function of the drain-to-source voltage.
• Strong Inversion
The condition in which the inversion charge density is larger than the magnitude of the
semiconductor doping concentration.
• Threshold Inversion Point
The condition in which the inversion charge density is equal in magnitude to the semiconductor
doping concentration.
• Threshold Voltage
The gate voltage that must be applied to achieve the threshold inversion point.

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• Transconductance
The ratio of an incremental change in drain current to the corresponding incremental change
in gate voltage.
• Weak Inversion
The condition in which the inversion charge density is less than the magnitude of the
semiconductor doping concentration.
Example 1: In the given circuit of figure if VTP = –0.4V, the transistor M1, is operate in

Figure 13
A. Linear region
B. Saturation region
C. M1 is off
D. Cannot be determined
Solution:
It is known in case of P-MOS, there are there equations of operation,
(i) if VSG < |VTP| then P-MOS is in cut-off
(ii) If VSD < (VSG – |VTP|) and VSG > |VTP| then PMOS is in non-saturated region or linear region
or ohmic region.
(iii) If VSD > (VSG – |VTP|) and VSG > |VTP| then PMOS is in saturation region.
from the given circuit we have,
VSG = 1V, VSD = 1 – 0.3 = 0.7V
VTP = –0.4V
Here VSG – |VTP| = 1 – 0.4 = 0.6V
Since VSD > (VSG – |VTP|) and VSG > |VTP| therefore PMOS works in saturation region.

Example-2:
Find RS & RD for the circuit of figure so that the transistor operates at ID = 0.4mA and VD =
+0.5V
The NMOS transistor has VT = 0.7V, μn Cox = 100 μA/V2, L = 1μm and W = 32 μm. Neglect the
channel length modulation effect (i.e. assume that λ = 0)

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Figure 14
Solution:
Since VD = 0.5V, which is greater than VG this means the NMOS transistor is operating in the
saturation region.
1 W
Therefore ID =  C
2 n ox L
( VGS − VT )2
Where ID = 0.4 mA = 400 μA
μn Cox = 100 μA/V2
W 32
= = 32
L 1
1
( )
2
 400 =  100  32 VGS − VT
2

2 400  2
 ( VGS − VT ) =
100  32
∴ VGS – VT = 0.5 V
VGS = 0.5 + VT = 0.5 + 0.7 = 1.2 V
From figure the gate is at ground potential. Thus the source must be at –1.2V and the required
value of RS can be determined as
VGS − VSS 1.2 − ( −2.5)
Rs = = = 3.25K
ID 0.4

To establish a dc voltage of +0.5V at the drain, we select RD ∞ follows.

VDD − VD 2.5 − 0.5
RD = = = 5K
ID 0.4

Example-3:
If tox = 15 μm, ϵox = 3.45 × 10–11 F/m
µn = 550 cm2/V-s. the maximum value of VDS required to output the transient having W/L =
20 in saturation region with ID = 0.2 mA for 0.8 μm process technology?
Solution:
Given tox = 15 nm = 15 × 10–9 m
ϵox = 3.45 × 10–11 F/m

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μn = 0.055 m2/V-sec
ox 3.45  10−11
Cox = = = 2.3  10−3 F/m2
tox −9
15  10
1 W 2
ID =
2
n Cox
L
( VGS − VT )

1 2
0.2  10−3 =  0.055  2.3  10−3  20 ( VGS − VT )
2
VGS – VT = 0.397V
VGS – VT 0.4V
For saturation region VDS > VGS – VT
∴ VDS(min) = 0.4V
Example-4:
Consider on n-channel MOSFET having width W, length L, electron mobility in the channel μ n
and oxide capacitance per unit area
Cox if VGS = 0.7V, VDS = 0.1V,
w
μn Cox = 100 μA/V2, VTh = 0.3V and = 50 then transconductance gm (in mA/V) is
L
Solution:
Given n-channel MOSFET, which have
VDS = 0.1V
VGS = 0.7V
VTH = 0.3V
μn Cox = 100 μA/V2 = 0.1 mA/V2
W
= 50
L
From given data
Over drive voltage, Vov = VGS – VTH = 0.7 – 0.3 = 0.4V
Hence, VGS > VTH and VDS < VGS – VTH
So n channel MOSFET is in linear region.
In linear region, drain current to given by
W 1 2 
ID = nCox 
L 
( VGS − VTH ) VDS − VDS
2 


Transconductance to given by,

ID
gm =
VGS

W
hence, gm = ncox V = 0.1  50  0.1 = 0.5 mA/V
L DS
Hence, the transconductance gm is 0.5 mA/V.
Example 5:
Calculate the current in an n-channel MOSFET.

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Consider an n-channel enhancement mode MOSFET with the following parameters: V TN = 0.75
V, W = 40 μm, L = 4 μm, μn = 650 cm2/V-s, tox = 450 A, and ox = (3.9)(8.85 × 10–14) F/cm.

Determine the current when VGS = 2VTN, for the transistor biased in the saturation region.
Solution:-
 cm2   F 
W ( cm) . n  
 V − s  ox  cm  F (C V ) = A
Kn =   = =
2 L ( cm) .t ox ( cm) V − s V − s V2

The value of the conduction parameter is therefore

Kn =
W n ox
=
( ) (
40  10−4 (650 ) (3.9 ) 8.85  10−14 )
2 Ltox ( )(
2 4  10−4 450  10−8 )
or
Kn = 0.249 mA/V2
for vGS = 2VTN, we find
iD = Kn(vGS – VTN)2 = (0.249)(1.5 – 0.75)2 = 0.140 mA
Comment: The current capability of a transistor can be increased by increasing the conduction
parameter. For a given fabrication technology, K n is adjusted by varying the transistor width
W.

****

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ELECTRONIC DEVICES

5 MOS CAPACITOR

1. INTRODUCTION TO MOS CAPACITOR

MOS Capacitor stands for Metal-oxide Semiconductor capacitor. The Heart of the MOSFET is
the MOS-CAPACITOR.
The Basic structure of a MOS-CAPACITOR is given below: -

Figure 1
The SC LAYER may be either N type or P type semiconductor and will be working as
SUBSTRATE.
The Metallic Plate is generally made up of aluminium and is separated from semiconductor
substrate by SiO2.
SiO2 is an insulating material of thickness tox.
The structure will be working as a “Parallel Plate Capacitor” with metallic plate and
semiconductor substrate as the two plates of the capacitor and SiO 2 as the dielectric.
The Performance of the MOS CAP can be analysed with a Parallel plate capacitor as given below:

Figure 2
Let the upper plate is negatively biased with respect to the bottom plate and negative charges
are created on upper plate and positive charges are created on the bottom plate of capacitor.
An Electric field is induced in the upward direction as shown in above figure.

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1.1. MOS-CAP With P Type Substrate: -
1.1.1. ACCUMULATION MODE: -
Gate is negatively biased with respect to the substrate.
Accumulation charges are positive
1.1.2. DEPLETION MODE:-
GATE is positively biased with respect to substrate with smaller V.
A region of negative IMMOBILE IONS are created near the surface or Interface.
Width of space charge region, mathematically given as:-

2  s
XdT = 
q NA

where, Φs = Surface Potential

Φs = 2Φf

2  f 4  f
or XdT =  =
q NA qNA

1.1.3. INVERSION MODE:-

GATE is positively biased with respect to substrate with larger V.
Inversion charge is negative due to electrons.
1.2. MOS-CAP with N Type SUBSTRATE: -
1.2.1. ACCUMULATION MODE:
GATE is positively biased with respect to substrate.
Accumulation charge is negative.
1.2.2. DEPLETION MODE: -
GATE is negatively biased with respect to substrate by smaller voltage.
A region of positive IMMOBILE IONS are created near the Interface.
Width of Depletion Region:-

2 s
XdT =
qND

s = 2f

4  f
XdT =
qND
1.2.3. INVERSION MODE:-
GATE is negatively biased with respect to substrate by larger voltage.
Inversion charge of positive charges i.e., holes are created.
1.3. ENERGY BAND DIAGRAM & FERMI LEVEL IN MOS CAPACITOR: -
The Basic structure of MOS CAPACITOR with P type substrate is given below:

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Figure 3
The Energy Band diagram of the given MOS Capacitor under the UNBIASED
CONDITION i.e. V = 0 given below:

Figure 4
EFP = Fermi level of P TYPE substrate
EFS = Fermi level of substrate
The Energy Band diagram for different modes of operation is given below for MOS
CAPACITOR with P type Substrate.
1.3.1. UNDER ACCUMULATION MODE:-
GATE is negatively biased with respect to the P TYPE Substrate.

Figure 5
NOTE:
Valence Band edge is closer to the Fermi level, E F at the oxide semiconductor Interface
and this indicates there is an ACCUMULATION OF HOLES OR positive charges.
Semiconductor surface appears to be more P TYPE near the Interface, when compared to
the BULK.
1.3.2. UNDER DEPLETION MODE:-
The GATE must be positive with respect to substrate by a smaller voltage.

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Figure 6
NOTE:
• The conduction Band and valence bend near to the OXIDE SC INTERFACE indicating a
space charge region, similar to that in a PN JUNCTION MODE.
• A Potential difference is generated with in space charge region and is called as
SURFACE POTENTIAL, Fs
1.3.3. UNDER INVERSION MODE:
GATE is positive with respect to substrate by larger voltage.

Figure 7
NOTE:
The magnitude of induced Electric field increases and also the width of space charge
region increases, and also the corresponding more electrons will be TRAPPED near the
interface.
A larger negative charge in the MOS CAPACITOR indicates a larger Induced space charge
region and more bending of the curves.
The Intrinsic Fermi level at the surface is now below the Fermi level, hence conduction
Band is closer to Fermi level than the valence Band and this indicates the surface in the
SC near the Interface is N TYPE.
Hence by applying sufficiently larger positive voltage to GATE, the surface of the
semiconductor near the Interface gets inverted from P TYPE to N TYPE and an Inversion
layer of electrons are created at the Interface.
1.4. FLAT BAND VOLTAGE (VFB):
• Flat Band voltage (VFB) is the voltage developed at the oxide semiconductor Interface.
• Flat Band voltage (VFB) is also defined as the external voltage required to the MOS
CAP, to remove the BENDING of the curves.

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• The Flat Band Voltage (VFB) is mathematically given as:-
QOX
VFM = MS −  Volts
COX
Where, MS = metal semiconductor work funcn difference expressed in volts.
Also, MS = M − S  volts
M = work function of metal(in volts).
S = work function of semiconductor (in volts).
Cox =Oxide capacitance per unit cross sectional area ( F/m 2).
OX
COX =  F / m2
tOX
Example 1: Considered a MOS capacitor structure with P type semiconductor substrate
doped with NA = 1014 atoms/cm3. A SiO2 insulator with a thickness of 500A0 unit and N+
Polycrystalline Silicon GATE, then the flat band voltage is?
MS = − 1V
Assume, Q 'SS = 1010 e / cm2
r = 3.9
Solution:

QOX
VFB = MS −
COX

1.6  10−19  1010  500  10−8

= − 1−
3.45  10−13
VFB = 1.023 V
Note:
tOX=500A0 = 500 × 10-10 × 102 cm
= 500 × 10-8cm
1.4.1. Equation for threshold voltage in terms of Flat band voltage for MOS

Capacitor:

VT = VFB + 2f

Also,

QOX
VT = MS − + 2 f
COX
qQ 'SS  tOX
VT = MS − + 2 f
OX

Example 2: In a MOS CAPACITOR with N type Silicon substrates, the Fermi potential is

– 0.418 volts; and the Flat Band voltage is 0. Find its Threshold voltage?

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Solution:

Given data:-

 f = 0.14volts
VFB = 0
VT = VFB + 2 f
VT = 0.82 volts

1.5. GENERAL EQUATIONS OF MOS CAPACITOR

1.5.1. SURFACE POTENTIAL :-

S = 2f

where, f = Fermi potential

N 
FN = − VT ln  D  
 ni  
Also,   in Volts
 NA  
FP = + VT ln  
 ni  

1.5.2. WIDTH OF DEPLETION LAYER:-

• FOR P TYPE SUBSTRATE ( N CHANNEL)

2  s
XdT = 
q NA

4 FP
= 
q NA

• FOR N TYPE SUBSTRATE (P CHANNEL)

2  s
XdT = 
q ND

4 FN
= 
q ND
Example 3: In P TYPE Germanium semiconductor of MOS structure, the Impurity doping
concentration is 1016atoms/cm3; ni = 2.5 × 1013/cm3; Ge = 16; the maximum charge
density in C/cm2 is……..?
Solution:

Maximum charge density, Q 'SD max = qNA  dT

Q 'SD(max) = qNA  dT
Also,

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4 FP
XdT = 
q NA
and,

N 
FP = VT ln  A  = 0.155 Volts
 ni 
4  16.854  10−14 0.155
XdT = 
1.6  10−19 1  1016
XdT = 2.342 × 10-5 cm

Q 'SD(max) = 1.6  10−19  1  1016  2.342  10−5

Q 'SD(max) = 3.748  10−8 C/cm2

1.6. CHARACTERISTIC CURVE OF MOS CAPACITOR:-
• Also called as CV characteristics (capacitance voltage of MOS CAP).
• Considering a MOS capacitor with P type substrate then the CV characteristics (cap.
Versus GATE voltage characteristics) is as given below:

Figure 8 (For P type substrate)

Figure 9 (For N type substrate)

• In MOS capacitor the maximum capacitance is given by SiO2 and is given as Ci (CSiO2)
• The maximum capacitance is obtained when MOS capacitor is operated either in:
1) Accumulation Mode,
2) Inversion Mode
• The maximum capacitance, in MOS capacitor is obtained under STRONG
ACCUMULATION and STRONG INVERSION.
• The minimum capacitance is obtained under Depletion Mode.

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• The point where, the minimum capacitance is obtained is called as THRESHOLD POINT.
• Threshold voltage of MOSFET is defined as the value of GATE voltage where the
capacitance is minimum.
• The maximum capacitance or the Insulating capacitance is given as:-
i
Ci or Cmax =
d
SiO 2
Ci or Cmax =  F / cm2
tOX
• The diffusion capacitance,
sub
CD =
W

CD = sub  F / cm2
XdT
• CD is also called as Depletion layer capacitance.
• The minimum capacitance in MOS capacitor is the series combination of C i and CD
Ci  CD
Cmin =
Ci + Cd
• In MOS capacitor, the ratio of maximum capacitance to the minimum capacitance
is given as:-
Cmax X 
= 1 + dT . OX
Cmin tOX sub
Example 4: Consider a N channel MOSFET with following parameters:- ni = 1.5 ×
1010/cm3.
Substrate = 1016/cm3.
r(SiO2) = 3.9
r(Si) = 11.8
Oxide thickness = 100A 0
(tOX
The GATE voltage is slowly increased from negative value such that MOS experiences
strong accumulation, depletion and then strong inversion gradually. What are the
maximum capacitances observed in this experiment? Also find minimum capacitance?
Solution:

(SiO2 )
Cmax =
tOX
3.9  8.85  10−12
Cmax =
100  10−10
Cmax = 345.306 nF/cm2

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Also,

sub sub
CD = =
XdT 2s  s

q NA
11.8  8.854  10−14
=
2  11.8  8.854  10−14 2FP

1.6  10−19 NA

N 
FP = VT ln  A  = 0.348 V
 ni 
So,
CD = 34.65 nF/cm2
So,

CiCD
Cmin =
Ci + CD
345.306  34.65
Cmin =
345.306 + 34.65
Cmin = 31.5nF/cm2

****

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ELECTRONIC DEVICES

6 SPECIAL DIODES

1. INTRODUCTION

The most common application of diodes is rectification. The rectifier diodes are used in power
supplies to convert a.c. voltage into d.c. voltage. But rectification is not all that a diode can do.
Several specific types of diodes are manufactured for specific applications in this fast-
developing world. Some of the more common special-purpose diodes are Zener diode, Light-
emitting diode (LED), Photo-diode, Tunnel diode, Varactor diode and Shockley diode. In this
section, we will study the characteristics of some special pn junction diodes.

2. TUNNEL DIODE

A tunnel diode is a high conductivity two terminal p-n junction diode doped heavily about 1000
times higher than a conventional junction diode.
Tunnelling
In a tunnel diode, many carriers punch through the junction even when they do not have
enough energy to overcome the potential barrier (0.3 V for Ge and 0.7 V for Si). Consequently,
large forward current is produced even though the applied bias is much less than 0.3 V or 0.7
V. The phenomenon is known as tunnelling.
Current-Voltage Characteristic
Figure 1 shows the current-voltage characteristic of a tunnel diode. If the tunnel diode is
reversed biased, then it acts like a good conductor, i.e. the reverse current increases with
increasing reverse voltage.

Figure 1: Current-Voltage characteristic of Tunnel Diode

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We must note the following points about the tunnel diode with reference to the characteristic
curve shown in Figure 1.
i. Between points A and B, the current decreases with increases in voltage. This shows that the
tunnel diode has a negative resistance in this region. The portion AB constitute the most
important property of tunnel diode which makes it useful in high frequency oscillations.
ii. For voltages above Vv (valley voltage), the current starts increasing as in case of
conventional diode.
iii. The reverse current increases with increasing reverse voltage.
iv. If we take currents between Iv and Ip and draw perpendiculars to current axis, they cut the
curve corresponding to three different applied voltages, one corresponding to curve OA, other
at VP and the third with respect to curve AB. Thus, each current can be obtained at three
different applied voltages. This feature makes the tunnel diode useful in pulse and digital
circuits.
Tunnel Diode Parameters
The two important parameters of tunnel diode are
i. Negative Resistance:
This is the resistance offered by tunnel diode in negative region. We denote the negative
resistance by Rn and define as
Rn = −  VF /  IF

Where  VF is the change in forward voltage between any two points lying within negative

resistance region of V-I characteristic, and  IF is the corresponding change in forward current.

ii. Current Ratio:

This is the ratio of peak current (IP) to valley current IV, i.e.
Ir = IP / IV

This parameter is important in high speed switching circuits.

Tunnel Diode Equivalent Circuit
Figure 2 shows the equivalent circuit of a tunnel diode that consists of the following four
elements:
i. Series Resistance (RS):
This is the resistance due to leads, contacts and semiconductor material.
ii. Series Inductance (LS):
This is the induction due to lead lengths.
iii. Junction Capacitance (C):
This is due to diffusion capacitance and applied voltage.
iv. Negative Resistance (-Rn):
This is the resistance offered by tunnel diode between peak point A and valley point B.

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Figure 2: Equivalent Circuit of a Tunnel

3. PIN DIODE

A PIN (Positive-Intrinsic-Negative) diode is schematically shown in Figure 3. In a PIN diode, a

high resistivity intrinsic layer is sandwiched between p+ and n+ regions. Due to increased
separation between p and n regions, the capacitance decreases. Therefore, the PIN diode has
fast response time at high frequencies.

Figure 3: Schematic Construction of PIN Diode

Characteristic of PIN Diode
Some important characteristic of PIN diodes are:
i. When a PIN diode is forward biased, it offers a variable resistance.
ii. When a PIN diode is reversed biased, it offers infinite resistance in the reverse direction.
iii. PIN diode has highly improved switching time in comparison with a PN diode.
Applications of Pin diodes
Some important applications of PIN diodes are:
i. PIN diodes can be used in construction of phase modulator and amplitude modulator.
ii. It can be used as alternator.
iii. It is used as constant impedance device.
iv. It can be used as phase shifter.
v. It can be used as T-R switch in radar applications.

4. VARACTOR DIODE

A varactor diode is specially manufactured pn junction with suitable impurity concentration

profile and operated under reverse-biased conditions so as to yield a variable junction
capacitance.

(a) Symbol (b) Equivalent Circuit

Figure 4: Varactor Diode (a) Symbol (b) Equivalent Circuit
Characteristic of Varactor Diode

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In terms of applied reverse bias V, the transition capacitance of a varactor diode is
approximated by the expression,
CT (0)
CT =
[1 + (V / Vk )]n

where,
Vk is the volt equivalent temperature;
V is the reverse bias applied in volts;
n = 1/2 for alloyed junctions;
n = 1/3 for diffused junctions
Applications of Varactor Diode
Following are some important applications of varactor diode:
i. Used in parametric amplifier.
ii. Varactor diode is used in automatic frequency control.
iii. It is used in tuning circuits.
iv. Used in adjustable band pass filter.

5. SCHOTTKY DIODE

Schottky diode is an extension of point contact diode. It is also known as hot carrier diode, a
hot electron diode or epitaxial Schottky barrier (ESBAR) diode. It is mainly used as a rectifier
at signal frequencies exceeding 300 MHz.
Current-Voltage Characteristic of Schottky Diode

Figure 5: illustrates the current-voltage characteristic of Schottky diode.

Advantages of Varactor Diode
Following are the advantages of varactor diode over an ordinary p-n junction diode:
i. It is a unipolar device because there are no minority carriers in the reverse direction (i.e.,
no significant current from metal to semiconductor when the diode is reverse-biased).
Hence, the delay due to the hole-electron recombination present in junction diodes is absent
in varactor diodes.

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ii. The junction contact area between semiconductor and metal is larger than in point contact
diode and hence the forward resistance is lower (i.e., noise is comparatively lower).
iii. Since, no holes are available in metal, there is no depletion layer or stored charges to worry
about. So, Schottky diode can switch OFF faster than a bipolar diode.
(NOTE: An ordinary junction diode is a bipolar device because it has electrons and holes as
majority carriers.)

6. LIGHT EMITTING DIODE (LED)

• LED will emit the light when properly forward biased.

• PRINCIPLE: ELECTRO-LUMINESCENSE (conversion of electrical energy into light energy).
• In LED light is emitted due to a large number of recombination in the depletion region.
• LED i.e. generally fabricated with DBGSC.
• Popularly used material is GaAs.
• LED can emit the light either in the VISIBLE SPECTRUM or INVISIBLE SPECTRUM OF LIGHT
depending on DOPENTS.
• In the invisible spectrum of light, LED emits INFRARED LIGHT.
• IRLED is widely used as a remote-control transmitter.
• The colour of light given by LED depends on
i. Wavelength and frequency of emitted light.
ii. Type and concentration of dopants.
• LED fabricated with GaAs emits infrared light.
• LED materials are
i. GaAs
ii. GaAsP
iii. GaP←Highly unstable material (unreliable, unpredictable). Belongs to IBGSC. Also, since
material is unstable, but then also under controlled doping it is made used to work as LED.
Material is forced to emit light; under controlled doping.
• Modern LED’s are fabricated with some of the DBGSC and also some of the IBGSC under
“controlled doping”.
• Always operated under forward bias.
• When Reverse Biased, LED will be working as normal diode & it cannot emit any light.
• The function of limiting resistance in the LED
i. To limit the forward current.
ii. To limit the light output.
• The efficiency of LED
  If

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1

Temp
1
n
Junction Temp

• Cutting Voltage; V = 1.3 V to1.5 V depending on dopant.

• Power dissipation in mW.

• When compared to LCD, the disadvantage of LED is higher power dissipation.
• LED has longer operating life.
• LED is relatively faster in operation when compared to LCD because of smaller response
time (in us).

Figure 6: Symbol of LED

Applications
i. As Remote-Control Transmitter.
ii. As a display device.
iii. In designing of Opto Couplers.
NOTE
i. GaAs → IR LIGHT
ii. GaAsP → (YELLOW/ORANGE} depending on doping Concentration.
iii. GaP → (GREEN/RED)

1.24
C = m
Eg

7. SOLAR CELL

• It is a photovoltaic cell.
• Principle-photovoltaic effect.
• Photo Voltaic effect is conversion of light energy into Voltage.
• solar cell is basically a PN junction Diode with no voltage applied across the junction and is
terminated with a load resistance.
• When light falls on the space charge Region, electron and holes are generated and they are
quickly separated and swept out of the Depletion layer by the Electric field, so that a photo
current is generated.
• This generated Photo current will produce a voltage drop across the load and this indicates
that the solar cell has delivered the Power to the load.

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Light or Solar Energy

– – + +

P – – + +
Ei N
– – + +
– – + +

Photo Photo Current

Current
RL

+ VL –
Terminal Voltage
Taken Across Solar Cell
(taken across load)

Figure 7
Important point
• photocurrent is drift current
• Solar cell is generally fabricated with si (most popular) or GaAs or with the 3 RD & 2ND group
compound semiconductor.
• The terminal voltage of the solar cell is very small and is in the range of 0.1V to 0.5V.
• The maximum terminal voltage of solar cell is 0.5V.
• The terminal voltage of solar cell is always less than its contact potential.
• The terminal voltage of solar cell can be practically measured by using a voltmeter.
• Solar cells are widely used in satellites
• The Power requirement of satellite during night time is done by rechargeable “nickel-
cadmium solar batteries”.
• The open circuit voltage of Solar Cell is

 I 
VOC = VT ln 1 + L 
 IS 
 J 
VOC = VT ln 1 + L 
 JS 

Where,
IL = Solar current
JL = Solar Intensity (light intensity)
IS = Reverse Saturation current
Js = reverse saturation current density.
 I   J 
VOC = VT ln 1 + L  = VT ln 1 + L 
 IS   JS 
Also,
 AqDP AqDn  2
IS =  +  n Amp
 LPND LnNA  i
 qDP qDn  2 IS 3
JS =  +  ni =  Ampere / cm
L N
 P D L nNA  A

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Max Power obtained(max )

FillFactor =
VOC .ISC

Where,
VOC = Open circuit voltage of solar cell
ISC = short circuit current of solar cell.

Max obtained Power (max )

Efficiency () =
G. A

Where,
G = Input light in watts/m2
A = surface Area in m2

****