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Analog Electronics End Semester (Autumn) Question 2019

This document contains a 3-hour exam for an Analog Electronics course. It consists of 5 questions with 3 parts each, for a total of 15 sub-questions. The questions cover topics like MOSFET characteristics, biasing circuits, operational amplifiers, feedback amplifiers, and oscillators. Students are required to show calculations, derive expressions, and draw relevant diagrams in their answers.

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S.A.RAHMAN
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79 views3 pages

Analog Electronics End Semester (Autumn) Question 2019

This document contains a 3-hour exam for an Analog Electronics course. It consists of 5 questions with 3 parts each, for a total of 15 sub-questions. The questions cover topics like MOSFET characteristics, biasing circuits, operational amplifiers, feedback amplifiers, and oscillators. Students are required to show calculations, derive expressions, and draw relevant diagrams in their answers.

Uploaded by

S.A.RAHMAN
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Jamia Millia Islamia, Department of Electrical Engineering

B. Tech. Electrical Engineering 3rd Semester Exam, Autumn 2019


Subject: Analog Electronics, Code: EE-303
Duration: 3 hour Maximum Mark: 45
Answer briefly and to the point
S. No. All questions are compulsory, and answer any two part of a question. Mark
All the symbols have their typical meaning, and assume any missing data.
Q1(a) Draw the schematic diagram and typical drain characteristics of an enhancement 4.5
n-channel MOSFET. Write also the transfer equation. CO1
Q1(b) Determine the following parameters for the voltage-divider bias circuit in Fig. 1. 4.5
Given IDSS= 8m A, VP= -4V, VGSQ= -1.82 V. (i) IDQ, (ii) VD, (iii) VS, (iv) VDS, (v) VDG. CO1

Fig. 1
Q1(c) Determine the following parameters for AC amplifier in Fig. 2. Given IDSS= 10m A, 4.5
VP= -8V, VGSQ= -2 V, IDSQ= 5.625m A. (i) gm, (ii) rd, (iii) Zi, (iv) Zo, (v) Av. CO1

Fig. 2
Q2(a) 4.5
Calculate the DC bias voltages and currents for the emitter follower using
CO2
darlington pair in Fig. 3.

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Fig. 3
Q2(b) 4.5
Derive the expression of output voltage of an inverting amplifier using op-amp with
CO2
finite open loop gain. (Assume Ri = infinite and Ro = zero)
Q2(c) In non-inverting amplifier circuit of Fig. 4, let VI = 1 V, R1 = 2 kΩ, and R2 = 18 kΩ. 4.5
Find VO if (i) open loop gain (AOL) = 102 V/V, (ii) AOL = 104 V/V, (iii) AOL = 106 V/V. CO2

Fig. 4
Q3(a) Calculate the total offset voltage for the circuit shown in Fig. 5. The op-amp has 4.5
specified values of the input offset voltage VIO = 4 mV and input offset current IIO CO3
= 150 nA.

Fig. 5
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Q3(b) Draw the diagram of open loop gain variation of op-amp with frequency. Derive 4.5
the expression of cut-off (3-db) frequency. CO3
Q3(c) Draw the circuit diagram, and derive the expression of output voltage of an anti- 4.5
logarithm amplifier. CO3
Q4(a) Derive the expression of maximum efficiency for a series-fed class A amplifier with 4.5
a suitable diagram. CO4
Q4(b) 4.5
Explain with a suitable diagram the working principle of a Class D amplifier.
CO4
Q4(c) For a class B amplifier providing a 20 V peak signal to a 16 Ω load (speaker), and a 4.5
power supply of VCC= 30 V. Determine the input power, output power, and circuit CO4
efficiency.
Q5(a) Draw the block diagram of a voltage series feedback amplifier topology. Derive the 4.5
expression of voltage gain and input impedance with feedback. CO5
Q5(b) Derive the expression of output frequency and condition for sustained oscillations of 4.5
Phase-Shift Oscillator using a suitable diagram. CO5
Q5(c) Draw the block diagram of VCO (voltage controlled oscillator, IC 566). Determine 4.5
the frequency of output voltage (Vo) for the circuit of Fig. 6. CO5

Fig. 6

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