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System Verilog: Coverage

This document discusses coverage in system verification. It defines coverage as a metric to measure the completeness of verification. It describes different types of coverage including code coverage and functional coverage. Functional coverage verifies that the design under test meets all specified functionality by testing different combinations of inputs, outputs, and internal design events. The document introduces covergroup, coverpoint, bins, and cross coverage concepts in SystemVerilog for implementing functional coverage.

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0% found this document useful (0 votes)
89 views24 pages

System Verilog: Coverage

This document discusses coverage in system verification. It defines coverage as a metric to measure the completeness of verification. It describes different types of coverage including code coverage and functional coverage. Functional coverage verifies that the design under test meets all specified functionality by testing different combinations of inputs, outputs, and internal design events. The document introduces covergroup, coverpoint, bins, and cross coverage concepts in SystemVerilog for implementing functional coverage.

Uploaded by

Srinivas Aluvala
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System Verilog

COVERAGE
Coverage

 Coverage is the metric of completeness of verification.

 Why we need coverage?


o Direct Testing is not possible for complex designs.
o Solution is constrained random verification but :
o How do we make sure what is getting verified?
o Are all important design features getting verified?

 Types of Coverage's:
o Code Coverage.
o Functional Coverage.

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Functional Coverage

 Functional Coverage is used to verify that DUT meets all the


described functionality.

 Functional Coverage is derived from design specifications.


o DUT Inputs : Are all interested combinations of inputs
injected.

o DUT Outputs : Are all desired responses observed from


every output port.

o DUT internals : Are all interested design events verified.


e.g. FIFO full/empty

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covergroup

 covergroup construct encapsulates the specification of


a coverage model.

 covergroup is a user defined type that allows you to


collectively sample all variables/transitions/cross that
are sampled at the same clock (or sampling) edge.

 It can be defined inside a package, module, interface,


program block and class.

 Once defined, a covergroup instance can be created


using new() - just like a class.
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Example

Syntax:
covergroup cg_name [(port_list)]
[coverage_event];
//coverage_specs;
endgroup [ : cg_name]

Example:
covergroup cg;
……
endgroup

cg cg1=new;
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Coverpoint

 A coverage point (coverpoint) is a variable or an


expression that functionally covers design
parameters.

 Each coverage point includes a set of bins associated


with its sampled values or its value-transitions.

 The bins can be automatically generated or manually


specified.

 A covergroup can contain one or more coverpoints.

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Example

Syntax:
[label : ] coverpoint expression [ iff
(expression)]
[{
//bins specifications;
}] ;
Example:
covergroup cg;
coverpoint a iff (!reset);
endgroup

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bins

 bins are buckets which are used to collect number of times a particular
value/transaction has occurred.

 bins allows us to organize coverpoint sample values in different ways.


o Single value bins.
o Values in a range, multiple ranges.
o Illegal values, etc.

 If bins construct is not used inside coverpoint then automatic bins are
created based on the variable type and size.

 For a n-bit variable, 2 ^ n automatic bins are created.

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Example1

bit [3:0] temp;


covergroup cg;
coverpoint temp; //16 - Automatic bins created
endgroup

cg cg1;
initial cg1=new;

bin[0] to bin[15] are created where each bin stores information


of how many times that number has occurred.

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Example2

bit [3:0] temp;


covergroup cg;
coverpoint temp
{
bins a= { [0 : 15] }; //creates single bin for values 0-15
bins b [ ]= { [0 : 15] }; //creates separate bin for each
//value 0-15
}
endgroup

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Example3

bit [3:0] temp;


covergroup cg;
coverpoint temp
{
bins a [ ]= { 0, 1, 2 }; //creates three bins 0, 1, 2
bins b [ ]= { 0, 1, 2, [3:5] }; //creates six bins 0, 1, 2,
// 3, 4, 5
}
endgroup

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Example4

bit [3:0] temp;


covergroup cg;
coverpoint temp
{
bins a [4]= { [1:10], 1, 5, 7 };
//creates four bins with distribution <1, 2, 3> <4, 5, 6>
<7, 8, 9> <10, 1, 5, 7>
}
endgroup

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Covergroup inside a class

 By embedding covergroup inside class, coverage can


be collected on class members.

 Very useful as it is a nice way to mix constrained


random stimulus generation along with coverage.

 A class can have multiple covergroups.

 For embedded covergroups, instance must be created


inside the new() of class.

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Example

class xyz;
bit [3:0] m_x;
int m_y;
bit m_z;
covergroup cov1 @ (m_z); //Embedded Covergroup
coverpoint m_x; //16 bins
coverpoint m_y; //2^32 bins
endgroup
function new(); cov1=new; endfunction
endclass
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Bins for Transition

 In many cases, we are not only interested in knowing if


certain values or value ranges happen.

 But, we are also interested in knowing if transition


between two values or two value ranges happen.

 Transition coverage is often more interesting in control


scenarios, whereas value coverage is more interesting
in data path scenarios.

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Specifying Transition

 Single Value Transition


(value1=> value2)

 Sequence of Transitions
(value1=> value2 => value3=> value4)

 Set of Transitions
(value1, value2 => value3, value4)

 Consecutive repetition of Transitions


value[*repeat_time]
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Example1

bit [4:1] a;
covergroup cg @ (posedge clk);
coverpoint a
{ bins sa [ ]= ( 4=>5=>6 ), ( [7:9],10=>11,12) ;
bins allother= default sequence;
}
endgroup
Sa will be associated with individual bins (4=>5=>6) ,
(7=>11), (7=>12), (8=>11), (8=>12), (9=>11), (9=>12),
(10=>11), (10=>12)
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Example2

 Consecutive Repetition
bins sb={ 4 [*3] } ;
// (4=>4=>4)
bins sc [ ]={ 3 [*2:4] };
// (3=>3) , (3=>3=>3), (3=>3=>3=>3)

 Non-Consecutive Repetition
bins sd [ ]={ 2 [->3] };
//2=>…. =>2 …. =>2

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Excluding bins

 In some cases all the bins may not be of interest, or


design should never have a particular bin.

 These are two ways to exclude bins :


o ignore_bins
o illegal_bins

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Ignore Bins

 All values or transitions associated with ignore_bins


are excluded from coverage.

 Ignored values or transitions are excluded even if they


are also included in another bin.

bit [3:0] num;


covergroup cg;
coverpoint num {
bins val [ ]={ [1:15] }; //7 and 8 are ignored
ignore_bins bins ignoreval={ 7, 8 }; //ignore 7 and 8
ignore_bins bins ignoretran=(3=>4=>5); //ignore transition
} endgroup

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Illegal Bins

 All values or transitions associated with illegal_bins are excluded from


coverage and run-time error is issued if they occur.

bit [3:0] num;


covergroup cg;
coverpoint num {
illegal_bins bins illegalval={ 2, 3 }; //illegal bins 2 and 3
illegal_bins bins illegaltran=(4=>5); //4 to 5 is illegal
//transition
} endgroup

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Cross Coverage

 Coverage points measures occurrences of individual values.

 Cross coverage measures occurrences of combination of


values.

 Interesting because design complexity is in combination of


events and that is what we need to make sure is exercised
well.

 Examples:
o Was write enable 1 when address was 4’b1101.
o Have we provide all possible combination of inputs to a Full
Adder.

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Example1

 Cross coverage is specified between two or more


coverpoints in a covergroup.

bit [3:0] a, b;
covergroup cg @ (posedge clk);
cross_cov: cross a , b;
endgroup

 16 bins for each a and b.

 16 X 16=256 bins for cross_cov


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Example2

bit [31:0] a;
bit [3:0] b;
covergroup cg @ (posedge clk);
cova: coverpoint a { bins low [ ]={ [0:9] }; }
cross_cov: cross b, cova;
endgroup

 16 bins for b. 10 bins for cova.


 10 X 16=160 bins for cross_cov.

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