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CN803
CN803
Block Diagram
VCC
OSC
VCC
RESET
(RESET)
+ Delay
COMP Generator
1.25V
-
GND
Rev 1.2 2
Pin Description
Pin No.
Symbol Description
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. These are stress ratings only, and functional operation of the device at these or any other
conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect device reliability.
Rev 1.2 3
Electrical Characteristics (VCC=3V, TA= -40℃ to 85℃, Typical values are at TA=25℃,
VRES>VCC=2V,ISINK=1.5mA 0.3
Output
Voltage Low VOL VRES>VCC=3V,ISINK=3.2mA 0.3 V
(CN803/809)
VRES>VCC=4V,ISINK=5mA 0.3
Output VRES<VCC=3V,ISRC=1.2mA VCC-0.4
Voltage High VOH VRES<VCC=4V,ISRC=2mA VCC-0.4 V
(CN809) VRES<VCC=5V,ISRC=2.5mA VCC-0.4
RESET Output VRES<VCC=3V,ISINK=3.2mA 0.3
Voltage Low VOL VRES<VCC=4V,ISINK=5mA 0.3 V
(CN810) VRES<VCC=5V,ISINK=6mA 0.3
RESET Output VRES>VCC=2V,ISRC=600uA VCC-0.4
Voltage High VOH VRES>VCC=3V, ISRC=1.2mA VCC-0.4 V
(CN810) VRES>VCC=4V, ISRC=2mA VCC-0.4
Reset Pulse Width TRES 140 240 400 ms
o
Note : Parts are 100% production tested at 25 C. Specifications over full temperature range are
guaranteed by design
Rev 1.2 4
Detailed Description
A microprocessor’s (µP’s) reset input starts the µP in a known state. The CN803/809/810 series assert reset
to prevent code-execution errors during power-up, power-down, or brownout conditions. The device
consists of a comparator, a low current high precision voltage reference, voltage divider, output delay
circuit and output driver. They assert a reset signal whenever the VCC supply voltage declines below a
preset threshold, keeping it asserted for at least 140ms after VCC has risen above the reset threshold.
The CN809/810 have a CMOS output stage, the CN803 has an open drain output stage. The CN803/809
have an active-low output, while the CN810 has an active-high RESET output. The reset
comparator is designed to ignore fast transients on VCC, and the outputs are guaranteed to be in the correct
logic state for VCC down to 1.15V over the temperature range.
The operation of the device can be best understood by referring to figure 3.
VCC
VCCMIN VCCMIN
RESET
TRES
Applications Information
Negative-Going VCC Transients
In addition to issuing a reset to the µP during power-up, power-down, and brownout conditions, the
CN803/809/810 series are relatively immune to short-duration negative-going VCC transients (glitches). As
the magnitude of the transient increases (goes farther below the reset threshold), the maximum allowable
pulse width decreases. Typically, a VCC transient that goes 100mV below the reset threshold and lasts 10µs
or less will not cause a reset pulse. A 0.1µF bypass capacitor mounted as close as possible to the VCC pin
provides additional transient immunity.
Ensuring a Valid Reset Output Down to VCC = 0
When VCC falls below 1.15V, the CN809 output no longer sinks current—it becomes an open
circuit. Therefore, high-impedance CMOS logic inputs connected to can drift to undetermined
voltages. This presents no problem in most applications, since most µP and other circuitry is inoperative
with VCC below 1.15V. However, in applications where must be valid down to 0V, a pull-down
resistor is needed from pin to GND as shown in Figure 4, then output will be held at
low state. The resistor’s value is not critical, it should be about 100KΩ, large enough not to load ,
Rev 1.2 5
small enough to pull to ground.
A 100KΩ pull-up resistor to VCC is also recommended for the CN810 if active high RESET is
required to remain valid for VCC < 1.15V.
CN809
RESET
Rev 1.2 6
Package Information
Consonance Electronics does not assume any responsibility for use of any circuitry described. Consonance
reserves the right to change the circuitry and specifications without notice at any time.
Rev 1.2 7