Protection of Devices and Circuits
Power electronics equipment requires protection
against internal faults, external faults and external
disturbances
For example, an internal fault such as the failure of
a SCR to turn OFF should not cause damage to
other components
For example, an external short circuit of the load
should not cause damage to an internal component
For example, an electrical transient on the incoming
power line should not cause semiconductor device
damage
1
Protection of Devices and Circuits
Each of these three examples (internal fault,
external fault and external disturbance) can be
prevented by suitable design
And if possible, the protection feature should allow
the system to resume normal operation when the
problem has been removed
This means, the reliable operation of a converter
would require ensuring that at all times the circuit
conditions do not exceed the rating of the power
devices, by providing protection against
OVERVOLTAGE, OVERCURRENT and
OVERHEATING 2
Protection of Devices and Circuits
Switching devices and circuits may fail due to the
following reasons
Overheating – thermal failure – Heat sink
Overcurrent – fuses
Overvoltage – usually happens during turn OFF-
Snubbers
Excessive di/dt – Snubbers
Excessive dv/dt – Snubbers
Switching loss – excessive switching loss is a major
contributor factor of overheating-Heat sinks, fins
and fans
Power electronic circuit and their switching devices
and components can be protected from overcurrent by
placing fuses at suitable locations 3
Protection of Devices and Circuits
Heat sinks, fins and fans are used to take the
excess heat away from switching devices and
other components
Snubber circuits are required to limit di/dt, dv/dt
and overvoltage during turn-ON and turn-OFF
4
Cooling and Heat Sinks
Due to on-state and switching losses, heat is
normally generated within the power device
This heat must be transferred from the device to a
cooling medium to maintain the operating junction
temperature within the specified range
Keeping the junction temperature of a power
device within reasonable bound is the joint
responsibility of the device manufacturer and the
device user
5
Cooling and Heat Sinks
How:
(a) The manufacturer minimizes the thermal
resistance RJC between the interior of the
device where the power is dissipated and the
outside of the case enclosing the device
(b) The device user must provide a heat conduction
path between the case of the device and the
ambient so that thermal resistance RSA
between the case and the device and the
ambient is minimized in a cost effective manner
6
Cooling and Heat Sinks
The user responsibility is made easier by wide
availability of heat sinks (aluminium) of various
shapes that are used for cooling of the power
semiconductor devices
The choice of the proper heat sink depends on the
allowable junction temperature that the device can
tolerate
Therefore, the junction temperature of a
semiconductor device is critical in determining the
device’s survival and lifetime in any application
7
Cooling and Heat Sinks
Calculation of junction temperature of devices is
therefore a necessary part of the design process
of the power electronic circuitry
8
Cooling and Heat Sinks
Heat energy flows from the interior of a power
electronic component mounted on external heat
sink by means of conduction
In the steady state, the process is modelled by a
series connection of thermal resistance
Heat transfer from the heat sink to the ambient is
controlled by two heat transfer mechanisms,
convection and radiation
The junction temperature calculations are
modelled by a thermal resistance that has several
components and is expressed in oC/W
9
Cooling and Heat Sinks
Three components are generally considered when
a power semiconductor device is mounted on a
heat sink
a) Thermal resistance between the device junction
and the device case denoted as RJC
b) Thermal resistance RCS which models the
imperfect interface between the semiconductor
device case and the hear sink
c) Thermal resistance, RSA which models the effect
of heat rejection to the surrounding ambient
temperature
10
Cooling and Heat Sinks
The electrical circuit analogy for the thermal
circuit
TJ TC TS
RJC RCS RSA
P TA
11
Cooling and Heat Sinks
The junction temperature of a device, TJ is given
by T T P R R R Where
J A JC CS SA
P = Average Power Loss in the device
Surrounding ambient temperature
Thermal resistance from junction to case, o C /
Thermal resistance from case to sink, oC/
Thermal resistance from sink to ambient, oC/
RJC and RCS are normally specified by the
manufacturer of the devices
12
Cooling and Heat Sinks
Once the power loss, PA of the device is known,
the required thermal resistance of the heat sink
can be calculated for a known ambient
temperature, TA
The next step, is to choose a heat sink and its size
which would meet the thermal resistance
requirement
When mounted, the contact area between the
device and the heat sink is extremely important to
minimize the thermal resistance between the case
and sink
13
Cooling and Heat Sinks
The surfaces should be flat, smooth and free of
dirt and corrossion
Silicon greases are normally applied to improve
the heat transfer capability and to minimize the
formation of oxides and corrossion
In high power applications, the devices are more
effectively cooled by liquid, normally oil or water
Water cooling is very efficient and approximately
three times more effective than oil cooling
14
Cooling and Heat Sinks
It is necessary, however, to use distilled water to
minimize corrosion. Oil is flammable, thus may be
restricted to some applications, however, provides
good insulation and eliminates the problems of
corrosion. Heat pipes and liquid-cooled heat sinks
are commercially available
We have two types of cooling namely forced-air
and natural-air cooling.
15
Cooling and Heat Sinks
Example:
A BJT with power dissipation of 12W is mounted o a
heat sink in an ambient air temperature of 85oC. The
semiconductor device RCS value is reduced to
0.2oC/W by mounting a heat sink on it using thermal
grease. The value of RJC is 0.83oC. The junction
temperature cannot exceed 175 oC. Complete the
design by finding a suitable heat sink thermal
resistance.
16
Cooling and Heat Sinks
Solution:
TJ T A P( R JC RCS RSA )
175 85 12(0.83 0.2 RSA )
RSA 6.47 C / W
o
For reasons of reliability it is not desirable to
operate the device at the limiting junction
temperature
Good design requires a heat sink that is more
capable than the value just calculated
17
Snubber Circuits
Snubber circuits reduces voltage and current
stresses across the semiconductor devices by
providing an alternative path of energy normally
by using capacitors, resistors ad inductors
Snubber circuits are used to limit di/dt, limit dv/dt
and reduce overvoltages during turn ON and turn
OFF
18
Rapid Change of Semiconductor Voltage and
Current (dV/dt, di/dt)
Two operating conditions may produce
undesirable conditions for the switching devices
a) The rate of change of voltage:
Excessive dv/dt may cause unwanted device
turn-ON and possible damage
The charging current, i C dVdt of the capacitive
C
AK
junctions may be sufficient enough to turn-ON
the device
If the dV/dt is higher than the specified dV/dt
the device may be damaged
The solution to the dV/dt problem is to reduce
the rate at which the VAK (VGK) may change,
usually with the capacitors
DP314 Lecture Notes Sem II 2012/13 - © nkl 19
Rapid Change of Semiconductor Voltage and
Current (dV/dt, di/dt)
Consider the circuit below
G(A) The thyristor is OFF an
+ VGK
VS TH you would wish it to
- VAK
K remain OFF.
However, due to the capacitive junction between A
and cathode (K), there is a charging current, iC C dVAK
dt
This current may be enough to turn-ON the device
and possible damage it, if dVAK is high than the
dt
specified
20
Rapid Change of Semiconductor Voltage and
Current (dV/dt, di/dt)
Solution: Connect the capacitor in parallel to the
device as shown in the following diagram
Hence the capacitance
+
VS TH C CT = CTH + C can be increased
- and thus reducing the dVAK by
dt
dV AK dV AK iC
iC C
dt dt C
Besides the reduction of dV/dt , a path has been created for the
charging for current ic through the connected capacitance
During the turn-ON however, and since the capacitor was charging
due to ic’ the charging
21
Rapid Change of Semiconductor Voltage and
Current (dV/dt, di/dt)
current at turn-ON of the device, the capacitor will
discharge into the device and possibly damage it.
Thus, you connect a resistor in series with the
capacitor to limit the current that flows as follows
TH R
VS
+
C
-
22
Rapid Change of Semiconductor Voltage and
Current (dV/dt, di/dt)
But now, when the thyristor is OFF, the path for the
charging current might not be easy to reduce the
dVAK
dt
Since the current will also be limited by the
resistance. You thus include a diode to easy the path
of the charging current when the thyristor is OFF, as
shown in the diagram
+
TH R
VS -
C
23
Rapid Change of Semiconductor Voltage and
Current (dV/dt, di/dt)
Thus, we conclude by saying that;
The introduction of extra element called snubbers to
protect the switching device from dV/dt is usually
done by capacitors, but other elements are
frequently added to the capacitor as shown before
The diode provides a path around the resistor so
that the snubber is effectively the capacitor
If only the capacitor were used, then on subsequent
turn-ON of the device, the capacitor would be
rapidly discharged through the switching device
24
Rapid Change of Semiconductor Voltage and
Current (dV/dt, di/dt)
A resistor in series with the snubber capacitor limits
this current on device turn-ON
Device Data sheets contains information on the
maximum rate at which VAK may change without
causing unwanted device turn-ON
25
The Rate of Change Current (di/dt )
If the device’s rate of change of current becomes
very high, the switching device may be damaged
The device requires a minimum time to spread the
current conduction uniformly throughout the
junctions
If the rate of rise of anode current is very fast
compared to the spreading velocity of a turn-ON
process, a localized “hot spot” heating will occur
due to high current density and the device may fail,
as a result of excessive temperature. The device
must be protected against di
dt
26
The Rate of Change Current (di/dt )
Consider the following circuit diagram
T1
im
-
Load
VS Dm
+
Under steady-state operation, Dm conducts when
thyristor T1 is OFF
di
If T1 is fired when Dm is still conducting, dt can be
very high and can only be limited by stray
inductance
27
The Rate of Change Current (di/dt )
In practice, the di is limited by adding a series
dt
inductance LS as shown in the figure
im
LS is
-
Load
VS Dm
+
di di VS
The forward dt is given by, dt LS
LS is the added series inductance, including the
stray inductance
28
Protection against Overvoltages
Understand the reverse recovery time of a
semiconductor device
When the diode is in forward conduction mode and
then its forward current is reduces to zero (due to
the natural behaviour of the diode circuit or by
applying a reverse voltage), the diode continues to
conduct due to minority carriers which remain
stored in the pn-junction and the bulk
semiconductor material
The minority carriers require a certain time to
recombine with opposite charges and to be
neutralized
29
Protection against Overvoltages
This certain time …is called the reverse recovery
time of the semiconductor
The reverse current associated with this recovery
time di
I RR t a
dt trr
IF
ta
IRR
30
Protection against Overvoltages
Now consider the following circuit
IRR
i
L
Device under
VS Dm recovery
Due to the recovery time trr and recovery curent IRR,
an amount of energy is trapped in the circuit
inductance and as a result transient voltage appears
across the device
31
Protection against Overvoltages
An R-C snubber circuit with the initial zero voltage
on the capacitor is used to provide abrupt recovery
and recovery current is suddenly switched to zero
IRR Dm – Device under recovery
+ L I
+
C
VS V Dm Open circuit
R
- -
Damping Circuit
Normally, R and C are chosen such that the circuit is
slightly underdamped. Critical or Insufficient damping
results in large overshoot of transient voltage
32
Protection against Overvoltages
An R-C snubber circuit with the initial zero voltage
Safe value
IRR
VS Safe value
-I
Current Transient voltage
33
Protection against Overvoltages
The snubber circuit is expressed as
di 1
(i) L Ri idt VC (t 0 ) VS
dt C
di
(ii) Before including R and C in the circuit, VS L
dt
i
L
Reverse current
VS Dm
34
Protection against Overvoltages
With RLC circuit and initial conditions,
i( t 0) I RR and VC (t ) 0
For an underdamped case (RLC circuits), the
solution for the voltage is
t I RR t
(t ) VS (VS RI RR )(cos t sin t )e e sin t ....(a)
C
R
Where
2L 1
The underdamped natural frequency, o
LC
35
Protection against Overvoltages
The damping ratio is
R C
o 2 L
The damped natural frequency, o2 2
o 1 2
d 2 2 t
VS RI RR 2 cos t sin t e
dt
I RR t
cost - sin t e ............(b)
C
36
Protection against Overvoltages
The initial reverse voltage and d can be found by
dt
letting t = 0, in (a) and (b) respectively
V(t 0 ) RI RR
d IR
and VS RI RR 2
dt t 0 C
VS RI RR R I R
L C
VS o 2 4d 2 d ........................(c)
IR L I RR
Where d is given by d called the current
VS C Ip
factor
37
Protection against Overvoltages
Example 1
The recovery current of a diode I RR 20 A and the circuit
inductance is L 50H . The input voltage is VS 220V .
The graph on optimum snubber parameters for
compromise design gives the optimum current factor,
do = 0.75 and the optimum damping factor o 0.4
(a) Determine the snubber capacitance (with d = do)
2
IR L I L
d d
2
d VS C I R L
2 2
R
2
2
VS C V C S
38
Protection against Overvoltages
Solution 1 IR
2
C 2 2 L
d VS
2
IR
C L
dV S
2
20
50
0 .75 220
0 .735 F
39
Protection against Overvoltages
Solution 1
(b) The snubber resistance,
L 50
R 2 2 0 .4 6 .6
C 0 .735
(c) The undamped natural frequency
1 106 rad
o 164,957
LC 50 0.735 sec
The initial reverse voltage
V( t 0 ) RI R 6.6 20 A 132V
40
Protection against Overvoltages
Example 2
An RC snubber circuit has C = 0.75µF, R = 6.6Ω
and input voltage, VS = 220V. The circuit inductance is
L = 50µH. Determine;
(a) The peak forward voltage Vp
(b) The initial dv dt and
(c) The maximum dv dt
41
Protection against Overvoltages
Solution 2
By setting IRR = 0, the forward voltage across the
device can be determined from equation (a) giving:
(t ) VS VS (cos t sin t )e t . . . . . . . . . . . . (d)
dv
The initial dt can be found from settion t = 0 in the
above equation, or from eqn (c) by setting IRR = 0
dv VS R 220 6
VS 2 29 V / s
dt t 0 L 50
42
Protection against Overvoltages
Solution 2
The forward voltage will be maximum at t = t1. The time
t1 can be obtained by setting
dv 2 2
t
VS (2 cos t sin t )e
dt
Equal to zero, or by setting IRR = 0 in eqn (c) you obtain
2 2 2
tan t1 2 which gives cos t1 2 . . . . (e) and
2
2
2
sin t1 2 . . . . (f)
2
43