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Computer Architecture Tasks

This document summarizes an assignment for a computer architecture course. It includes 4 questions about pipelining techniques for overcoming data hazards, identifying data hazards in a code sequence, timing calculations for different pipeline stages, and drawing datapath diagrams for single cycle and load word instructions. Question 1 has parts asking about stall cycles needed with and without forwarding. Question 2 identifies hazards in a code sequence and solutions using stalling, stalling with forwarding, and stalling with forwarding and code scheduling. Question 3 calculates clock period differences and instruction execution time. Question 4 asks to draw single cycle and load word datapath diagrams.

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Hasib Chowdhuryy
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0% found this document useful (0 votes)
137 views7 pages

Computer Architecture Tasks

This document summarizes an assignment for a computer architecture course. It includes 4 questions about pipelining techniques for overcoming data hazards, identifying data hazards in a code sequence, timing calculations for different pipeline stages, and drawing datapath diagrams for single cycle and load word instructions. Question 1 has parts asking about stall cycles needed with and without forwarding. Question 2 identifies hazards in a code sequence and solutions using stalling, stalling with forwarding, and stalling with forwarding and code scheduling. Question 3 calculates clock period differences and instruction execution time. Question 4 asks to draw single cycle and load word datapath diagrams.

Uploaded by

Hasib Chowdhuryy
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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CSE340: Computer Architecture

Assignment 3

Chapter 4 (The Processor)


Total Marks: 20 (Marks are indicated in third brackets after each question)

Question 1 [Marks: 4]
Consider the code sequence below:

lw $t0,36($t1)

lw $t2,40($t0)

lw $t3,44($t2)

sll $t3,$t2,2

sub $t0,$t3,$t2

addi $t0,$t0,2

srl $t0,$t3,2

For the next questions, you will need to draw the appropriate diagram showing the pipeline
stages and hazard removal methods.

a) If you only use Stall to overcome the data hazard how many clock cycles would you
need for executing the above code sequence? Draw the diagram for pipelining as
well as calculate the CPI.

Answer: CPI = 2.714

Number of clock cycles = 19


b) If you use Stall and Forwarding to overcome the data hazard how many clock cycles
would you need for executing the above code sequence? Draw the diagram for
pipelining as well as calculate the CPI.

Answer: CPI = 1.857

Number of clock cycles = 13


Question 2 [Marks: 8]
Consider the below set of instructions. Identify the data hazards and overcome the hazards
using all the available methods [Stalling, Stalling + Forwarding, Stalling + Forwarding +
Code Scheduling]. Your answer should contain all the necessary diagrams, required total cycle
count in each solution along with average CPI. You will need to draw the diagrams clearly using
2B or darker pencils.

add $10,$11,$12

add $13,$10,$11

sub $7,$13,$6

lw $8,40($7)

sll $3,$8,2

addi $11,$9,$6

Answer:

1. Stalling: Average CPI = 3


2. Stalling + Forwarding: Average CPI = 1.83
Correction: the last instruction is Addi. The solution would be the same.

3. Stalling + Forwarding + Code Scheduling: Average CPI = 1.67


Correction: the 2nd last instruction is Addi. The solution would be the same.
Question 3 [Marks: 2]

Consider the following duration for each stage:


IF = 260 ns
ID = 270 ns
EX (addition) = 450 ns
EX (subtraction) = 350 ns
MEM = 200 ns
WB = 290 ns

Now answer the following questions:

a) By how many ns the single cycle datapath clock period is greater than the 5 stage
pipeline clock period?
Answer: 1470 - 450 = 1020
b) For a single cycle datapath, what is the duration, in ns, to execute 6 sub instructions, 8
lw instructions and 1 add instruction?
Answer:
Total number of instructions: 6 +8 +1 = 15
So total time = Total number of instructions * single cycle clock period = 15 *1470 =
22050 ns
Question 4 [Marks: 6]
a) Draw a complete single cycle datapath having control units and control signals.
Answer:
b) Draw the datapath for the instruction lw $9, 16($11). (You can use a colored pen to
specify the wires used).
Answer:

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