A B C D E

1
Compal Confidential 1

Intel M/B Schematics Document(1.2mm_6L)

Kabylake-U(2+2)-DDR4 SODIMMx2
nVidia N16 gDDR5-2GB
(N16S-GTR : GM108-670/770: GeForce MX130)
2 (N16V-GMR1 : GM108-626/726:GeForce MX110) 2

Date : 2018-01-08
Version :1.0
Project :2018OPP_Harry Potter(15.6")
3
(EPK52 :LA-G07EP=>v0.2 for PV) (EPS50
(EPS50
(EPK50
:SKLU_4G:LA-G071P)
:SKLU_2G:LA-G072P)
:KBLU_4G:LA-G079P)
3

(EPK50
(EPK52
:KBLU_2G:LA-G07AP)
:KBLR_4G:LA-G07BP)
DIS
(EPK52 :KBLR_2G:LA-G07CP)
(EPK50 :KBLU:LA-G07EP)
(EPK52 :KBLR:LA-G07EP) UMA
(Modified&Ref from: 01."NFLC_KBLR_LAE802PR10_MV_FINAL")
(02."Canadiens_LA-F035P-R10_KBL-UR_2017-06-23_CPU")
(02."CNL-U ORB_DDX02_LA-F152PR01_0822B")

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2015/10/22 Deciphered Date 2017/10/22 Title

THIS SHEET O F ENG INEERING DRAW ING IS T HE PRO PRIET ARY PRO PERT Y O F COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocumentNumber
Cover Page
AND T RADE SECRET INFORMAT IO N. THIS SHEET MAY NO T BE T RANSFERED FRO M T HE CUST ODY O F T HE COMPET ENT DIVISION O F R&D
Rev
v0.3
DEPARTMENT EXCEPT AS AUT HO RIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS Custom
MAY BE USED BY O R DISCLOSED T O ANY THIRD PART Y W IT HO UT PRIO R W RIT T EN CONSENT O F COMPAL ELECTRONICS, INC.
LA-G07EP(KBL-U_UMA_6L)
Date: Monday, January 08, 2018 Sheet 1 of 59
A B C D E
 A B C D E

UV6 UV7 ChA:JDIMM1(REV)

UV8 UV9(for 4GB) UV1 UC1 ChB:JDIMM2(STD)

VRAM nVidia PCIex4

gDDR5x4pcs N16S-GTR (MX130)
DDR4-SO-DIMM X 2
Port #1~#4 Dual Channel Interleaved
N16V-GMR1 (MX110) P.17~18
256Mbx32 PCIe 3.0:8Gb/s
(8Gb) DDR4 2133MHz 1.2V
P.25 P.19~26
1 1

JHDD
Kaby Lake-RU42 SATA 3.0 Port 0
P.30 2.5" SATA HDD *sub board
(sub board) LS-G072P
DA4002LZ000
JEDP
eDPx2Lane JODD
eDP CONN SATA 3.0 Port 1 M.2 SATA SSD *sub board

P.27 SATA ODD P.30 (sub board) LS-G074P

DA6001WR00S

*sub board
JHDMI eMMC
(sub board) LS-G075P
JSSD DA6001WS00S
HDMI CONN DDI x4Lane Port 1
PCIe 3.0: 8Gb/s PCIe x2 M.2 SSD(Key M)NVMe
P.28 1356P BGA Port #11~#12
P.19
*need supported Intel Optane (3D Xpoint)

SATA 3.0 Port 2

JLAN UL1
RJ45 CONN LAN PCIex1 Port#5
P.29 RTL8111HSH-CG P.29 PCIe Gen1Only:2.5Gb/s

2 JWLAN USB3.0 2

NGFF WLAN+BT PCIex1 Port#6 5Gb/s

(Key E) P.30 PCIe Gen1Only:2.5Gb/s
JUSB1
USB2.0 Port 1 USB3.0 port Port 1
480Mb/s P.30
JUSB2
Port 2 Port 2
USB3.0 port P.31
JIO
Port 3
USB2.0 Port P.31
*sub board
PUB1 PJPB1 LS-G071PR01
Port 4 Card Reader DA6001WJ000
Charger Battery AK6485RB63-GLF-GR P.29
(sub board)
P.47 P.46
UK1
JEDP
SMBus1
EC ENE LPC Port 5 Camera P.27
3
KB9022QD 33MHz 3
SMBus2
P.33 JWLAN
Port 6
UV1 UC3 Bluetooth
PS2 P.30
dGPU Thermal sensor JKB JTP
G753T11U P.10 Int.KBD TouchPad JEDP
P.22 SMBus Port 7
P.34 P.34 Touch Screen P.27
*sub board
JFAN JKBL LS-G073PR01
DA4002M0000
Fan KB light
75x70 P.38 P.34 SPI UA1 JSPK
50MHz
UC2 HDA 24MHz HDA Aduio codec Internal SPK P.32
SPI ROM ALC3247-CG
8MBytes P.07 P.32 JHP
Combo Jack
P.32
UT1
TPM
MB Board Information:
SLB9670VQ2.0
4 01.DA8001EG000, PCB 29I LA-G071P REV0 MB 3(SKLU_4G) P.35 4
02.DA6001WL000, PCB 29I LA-G072P REV0 MB 3(SKLU_2G)
03.DA8001EH000, PCB 29M LA-G079P REV0 MB 3(KBLU_4G)
4. DA6001WM000, PCB 29M LA-G07AP REV0 MB 3(KBLU_2G)
5. DA8001EI000, PCB 29L LA-G07BP REV0 MB 3(KBLR_4G)
6. DA6001WI000, PCB 29L LA-G07CP REV0 MB 3(KBLR_2G)
7. DA6001YA000, PCB 29M LA-G07EP REV0 MB 3(KBLU_UMA)
8. DA6001YB000, PCB 29L LA-G07EP REV0 MB 3(KBLR_UMA)
Sub Board Information:(EPK52)
01.DA6001WJ000, PCB 29L LS-G071P REV0 IOB(435OM832L01)
Security Classification Compal Secret Data Compal Electronics, Inc.
02.DA4002LZ000, PCB 29L LS-G072P REV0 HDDB(435OM932L01) Issued Date 2017/08/24 Deciphered Date 2018/08/24 Title

3. DA4002M0000, PCB 29L LS-G073P REV0 TOUCH PADB(435OMA32L01)

TH IS S H E E T O F E N G I N E E R I N G D R A W IN G IS T H E P R O P R I E T A R Y P R O P E R T Y O F C O M P A L E L E C TR O N IC S , IN C . A N D C O N TA IN S CONFIDENT I A L
Block Diagrams
4. DA6001WR00S, PCB 29L LS-G074P REV0 SSDB(435OMB32L01) S i ze Document Number
A N D T R A D E S E C R E T IN F O R M A T I O N . TH IS S H E E T M A Y N O T B E T R A N S F E R E D F R O M T H E C U S T O D Y O F T H E C O M P E T E N T D IV IS IO N O F R & D Rev
5. DA6001WS00S, PCB 29L LS-G075P REV0 eMMCB D E P A R TM E N T E X C E P T A S A U T H O R I Z E D B Y C O M P A L E L E C TR O N IC S , IN C . N E ITH E R TH IS S H E E T N O R T H E I N F O R M A T I O N IT C O N TA IN S Custom v0.3
M A Y B E U S E D B Y O R D IS C L O S E D T O A N Y TH IR D P A R T Y W I T H O U T P R I O R W R I T T E N C O N S E N T O F C O M P A L E L E C TR O N IC S , IN C . LA-G07EP(KBL-U_UMA_6L)
Date: Monday, January 08, 2018 Sheet 2 of 59
A B C D E
 A B C D E

Power rail Control (EC) Source (CPU)

EC SMBUS Address Table (TBC)
+RTCVCC X X SOC SMBUS Address Table
VIN X X Address (8bit) EC_SMBUS Port Power Rail Device Address (7 bit)
SOC_SMBUS Net Name Power Rail Device Address (7 bit)
BATT+ X X Write Read
B+ X X BAT 0x16
DIMM1 0x50 0xA0 0xA1
+VL X X SMBCLK SMBUS Port 1 +3VL_EC
+3VL X X SMBDATA +3V_PRIM DIMM2 0x52 0xA4 0xA5 CHGR 0x12
+5VALW EC_ON X
Touch PAD 0x2C 0x58 0x59
+3VALW EC_ON X dGPU
1
+3VALW _EC EC_ON X 1

+3V_PCH PCH_PWR_EN X Thermal

SMBUS Port 2 +3VS 0x90
+1.2V_VDDQ SYSON PM_SLP_S5#/PM_SLP_S4# i3_7100U_R1@ i3_7100U_R3@ MX110@ MX130@
Sensor
+5VS SUSP# PM_SLP_S3#
UC1 UC1 UV1 UV1
PCH
+3VS SUSP# PM_SLP_S3#
+1.5VS SUSP# PM_SLP_S3# i3_7100U i3_7100U N16V-GMR1-S-A2 N16S-GTR-S-A2
SA0000A38H0 SA0000A38J0 SA00009IT00 SA00009FP00
+1.05VS SUSP# PM_SLP_S3# S IC FJ8067702739738 SR343 H0 2.4G BGA S IC FJ8067702739738 SR343 H0 2.4G A32! S IC N16V-GMR1-S-A2 BGA 595P S IC N16S-GTR-S-A2 BGA 595PGPU

+0.6V_0.6VS SUSP#
+VCC_CORE X VR12.5_VR_ON U_i5_7200U_SR342@ i5_7200U_R3@ ZZZ ZZZ ZZZ ZZZ Power State
SIGNAL
UC1 UC1 2G Micron 2G Micron 4G Micron 4G Micron
STATE SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
S0 (Full ON) HIGH HIGH HIGH ON ON ON ON
BOM Structure Table (1/2) U_SI_i5-7200U_SR342 H0 2.5G
SA0000A37H0
i5_7200U
SA0000A37J0
M2G_R1@
X7674032L01
M2G_R3@
X7674032L06
M4G_R1@
X7674032L26
M4G_R3@
X7674032L29
S IC FJ8067702739739 SR342 H0 2.5G BGA S IC FJ8067702739739 SR342 H0 2.5G A32! S3 (Suspend to RAM) LOW HIGH HIGH ON ON OFF OFF
Function Stuff Un-Stuff
S4 (Suspend to Disk) LOW LOW HIGH ON OFF OFF OFF
DGPU SKU PX@ U_i7_7500U_SR341@ i7_7500U_R3@ ZZZ ZZZ ZZZ ZZZ

UMA SKU UMA@ S5 (Soft OFF) LOW LOW LOW ON OFF OFF OFF
UC1 UC1 2G Hynix 2G Hynix 4G Hynix 4G Hynix
TPM TPM@
U_SI_i7-7500U_SR341 H0 2.7G i7_7500U H2G_R1@ H2G_R3@ H4G_R1@ H4G_R3@
SA0000A34F0 SA0000A34H0 X7674032L04 X7674032L07 X7674032L25 X7674032L28
S IC FJ8067702739740 SR341 H0 2.7G BGA S IC FJ8067702739740 SR341 H0 2.7G A32! <USB2.0 port>
45@ ROYALTY HDMI W/LOGO

ZZZ ZZZ ZZZ ZZZ

Part Number Description USB2.0 port DESTINATION
R_i5_8250U_QNEF@ i5_8250U_R3@ RO0000002HM HDMI W/Logo:RO0000002HM
2
2G Samsung 2G Samsung 4G Samsung 4G Samsung RO0000003HM
1 USB3.0 Type-C 2

UC1 UC1 2 USB2.0/USB3.0

R_i3_7020U_QN96@ R_i3_8130U_QP8K@
R_SI_i5_8250U_QNEF Y0 1.6G i5_8250U
S2G_R1@
X7674032L05
S2G_R3@
X7674032L08
S4G_R1@
X7674032L27
S4G_R3@
X7674032L30
3 USB2.0/USB3.0
UC1 UC1
SA0000AWB10 SA0000AWB30
S IC FJ8067703282221 SR3LA Y0 1.6G FCBGA S IC FJ8067703282221 SR3LA Y0 1.6G A32!
4 BT
5 HD/IR_1/IR_2 Camera
R_SI_i3_7020U_QN96 Y0 2.3G
SA0000BLD00
R_SI_i3-8130U_QP8K Y0 2.2G
SA0000BKN10 R_i7_8550U_SR3LC@ i7_8550U_R3@
6 IR_2 Camera
S IC A32 FJ8067703282620 QN96 Y0 2S.3GIC A32 FJ8067703282227 QP8K Y0 2.2G
7 Card Reader
R_i7_8550U_QNBF@ U_i3_7020U_QNZU@ UC1 UC1 DAX DAX DAX DAX ZZZ
8 X
R_SI_i7-8550U_SR3LC Y0 1.8G i7_8550U KBLU-2G KBLR-2G KBLU-4G KBLR-4G EMC for EE
9 X
UC1 UC1
SA0000AWC20 SA0000AWC30
S IC FJ8067703281816 SR3LC Y0 1.8G FCBGA S IC FJ8067703281816 SR3LC Y0 1.8G A32!
10 X
R_SI_i7_8550U_QNBF Y0 1.8G U_SI_i3-7020U_QNZU H0 2.3G KBLU_2G@ KBLR_2G@ KBLU_4G@ KBLR_4G@ X4E@
SA0000AWC10 SA0000BLH00 DA6001WM000 DA6001WI000 DA8001EH000 DA8001EI000 X4EABB32L01
S IC A32 FJ8067703281816 QNBF Y0 1S.8IGCA32 FJ8067702739769 QNZU H0 2.3G PCB 29M LA-G07AP REV0 MB 3 PCB 29L LA-G07CP REV0 MB 3
SMT EMC FOR EE AG07C EPK52
<PCI-E,SATA,USB3.0/CLK>
ZZZ ZZZ ZZZ ZZZ
Lane# PCI-E SATA USB3.0 DESTINATION CLK
DAZ_U2G DAZ_R2G DAZ_U4G DAZ_R4G
+3V_PRIM 1 1 USB3.0 Type-C X
UC1
+3VS
SO-DIMM A DAZ_U2G@ DAZ_R2G@ DAZ_U4G@ DAZ_R4G@
2 2 USB3.0 Type-C X
+3V_PRIM DAZ23T00600 DAZ23T00500 DAZ23T00600 DAZ23T00500
R=1K R=10K 3 3 USB2.0/USB3.0 X
SMBCLK PCH_SMBCLK
R7 SMBDATA PCH_SMBDATA
DAX DAX 4 4 USB2.0/USB3.0 X
R8 2N7002 SO-DIMM B 5 1 5 GPU(DIS only) CLK0
+3V_PRIM KBLU-UMA KBLR-UMA
+3VALW 6 2 6 GPU(DIS only)

CPU GPU(DIS only)

KBLU_UMA@ KBLR_UMA@
3 R=499
+3V_PRIM R=10K DA6001YA000 DA6001YB000
7 3 3
R9 SML0CLK TP_SMBCLK PCB 29M LA-G07EP REV0 M/B 3 PCB 29L LA-G07EP REV0 M/B 3
8 4 GPU(DIS only)
SML0DATA 2N7002 TP_SMBDAT
W2 Touch Pad 9 5 LAN CLK1
10 6 WLAN CLK2
11 7 0 HDD X
+3V_PRIM+3VS +3VS +3VS_DGPU_AON
12 8 1a ODD CLK3
R=1K R=2.2K
13 9 X X
SML1CLK
+3VS_DGPU_AON
@ 14 10 X X
W3 SML1DATA
V3 2N7002 15 11 1b* X CLK4
EC_SMB_CK2 NVMe x2
EC_SMB_DA2 R=2.2K
16 12 2 SATA SSD X
PX@
U6 2N7002 DGPU
U7 I2CS_SCL
I2CS_SDA

U9 Thermal Sensor :G753T11U

U8 Address : 0x48

UK1:+3VALW_EC (+3VL)
EC_SMB_CK2
79 EC_SMB_DA2
4 4
80

EC +3V_SMBUS

R=2.2K
R=0
GSEN_I2DAT
GSEN_I2CLK G-Sensor
HP2DC
EC_SMB_CK1
77 EC_SMB_DA1
78 R=100 BAT
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2016/12/15 2019/12/15 Title
Deciphered Date
Charger T HI S S HE E T O F E NG I NE E R I NG D R AW I NG I S T HE P R O P R I E T AR Y P R O P E R T Y O F C O M P AL E L E C T R O NI C S , I NC . AND C O NT AI NS CONFIDENTSSIAizLe Document Number
Notes List
AND T R AD E S E C R E T I NF O R M AT I O N. T HI S S HE E T M AY NO T B E T R ANS F E R E D F R O M T HE C US T O D Y O F T HE C O M P E T E NT DI VI SI ON O F R & D Rev
D E P AR T M E NT E X C E P T AS AUT HO R I Z E D B Y C O M P AL E L E C T R O NI C S , I NC . NE I T HE R T HI S S HE E T NO R T HE I NF O R M AT I O N I T C O NT AI NS Custom
M AY B E US E D B Y O R D I S CL O S ED T O ANY T HI R D P AR T Y W I T HO UT P R I O R W R I T T E N C O NS E NT O F C O M P AL E L E C T R O NI C S , I NC . LA-G07EP(KBL-U_UMA_v60.L
3
)
Date: Friday, January 05,2018 Sheet 3 of 59
A B C D E
 5 4 3 2 1

<6,7,9,10,11,13,17,18,27,28,29,31,32,33,36,39,40,52> +3VS +3VS

<7,13,29,33,34,35,40,48,49,50,51> +3VALW +3VALW

D D

+3VS_W LAN

CONN@

2
JW LAN +3VS_W LAN
+3VS_W LAN
RN7
1 2 4.7K_0402_5%
3 1_GND 3.3V_2 4
<11> USB20_P6 3_USB_D+ 3.3V_4

1
5 6
<11> USB20_N6 5_USB_D- LED1#_6
7 8
7_GND N/C_8
9 10 @RF@ @RF@ @RF@ @RF@

0.1U_0402_25V6

100P_0402_50V8J

0.1U_0402_25V6

100P_0402_50V8J
9_N/C N/C_10
11 12 R5179 R5180 R5181 R5182 R5183 R5184
11_N/C N/C_12

2 1

2 1

2 1

2 1
13 14 @RF@ @RF@
13_N/C N/C_14

2 1
2 1
15 16
15_N/C LED2#_16
17 18
17_N/C GND_18
19 20
19_N/C N/C_20
21 22
21_N/C N/C_22
23
23_N/C

+3VS_W LAN 25 24 +3VS_W LAN

33_GND N/C_32
27 26
<11> PCIE_CTX_C_DRX_P6 35_PERp0 N/C_34
29 28
<11> PCIE_CTX_C_DRX_N6 37_PERn0 N/C_36

1
31 30
39_GND CLink Reset_38
1

33 32
<11> PCIE_CRX_DTX_P6 41_PETp0 CLink DATA_40 34
35 RN15 @ R F @
<11> PCIE_CRX_DTX_N6 43_PETn0 CLink CLK_42 36
RN3 37 10K_0402_5%
45_GND COEX3_44 38
10K_0402_5% 39 47_REFCLKP0
<9> CLK_PCIE_P2 COEX2_46

2
41 40
<9> CLK_PCIE_N2 49_REFCLKN0 COEX1_48
2

43 42 BT_ON_EC +3VS_W LAN

51_GND SUSCLK_50 44
45 53_CLKREK0#
47 PERST0#_52 46
<9,33> EC_PCIE_WAKE# 55_PEW ake0# W _DISABLE2#_54 48
49
51 57_GND W _DISABLE1#_56 50
53 59_N/C N/C_58 52

0.1U_0402_16V7K
55 61_N/C N/C_60 54

CN3
63_GND N/C_62 56 1 1
57 CN2
59 65_N/C RESERVED_64 58
61 67_N/C N/C_66 60
69_GND N/C_68 62 22U_0603_6.3V6K
63 2 2
65 71_N/C N/C_70 64
67 73_N/C 3.3V_72 66
75_GND 3.3V_74

GND 68
GND 69
NC_70 70
NC_71 71

LOTES_APCI0019-P003H
SP070010DA0

Active Low
W L_PW REN_EC# <33>

NGFF and W LAN RW L1

200K_0402_5%
Unpop QB8 and RL25 for not supportOBFF CW L1

2
1 2
+3VS_W LAN

2
+3VS +3VS_W LAN 0.1U_0402_16V4Z

1
QW L1

G
B B
1 3
+3VALW
2

S
1
RL25 @ CW L2 PJ2301 1P SOT23-3
100K_0402_5% 0.1U_0402_16V4Z SB00000T900
2
G

@ 2
1 3 EC_PCIE_WAKE# 1 @ 2
<9> W AKE#
RW L2 0_0603_5%
D

SB00000EN00
QB8
2N7002H_SOT23-3

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/08/24 Deciphered Date 2018/08/24 Title

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT I A L
WLAN-BT
Sii zee Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
v0.3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-G07EP(KBL-U_UMA_6L)
Date: Friday, January 05, 2018 Sheet 30 of 59
5 4 3 2 1
 5 4 3 2 1

+3VS +3VS_SSD

JPHW9 <6,7,9,10,11,13,17,18,27,28,29,30,32,33,36,39,40,52> +3VS +3VS

1 1 2 2

JUMP_43X79 CS27 CSS7 CS8 CS9 1 CSS6

1 CSS5 JUMP@ 1@ 1 1 1

47U_0603_6.3V6M

10U_0603_10V6M

0.1U_0201_10V6K

1U_0402_6.3V6K
RF@ CS10
18P_0201_50V NPO

10P_0201_50V
RF@

2 1
2 2 2 2 2 2 10P_0201_50V
RF@

D D

JSSD
+3VS_SSD

TS123
TP@

<11> PCIE_CRX_DTX_N11
<SSD> <11> PCIE_CRX_DTX_P11

<11> PCIE_CTX_C_DRX_N11
<11> PCIE_CTX_C_DRX_P11 DEVSLP2 <11>

<11> PCIE_CRX_DTX_P12
<11> PCIE_CRX_DTX_N12
<11> PCIE_CTX_C_DRX_N12
<11> PCIE_CTX_C_DRX_P12 PLT_RST# <9,29,30,33,35>
CLKREQ_PCIE#4 <9>
<9> CLK_PCIE_N4
<9> CLK_PCIE_P4

1 2
+3VS @EMI@ CS16
VARIST_ CK0402101V05 0402 67 68
SSD_PDET NC SUSCLK(32kHz)
69 70
2

SSD1_IF PU on CPU side RPC13.3_10K 71 PEDET 3P3VAUX

GND 72
@ RS21 1 2 73 3P3VAUX
+3VS GND 74
RS22 10K_0402_5% 75 3P3VAUX
100K_0402_5% GND
76
GND1 77
GND2
<11> SSD1_IF
1 1

YPCI0016-P003A 67P A32

D DC04000L9A0 CONN@
2
G
S QS1 SB000009Q80
3

2N7002KW_SOT323-3
B pre PV: change to 10K for redriver detect pin voltage level B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/08/24 2018/08/24 Title
Deciphered Date
M.2 SSD
THIS SHEET O F ENG INEERING DRAW ING IS T HE PRO PRIET ARY PRO PERT Y O F COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocumentNumber
AND T RADE SECRET INFORMAT IO N. THIS SHEET MAY NO T BE T RANSFERED FRO M T HE CUST ODY O F T HE COMPET ENT DIVISION O F R&D
Rev
DEPARTMENT EXCEPT AS AUT HO RIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS LA-G07EP(KBL-U_UMA_6L) v0.3
MAY BE USED BY O R DISCLOSED T O ANY THIRD PART Y W IT HO UT PRIO R W RIT T EN CONSENT O F COMPAL ELECTRONICS, INC.
Date: Friday, January 05, 2018 Sheet 31 of 59
5 4 3 2 1
 5 4 3 2 1

UA1 +3VS +DVDD +3VS +DVDD_IO

+5VS +5VS_PVDD1 RA1 RA2
RA8
<8> HDA_SYNC_R 9 1 +DVDD 1 2 1 2 1 2
BCLK SYNC DVDD
5 8
<8> HDA_BIT_CLK_R BCLK DVDD_IO +DVDD_IO 0_0402_5% 0_0402_5% 0_0402_5%

4.7U_0402_6.3V6M CA32

0.1U 16V K X7R 0402 CA33

1 2 1 2 20 1 1 11

4.7U_0402_6.3V6M CA36

0.1U 16V K X7R 0402 CA37

AVDD1 +5VS_AVDD
CA34 RA53 22_0402_5% 33 1 1
22P 50V J NPO 0402 EMI@ AVDD2 +1.8VS_AVDD
EMI@ INT_MIC 14 34
MIC2-R/SLEEVE PVDD1 +5VS_PVDD1 2 2 2 2
13 39
MIC2-L/RING2 PVDD2 +5VS_PVDD2 2 2
CA29
GNDA 1 2 MIC2_CAP 15 16 VD33STB1 RA23 2 +3VS
MIC2_CAP VD33STB
0_0402_5%
10U 6.3V M X5R 0603
35 SPK_L+
SPK_OUT_L+
36 SPK_L-
SPK_OUT_L-
37 SPK_R-
PC_BEEP SPK_OUT_R-
11 38 SPK_R+
PCBEEP SPK_OUT_R+
26 RA38 1 2 30_0402_1%
HPOUT_R
25 RA37 1 2 30_0402_1%
2.2K_0402_5% HPOUT_L
RA40 1 2 MIC2-VREFO 23 +5VS +5VS_AVDD +1.8VS +1.8VS_AVDD
MIC2-VREFO RA5
4 RA4
24 SDATA_OUT 7 HDA_SDIN0_R 1 RA26 2 1 2 1 2
LDO1_CAP 21 LINE1-VREFO-L SDATA_IN 22_0402_5%
VREF 22 LDO1-CAP 0_0402_5% 0_0402_5%

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M
VREF

10U 6.3V M X5R 0603

0.1U 16V K X7R 0402

1 1 1 1

CA7

CA5

CA6
CPVEE 27
CPVEE

CA8
CPVDD 29 18 @
CBN 28 CPVDD LINE1_L
17
CBN LINE1_R 2 2 2 2
CA16 2 1 1U_0402_6.3V6K CBP 30
CBP

2 1
2
3 GPIO0/DMIC_DATA12 32 CA27 1 2 10U 6.3V M X5R 0603 GNDA
GPIO1/DMIC_CLK LDO2_CAP
6
LDO3_CAP GNDA
1 @EMI@ RA41 10
DCDET
GNDA
CA41 +DVDD 1 2 100K_0402_1% 12
PLUG_IN# 1 JD1 19
10P_0402_50V8J 2 200K_0402_1%
AVSS1 31 GNDA
RA42
2 PDB 40 AVSS2 41 GNDA
PDB THERMALPAD

ALC3247-CG_MQFN40_5X5

CONN@
JSPK
SPK_R- RA36 1 EMI@ 2 0_0603_5% SPK_R-_CONN 1
+3VS +DVDD 1
SPK_R+ RA34 1 EMI@ 2 0_0603_5% SPK_R+_CONN 2
RA33 1 EMI@ 2 0_0603_5% SPK_L-_CONN 3 2
C
SPK_L- 3 C
SPK_L+ RA35 1 EMI@ 2 0_0603_5% SPK_L+_CONN 4
PC Beep 4
1

1
RA10 5 G1
10K_0402_0.5% RA9 6 G2
@ 100K_0402_5%
wide 40 MIL ACES_50278-00401-001

220P_0402_50V7K

220P_0402_50V7K

220P_0402_50V7K

220P_0402_50V7K
2
2 2

EC Beep <33> EC_BEEP# 1 2 PC_BEEP_R CA44 1 1 1 1

B

0.1U 16V K X7R 0402

@EMI@ C14
@ QA2

@EMI@ C11

@EMI@ C12

@EMI@ C13
RA16
HDA_RST#_R
E

3 1 PDB 47K_0402_5%
<8> HDA_RST#_R 2 2 2 2
C

SB Beep <8,10> HDA_SPKR 1 2 1 2 1 2 PC_BEEP CA42

MMBT3904WH_SOT323-3 1 CA43 0.1U 16V K X7R 0402

0.1U 16V K X7R 0402 CA23

SB000008E10 0.1U 16V K X7R0402

1
@
EC_MUTE# 1 2 RA17
<33> EC_MUTE# 2
DA2 SCS00000Z00 10K_0402_5%
RB751V-40 SOD-323

2
R5260 Close to Codec pin34
1 2
0_0201_5%

Reserve for ESD request.

INT_MIC_R GNDA HP_OUTR_R HP_OUTL_R
Place RA51/RA52/RA53 on moat of UA1 BOT side

3
RA51 1 2 0_0603_5%
DA4
Rshort@ L03ESDL5V0CC3-2_SOT23-3 DA5
RA52 1 2 0_0603_5% SCA00002900 L03ESDL5V0CC3-2_SOT23-3
ESD@ SCA00002900
Rshort@ @ESD@
RA54 1 2 0_0603_5%
Rshort@

1
1 2
RA6 0_0402_5%
1/20:Swap DA3
RA7 @
B 1 2 B
0_0402_5%

1 2
CA9 EMI@ JHP
0.1U 16V K X7R0402 INT_MIC 1 RA13 2 0_0402_5% INT_MIC_R 3 3:M/G_EARTH
HP_OUTL 1 RA14 2 0_0402_5% HP_OUTL_R 1 1:L/R_TIP SPRING
EMI@
EMI@
1 2
CA10 PLUG_IN# 5 5:TRANSFER TERMINAL
0.1U 16V K X7R0402
EMI@ 6 6:MAKE TERMINAL
1 2 HP_OUTR 1 RA15 2 0_0402_5% HP_OUTR_R 2 2:R/L_RING A
CA11 @EMI@ 0.1U EMI@
4 4:G/M_RING B
16V K X7R 0402
1 1 1 7 7:MS_SHELL

100P_0603_50V7 CA24

100P_0603_50V7 CA25

100P_0603_50V7 CA26
1 2
CA12 @EMI@ 0.1U SINGA_2SJ3095-067111F

@EMI@

@EMI@

@EMI@
16V K X7R 0402 2 2 2 DC23000DY00
GNDA Pin6 and Pin5
1 2 Normal OPEN
CA13
0.1U 16V K X7R0402
EMI@
GNDA

GNDA

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/08/24 2018/08/24 Title
Deciphered Date
T HI S S HE E T O F E NG I NE E R I NG D R AW I NG I S T HE P R O P R I E T AR Y P R O P E R T Y O F C O M P AL E L E C T R O NI C S , I NC . AND C O NT AI NS CONFIDENTSSIAiizLe Document Number
AUDIO ALC3258-CG
AND T R AD E S E C R E T I NF O R M AT I O N. T HI S S HE E T M AY NO T B E T R ANS F E R E D F R O M T HE C US T O D Y O F T HE C O M P E T E NT DI VI SI ON O F R & D Rev
D E P AR T M E NT E X C E P T AS AUT HO R I Z E D B Y C O M P AL E L E C T R O NI C S , I NC . NE I T HE R T HI S S HE E T NO R T HE I NF O R M AT I O N I T C O NT AI NS Custom v0.3
M AY B E US E D B Y O R D I S CL O S ED T O ANY T HI R D P AR T Y W I T HO UT P R I O R W R I T T E N C O NS E NT O F C O M P AL E L E C T R O NI C S , I NC . LA-G07EP(KBL-U_UMA_6L)
Date: Friday, January 05,2018 Sheet 32 of 59
5 4 3 2 1
 5 4 3 2 1

+3VL +3VALW _EC

<6,7,9,10,11,13,17,18,19,22,23,24,27,28,29,30,31,32,36,39,40,52,55> +3VS +3VS LK1 SM01000Q 500

S SUPPRE_ T AI-T ECH HCB1005KF-221T15 0402
1 2 +EC_VCCA
+3VALW _EC
EC Board ID (UMA, DIS, phase) control table
1 2 +3VALW _EC

0.1U_0201_10V6K

0.1U_0201_10V6K
<22,45> +3VALW _EC +3VALW _EC

2
RK1 0_0603_5% 1 KBL-U KBL-R

CK1

CK2
1 1
<13,39,46,47,48> +3VL +3VL
RK2
RK4
CK3 100K_0402_1% DB SI PV MV DB SI PV MV

ECAGND
2 2 2 0.1U_0201_10V6K
UMA 15K 27K 43K 75K 130K 200K 270K 430K

1
(0x02) (0x04) (0x06) (0x08) (0x0A) (0x0C) (0x0E) (0x10)
BOARD_ID DIS 20K (0x03) 33K 56K
(0x05) (0x07) 100K (0x09) 160K (0x0B) 240K 330K (0x0D) (0x0F) 560K (0x11)

+3V_EC_VDD +3VL
+3V_LID U_PX@ U_UMA@

2
ESD@ 1 RK3 2 RK4 RK4
D
2 1 PLT _RST # 56K +-1% 0402 43K +-1% 0402 U_DB_UMA_15kohm:SD034150280, S RES 1/16W 15K+-1% 0402 Reserve EC_CLR_CMOS for clear CMOS D

CK4 0.1U_0402_25V6 0_0402_5% SD034560280 SD034430280 U_DB_ DIS_20kohm:SD034200280, S RES 1/16W 20K +-1% 0402 (2016-03-04 ::Confirm intel platform not support EC Clear CMOS function)
U_SI_UMA_27kohm:SD034270280, S RES 1/16W 27K +-1% 0402 (2017-10-05 : 2018OPP Add EC Clear CMOS function)

1
U_SI_ DIS_33kohm:SD034330280, S RES 1/16W 33K +-1% 0402
R_PX@ R_UMA@ U_PV_UMA_43kohm:SD034430280, S RES 116W 43K +-1% 0402 RK106 1 2 0_0402_5% CLR_CMOS# <9>

VCC0 125
UK1 RK4 U_PV_ DIS_56kohm:SD034560280, S RES 1/16W 56K +-1% 0402

96

67
22
33
9
330K +-1% 0402
U_MV_UMA_75kohm:SD034750280, S RES 1/16W 75K +-1% 0402

VCC

VCC
VCC
VCC

AVCC
VCC_LPC
SD034330380 U_MV_ DIS_100kohm:SD034100380, S RES 1/16W 100K+-1% 0402 @

1
@ D
RK7 2 1 330K_0402_5% EC_RST # EC_CLR_CMOS 2 Q51
+3VALW _EC Pin111:VCC0
T OUCH_ON 1 21 EC_VCCST _PG_R G 2N7002K_SOT23-3
T 2403 T P@ GAT EA20/GPIO00 EC_VCCST _PG/GPIO 0F
@ 1 2 EC_KBRST # 2 23 R_DB_UMA_130kohm:SD034130380, S RES 116W 130K +-1%0402 S SB00000EN00
SERIRQ KBRST #/GPIO01 BEEP#/GPIO10 EC_FAN_PW M1 R_DB_ DIS_160kohm:SD034160380, S RES 116W 160K +-1% 0402 R483
CK5 0.1U_0402_16V7K 3 26

3
LPC_FRAME# SERIRQ EC_FAN_PW M/GPIO12 1 11
EC_CLR_CMO S
4 PWMOutput 27 R_SI_UMA_200kohm:SD034200380, S RES 1/16W 200K +-1% 0402 @ 10K_0402_5%
LPC_AD3 LPC_FRAME# AC_OFF/GPIO13
5 R_SI_ DIS_240kohm:SD000001B80, S RES 116W 240K +-1%0402
LPC_AD2 LPC_AD3
7

1
LPC_AD1 LPC_AD2 B/I#
8 63

2
LPC_AD0 10 LPC_AD1 VCIN1_BAT T _T EMP/AD0/GPIO38
LPC_ADL0 PC & MISC
64
VCIN1_BAT T _DROP/AD1/GPIO39
CLK_PCI_LPC 65 ADP_I
CLK_PCI_LPC 12 ADP_I/AD2/GPIO3A BOARD_ID
AD Input 66
PLT _RST # 13 CLK_PCI_EC AD_BID/AD3/GPIO3B
75 ADP_ID
ADP_ID <45>
1 2 1 2 EC_RST # 37 PCIRST #/GPIO05 AD4/GPIO42
76 EC_PME#_EC_R EC_PME# <29>
CK9 RK109 22_0402_5% 20 EC_RST # AD5/GPIO43 VR_HOT # 1 2 0_0402_5%
<52> VR_HOT # PROCHOT # <5>
22P 50V J NPO 0402 EMI@ 1 @ 2 PM_CLKRUN#_R 38 EC_SCI#/GPIO0E RK8
1 @ 2 CLKRUN#/GPIO1D
EMI@
68
DA0/GPIO3C NMI_DBG#
DA Output EN_DFAN1/DA1/G PIO 3D
70
D

1
KSI0 55 71 VR_PW RGD
KSI1 56 KSI0/GPIO30 DA2/GPIO3E 2
72
KSI2 57 KSI1/GPIO31 DA3/GPIO3F G
KSI3 58 KSI2/GPIO32 83 @ QK1 S
KSI4 59 KSI3/GPIO33 EC_MUT E#/PSC LK1/G PIO 4A 84 2N7002_SOT23-3
KSI5 60 KSI4/GPIO34 USB_EN#/PSDAT 1/GPIO4B 85 VR_ON SB00000EN 00

3
KSI6 61 KSI5/GPIO35 PSCLK2/GPIO4C 86
1 @ 2 VCIN1_ACOK_R PS2 Interface
<47> VCIN1_ACOK 62 KSI6/GPIO36 PSDAT 2/GPIO 4D 87
R4958 0_0402_5% KSI7 T P_CLK
<34> KSO[0..17] KSI7/GPIO37 T P_CLK/GPIO4E 88
KSO0 T P_DAT A
KSO1 T P_DAT A/GPIO4F
RK91 2 0_0402_5%
KSO2
1 2 VCIN1_AC_IN_R KSO3 97 ENBKL +3VALW
0_0402_5% ENKBL/GPXIO A00 ENBKL <5>
R5094 98
W OL_EN/GPXIOA01 W L_PW REN_EC# <30>
Int.K/B 99 ME_FLASH_EN T P_CLK RK12 1 2 4.7K_0402_5%
ME_EN/GPXIO A02 ME_FLASH _EN <8>
109 VCIN0_PH
Matrix VCIN0_PH1/GPXIOD00 VCIN0_PH <45>
T P_DAT A RK13 1 2 4.7K_0402_5%

VCIN1_AC_IN 1 @ 2 VCIN1_AC_IN_R R4960

0_0402_5%
+3VL
For Solve tPCH04(Min 9ms) Sequenc e T i mi ng

RP12
8 1
PLT _RST # 7 2
EC_ON 6 3
PCH_PW R_EN 5 4

100K_0804_8P4R_5%
<46,47> EC_SMB_C K1
<46,47> EC_SMB_D A1
PBT N_OUT # R295 1 @ 2 1K_0402_5%
<7,10,22> EC_SMB_CK2
<7,10,22> EC_SMB_DA2
EC_CLR_CMOS 1 @ 2 RK107
10K_0402_5%
+3VALW _EC

+5VS <9,12,40> PM_SLP_S3#

<9> PM_SLP_S5# LID_SW # RK18 2 @ 1 47K_0402_5%

+3V_SMBU S

EC_SMB_C K1 8 1 RP11 +3VS

RK28
EC_SMB_D A1 7 2
2 1 MUT E_LED_OUT EC_SMB_C K2 6 3
EC_SMB_D A2 5 4
+1.0VS_PG <50>
100K_0402_5%
2.2K_0804_8P4R_5%
110 VCIN1_AC_IN_R
RK26 VCIN1_AC_IN/GPXIOD01 112 EC_ON
ALW_PWE_EN EC_ON/GPXIOD 02 EC_ON <39,48>
2 1 E51T XD_P80D AT A 34 114 ON/OFF# EC_SCI# RK14 2 1 10K_0402_5%
SUSP_LED #/G PIO19 ON/OFF#/GPXIOD03 LID_SW # ON/OFF# <39>
36
NUM_LED#/GPIO1A GPI LID_SW #/GPXIOD04
115
LID_SW # <39>
100K_0402_5% 116 SUSP#
SUSP#/GPXIOD 05 VCIN1_AC_IN SUSP# <12,40,49>
117
GPXIOD06 EC_PECI RK17 1 2 43_0402_1%
118 H_PECI <5>
PECI/GPXIOD07 SYSON RK23 1 @ 2 100K_0402_5%
122
PBT N_OUT #/GPIO5D +V18R
123 124 +3VALW _EC
PM_SLP_S4#/G PIO5E V18R/VCC_IO2
1
CK8 SUSP# RK27 1 2 100K_0402_5%
AGND
GND
GND
GND
GND
GND

1 @ 2 PCH_PW ROK 4.7U_0402_6.3V6M

RK20 100K_0402_5% 2
69
11
24
35
94
113

1 2 MUT E_LED_IN
RK108 10K_0402_5%
20mil
EC_SPI_C LK RC369 1 2 HOST _SPI_0_CLK_R
SA000075S30 HOST _SPI_0_CLK_R <7,35>
LK2 SM01000Q 500 EMI@ 15_0402_5%
ECAGND 2 1
T AI-T ECH HCB1005KF-221T15 0402 CC144
CC128 RC369 place near ECSide 22P 50V J NPO 0402
@EMI@
+3VALW _EC
ECAGND <45>
A
EMI request A
1

RK21
10K_0402_5%
2

NMI_DBG# 1 2
NMI_DBG#_CPU <5,10>
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2017/04/10 Deciphered Date 2019/12/15 Title
DK2 SCS00000Z00
RB751V-40 SOD-323
T HIS SHEET OF ENGINEERING DRAW ING IS T HE PROPRIET ARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONT AINS CONFIDENTIAL
EC ENE-KB9022
AND T RADE SECRET INFORMAT ION. T HIS SHEET MAY NOT BE T RANSFERED FROM T HE CUST ODY OF T HE COMPET ENT DIVISION OF R&SDizeDocument Number Rev
DEPART MENT EXCEPT AS AUT HORIZED BY COMPAL ELECT RONICS, INC. NEIT HER T HIS SHEET NOR T HE INFORMAT ION IT CONT AINS Custom v0.3
MAY BE USED BY OR DISCLOSED T O ANY T HIRD PART Y W IT HOUT PRIOR W RIT TEN CONSENT OF COMPAL ELECT RONICS, INC. LA-G07EP(KBL-U_UMA_6L)
Date: T uesday, January 09, 2018 Sheet 33 of 59
5 4 3 2 1
 5 4 3 2 1

+1.0V_PRIM TO +1.0V_VCCSTU
+1.2V_VDDQ +1.0V_PRIM
UC1N SKL-U
Rev_0.53
CPU POWER 3 OF 4

AU23
I (Max) : 4.5 A AU28 VDDQ_AU23
AU35 VDDQ_AU28
AU42 VDDQ_AU35
BB23 VDDQ_AU42
BB32 VDDQ_BB23
BB41 VDDQ_BB32
BB47 VDDQ_BB41
BB51 VDDQ_BB47
VDDQ_BB51

+1.2V_VDDQ AM40
VDDQC
+1.0V_VCCST A18
VCCST
+1.0V_PRIM A22
VCCSTG_A22
+1.2V_VCCSFR_OC AL23
VCCPLL_OC
+1.0V_VCCSFR K20
K21 VCCPLL_K20
VCCPLL_K21

<Cocoa_1113>
Per
543977_SKL_PDDG_Rev0_91,
change CC95 value from
1000pf to 10pf for meet SKL-U_BGA1356
<= 65us timing for
C
+1.0V_VCCSTU power rail. C

+1.0V_VCCSTU +1.0V_VCCST

RC140 1 2 0_0402_5%
PSC Side
+1.0V_PRIM TO +1.0VS_VCCSTG / +1.0VS_VCCIO

1U_0402_6.3V6K
1

CC48
+5VALW +1.0V_PRIM +1.0V_PRIM
2
near pin A22

RC208 Follow 544669_SKL_U DDR3L_RVP7_Schematic_Rev1.0

+1.0V_VCCSFR +1.0V_PRIM

PSC Side BSC Side

RC143 1 2 0_0402_5%

1U_0402_6.3V6K
1

1U_0402_6.3V6K
1

CC56
CC55
2
2

+1.2V_VDDQ
PSC Side BSC Side
10U_0402_6.3V6M

10U_0402_6.3V6M

1U_0201_6.3V6K

1U_0201_6.3V6K

1U_0201_6.3V6K

1U_0201_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CC47 Follow 543016_SKL_U_Y_PDG_0_9
CC27

CC28

CC29

CC30

CC31

CC32

CC33

CC34

CC35

CC36

CC47

CC37

CC38

CC39

CC40

CC41

CC42

CC43

CC44

CC45

CC46
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

+1.35V_VDDQ_CPU : 10UF/6.3V/0603 *6
A 1UF/6.3V/0402 * 4 A

Security Classification
2017/04/10
Compal Secret Data
2019/12/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET O F ENG INEERING DRAW ING IS T HE PRO PRIET ARY PRO PERT Y O F COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocumentNumber
SKL-U(8/12)Power
AND T RADE SECRET INFORMAT IO N. THIS SHEET MAY NO T BE T RANSFERED FRO M T HE CUST ODY O F T HE COMPET ENT DIVISION O F R&D
Rev
DEPARTMENT EXCEPT AS AUT HO RIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS Custom
MAY BE USED BY O R DISCLOSED T O ANY THIRD PART Y W IT HO UT PRIO R W RIT T EN CONSENT O F COMPAL ELECTRONICS, INC. LA-G07EP(KBL-U_UMA_6L) v0.3

Date: Friday, January 05, 2018 Sheet 12 of 59

5 4 3 2 1
 5 4 3 2 1

+1.0V_PRIM
+1.0V_PRIM
+1.0V_PRIM +1.0V_APLL +3V_PRIM +3V_HDA

1U_0201_6.3V6K
1
UC1O SKL-U
0.69A Rev_0.53
1209_follow G group GPIO

22U_0603_6.3V6M

22U_0603_6.3V6M

1U_0402_6.3V6K

CC91
CPU POWER 4 OF 4
RC148 1 Rshort@2 0_0603_5% RC150 1 Rshort@2 0_0402_5% 1 1 1 powe rail to +3V_PRIM
@ @ 2 AB19

22U_0603_6.3V6M

22U_0603_6.3V6M

CC147

CC148

CC61
1 1 AB20 VCCPRIM_1P0 AK15 +3V_PGPPA
near pin K15,L15 P18 VCCPRIM_1P0 VCCPGPPA AG15

1U_0402_6.3V6K
CC142

CC134
@ @ 1 1 VCCPRIM_1P0 VCCPGPPB +3V_PGPPB
CC63 2 2 2 Y16
VCCPGPPC +3V_PGPPC
AF18 Y15

CC72
1U_0201_6.3V6K +1.0V_PRIM +3V_1.8V_PGPPD
2 2 2.574A AF19 VCCPRIM_CORE VCCPGPPD T16 +3V_PGPPE
2 2 +1.0VO_DSW V20 VCCPRIM_CORE VCCPGPPE AF16 +1.8V_PRIM
V21 VCCPRIM_CORE VCCPGPPF AD15 +3V_PRIM For SD CARD
VCCPRIM_CORE VCCPGPPG
D D
+1.0V_PRIM AL1 V19 +3V_PRIM
DCPDSW_1P0 VCCPRIM_3P3_V19
Follow 543016_SKL_U_Y_PDG_1_0

1U_0201_6.3V6K
1 +1.0V_MPHYAON K17 T1 +1.0V_DTS
VCCMPHYAON_1P0 VCCPRIM_1P0_T1

CC85
L1
+1.0V_CLK5_F24NS +3V_PGPPA VCCMPHYAON_1P0 AA1

1U_0402_6.3V6K
VCCATS_1P8 +1.8V_PRIM
+3V_PRIM +1.0V_PRIM N15
2 1.87A N16 VCCMPHYGT_1P0_N15 AK17

CC68
1 +3V_PRIM_RTC
RC152 1 Rshort@20_0603_5% N17 VCCMPHYGT_1P0_N16 VCCRTCPRIM_3P3
near pin N18 P15 VCCMPHYGT_1P0_N17 AK19
P16 VCCMPHYGT_1P0_P15 VCCRTC_AK19 BB14 +RTCVCC
2 VCCMPHYGT_1P0_P16 VCCRTC_BB14

+1.0V_PRIM BB10 +DCPRTC 1 2

DCPRTC
RC197 1 Rshort@2 0_0402_5% CC71 0.1U_0201_10V6K
+1.0V_CLK6_24TBT

+1.0V_APLL

+1.0V_CLK4_F100OC

+1.0V_CLK5_F24NS

+1.0V_CLK6_24TBT
PRIMCORE_VID0 T130 TP@
PRIMCORE_VID1 T131 TP@

From Battery
+3V_LID
1U_0402_6.3V6K

1
RC169 1 Rshort@2 0_0603_5%
BOM
CC74

2
+3VALW TO +3V_PRIM
1U_0402_6.3V6K

1U_0402_6.3V6K

22U_0603_6.3V6M

10U_0402_6.3V6M

1 1 1 1
@ @ @ @ I (Max) : 0.46 A(+3V_PRIM)
I (Max) : 0.1 A RDS(Typ) : 65 mohm
CC86

CC75

CC138

CC139

2 2 2 2 V drop : 0.03 V
+3V_PRIM_RTC

RC171 1 Rshort@2 0_0402_5%

+1.0V_DTS
0.1U_0201_10V6K
1U_0402_6.3V6K

1 1
CC78
CC77

RC162 1 Rshort@20_0402_5%
2 2

+1.2V_VCCSFR_OC +3V_PRIM

+1.2V_VDDQ +3VALW

0.1U_0201_10V6K

0.1U_0201_10V6K
Follow 543016_SKL_U_Y_PDG_0_9 1 1
@
1 1
1U_0402_6.3V6K
CC150

CC49

CC51
CC50
1U_0402_6.3V6K
+1.0V_PRIM +3V_PRIM +1.8V_PRIM
2 2 2 2
A
+3VS +3VS_PGPPA 1 2 2 1 A
RC141 0_0402_5% RC393 0_0805_5%
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0402_6.3V6M

22U_0402_6.3V6M

1 1 1 1 1 1
@ @ @ @ @ @
CC111

CC112

CC113

CC114

CC116

CC115

RC178 1 Rshort@2 0_0402_5%

2 2 2 2 2 2
+3VALW +3VALW _DSW

RC173 1 Rshort@2 0_0603_5%

Security Classification
2017/04/10
Compal Secret Data
2019/12/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
TH IS S H E E T O F E N G I N E E R I N G D R A W IN G IS T H E P R O P R I E T A R Y P R O P E R T Y O F C O M P A L E L E C TR O N IC S , IN C . A N D C O N TA IN S CONFIDENT I A L
SKL-U(9/12)Power
Follow 543016_SKL_U_Y_PDG_0_9 S ii ze Document Number
A N D T R A D E S E C R E T IN F O R M A T I O N . TH IS S H E E T M A Y N O T B E T R A N S F E R E D F R O M T H E C U S T O D Y O F T H E C O M P E T E N T D IV IS IO N O F R & D Rev
D E P A R TM E N T E X C E P T A S A U T H O R I Z E D B Y C O M P A L E L E C TR O N IC S , IN C . N E ITH E R TH IS S H E E T N O R T H E I N F O R M A T I O N IT C O N TA IN S Custom
M A Y B E U S E D B Y O R D IS C L O S E D T O A N Y TH IR D P A R T Y W I T H O U T P R I O R W R I T T E N C O N S E N T O F C O M P A L E L E C TR O N IC S , IN C . LA-G07EP(KBL-U_UMA_6L) v0.3

Date: Friday, January 05, 2018 Sheet 13 of 59

5 4 3 2 1
 5 4 3 2 1

D D
UC1P SKL-U UC1Q SKL-U
Rev_0.53 Rev_0.53 UC1R SKL-U
GND 1 OF 3 GND 2 OF 3
GND 3 OF 3
Rev_0.53
A5 AL65 AT63 BA49 F8 L18
A67 VSS VSS AL66 AT68 VSS VSS BA53 G10 VSS VSS L2
A70 VSS VSS AM13 AT71 VSS VSS BA57 G22 VSS VSS L20
AA2 VSS VSS AM21 AU10 VSS VSS BA6 G43 VSS VSS L4
AA4 VSS VSS AM25 AU15 VSS VSS BA62 G45 VSS VSS L8
AA65 VSS VSS AM27 AU20 VSS VSS BA66 G48 VSS VSS N10
AA68 VSS VSS AM43 AU32 VSS VSS BA71 G5 VSS VSS N13
AB15 VSS VSS AM45 AU38 VSS VSS BB18 G52 VSS VSS N19
AB16 VSS VSS AM46 AV1 VSS VSS BB26 G55 VSS VSS N21
AB18 VSS VSS AM55 AV68 VSS VSS BB30 G58 VSS VSS N6
AB21 VSS VSS AM60 AV69 VSS VSS BB34 G6 VSS VSS N65
AB8 VSS VSS AM61 AV70 VSS VSS BB38 G60 VSS VSS N68
AD13 VSS VSS AM68 AV71 VSS VSS BB43 G63 VSS VSS P17
AD16 VSS VSS AM71 AW10 VSS VSS BB55 G66 VSS VSS P19
AD19 VSS VSS AM8 AW12 VSS VSS BB6 H15 VSS VSS P20
AD20 VSS VSS AN20 AW14 VSS VSS BB60 H18 VSS VSS P21
AD21 VSS VSS AN23 AW16 VSS VSS BB64 H71 VSS VSS R13
AD62 VSS VSS AN28 AW18 VSS VSS BB67 J11 VSS VSS R6
AD8 VSS VSS AN30 AW21 VSS VSS BB70 J13 VSS VSS T15
AE64 VSS VSS AN32 AW23 VSS VSS C1 J25 VSS VSS T17
AE65 VSS VSS AN33 AW26 VSS VSS C25 J28 VSS VSS T18
AE66 VSS VSS AN35 AW28 VSS VSS C5 J32 VSS VSS T2
AE67 VSS VSS AN37 AW30 VSS VSS D10 J35 VSS VSS T21
AE68 VSS VSS AN38 AW32 VSS VSS D11 J38 VSS VSS T4
AE69 VSS VSS AN40 AW34 VSS VSS D14 J42 VSS VSS U10
C C
AF1 VSS VSS AN42 AW36 VSS VSS D18 J8 VSS VSS U63
AF10 VSS VSS AN58 AW38 VSS VSS D22 K16 VSS VSS U64
AF15 VSS VSS AN63 AW41 VSS VSS D25 K18 VSS VSS U66
AF17 VSS VSS AP10 AW43 VSS VSS D26 K22 VSS VSS U67
AF2 VSS VSS AP18 AW45 VSS VSS D30 K61 VSS VSS U69
AF4 VSS VSS AP20 AW47 VSS VSS D34 K63 VSS VSS U70
AF63 VSS VSS AP23 AW49 VSS VSS D39 K64 VSS VSS V16
AG16 VSS VSS AP28 AW51 VSS VSS D44 K65 VSS VSS V17
AG17 VSS VSS AP32 AW53 VSS VSS D45 K66 VSS VSS V18
AG18 VSS VSS AP35 AW55 VSS VSS D47 K67 VSS VSS W13
AG19 VSS VSS AP38 AW57 VSS VSS D48 K68 VSS VSS W6
AG20 VSS VSS AP42 AW6 VSS VSS D53 K70 VSS VSS W9
AG21 VSS VSS AP58 AW60 VSS VSS D58 K71 VSS VSS Y17
AG71 VSS VSS AP63 AW62 VSS VSS D6 L11 VSS VSS Y19
AH13 VSS VSS AP68 AW64 VSS VSS D62 L16 VSS VSS Y20
AH6 VSS VSS AP70 AW66 VSS VSS D66 L17 VSS VSS Y21
AH63 VSS VSS AR11 AW8 VSS VSS D69 VSS VSS
AH64 VSS VSS AR15 AY66 VSS VSS E11
AH67 VSS VSS AR16 B10 VSS VSS E15
VSS VSS VSS VSS 18 OF 20
AJ15 AR20 B14 E18
AJ18 VSS VSS AR23 B18 VSS VSS E21
AJ20 VSS VSS AR28 B22 VSS VSS E46 SKL-U_BGA1356
AJ4 VSS VSS AR35 B30 VSS VSS E50
AK11 VSS VSS AR42 B34 VSS VSS E53
AK16 VSS VSS AR43 B39 VSS VSS E56
AK18 VSS VSS AR45 B44 VSS VSS E6
AK21 VSS VSS AR46 B48 VSS VSS E65
AK22 VSS VSS AR48 B53 VSS VSS E71
AK27 VSS VSS AR5 B58 VSS VSS F1
B B
AK63 VSS VSS AR50 B62 VSS VSS F13
AK68 VSS VSS AR52 B66 VSS VSS F2
AK69 VSS VSS AR53 B71 VSS VSS F22
AK8 VSS VSS AR55 BA1 VSS VSS F23
AL2 VSS VSS AR58 BA10 VSS VSS F27
AL28 VSS VSS AR63 BA14 VSS VSS F28
AL32 VSS VSS AR8 BA18 VSS VSS F32
AL35 VSS VSS AT2 BA2 VSS VSS F33
AL38 VSS VSS AT20 BA23 VSS VSS F35
AL4 VSS VSS AT23 BA28 VSS VSS F37
AL45 VSS VSS AT28 BA32 VSS VSS F38
AL48 VSS VSS AT35 BA36 VSS VSS F4
AL52 VSS VSS AT4 F68 VSS VSS F40
AL55 VSS VSS AT42 BA45 VSS VSS F42
AL58 VSS VSS AT56 VSS VSS BA41
AL64 VSS VSS AT58 VSS
VSS VSS

16 OF 20 17 OF 20

SKL-U_BGA1356 SKL-U_BGA1356

A A

Security Classification
2017/04/10
Compal Secret Data
2019/12/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET O F ENG INEERING DRAW ING IS T HE PRO PRIET ARY PRO PERT Y O F COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocumentNumber
SKL-U(11/12)GND
AND T RADE SECRET INFORMAT IO N. THIS SHEET MAY NO T BE T RANSFERED FRO M T HE CUST ODY O F T HE COMPET ENT DIVISION O F R&D
Rev
DEPARTMENT EXCEPT AS AUT HO RIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS Custom
MAY BE USED BY O R DISCLOSED T O ANY THIRD PART Y W IT HO UT PRIO R W RIT T EN CONSENT O F COMPAL ELECTRONICS, INC. LA-G07EP(KBL-U_UMA_6L) v0.3

Date: Friday, January 05, 2018 Sheet 15 of 59

5 4 3 2 1
 5 4 3 2 1

CHANNEL-A REVERSE TYPE

JDIMM1A
DDR_M0_CLK0 137 STD 8 DDR_M0_D0
<6> DDR_M0_CLK0

Interleaved Memory
CK0(T) DQ0
DDR_M0_CLK#0 139 7 DDR_M0_D4
<6> DDR_M0_CLK#0 CK0#(C) DQ1
DDR_M0_CLK1 138 20 DDR_M0_D3
<6> DDR_M0_CLK1 CK1(T) DQ2
<6> DDR_M0_CLK#1 DDR_M0_CLK#1 140 21 DDR_M0_D7
CK1#(C) DQ3 DDR_M0_D1
4

TOP: JDIMM1 CONN Non-ECC DIMM DDR_M0_CKE0 DQ4 DDR_M0_D5

<6> DDR_M0_CKE0 109 3
DDR_M0_CKE1 CKE0 DQ5 DDR_M0_D2
<6> DDR_M0_CKE1 110 16
<6> DDR_M0_D[0..15] CKE1 DQ6
17 DDR_M0_D6
DDR_M0_CS#0 149 DQ7 DDR_M0_DQS0
<6> DDR_M0_CS#0 S0# 13 DDR_M0_DQS0 <6>
<6> DDR_M0_D[16..31] DQS0(T)
DDR_M0_CS#1 157 11 DDR_M0_DQS#0
D +3VS +3VS +3VS <6> DDR_M0_CS#1 S1# DQS0#(C) DDR_M0_DQS#0 <6> D
162
<6> DDR_M0_D[32..47] S2#/C0
165 28 DDR_M0_D8
S3#/C1 DQ8 29 DDR_M0_D12
1

<6> DDR_M0_D[48..63] DDR_M0_ODT0 DQ9 DDR_M0_D14

<6> DDR_M0_ODT0
2
1

+3V_PRIM_DA 46 DDR_M0_D16
<6> DDR_M0_MA5 DQ20
DDR_M0_MA6 45 DDR_M0_D20
2

<6> DDR_M0_MA6 DQ21

DDR_M0_MA7 58 DDR_M0_D19
+0.6V_0.6VS <6> DDR_M0_MA7
DDR_M0_MA8 DQ22 DDR_M0_D22
<6> DDR_M0_MA8 59
DQ23
PLACE ALL THE BELOW RESISTORS CLOSE TO SODIMM DDR_M0_MA9 DDR_M0_DQS2

0.1U_0201_10V6K
<6> DDR_M0_MA9 55
+2.5V

2.2U_0402_6.3V6M
+0.6V_DDR_VREFCA DQS2(T) DDR_M0_DQS2 <6>
DDR_M0_MA10 DDR_M0_DQS#2

CD1
2 2 <6> DDR_M0_MA10 146 53 DDR_M0_DQS#2 <6>
<6> DDR_M0_MA11 DDR_M0_MA11 120 A10_AP DQS2#(C)
A11
DDR_M0_MA12 119 DDR_M0_D25

CD2
<6> DDR_M0_MA12 A12
<6> DDR_M0_MA13 DDR_M0_MA13 158 DDR_M0_D28
1 1 A13
DDR_M0_MA14_WE# 151 DDR_M0_D30
<6> DDR_M0_MA14_WE# A14_W E#
9/8 Modify <6> DDR_M0_MA15_CAS# DDR_M0_MA15_CAS# 156
A15_CAS#
DDR_M0_D31
DDR_M0_MA16_RAS# 152 DDR_M0_D24
<6> DDR_M0_MA16_RAS# A16_RAS#
DDR_M0_D29

+1.2V_VDDQ 174 DDR_M0_D32

C <6,18> DDR_DRAMRST#_R DQ32 173 C
DDR_M0_D37
DQ33 187 DDR_M0_D34
PCH_SMBDATA 254 DQ34 186 DDR_M0_D39
<7,18> PCH_SMBDATA SDA DQ35 170
PCH_SMBCLK 253 DDR_M0_D36
<7,18> PCH_SMBCLK SCL DQ36 169 DDR_M0_D33
DQ37
Layout Note: Layout Note: SA2_CHA_DIM1 166
SA2 DQ38
183 DDR_M0_D35
SA1_CHA_DIM1 260 182 DDR_M0_D38
Place near JDIMM1.257,259 Place near JDIMM1.258 SA0_CHA_DIM1 256
SA1 DQ39 179 DDR_M0_DQS4
SA0 DQS4(T) 177 DDR_M0_DQS4 <6>
DDR_M0_DQS#4
DQS4#(C) DDR_M0_DQS#4 <6>
92 195 DDR_M0_D44
CB0_NC DQ40 DDR_M0_D45
91 194
+2.5V +0.6V_0.6VS CB1_NC DQ41
10uF*2 10uF*2 101
CB2_NC DQ42
207 DDR_M0_D42
105 208 DDR_M0_D43
1uF*2 1uF*1 CB3_NC DQ43
@ESD@
For ECC DIMM 88
87
CB4_NC DQ44
191
190
DDR_M0_D41
DDR_M0_D40
CB5_NC DQ45 DDR_M0_D46
10U_0603_6.3V6M

10U 6.3V M X5R 0603 H0.8

0.1U_0201_10V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

100 203
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1 1 1 1 1 1 1 1 CB6_NC DQ46 DDR_M0_D47

CC159

104 204
CB7_NC DQ47 DDR_M0_DQS5
CD3

CD4

CD7

CD8

97 200
CD5

CD6

CD9

DQS8(T) DQS5(T) DDR_M0_DQS5 <6>

95 198 DDR_M0_DQS#5
2 2 2 2 2 2 2 2 DQS8#(C) DQS5#(C) DDR_M0_DQS#5 <6>
+1.2V_VDDQ 216 DDR_M0_D53
12 DQ48 215 DDR_M0_D48
33 DM0#/DBI0# DQ49 228 DDR_M0_D54
54 DM1#/DBI1# DQ50 229 DDR_M0_D50
75 DM2#/DBI2# DQ51 211 DDR_M0_D52
178 DM3#/DBI3# DQ52 212 DDR_M0_D49
199 DM4#/DBI4# DQ53 224 DDR_M0_D55
220 DM5#/DBI5# DQ54 225 DDR_M0_D51
DDR_DRAMRST#_R 241 DM6#/DBI6# DQ55 221 DDR_M0_DQS6
96 DM7#/DBI7# DQS6(T) 219 DDR_M0_DQS6 <6>
DDR_M0_DQS#6
DM8#/DBI8# DQS6#(C) DDR_M0_DQS#6 <6>
Layout Note:
@ESD@
PLACE THE CAP near JDIMM1. 164 CD10
+3V_PRIM +3V_PRIM_DA PLACE NEAR TO SODIMM 0.1U_0402_25V6 237 DDR_M0_D60

2 1
B
DQ56 DDR_M0_D57 B
236
1 2 DQ57 DDR_M0_D59
249
RD32 0_0402_5% DQ58 DDR_M0_D62
250
DQ59 DDR_M0_D56
232
DQ60
+0.6V_DDR_VREFCA 2.2uF*1 FOX_AS0A827-H2RB-7H
DQ61
233 DDR_M0_D61
245 DDR_M0_D58
0.1uF*1 DQ62
246 DDR_M0_D63
CONN@ DQ63
2 2 242 DDR_M0_DQS7
DQS7(T) DDR_M0_DQS7 <6>
240 DDR_M0_DQS#7
DQS7#(C) DDR_M0_DQS#7 <6>
CD11 CD12
1 0.1U_0201_10V6K 1 2.2U_0402_6.3V6M
Part Number:LTCX0069GA0
Part Value:S SOCKET FOX AS0A827-H2RB-7H 260P DDR4 FOX_AS0A827-H2RB-7H
+1.2V_VDDQ CONN@

DIMM Side CPU Side

+0.6V_VREFCA
Layout Note: RD8 +0.6V_DDR_VREFCA
Place near JDIMM1 @ 2 1K_0402_1%

10uF*6
+1.2V_VDDQ 1uF*8 +1.2V_VDDQ
330uF*1
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
RD11
CD93

CD16

CD17

CD18

CD19

CD20

CD21

CD22

CD23

CD95

A 1 A
24.9_0402_1%
CD96

CD24

CD25

CD26

CD27

CD28

CD29

CD30

CD31

CD94

C174 +
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 Part Number = SF000006S00
330U_2.5V_M
2
@

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/04/10 Deciphered Date 2019/12/15 Title

TH IS S H E E T O F E N G I N E E R I N G D R A W IN G IS T H E P R O P R I E T A R Y P R O P E R T Y O F C O M P A L E L E C TR O N IC S , IN C . A N D C O N TA IN S CONFIDENT I A L
P18-DDRIV_CHA: DIMM0
S i ze Document Number Rev
A N D T R A D E S E C R E T IN F O R M A T I O N . TH IS S H E E T M A Y N O T B E T R A N S F E R E D F R O M T H E C U S T O D Y O F T H E C O M P E T E N T D IV IS IO N O F R & D
D E P A R TM E N T E X C E P T A S A U T H O R I Z E D B Y C O M P A L E L E C TR O N IC S , IN C . N E ITH E R TH IS S H E E T N O R T H E I N F O R M A T I O N IT C O N TA IN S v0.3
M A Y B E U S E D B Y O R D IS C L O S E D T O A N Y TH IR D P A R T Y W I T H O U T P R I O R W R I T T E N C O N S E N T O F C O M P A L E L E C TR O N IC S , IN C . LA-G07EP(KBL-U_UMA_6L)
Date: Friday, January 05, 2018 Sheet 17 of 59
5 4 3 2 1
 5 4 3 2 1

STD (5.2 mm)

CHANNEL-B Interleaved Memory <6> DDR_M1_CLK0
DDR_M1_CLK0 137
JDIMM2A
STD 8 DDR_M1_D15
CK0(T) DQ0
DDR_M1_CLK#0 DDR_M1_D10

TOP: JDIMM2 CONN Non-ECC DIMM <6> DDR_M1_CLK#0 139 7

DDR_M1_CLK1 CK0#(C) DQ1 DDR_M1_D11
<6> DDR_M1_CLK1 138 20
<6> DDR_M1_D[0..15] CK1(T) DQ2
DDR_M1_CLK#1 140 21 DDR_M1_D12
<6> DDR_M1_CLK#1 CK1#(C) DQ3
4 DDR_M1_D14
+3VS +3VS +3VS <6> DDR_M1_D[16..31] DDR_M1_CKE0 DQ4 DDR_M1_D9
<6> DDR_M1_CKE0 109 3
DDR_M1_CKE1 CKE0 DQ5 DDR_M1_D8
<6> DDR_M1_CKE1 110 16
<6> DDR_M1_D[32..47] CKE1 DQ6
17 DDR_M1_D13
1

1
DQ7

1
DDR_M1_CS#0 149 13 DDR_M1_DQS1
D <6> DDR_M1_D[48..63] <6> DDR_M1_CS#0 S0# DQS0(T) DDR_M1_DQS1 <6> D
RD19 RD20 RD21 DDR_M1_CS#1 157 11 DDR_M1_DQS#1
<6> DDR_M1_CS#1 S1# DQS0#(C) DDR_M1_DQS#1 <6>
0_0402_5% @ 0_0402_5% JDIMM2B 162
@ 0_0402_5% STD S2#/C0
165 28 DDR_M1_D0
S3#/C1 DQ8 DDR_M1_D5
29
+1.2V_VDDQ +1.2V_VDDQ
2

2
SA0_CHB_DIM2 2 SA1_CHB_DIM2 SA2_CHB_DIM2 DDR_M1_ODT0 DQ9 DDR_M1_D7
<6> DDR_M1_ODT0 155 41
DDR_M1_ODT1 ODT0 DQ10 DDR_M1_D6
<6> DDR_M1_ODT1 161 42
ODT1 DQ11 DDR_M1_D4
24
DQ12
1

1
DDR_M1_BG0 115 25 DDR_M1_D1
1

<6> DDR_M1_BG0 BG0 DQ13

RD22 RD23 RD24 DDR_M1_BG1 113 38 DDR_M1_D3
<6> DDR_M1_BG1 BG1 DQ14
0_0402_5% @ 0_0402_5% 0_0402_5% DDR_M1_BA0 150 37 DDR_M1_D2
<6> DDR_M1_BA0 BA0 DQ15
<6> DDR_M1_BA1 DDR_M1_BA1 145 34 DDR_M1_DQS0
BA1 DQS1(T) DDR_M1_DQS0 <6>
32 DDR_M1_DQS#0
DQS1#(C) DDR_M1_DQS#0 <6>
2
2

2
+3V_PRIM_DB DDR_M1_MA0 144
<6> DDR_M1_MA0 A0
DDR_M1_MA1 133 50 DDR_M1_D20
<6> DDR_M1_MA1 A1 DQ16
DDR_M1_MA2 132 49 DDR_M1_D17
+0.6V_0.6VS <6> DDR_M1_MA2
DDR_M1_MA3 131
A2 DQ17 62 DDR_M1_D19
<6> DDR_M1_MA3 A3 DQ18
DDR_M1_MA4 128 63 DDR_M1_D22
+2.5V

2.2U_0402_6.3V6M
+0.6V_DDRB_VREFCA <6> DDR_M1_MA4 A4 DQ19
1 2 DDR_M1_MA5 126 46 DDR_M1_D21
<6> DDR_M1_MA5 A5 DQ20
PLACE ALL THE BELOW RESISTORS CLOSE TO SODIMM CD60 <6> DDR_M1_MA6 DDR_M1_MA6
DDR_M1_MA7
127
122
A6 DQ21
45
58
DDR_M1_D16
DDR_M1_D18

CD61
<6> DDR_M1_MA7 A7 DQ22
0.1U_0201_10V6K <6> DDR_M1_MA8 DDR_M1_MA8 125 59 DDR_M1_D23
1 A8 DQ23 55
2 <6> DDR_M1_MA9 DDR_M1_MA9 121 DDR_M1_DQS2
SPD ADDRESS FOR CHANNEL B : <6>
<6>
DDR_M1_MA10
DDR_M1_MA11
DDR_M1_MA10
DDR_M1_MA11
146
A9
120 A10_AP
DQS2(T)
DQS2#(C)
53 DDR_M1_DQS#2
DDR_M1_DQS2
DDR_M1_DQS#2
<6>
<6>

WRITE ADDRESS: 0XA4

A11
<6> DDR_M1_MA12 DDR_M1_MA12 119 70 DDR_M1_D25
PLACE NEAR TO PIN <6> DDR_M1_MA13 DDR_M1_MA13 158
A12 DQ24 71 DDR_M1_D24
READ ADDRESS: 0XA3 9/8 Modify <6> DDR_M1_MA14_WE#
<6> DDR_M1_MA15_CAS#
DDR_M1_MA14_WE#
DDR_M1_MA15_CAS#
151 A13
156 A14_W E#
A15_CAS#
DQ25
DQ26
DQ27
83
84
DDR_M1_D31
DDR_M1_D27

SA0 = 0; SA1 = 1; SA2 = 0. <6> DDR_M1_MA16_RAS#

DDR_M1_MA16_RAS# 152
A16_RAS# DQ28
DQ29
66
67
DDR_M1_D28
DDR_M1_D29
DDR_M1_ACT# 79 DDR_M1_D30
DDR4 POR OPERATING SPEED: 1867 MT/S
114
<6> DDR_M1_ACT# ACT# DQ30 80 DDR_M1_D26
DDR_M1_PAR DQ31 76 DDR_M1_DQS3
143
STRETCH GOAL IS 2133 MT/S RD25 2
<6> DDR_M1_PAR
<6> DDR_M1_ALERT#
1
DDR_M1_ALERT#
DIMM2_CHB_EVENT# 134
116
PARITY
ALERT#
DQS3(T)
DQS3#(C)
74 DDR_M1_DQS#3
DDR_M1_DQS3
DDR_M1_DQS#3
<6>
<6>
C +1.2V_VDDQ DDR_DRAMRST#_R
EVENT#
DDR_M1_D37 C
240<_064,1072>_1%DDR_DRAMRST#_R 108 174
RESET# DQ32
Layout Note: Layout Note: DQ33
173 DDR_M1_D33
187 DDR_M1_D35
Place near JDIMM2.257,259 Place near JDIMM2.258 PCH_SMBDATA 254 DQ34
186 DDR_M1_D38
<7,17> PCH_SMBDATA SDA DQ35
PCH_SMBCLK 253 170 DDR_M1_D32
<7,17> PCH_SMBCLK SCL DQ36
169 DDR_M1_D36
SA2_CHB_DIM2 166 DQ37 DDR_M1_D34
SA2 183
SA1_CHB_DIM2 260 DQ38 DDR_M1_D39
SA1 182
+2.5V +0.6V_0.6VS DQ39
10uF*2 10uF*2 SA0_CHB_DIM2 256
SA0 DQS4(T)
179 DDR_M1_DQS4
DDR_M1_DQS4 <6>
177 DDR_M1_DQS#4
1uF*2 1uF*1 DQS4#(C) DDR_M1_DQS#4 <6>
DDR_M1_D44
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1 1 1 1 1 1 1
CD62

CD63

CD66

CD67
CD64

CD65

CD68

2 2 2 2 2 2 2

Layout Note:
PLACE THE CAP WITHIN 200 MILS
FROM THE JDIMM2

+0.6V_DDRB_VREFCA 2.2uF*1
0.1uF*1
2 2

CD69 CD70
1 0.1U_0201_10V6K 1 2.2U_0402_6.3V6M
+3V_PRIM +3V_PRIM_DB

1 2
RD33 0_0402_5%

CONN@

Layout Note:
Place near JDIMM2
2

CD71
DIMM Side CPU Side

2
@ RD26
1 0.1U_0402_10V6K
1K_0402_1%
+0.6V_DDRB_VREFCA +0.6V_B_VREFDQ

1
10uF*6
1 RD27 2
+1.2V_VDDQ 1uF*8 +1.2V_VDDQ
330uF*1
2_0402_1%
VREF traces should be at least 20 mils
2 wide with 20 mils spacing to other
2
RD28 CD72
1
signals
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

CD81 1K_0402_1% CD82

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0.1U_0402_10V6K
CD73

CD74

CD75

CD76

CD77

CD78

CD79

CD80

1 0.1U_0402_10V6K 2 0.022U_0402_25V7K
CD83

CD84

CD87

CD88

CD89

CD90
CD85

CD86

A A

2
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
2

RD29
24.9_0402_1%
@ @

1
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2017/04/10 Deciphered Date 2019/12/15 Title

TH IS S H E E T O F E N G I N E E R I N G D R A W IN G IS T H E P R O P R I E T A R Y P R O P E R T Y O F C O M P A L E L E C TR O N IC S , IN C . A N D C O N TA IN S CONFIDENT I A L
P19-DDRIV_CHB: DIMM0
S i ze Document Number Rev
A N D T R A D E S E C R E T IN F O R M A T I O N . TH IS S H E E T M A Y N O T B E T R A N S F E R E D F R O M T H E C U S T O D Y O F T H E C O M P E T E N T D IV IS IO N O F R & D
D E P A R TM E N T E X C E P T A S A U T H O R I Z E D B Y C O M P A L E L E C TR O N IC S , IN C . N E ITH E R TH IS S H E E T N O R T H E I N F O R M A T I O N IT C O N TA IN S v0.3
M A Y B E U S E D B Y O R D IS C L O S E D T O A N Y TH IR D P A R T Y W I T H O U T P R I O R W R I T T E N C O N S E N T O F C O M P A L E L E C TR O N IC S , IN C . LA-G07EP(KBL-U_UMA_6L)
Date: Friday, January 05, 2018 Sheet 18 of 59
5 4 3 2 1
 5 4 3 2 1

eDP Power <6,7,9,10,11,13,17,18,28,29,30,31,32,33,36,39,40,52> +3VS +3VS

W =60mils
<46,47,48,49,50,53> +19VB +19VB
INVPW R_B+ +19VB
+LCDVDD SM010014520 3000ma W =60mils
220ohm@100mhz <7,13,29,30,33,34,35,40,48,49,50,51> +3VALW +3VALW
DCR 0.04
L1 1 @ 2 0_0805_5%

4.7U_0402_6.3V6M

0.1U_0201_10V6K
1 1 SD002000080
CG3
CG2 @ L2 1 @ 2 0_0805_5%
SD002000080
2 2 1 2 DISPOFF#
@EMI@ C117
1 1
C118 1 2 <EC> <33> EC_BKOFF# R166 33_0402_5%
*UG1 +LCDVDD Current Limit : 0.8A 680P_0402_50V7K 68P_0402_50V8J FU1 0.75A_24V_MF-MSMF075/24
SP040009I00 R5176
2 2
10K_0402_5%

D D

2
UG2

1
9
GND
Rshort@
<5> ENVDD_CPU
R6 1 2 ENVDD_CPU_R 1
0_0402_5%
EN1 IN1
8 +3VS <CPU> <5> BKL_PW M_CPU
R259
1 Rshort@2
0_0402_5%
INVTPW M

+3VS R5198 1 @ 2 UG2_FLAG1 2 7 +LCDVDD

FLAG1 OUT1
100K_0402_5%
ENVDD_CPU R5200 1 @ 2 UG2_EN2 3 6 @ R163
EN2 IN2 +3VS
0_0402_5% 100K_0402_5%
R5201 1 2

0.1U_0402_16V7K
+3VS 4 5 +3VS_CAMERA

2
100K_0402_5% FLAG2 OUT2

1U_0402_6.3V4Z

0.1U_0201_10V6K

1U_0402_6.3V4Z
0.1U_0402_16V7K

1U_0402_6.3V4Z
1 1 1 1 1 1

1
R5199 1 @ 2 UG2_FLAG2 G510F51U_MSOP8

CG75
C5232

CG76

C5231
+3VS
100K_0402_5% @

CG1

CG4
SA0000BEY00
2 2 2 2 2 2 RT34 1 Rshort@2 0_0201_5% EDP_HPD_R
<CPU> <5> EDP_HPD

Camera RT11
100K_0402_5%
R170 EMI@ 1
2

2
1
SM070005U00 MURATA DLM0NSN900HY2D @ESD@
4 0_0201_5% 3 USB20_N5_R D7 SCA00000U10
<11> USB20_N5 4 3
@EMI@ USB20_P5_R 2
L12 1 2 USB20_P5_R 1
<11> USB20_P5 1 2 2 .1U_0402_16V7K EDP_AUXP_C
USB20_N5_R 3 CT102 1
<5> EDP_AUXP
EMI@ CT101 1 2 .1U_0402_16V7K EDP_AUXN_C
PESD5V0U2BT_SOT23 -3 <5> EDP_AUXN
1 2
R171 0_0201_5%
CT98 1 2 .1U_0402_16V7K EDP_TXP0_C
<5> EDP_TXP0
1 @ 2
R5196 0_0603_5% <CPU> CT97 1 2 .1U_0402_16V7K EDP_TXN0_C
C <5> EDP_TXN0 C
SD013000080
D_MIC_CLK
<32> D_MIC_CLK CT103 1 2 .1U_0402_16V7K EDP_TXP1_C
+3VS_CAMERA <5> EDP_TXP1
D_MIC_DATA 1 Rshort@2 D_MIC_L_DATA CT100 1 2 .1U_0402_16V7K EDP_TXN1_C
<32> D_MIC_DATA <5> EDP_TXN1
R175 0_0402_5%
1 1
@
+3VS
C5221 C5222
.1U_0402_16V7K 4.7U_0402_6.3V6M
2 2 SE00000SO00

C593 2 1 220P_0402_50V7K INVTPW M

*FG3 Camera Current Limit : 0.4A
1st:SA000080300, S IC G5250Q1T73U SOT-23 3P POWER SWITCH_0.4A C594 2 1 220P_0402_50V7K DISPOFF#
2nd:SA00004ZA00, S IC AP2330W-7 SC59 3P PWR SW_0.4A

eDP
R5175

CONN@
JEDP
EDP_TXP1_C
TS_GPIO EDP_TXN1_C

EDP_TXP0_C
EDP_TXN0_C
USB20_P7_R 2
EDP_AUXP_C
USB20_N7_R 3 EDP_AUXN_C
+LCDVDD
EDP_HPD_R

INVPW R_B+

+5VS_TOUCH
+3VS_TOUCH
36
+3VS_CAMERA GND
USB20_N5_R 35
GND
USB20_P5_R 34
Camera GND
33
D_MIC_CLK GND
32
GND
CTS3 D_MIC_L_DATA
4.7U_0402_6.3V6M
ACES_50203-03001-002
SP010023710

+5VS_TOUCH

RTS8 1 @ 2 0_0402_5%

TS@
FG2 +5VS_TOUCH only for HD with TS
3 +5VS
A OUT A
1
TS@ 1 20mil
IN
CTS6
4.7U_0402_6.3V6M 2
2 GND TS@ 1
CTS1
SA00004ZA00 0.1U_0402_16V4Z
G5250Q1T73U SOT-23 3P POWER SWITCH
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/08/24 Deciphered Date 2018/08/24 Title

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT I A L
eDP CONN/Camera/TS
Sii zee Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS v0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-G07EP(KBL-U_UMA_6L)
Date: Friday, January 05, 2018 Sheet 27 of 59
5 4 3 2 1
 5 4 3 2 1

<6,7,9,10,11,13,17,18,27,29,30,31,32,33,36,39,40,52> +3VS +3VS

+3VS
<27,32,33,34,36,37,40> +5VS +5VS
HOST_DP1_P0 0.1U_0402_16V7K 1 2 CG8 HDMI_TX_P2
<5> HOST_DP1_P0
HOST_DP1_N0 0.1U_0402_16V7K 1 2 CG9 HDMI_TX_N2
<5> HOST_DP1_N0

<5> HOST_DP1_P1 HOST_DP1_P1 0.1U_0402_16V7K 1 2 CG10 HDMI_TX_P1

HOST_DP1_N1 0.1U_0402_16V7K 1 2 CG11 HDMI_TX_N1
<CPU> <5> HOST_DP1_N1
RG47

1
HOST_DP1_P2 0.1U_0402_16V7K 1 2 CG12 HDMI_TX_P0
<5> HOST_DP1_P2
HOST_DP1_N2 0.1U_0402_16V7K 1 2 CG13 HDMI_TX_N0 1M_0402_5%
<5> HOST_DP1_N2
HOST_DP1_P3 0.1U_0402_16V7K 1 2 CG14 HDMI_CLKP

2
<5> HOST_DP1_P3 RG108

2
D
HOST_DP1_N3 0.1U_0402_16V7K 1 2 CG15 HDMI_CLKN D
<5> HOST_DP1_N3
1 6 HDMI_HPD 1 2 HP_DETECT
<5> HOST_DP1_HPD
QG1A

20K_0402_5%
10K_0402_5%

5
6
7
8

5
6
7
8
L2N7002SDW1T1G 2N SC88-6
SB00001FF00 1

1
5V Level RG56 @
QG1B SB00001FF00 CM17
L2N7002SDW1T1G 2N SC88-6 220P_0402_50V7K

4
3
2
1

4
3
2
1
3 4 2

2
RP1 RP2
470_0804_8P4R_5% 470_0804_8P4R_5%

5
+3VS

+3VS

HDMI_CLKP RG59 1 EMI@ 2 15 +-1% 0402

2
1 6
1

HDMI_CLKN RG60 1 EMI@ 2 15 +-1% 0402

QG2A SB00001FF00
L2N7002SDW1T1G 2N SC88-6
+3VS
RG63 1 EMI@ 2 15 +-1% 0402
2

5
4 3 HDMI_CTRL_DAT
1

HDMI_TX_P2 RG61 1 EMI@ 2 15 +-1% 0402

QG2B SB00001FF00
L2N7002SDW1T1G 2N SC88-6
RG65 1 EMI@ 2 15 +-1% 0402
2
1

RG10 1 EMI@ 2 15 +-1% 0402

RG12 1 EMI@ 2 15 +-1% 0402

2

HDMI Conn.
1

HDMI_TX_N0 RG13 1 EMI@ 2 15 +-1% 0402

JHDMI CONN@
19
18 HP_DET
+5V
17
DDC/CEC_GND
16
SDA
15
SCL
14
Utility
13
CEC
12
CK-
11
CK_shield
W=40mils 10
8 CM26 CM27 HDMI_R_TX_N0 CK+
FG1 9
+HDMI_CRT_5V D0-
8
AZ1045-04F.R7G DFN2510P10E ESD HDMI_R_TX_P0 D0_shield
7
3 SC300001Y00 2 2 HDMI_R_TX_N1 D0+
6
OUT D1-
5
1 HDMI_R_TX_P1 D1_shield 23
+5VS 4
IN HDMI_R_TX_N2 D1+ GND1 22
1 1 3
2 D2- GND2
2 21
GND HDMI_R_TX_P2 D2_shield GND3
1 20
CG46 CG47 D2+ GND4
0.1U_0402_16V7K 2 4.7U_0402_6.3V6M 2 ACON_HMRBL-AK120H
A AP2330W-7_SC59-3 A
DC231709273
SA00004ZA00

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/08/24 Deciphered Date 2018/08/24 Title

THIS SHEET O F ENG INEERING DRAW ING IS T HE PRO PRIET ARY PRO PERT Y O F COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocumentNumber
HDMI Conn/Level shift
AND T RADE SECRET INFORMAT IO N. THIS SHEET MAY NO T BE T RANSFERED FRO M T HE CUST ODY O F T HE COMPET ENT DIVISION O F R&D
Rev
v0.3
DEPARTMENT EXCEPT AS AUT HO RIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS
MAY BE USED BY O R DISCLOSED T O ANY THIRD PART Y W IT HO UT PRIO R W RIT T EN CONSENT O F COMPAL ELECTRONICS, INC. LA-G07EP(KBL-U_UMA_6L)
Date: Friday, January 05, 2018 Sheet 28 of 59
5 4 3 2 1
 5 4 3 2 1

JL33
+LAN_VDD_3V3 Rising
1
12
2
JUMP@
time
+3VALW @
JUMP_43X79
need>0.5mS and
UL2
1
<100mS+LAN_VDD_3V3 CL8, CL23 closeLL2.
5 VOUT CL26 close UL1 Pin 3.
VIN
1 CL12 close UL1 Pin 8.
@ 2 +LAN_VDD_1V0
CL28 4 GND CL13 ~ CL15 close UL1 Pin 22.
<33> LAN_PWR_EN EN
1500P_0402_50V7K
2
LL2 CL11, CL27 close UL1 Pin 30.
3 +LAN_REGOUT 1 2
/OC

1U_0402_6.3V6K
2.2UH +-20% 1239AS-H-2R2M=P22A

1U_0402_6.3V6K
0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K
4.7U_0402_6.3V6M

4.7U_0603_6.3V6K
G524B1T11U_SOT23-5 SH000014700 1 1 1 1 1 1 1 1 1 1

CL8
@

CL29

CL23
SA00006Y800 @
CL11 CL12 CL13 CL14 CL15 CL26 CL27
D @ D
2 2 2 2 2 2 2 2 2 2

EC_LAN_ISOLATEB#_R 2 1 +3VS
1K_0402_5% RM6
RTL8107ESH-CG/RTL8111HSH-CG Co-Lay

2
+LAN_VDD_3V3 +LAN_VDD_3V3
RM11
4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

UL1 +LAN_VDD_3V3=40mil 15K_0402_5%

0.1U_0402_16V7K

0.1U_0402_16V7K

RTL8111HSH-CG
0.1U_0402_16V7K
1 1 1 1 1 1

1
L
CL16
@ +LAN_VDD_1V0
CL20 CL9 CL5 CL10
SA000084T00 +VDDREG=40mil
CL19
@
2 2 2 2 2 2 LAN_MDIP0 +LAN_REGOUT=60mil
LAN_MDIN0 8
AVDD10 +LAN_VDD_3V3 XTLI
LAN_MDIP1 30
AVDD10 +LAN_VDD_3V3
LAN_MDIN1
2 1 XTLO
1M_0402_5% RL7

CL9, CL20 close to UL1 Pin 11 CL10& CL16 close to UL1: Pin 23 YL1

CL5 & CL19 close to UL1: Pin 32 1

1 3
3

NC NC

<9> CLK_PCIE_P1 2 2 4 2

10P_0402_50V8J
CL25

CL24
10P_0402_50V8J
<9> CLK_PCIE_N1

<11> PCIE_CTX_C_DRX_P5 1 SJ10000UP00 1

<11> PCIE_CTX_C_DRX_N5
<11> PCIE_CRX_DTX_P5 25MHZ 10PF XRCGB25M000F2P34R0
<11> PCIE_CRX_DTX_N5

TSL1
25 XGND
+V_DAC 1 LANGND 24
LAN_MDIP0 2 TCT1 MCT1
TD1+ MX1+ 23 RJ45_MDIP0
LAN_MDIN0 3 22 RJ45_MDIN0
TD1- MX1-
4 21 MCT3
LAN_MDIP1 TCT2 MCT2 20 RJ45_MDIP1
5 TD2+ MX2+ MCT4
LAN_MDIN1 6 19 RJ45_MDIN1
TD2- MX2- 75_0804_8P4R_1%
7 18 SD300002E80 2
LAN_MDIP2 TCT3 MCT3 17 RJ45_MDIP2
8 CL2 +LAN_VDD_3V3
LAN_MDIN2 9 TD3+ MX3+
16 RJ45_MDIN2 SE167100J80
TD3- MX3- JLAN
10 15 1 10P_1808_3KV A1
LAN_MDIP3 11 TCT4 MCT4 14 RJ45_MDIP3 White_LED+
TD4+ MX4+ 1
LAN_MDIN3 12 13 RJ45_MDIN3 CL3 LAN_LINK# 2 1 LAN_LINK#_R LAN_ACT#_R A2
TD4- MX4- 120P_0402_50V8J White_LED-
RL30 1K +-5% 0402
LANGND EMI@ RJ45_MDIN3 8
DI_D4-
3

2
LAN-8100G1G DL1 RJ45_MDIP3 7
2 1 DI_D4+
3

@EMI@ SP050008Y00 PESD5V0U2BT 3P CC SOT23 ESD

CL1 ESD@ RJ45_MDIN1 6
CL4 RX_D2-
SCA00000T00
1

1 0.01U_0402_16V7K 2 0.1U_0402_16V7K
RJ45_MDIN2 5
BI_D3-
RJ45_MDIP2 4
1

BI_D3+
RJ45_MDIP1 3
RX_D2+
RJ45_MDIN0 2 9
TX_D1- GND1
10
RJ45_MDIP0 1 GND2
11
TX_D1+ GND3
12
B1 GND4
Amber_LED+
LAN_ACT# 2 1 LAN_ACT#_R LAN_LINK#_R B2
Amber_LED-
RL31 510_0402_5%
SINGA_2RJ3081-1A8211F LANGND
DC231710035
@ESD@ @ESD@
B B
DM12 DM13
LAN_MDIP0 4 3 LAN_MDIN0 LAN_MDIP2 4 3 LAN_MDIN2
4 3 4 3

powe rail need to check powe rail need to check

+LAN_VDD_3V3 5 2 +LAN_VDD_3V3 5 2
Vbus GND Vbus GND

LAN_MDIN1 6 1 LAN_MDIP1 LAN_MDIN3 6 1 LAN_MDIP3

6 1 6 1

YSUSB2.0-5_SOT-23-6-6 YSUSB2.0-5_SOT-23-6-6
SC300001G00 SC300001G00

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/08/24 2018/08/24 Title
Deciphered Date
T HI S S HE E T O F E NG I NE E R I NG D R AW I NG I S T HE P R O P R I E T AR Y P R O P E R T Y O F C O M P AL E L E C T R O NI C S , I NC . AND C O NT AI NS CONFIDENTSSIAizLe Document Number
LAN 8111
AND T R AD E S E C R E T I NF O R M AT I O N. T HI S S HE E T M AY NO T B E T R ANS F E R E D F R O M T HE C US T O D Y O F T HE C O M P E T E NT DI VI SI ON O F R & D Rev
D E P AR T M E NT E X C E P T AS AUT HO R I Z E D B Y C O M P AL E L E C T R O NI C S , I NC . NE I T HE R T HI S S HE E T NO R T HE I NF O R M AT I O N I T C O NT AI NS
M AY B E US E D B Y O R D I S C L O SED T O ANY T HI R D P AR T Y W I T HO UT P R I O R W R I T T E N C O NS E NT O F C O M P AL E L E C T R O NI C S , I NC .
LA-G07EP(KBL-U_UMA_6L) v0.3

Date: Friday, January 05, 2018 Sheet 29 of 59

5 4 3 2 1
 B C D E

UC1A SKL-U
Rev_0.53

+1.0V_PRIM

RC11 2 @ 1 51_0402_5% SOC_XDP_TMS

RC13 2 @ 1 51_0402_5% SOC_XDP_TDI

RC15 2 1 51 +-1% 0402 SOC_XDP_TDO SD000008H80

RC364 2 @ 1 51_0402_5% CPU_XDP_TCK0

+1.0V_PRIM

RC14 2 @ 1 51_0402_5% XDP_PREQ# XDP_PREQ# <11>

RC31 1 @ 2 1K_0402_5% XDP_ITP_PMODE XDP_ITP_PMODE <16>

4 RC365 2 @ 1 51_0402_1% SOC_XDP_TRST# 4

RC35 2 1 51_0402_1% CPU_XDP_TCK0 SD000008H80

RC37 2 @ 1 51_0402_5% PCH_JTAG_TCK1

RC366 1 @ 2 0_0402_5% CFG3 CFG3 <16> Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2017/04/10 2019/12/15 Title
Deciphered Date
T HIS SH EET O F EN G IN EER IN G D R AW IN G IS T H E PR O PR IET AR Y PR O PER T Y O F C O MPAL ELEC T R O N IC S, INC. AN D CONT AINS CONFIDEN T IAL
SKL-U(1/12)DDI,MSIC,XDP,EDP
SS ize Document Number Rev
AN D T R AD E SEC R ET IN F O R MAT IO N . T HIS SH EET MAY N O T BE T R AN SF ER ED F R O M T H E C U ST O D Y O F T H E C O MPET EN T DIVISION O F R &D
D EPAR T MEN T EXC EPT AS AU T H O R IZ ED BY C O MPAL ELEC T R O N IC S, INC. NEIT HER T HIS SH EET N O R T H E IN F O R MAT IO N IT CONT AINS
MAY BE U SED BY O R DISCLO SED T O AN Y T H IR D PAR T Y W IT H O UT PR IO R W R IT T EN C O N SEN T O F C O MPAL ELEC T R O N IC S, INC.
Custom
LA-G07EP(KBL-U_UMA_6L)
Sheet 5 of 59
v0.3

Date: Friday, January 05, 2018

A B C D E
 5 4 3 2 1

+VCC_GT_VR +VCC_GT
JU42A
+VCC_CORE +VCC_CORE 1 2 +VCC_GT
+VCC_CORE 1 2
JUMP@ UC1M SKL-U
UC1L SKL-U JUMP_43X39_0805 Rev_0.53
Rev_0.53 CPU POW ER 2 OF 4
CPU POW ER 1 OF 4
JU22
1 2
+VCC_GT 1 2
JUMP@

JUMP_43X39_0805

D
JU42A/JU42B for KBLR D
JU221 for KBLU

C C

SVID ALERT
+1.0V_VCCST
Place the PU <52> VCCGT_SENSE
VCCGT_SENSE VCCGTX_SENSE T155 TP@
VSSGT_SENSE VSSGTX_SENSE
resistors close to CPU <52> VSSGT_SENSE T219 TP@

13 OF 20
Trace Length < 25 mils
1

SKL-U_BGA1356
RC179
56_0402_5%
2

SOC_SVID_ALERT# 1 2
VR_ALERT# <52>
(To VR)
RC180 220_0402_5%

+1.0V_VCCST

SVID DATA Place the PU

resistors close to CPU
1

RC181
100_0402_1%
2

B B

VR_SVID_DATA <52> (To VR)

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/04/10 Deciphered Date 2019/12/15 Title
SKL-U(10/12)Power,SVID
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDE NTSIiAzeeL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D Document Number Rev

LA-G07EP(KBL-U_UMA_6L)
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom v0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 05, 2018 Sheet 14 of 59

5 4 3 2 1
 5 4 3 2 1

Interleaved Memory Interleaved Memory

D
<Cocoa_1020> D

PDG#543016, ODT: CPU side no connect, DRAM side connect to VDDQ(Memory down); FET+R(SO-DIMM)
SKL-U
UC1B SKL-U UC1C
Rev_0.53 Rev_0.53
AU53 DDR_M0_CLK#0 DDR_M0_CLK#0 <17>
<17> DDR_M0_D[0..15] DDR0_CKN[0] <18> DDR_M1_D[0..15] DDR_M1_D0 AN45 DDR_M1_CLK#0
DDR_M0_D0 AT53 DDR_M0_CLK0 DDR_M0_CLK0 <17> DDR_M1_CLK#0 <18>
DDR0_CKP[0] DDR_M1_D1 DDR1_CKN[0]
DDR_M0_D1 AU55 DDR_M0_CLK#1 DDR_M0_CLK#1 <17> AN46 DDR_M1_CLK#1 DDR_M1_CLK#1 <18>
DDR0_CKN[1] DDR1_CKN[1]
DDR_M0_D2 AT55 DDR_M0_CLK1 DDR_M0_CLK1 <17> DDR_M1_D2 AP45 DDR_M1_CLK0 DDR_M1_CLK0 <18>
DDR0_CKP[1] DDR1_CKP[0]
DDR_M0_D3 DDR_M1_D3 AP46 DDR_M1_CLK1 DDR_M1_CLK1 <18>
DDR1_CKP[1]
DDR_M0_D4 DDR_M0_CKE0 <17> DDR_M1_D4

A A

Security Classification
2017/04/10
Compal Secret Data
2019/12/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
TH IS S H E E T O F E N G I N E E R I N G D R A W IN G IS T H E P R O P R I E T A R Y P R O P E R T Y O F C O M P A L E L E C TR O N IC S , IN C . A N D C O N TA IN S CONFIDENT I A L
SKL-U(2/12)DDRIII
S ii zee Document Number Rev
A N D T R A D E S E C R E T IN F O R M A T I O N . TH IS S H E E T M A Y N O T B E T R A N S F E R E D F R O M T H E C U S T O D Y O F T H E C O M P E T E N T D IV IS IO N O F R & D
D E P A R TM E N T E X C E P T A S A U T H O R I Z E D B Y C O M P A L E L E C TR O N IC S , IN C . N E ITH E R TH IS S H E E T N O R T H E I N F O R M A T I O N IT C O N TA IN S Custom
M A Y B E U S E D B Y O R D IS C L O S E D T O A N Y TH IR D P A R T Y W I T H O U T P R I O R W R I T T E N C O N S E N T O F C O M P A L E L E C TR O N IC S , IN C . LA-G07EP(KBL-U_UMA_6L) v0.3

Date: Friday, January 05, 2018 Sheet 6 of 59

5 4 3 2 1
 5 4 3 2 1

SML0ALERT# (Internal Pull Down):

eSPI or LPC
SKL-U
UC1E 0 = LPC is selected f or EC --> For KB9022/9032 Use
Rev_0.53
SPI - FLASH
1 = eSPI is selected f or EC --> For KB9032 Only.
SMBUS, SMLINK
HOST_SPI_0_CLK AV2
SPI0_CLK
<35> HOST_SPI_0_SO HOST_SPI_0_SO AW3 R7 SMBCLK SMB SML0ALERT#
SPI0_MISO GPP_C0/SMBCLK
HOST_SPI_0_SI AV3 R8 SMBDATA
<35> HOST_SPI_0_SI
HOST_SPI_0_SIO2 AW2 SPI0_MOSI GPP_C1/SMBDATA
R10 SMBALERT# TP@ T239
(Link to XDP, DDR, TP)
SPI0_IO2 GPP_C2/SMBALERT#
HOST_SPI_0_SIO3 AU4

1
SPI0_IO3 RC218
HOST_SPI_0_CS0# AU3 R9 SML0CLK
SPI0_CS0# GPP_C3/SML0CLK
AU2 W2 SML0DATA 1K_0402_1%
GPP_C4/SML0DATA
<35> HOST_SPI_0_CS2# HOST_SPI_0_CS2# AU1 SPI0_CS1# W1 SML0ALERT#
SPI0_CS2# GPP_C5/SML0ALERT#

2
D W3 SML1CLK SML1 D
SPI - TOUCH GPP_C6/SML1CLK SML1DATA
V3
GPP_C7/SML1DATA 2 SML1ALERT# (Link to EC,DGPU, LAN, Thermal Sensor)
AM7 GPP_B23 1
GPP_B23/SML1ALERT#/PCHHOT# RC902 @ +3V_PRIM
0_0201_5%
SML1ALERT# RC903 2 @ 1 150K_0402_1%

TP_SMBDATA <34>
1 2
CC9 QC7B SB00001FF00
10P_0402_50V8J L2N7002SDW1T1G 2N SC88-6 Follow 543016_SKL_U_Y_PDG_0_9
@EMI@

EON SA000046400 S IC FL 64M EN25Q64-104HIP SOP 8P MXIC

SA00006N100 S IC FL 64M MX25L6473EM2I-10G SOP 8P
WINBOND SA000039A30 S IC FL 64M W25Q64FVSSIQ SOIC 8P SPI ROM
Micron SA00005L100 S IC FL 64M N25Q064A13ESEC0F SO8W 8P
A A

Security Classification
2017/04/10
Compal Secret Data
2019/12/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
SKL-U(3/12)SPI,ESPI,SMB,LPC
T HIS SH EET O F EN G IN EER IN G D R AW IN G IS T H E PR O PR IET AR Y PR O PER T Y O F C O MPAL ELEC T R O N IC S, INC. AN D CONT AINS CONFIDENTSSIAizLe Document Number
AN D T R AD E SEC R ET IN F O R MAT IO N . T HIS SH EET MAY N O T BE T R AN SF ER ED F R O M T H E C U ST O D Y O F T H E C O MPET EN T DIVISION O F R &D Rev
D EPAR T MEN T EXC EPT AS AU T H O R IZ ED BY C O MPAL ELEC T R O N IC S, INC. NEIT HER T HIS SH EET N O R T H E IN F O R MAT IO N IT CONT AINS Custom
MAY BE U SED BY O R DISCLO S ED T O AN Y T H IR D PAR T Y W IT H O UT PR IO R W R IT T EN C O N SEN T O F C O MPAL ELEC T R O N IC S, INC.
LA-G07EP(KBL-U_UMA_6L) v0.3

Date: Friday, January 05, 2018 Sheet 7 of 59

5 4 3 2 1
 5 4 3 2 1

2
CC183 22P 50V J NPO 0402
SKL_ULT
EMI request UC1I
Rev_0.53
KBLR@ RC919 SKYL@ RC916
10K_0402_5% 10K_0402_5%
CSI-2

1
PLAT_SEL0
PLAT_SEL1
B B

2
KBLU@ RC918 KBLU@ RC917
10K_0402_5% 10K_0402_5%
PLAT_SEL1

1
KBLR@
RC917

10K_0402_5%
SD028100280

Security Classification
2017/04/10
Compal Secret Data
2019/12/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
SKL-U(4/12)HDA,EMMC,SDIO,CSI2
THIS SHEET O F ENG INEERING DRAW ING IS T HE PRO PRIET ARY PRO PERT Y O F COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocumentNumber
AND T RADE SECRET INFORMAT IO N. THIS SHEET MAY NO T BE T RANSFERED FRO M T HE CUST ODY O F T HE COMPET ENT DIVISION O F R&D
Rev
DEPARTMENT EXCEPT AS AUT HO RIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS Custom
MAY BE USED BY O R DISCLOSED T O ANY THIRD PART Y W IT HO UT PRIO R W RIT T EN CONSENT O F COMPAL ELECTRONICS, INC. LA-G07EP(KBL-U_UMA_6L) v0.3

Date: Friday, January 05, 2018 Sheet 8 of 59

5 4 3 2 1
 5 4 3 2 1

+RTCVCC

RC91 1 2 20K_0402_5% PCH_SRTCRST#

CC10 1 2 1U_0402_6.3V6K

CLRP1 1 2 SHORT PADS CLR ME UC1J SKL_ULT

Rev_0.53
CLOCK SIGNALS
RC93 1 2 20K_0402_5% PCH_RTCRST#

CC11 1 2 1U_0402_6.3V6K
CLKREQ_PEG#0
CLRP2 1 2 SHORT PADS CLR CMOS
CLK_PCIE_N1
<29> CLK_PCIE_N1
LAN CLK_PCIE_P1 F43
D <29> CLK_PCIE_P1 CLKOUT_ITPXDP_N D
RC941 2 1M_0402_5% SM_INTRUDER# CLKREQ_PCIE#1 E43
<29> CLKREQ_PCIE#1 CLKOUT_ITPXDP_P
CLK_PCIE_N2 BA17 SUSCLK
<30> CLK_PCIE_N2 GPD8/SUSCLK SUSCLK <30>
PCH_RTCRST# 2 1 CLK_PCIE_P2
0_0402_5% R1088
CLR_CMOS# <33> W LAN <30> CLK_PCIE_P2
CLKREQ_PCIE#2 PCH_KBLU24_IN
<30> CLKREQ_PCIE#2 E37
PCH_SRTCRST# 2 1 XTAL24_IN PCH_KBLU24_OUT
E35

1
XTAL24_OUT
0_0402_5% R1089 Clear CMOS close to RAM door
@ E42 XCLK_BIASREF RC96 1 2 2.7K_0402_1% +1.0V_CLK5_F24NS
XCLK_BIASREF
JCMOS1 CLKREQ_PCIE#3
0_0603_5% AM18 PCH_RTCX1
2

RTCX1
CLK_PCIE_N4 AM20 PCH_RTCX2
<31> CLK_PCIE_N4 RTCX2
PCIe SSD CLK_PCIE_P4
<31> CLK_PCIE_P4
CLKREQ_PCIE#4 AN18 PCH_SRTCRST#
+3VS <31> CLKREQ_PCIE#4 SRTCRST# AM16 PCH_RTCRST#
RTCRST#

6.8P 50V C NPO 0402

CC16
SE07168AC80

<33> PCH_DPW ROK 2 Rshort@1 PCH_DPW ROK_R

A RC112 0_0402_5% A

From EC(open-drain) +1.0V_VCCST

1

RC113

Compal Electronics, Inc.

1K_0402_5%
Security Classification Compal Secret Data
Issued Date 2017/04/10 Deciphered Date 2019/12/15 Title
2

RC1161 2 60.4_0402_1% EC_VCCST_PG

<33,40> EC_VCCST_PG_R
TH IS S H E E T O F E N G I N E E R I N G D R A W IN G IS T H E P R O P R I E T A R Y P R O P E R T Y O F C O M P A L E L E C TR O N IC S , IN C . A N D C O N TA IN S CONFIDENT I A L
SKL-U(5/12)CLK,GPIO
S i ze Document Number Rev
A N D T R A D E S E C R E T IN F O R M A T I O N . TH IS S H E E T M A Y N O T B E T R A N S F E R E D F R O M T H E C U S T O D Y O F T H E C O M P E T E N T D IV IS IO N O F R & D

M A Y B E U S E D B Y O R D IS C L O S E D T O A N Y TH IR D P A R T Y W I T H O U T P R I O R W R I T T E N C O N S E N T O F C O M P A L E L E C TR O N IC S , IN C . LA-G07EP(KBL-U_UMA_6L)
D E P A R TM E N T E X C E P T A S A U T H O R I Z E D B Y C O M P A L E L E C TR O N IC S , IN C . N E ITH E R TH IS S H E E T N O R T H E I N F O R M A T I O N IT C O N TA IN S Custom v0.3

Date: Friday, January 05, 2018 Sheet 9 of 59

5 4 3 2 1
 5 4 3 2 1

UC1F SKL-U +3VS

Rev_0.53
LPSS ISH

DGPU_PW R_EN RC382 1 210K_0402_5%

+3V_PRIM

RPC14
1 8
W L_OFF# 2 7
SOC_GPIOB21 3 6
NMI_DBG#_CPU 4 5
<5,33> NMI_DBG#_CPU
10K_0804_8P4R_5%

+3VS

DGPU_HOLD_RST# RC923 1 @ 210K_0402_5%

1

ODD_PW R RC929 1 210K_0402_5%

2

ODD_DA# RC930 1 210K_0402_5%

1
CC127
0.1U_0201_10V6K
2

<DB> Change Thermal Sensor IC

GSPI0_MOSI (Internal Pull Down):

No Reboot

0 = Disable No Reboot mode. --> AAX05 Use

1 = Enable No Reboot Mode. (PCH will disable the TCO

Timer system reboot feature). This f unction is usef ul
when running ITP/XDP.

B B
GSPI1_MOSI (Internal Pull Down):

Boot BIOS Strap Bit

0 = SPI Mode --> AAX05 Use

1 = LPC Mode

A A

Security Classification
2017/04/10
Compal Secret Data
2019/12/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
TH IS S H E E T O F E N G I N E E R I N G D R A W IN G IS T H E P R O P R I E T A R Y P R O P E R T Y O F C O M P A L E L E C TR O N IC S , IN C . A N D C O N TA IN S CONFIDENT I A L
SKL-U(6/12)GPIO
S ii zee Document Number Rev
A N D T R A D E S E C R E T IN F O R M A T I O N . TH IS S H E E T M A Y N O T B E T R A N S F E R E D F R O M T H E C U S T O D Y O F T H E C O M P E T E N T D IV IS IO N O F R & D
D E P A R TM E N T E X C E P T A S A U T H O R I Z E D B Y C O M P A L E L E C TR O N IC S , IN C . N E ITH E R TH IS S H E E T N O R T H E I N F O R M A T I O N IT C O N TA IN S Custom
M A Y B E U S E D B Y O R D IS C L O S E D T O A N Y TH IR D P A R T Y W I T H O U T P R I O R W R I T T E N C O N S E N T O F C O M P A L E L E C TR O N IC S , IN C . LA-G07EP(KBL-U_UMA_6L) v0.3

Date: Friday, January 05, 2018 Sheet 10 of 59

5 4 3 2 1
 5 4 3 2 1

UC1H SKL-U
Rev_0.53

SSIC / USB3
PCIE/USB3/SATA
USB3_CRX_DTX_N1 <38>
USB3_CRX_DTX_P1 <38>
USB3_CTX_DRX_N1 <38> USB2.0/USB3.0
USB3_CTX_DRX_P1 <38>
USB3_CRX_DTX_N2 <38>
USB3_CRX_DTX_P2 <38>
D USB3_CTX_DRX_N2 <38> USB2.0/USB3.0 D
USB3_CTX_DRX_P2 <38>

M.2 SSD

+3VS

When PCIE8/SATA1A is used 1

RPC13
8
SATA_LED#
as SATA Port 1 (ODD), then SATA_GP0 2 7
PCIE11/SATA1B (M.2 SSD) SSD1_IF 3 6
cannot be used as SATA ODD_PLUG# 4 5
Port 1. USB_OC2# N/A
10K_0804_8P4R_5%
USB_OC3# N/A +3V_PRIM
N/A
DEVSLP0 RPC20
N/A USB_OC1# 1 8
DEVSLP1 USB_OC3# 2 7
USB_OC0# 3 6
DEVSLP2 NGFF SSD KEY- M USB_OC2# 4 5

10K_0804_8P4R_5%
SATA_GP0 N/A
A A
SATA_GP1 ODD_PLUG#

SATA_GP2 PCIE/SATA

Security Classification
2017/04/10
Compal Secret Data
2019/12/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
SKL-U(7/12)PCIE,USB,SATA
THIS SHEET O F ENG INEERING DRAW ING IS T HE PRO PRIET ARY PRO PERT Y O F COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocumentNumber
AND T RADE SECRET INFORMAT IO N. THIS SHEET MAY NO T BE T RANSFERED FRO M T HE CUST ODY O F T HE COMPET ENT DIVISION O F R&D
Rev
DEPARTMENT EXCEPT AS AUT HO RIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS Custom
MAY BE USED BY O R DISCLOSED T O ANY THIRD PART Y W IT HO UT PRIO R W RIT T EN CONSENT O F COMPAL ELECTRONICS, INC. LA-G07EP(KBL-U_UMA_6L) v0.3

Date: Friday, January 05, 2018 Sheet 11 of 59

5 4 3 2 1
 5 4 3 2 1

D D

UC1S SKL-U
Rev_0.53
RESERVED SIGNALS-1

E68 BB68
CFG[0] RSVD_TP_BB68
B67 BB69
CFG[1] RSVD_TP_BB69
D65
CFG[2]
<5> CFG3 D67 AK13 T158 TP@
CFG4 E70 CFG[3] RSVD_TP_AK13
AK12 T159 TP@
CFG[4] RSVD_TP_AK12
C68
CFG[5]
D68 BB2
CFG[6] RSVD_BB2
C67 BA3
CFG[7] RSVD_BA3
F71
CFG[8]
G69
CFG[9]
T162 TP@

<DB> Add ball E3/C7 for KBL U/R Colay

UC1T SKL-U
Rev_0.53
SPARE

AW69 F6
AW68 RSVD_AW69 RSVD_F6 E3 PCH_KBLR24_IN
AU56 RSVD_AW68 RSVD_E3 C11
AW48 RSVD_AU56 RSVD_C11 B11
PCH_KBLR24_OUT C7 RSVD_AW48 RSVD_B11 A11
U12 RSVD_C7 RSVD_A11 D12
U11 RSVD_U12 RSVD_D12 C12
H11 RSVD_U11 RSVD_C12 F52
RSVD_H11 RSVD_F52
20 OF20

SKL-U_BGA1356

PCH_KBLR24_IN RX3 2 KBLR@ 1 33_0402_1%PCH_XTAL24R_IN

RX4 2 KBLR@ 1 33_0402_1% PCH_XTAL24R_OUT 1 KBLR@ 2

RC915 1M_0402_5%

KBLR@
YC3 SJ10000UJ00
24MHZ 18PF XRCGB24M000F2P51R0
J71 AY71 1 RC183 2 0_0402_5%
VSS_AY71
J68 RSVD_J71 AR56 PM_ZVM# T225 TP@ 3 1
RSVD_J68 ZVM# 3 1
B
F65
For 2+3e Solution NC NC
B
AW71

27P_0402_50V8J

27P_0402_50V8J
KBLR@ KBLR@
G65 VSS_F65 RSVD_TP_AW71 AW70 PM_ZVM# CC168 CC169
VSS_G65 RSVD_TP_AW70 PM_MSM# 4 2
SI 1/15 F61 AP56 PM_MSM# T230 TP@ +1.0V_VCCST
RSVD_F61 MSM#
E61 C64 SKL_CNL#
RSVD_E61 PROC_SELECT#
19 OF 20 1@ 2
RC184 100K_0402_5%
SKL-U_BGA1356
Follow 544669_SKL_U_DDR3L_RVP7_schematic_rev1.0 24MHz Part:
Main:SJ10000X700, S CRYSTAL 24MHZ 18PF +-20PPM
8Y24000033(TXC)
2nd: SJ10000TK00, S CRYSTAL 24MHZ 18PF +-20PPM
7M24000027(TXC)

CFG_RCOMP 1 2
RC185 49.9_0402_1%

CFG4 1 2
RC193 1K_0402_1%

A A

Display Port Presence Strap

1 : Disabled; No Physical Display Port

CFG4 attached to Embedded Display Port Security Classification
2017/04/10
Compal Secret Data
2019/12/15 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
0 : Enabled; An external Display Port device is SKL-U(12/12)RSVD
connected to the Embedded Display Port THIS SHEET O F ENG INEERING DRAW ING IS T HE PRO PRIET ARY PRO PERT Y O F COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocumentNumber
AND T RADE SECRET INFORMAT IO N. THIS SHEET MAY NO T BE T RANSFERED FRO M T HE CUST ODY O F T HE COMPET ENT DIVISION O F R&D Rev
DEPARTMENT EXCEPT AS AUT HO RIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS Custom
MAY BE USED BY O R DISCLOSED T O ANY THIRD PART Y W IT HO UT PRIO R W RIT T EN CONSENT O F COMPAL ELECTRONICS, INC. LA-G07EP(KBL-U_UMA_6L) v0.3

Date: Friday, January 05, 2018 Sheet 16 of 59

5 4 3 2 1
 <7,13,29,30,33,35,40,48,49,50,51> +3VALW +3VALW

<12,37,38,39,40,48,49,52,53> +5VALW +5VALW

TP Button BD Connector
+3VALW
<33> KSI[0..7]
KSI7
KSI6
Keyboard conn
KSI5
KSI4
<33> TP_CLK
KSI3 CONN@
<33> TP_DATA KSI2 JKB
KSI1 KSI1 32 34
<7> TP_SMBCLK KSI0 32 G2
<7> TP_SMBDATA KSI7 31 33
31 G1
KSI6 30
30
PS2+SMBus KSO9 29
28
29
KSI4 28
<33> KSO[0..17] KSI5 27
27

3
KSO17 KSO0 26
26
KSO16 JKB1 KB Spec KSI2 25
KSO15 25
KSI3 24
KSO14 24
Pin1 KSI1 KSI1 KSO5 23
23
KSO13 KSO1 22
KSO12 22
Pin32 5V 5V KSI0 21
21
KSO11 KSO2 20
KSO10 20
KSO4 19
KSO9 19
KSO8
KSO7
KSO6
KSO5
KSO4 KSO13 13
KSO3 13
KSO14 12
KSO2 12
KSO11 11
KSO1 11
KSO10 10
KSO0 10
KSO15 9
9
KSO16 8
8
KSO17 7
7
6
56
MUTE_LED_OUT_R 4 5
+5VALW +5VS 4
3
3
2
2
1
1
1

R23 ACES_50690-0320N-P01
100K_0402_5% SP01001RG00
Q9 +5VS_KBL
3

S
2

G
2
<33> KBL_ON# ESD@
ACES_51575-00401-001 KSI0 C193 2 1 100P_0402_50V8J
D 1 1
1

4 6
4 G2
PJ2301 1P SOT23-3 3 5 CC122 CC123
3 G1
2
SB00000T900 2 2 100P_0402_50V8J 2 100P_0402_50V8J
ESD@ ESD@

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/08/24 Deciphered Date 2018/08/24 Title

THIS SHEET O F ENG INEERING DRAW ING IS T HE PRO PRIET ARY PRO PERT Y O F CO MPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocumentNumber
KB/TP
AND T RADE SECRET INFORMAT IO N. THIS SHEET MAY NO T BE T RANSFERED FRO M T HE CUST ODY O F T HE COMPET ENT DIVISION O F R&D
Rev
DEPARTMENT EXCEPT AS AUT HO RIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS Custom v0.3
MAY BE USED BY O R DISCLOSED T O ANY THIRD PART Y W IT HO UT PRIO R W RIT T EN CONSENT O F COMPAL ELECTRONICS, INC. LA-G07EP(KBL-U_UMA_6L)
Date: Friday, January 05, 2018 Sheet 34 of 59
 5 4 3 2 1

+3VALW +3VALW <7,13,29,30,33,34,40,48,49,50,51>

D Screw Hole D

TPM2.0 UT1
+3VS_TPM +3VALW
H1 H2
H_2P4N H_3P0
H4
H_3P0
CPU
H8 H9 H10 H11 H_5P0
H_5P0 H_5P0H_5P0
TPM@
<9,29,30,31,33> PLT_RST# 1 TPM@ 2 PLT_RST#_TPM 17 1 RC9341 2 0_0402_5%
RST# VDD
R28 0_0402_5% 8 @ @ @ @ @ @ @

1
VDD

1
1 TPM@ 2 TPM_SERIRQ 18 22 1 1 1 1
<7,33> SERIRQ PIRQ# VDD
R5202 0_0402_5% CT1 CT3 CT4 CT2
<7,33> HOST_SPI_0_CLK_R RT6 1 2 HOST_SPI_0_CLK_R_TPM 19 3
SCLK NC
TPM@ 33_0402_5% 4

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1U_0402_6.3V6K
NC 2 2 2 2
RT7 1 2 HOST_SPI_0_CS2#_TPM 20 5
<7> HOST_SPI_0_CS2# CS# NC
TPM@ 33_0402_5% 10
NC
RT8 1 2 HOST_SPI_0_SI_TPM 21 11
<7> HOST_SPI_0_SI MOSI NC
TPM@ 33_0402_5% 12 TPM@ TPM@ TPM@ TPM@ H13 H14 H16 H17 H18 H19
NC
RT9 1 2 HOST_SPI_0_SO_TPM 24 13 H_2P3 H_3P3 H_2P3 H_2P4X2P9N H_6P0N H_6P0N
<7> HOST_SPI_0_SO MISO NC
TPM@ 33_0402_5% 14
NC
+3VS_TPM 2 1 TPM_GPIO 6 15
GPIO NC
RT10 TPM@ 4.7K_0402_5% 16 @ @ @ @ @ @

1
NC

1
1 @ 2 TPM_PP 7 25
PP NC
RT35 4.7K_0402_5% 26
NC
2
9 GND
23 GND
1

RT12 32 GND
4.7K_0402_5% 33 GND FD1 FD2 FD3 FD4
PAD
TPM@
TPM@
2

SLB9670VQ1.2 FW6.40_VQFN32_5X5 @ @ @ @

1
SA00009N230
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80

JESD JUMP@
1 2
1 2
J UMP_43X39

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/08/24 Deciphered Date 2018/08/24 Title

THIS SHEET O F ENG INEERING DRAW ING IS T HE PRO PRIET ARY PRO PERT Y O F COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocumentNumber
TPM/Screw
AND T RADE SECRET INFORMAT IO N. THIS SHEET MAY NO T BE T RANSFERED FRO M T HE CUST ODY O F T HE COMPET ENT DIVISION O F R&D
Rev
v0.3
DEPARTMENT EXCEPT AS AUT HO RIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS
MAY BE USED BY O R DISCLOSED T O ANY THIRD PART Y W IT HO UT PRIO R W RIT T EN CONSENT O F COMPAL ELECTRONICS, INC. LA-G07EP(KBL-U_UMA_6L)
Date: Friday, January 05, 2018 Sheet 35 of 59
5 4 3 2 1
 A B C D E

+5VS

+3VS
R5177
1 Rshort@2 L Layout notes
C4801 C5214 close to CONN
CONN@

1
JFAN
0_0603_5% 6
10U_0603_10V6M GND2
C4801

0.1U_0402_16V7K
C5214
1

2
Close to Connector <33> FAN_SPEED1
2 1

+FAN1

RE51
1 @ 2 EC_FAN_PWM1

10K_0402_5%

2 2

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/08/24 2018/08/24 Title
Deciphered Date
FAN
THIS SHEET O F ENG INEERING DRAW ING IS T HE PRO PRIET ARY PRO PERT Y O F COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocumentNumber
AND T RADE SECRET INFORMAT IO N. THIS SHEET MAY NO T BE T RANSFERED FRO M T HE CUST ODY O F T HE COMPET ENT DIVISION O F R&D
Rev
DEPARTMENT EXCEPT AS AUT HO RIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS Custom v0.3
MAY BE USED BY O R DISCLOSED T O ANY THIRD PART Y W IT HO UT PRIO R W RIT T EN CONSENT O F COMPAL ELECTRONICS, INC. LA-G07EP(KBL-U_UMA_6L)
Date: Friday, January 05, 2018 Sheet 36 of 59
A B C D E
 5 4 3 2 1

<27,28,32,33,34,36,40> +5VS +5VS

2.5" SATA HDD <12,34,38,39,40,48,49,52,53> +5VALW

<7,13,29,30,33,34,35,40,48,49,50,51> +3VALW
+5VALW

+3VALW

D D

<PV> change short pad

CONN@
+5VS JHDD
1
2 1
3 2
4 3
5 4
6 5
7 6
8 7
8
9
GND
10
GND
ACES_51524-00801-001
SP01001A910

C C

SATA ODD
+5VALW
1

ROD1
100K_0402_5%
2

JODD
1

D +5VS_ODD
1

S1
QOD2 S2 GND
2 ROD2 <11> SATA_CTX_DRX_P1 SATA_CTX_C_DRX_P1
<10> ODD_PWR G S3 A+
2N7002K_SOT23 1K_0402_5% <11> SATA_CTX_DRX_N1 SATA_CTX_C_DRX_N1
S4 A-
S SB00000EN00 COD1
GND
3

2 1 SATA_CRX_C_DTX_N1 S5
<11> SATA_CRX_DTX_N1
2 2

+5VS_ODD SATA_CRX_C_DTX_P1 S6 B-
<11> SATA_CRX_DTX_P1 S7 B+
0.047U_0402_16V7K
1 Rshort@2 ODD_PLUG#_R GND
G

80mil 3 1
80mil <11> ODD_PLUG# R5192 0_0402_5% 1 Rshort@2ODD_DA#_R R5193
+5VS
0_0402_5% P1
S

DP
1 1 P2
+5V
COD2

QOD1
10U_0603_6.3V6M

P3
PJ2301 1P SOT23-3 P4 +5V
MD
SB00000T900 1 P5 1
2 GND GND
P6 2
ESD@ GND GND
ROD3 0_0805_5% CS7
2 0.1U_0402_16V7K SDAN_603010-013041
SP010029L00
SDAN_603010-013041_13P
CONN@

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/08/24 Deciphered Date 2018/08/24 Title
HDD/ODD Conn
THIS SHEET O F ENG INEERING DRAW ING IS T HE PRO PRIET ARY PRO PERT Y O F COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocumentNumber
AND T RADE SECRET INFORMAT IO N. THIS SHEET MAY NO T BE T RANSFERED FRO M T HE CUST ODY O F T HE COMPET ENT DIVISION O F R&D
Rev
Custom v0.3
DEPARTMENT EXCEPT AS AUT HO RIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS
MAY BE USED BY O R DISCLOSED T O ANY THIRD PART Y W IT HO UT PRIO R W RIT T EN CONSENT O F COMPAL ELECTRONICS, INC. LA-G07EP(KBL-U_UMA_6L)
Date: Friday, January 05, 2018 Sheet 37 of 59
5 4 3 2 1
 A B C D E

RS2 EMI@ 0_0402_5%

2 1 USB3_CTX_C_DRX_N1 1 2 USB3_CTX_L_DRX_N1
<11> USB3_CTX_DRX_N1 <12,24,34,37,39,40,48,49,52,53> +5VALW +5VALW
CS2 0.1U_0402_16V7K

2
RG75
@ 150_0402_5% +USB_VCCA
+5VALW
US1 W =100mils

1
W =100mils 1
5 OUT
RS1 EMI@ 0_0402_5%

150U_B2_6.3VM_R45M
1 IN
2 1 USB3_CTX_C_DRX_P1 1 2 USB3_CTX_L_DRX_P1 2

1000P_0402_50V7K
<11> USB3_CTX_DRX_P1 GND 1

47U_0805_6.3V6M
0.1U_0402_16V7K
CS1 0.1U_0402_16V7K CS3 4 @
EN 1 1 1 +

CS6
3

CS22
0.1U_0402_16V7K OCB CS5
2 CS4 CS28

2 1
RS6 EMI@ 0_0402_5% 1 EMI@ 390P_0402_50V7K
2 USB3_CRX_L_DTX_N1 EM5203J-20 SOT23 5P LOAD SW ITCH 2 2 2 2 EMI@
<11> USB3_CRX_DTX_N1
SA00008RA00
1 1

2
RG76 USB_ON# 1 2
<33,39> USB_ON#
@ 150_0402_5% RS4 Rshort@ 0_0402_5%

1
RS3 EMI@ 0_0402_5% 1
2 USB3_CRX_L_DTX_P1
<11> USB3_CRX_DTX_P1

RS47

0_0201_5%

<11> USB20_P1

<11> USB20_N1
LM3
EMI@
RS48

0_0201_5%
USB2.0 Choke Part:

USB20_N2_R 2
USB20_P2_R D-
RG106
@ 150_0402_5% 4
USB3_CRX_L_DTX_N2 GND1
5
USB3_CRX_L_DTX_P2 SSRX- 10
6
SSRX+ GND3
7 11
USB3_CTX_L_DRX_N2 GND2 GND4
RS7 EMI@ 0_0402_5% 1 8 12
2 1 USB3_CTX_C_DRX_P2 2 USB3_CTX_L_DRX_P2 USB3_CTX_L_DRX_P2 SSTX- GND5
<11> USB3_CTX_DRX_P2 9 13
CS24 SSTX+ GND6
0.1U_0402_16V7K
ACON_TARAW -9U1395_9P-T
DC231709285
RS10 EMI@ 0_0402_5% 1
CONN@
3 2 USB3_CRX_L_DTX_N2 3
<11> USB3_CRX_DTX_N2 DM14 ESD@
USB3_CRX_L_DTX_N2 1 1 10 9 USB3_CRX_L_DTX_N2

USB3_CRX_L_DTX_P2 2 2 9 8 USB3_CRX_L_DTX_P2
2

RG107
@ 150_0402_5% USB3_CTX_L_DRX_N2 4 4 7 7 USB3_CTX_L_DRX_N2

USB3_CTX_L_DRX_P2 5 5 6 6 USB3_CTX_L_DRX_P2
1

RS9 EMI@ 0_0402_5% 1 3 3

2 USB3_CRX_L_DTX_P2
<11> USB3_CRX_DTX_P2 8

DT1140-04LP-7 U-DFN2510-10
SC300005M00
USB3.0 ESD Part:
Main:SC300005M00, S DIO(BR) DT1140-04LP-7 U-DFN2510-10(DIODES ))
2nd: SC300003Z00, S DIO(BR) PUSB3F96 DFN2510A-10 ESD(NXP)
3rd:SC300005N00, S DIO(BR) L02U5V0NA-4C SLP2510P8(LITEON)

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/08/24 Deciphered Date 2018/08/24 Title

THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT I A L
USB 3.0/2.0 conn
Sii zee Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom v0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-G07EP(KBL-U_UMA_6L)
Date: Tuesday, January 09, 2018 Sheet 38 of 59
A B C D E
 A B C D E

+3V_LID
+3VL <13,33,46,47,48> +3VL +3VL

Power Button Switch <12,24,34,37,38,40,48,49,52,53> +5VALW +5VALW

1
R215 +3VS
<6,7,9,10,11,13,17,18,19,22,23,24,27,28,29,30,31,32,33,36,40,52,55> +3VS

2
100K_0402_5% SW1 SN10000CU00
Q4108

G
SW TJG-533KQRH SPST DIP H1.55 6P <7,13,29,30,33,34,35,40,48,49,50,51,55> +3VALW +3VALW

2
<33> ON/OFF# ON/OFF# 1 3 ON/OFF#_R 1 3

S
2 4
2N7002K_SOT23-3
SB00000EN00 @

6
5
L Layout notes JP6
IO BD Connector ( USB2.0,Card reader,HDD & PWR LED )

1 2
JP6 place Bottom layer SHORT PADS
EMI@ C139 470P_0402_50V8J
1 1
1 2
CONN@
JIO
1
ESD Diode +5VALW
2
3
1
2
LID_SW# 4 3
5 4
ON/OFF#_R 6 5
+3VS 6
7
7
3

USB20_N4_R 8
USB20_P4_R 9 8
Card reader 10 9
ESD@
D1 USB20_N3_R 11 10
SCA00001B00 USB20_P3_R 12 11
AZ5123-02S.R7G 3P CASOT23
USB2.0 ( on small BD) 13 12
<33,38> USB_ON# 13
14
15 14
<11> SATA_LED# 15
16
<33> PWR_LED#
1

17 16
18 17
1 1 18
EMI@ EMI@
C138 C137 19
G1 20
2 2 G2
Lid Switch (Hall Effect Sensor)

470P_0402_50V8J

470P_0402_50V8J
CVILU_CF31181D0R4-10-NH
SP011411241

+3V_LID
+3VL +3V_LID

DH2 R126
4.7K_0402_5% RS51 @EMI@
1 2
0_0201_5%

+3V_LID

U4019
LID_SW#_OUT

2 1 R124
10K_0402_5%
DB@

DH3 DB@ RB751V-

40 SOD-323
2 1
+3V_SMBUS

DH4
RB751V-4 0 SOD-323

2 1
<33,48> EC_ON
DH5
RB751V-40 SOD-323

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/08/24 Deciphered Date 2018/08/24 Title
IO CON
TH IS S H E E T O F E N G IN E E R IN G D R A W IN G IS TH E P R O P R IE TA R Y P R O P E R TY O F C O M P A L E L E C TR O N IC S , INC. A N D C O N TA IN S C O N F ID E N TI A L
A N D TR A D E S E C R E T IN F O R M A TIO N . TH IS S H E E T M A Y N O T B E TR A N S F E R E D F R O M TH E C U S TO D Y O F TH E C O M P E TE N T DIVISION O F R &SSDiz e Document Number Rev
D E P A R TM E N T E X C E P T A S A U TH O R IZ E D B Y C O M P A L E L E C TR O N IC S , INC. N E ITH E R TH IS S H E E T N O R TH E IN F O R M A TIO N IT C O N TA IN S Custom v0.3
M A Y B E U S E D B Y O R D IS C L O S ED TO A N Y TH IR D P A R TY W ITH O U T P R IO R W R ITTE N C O N S E N T O F C O M P A L E L E C TR O N IC S , INC. LA-G07EP(KBL-U_UMA_6L)
Date: Tuesday, January 09, 2018 Sheet 39 of 59
A B C D E
 A B C D E

+3VS +3VS <6,7,9,10,11,13,17,18,27,28,29,30,31,32,33,36,39,52>

+5VS +5VS <27,28,32,33,34,36,37>

+3VS

VR_ON <33,52>

EC_VCCST_PG_R <9,33>

SUSP#

SYSON <12,33,49>

3
@ Q5003B
L2N7002SDW1T1G 2N SC88-6
5 SB00001FF00
<9,12,33,49> PM_SLP_S4#
6

4
Q5001A
2 L2N7002SDW1T1G 2N SC88-6
3 <33,51> PCH_PWR_EN SB00001FF00 3
1

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2017/08/24 Deciphered Date 2018/08/24 Title

THIS SHEET O F ENG INEERING DRAW ING IS T HE PRO PRIET ARY PRO PERT Y O F COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocumentNumber
DC Interface
AND T RADE SECRET INFORMAT IO N. THIS SHEET MAY NO T BE T RANSFERED FRO M T HE CUST ODY O F T HE COMPET ENT DIVISION O F R&D
Rev
DEPARTMENT EXCEPT AS AUT HO RIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS Custom v0.3
MAY BE USED BY O R DISCLOSED T O ANY THIRD PART Y W IT HO UT PRIO R W RIT T EN CONSENT O F COMPAL ELECTRONICS, INC. LA-G07EP(KBL-U_UMA_6L)
Date: Friday, January 05, 2018 Sheet 40 of 59
A B C D E
 5 4 3 2 1

+19V_ADPIN EMIVGA@ PL12

+19V_VIN
5A_Z80_0805_2P
1 2

@ PJP1 EMI@ PL11

D ACES_51483-00801-001 5A_Z80_08 05_2 D
1 P @ PR1
2 0_0402_5%
1 2 ACIN_LED
<33> AC_LED#

1000P_0402_50V7K
100P_0402_50V8J

EMI@ PC4
EMI@ PC3

1
1

1
PR2

2
100K_0402_5%

2
PR4
750_0402_1%
ADP_ID <33> 1 2 Charge_LED
<33> BAT_CHG_LED

LUDZS3.6BT1G_SOD323-2

1
1000P_0402_50V7K
PR6

100P_0402_50V8J
100K_0402_5%

1
1

10K_0402_5%

2
PC6
PR5

2 1

2 1
@ PC5
PD3
ESD@ PD1 ESD@ PD2

2
L30ESD24VC3-2_SOT23-3 L30ESD24VC3-2_SOT23-3
1

1
C C

+3VALW_EC

1
PR9
16.2K_0402_1%

1 2
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2016/09/01 2019/09/01 Title
Deciphered Date
DC Conn
THIS SHEET O F ENG INEERING DRAW ING IS T HE PRO PRIET ARY PRO PERT Y O F COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENSSTiIzAeLDocumentNumber
AND T RADE SECRET INFORMAT IO N. THIS SHEET MAY NO T BE T RANSFERED FRO M T HE CUST ODY O F T HE COMPET ENT DIVISION O F R&D
Rev
DEPARTMENT EXCEPT AS AUT HO RIZED BY CO MPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMAT ION IT CONTAINS LA-G07EP(KBL-U_UMA_6L) v0.3
MAY BE USED BY O R DISCLOSED T O ANY THIRD PART Y W IT HO UT PRIO R W RIT T EN CONSENT O F COMPAL ELECTRONICS, INC.
Date: Friday, January 05, 2018 Sheet 45 of 59
5 4 3 2 1
 5 4 3 2 1

D D

+3V_LID

@ PR18
0_0402_5% EMI@ PL13
1 2 5A_Z80_0805_2P
1 2 +12.6V_BATT +3V_LID +19VB
OCTEK_BTJ-08KPBR4B
+12.6V_BATT+
EMI@ PL14
5A_Z80_0805_2P
1 2
EC_SMB_CK1_R

100P_0402_50V8J

0.01U_0402_50V7K

1
PC9
EC_SMB_DA1_R

1.8K +-1%0805
@EMI@ PC10
+3V_LID_R EMI@ PC8 @EMI@ PR20

EMI@
B/I#_R 1000P_0402_50V7K PC11 470K_0402_5%

2 1

2 1
21

21

PR19
100P_0402_50V8J

2
2
@ PJPB1

PR14
100_0402_5%
1 2
EC_SMB_CK1 <33,47>

1M_0402_5%
+3VL 5

1
PR21
PQ2B
L2N7002SDW1T1G 2N SC88-6 @

5 2
 A C D

Protection for reverse input

1
D
2
G @

CHG_N002
S

3
PRB2 @ @ PRB3
1M_0402_5% 3M_0402_5%
1 2 1 2

+19V_VIN
PQB11
P1
PQB13
EMB04N03H_EDFN5X6-8-5 AON7506_DFN33-8-5
1
2 1
5 3 2
5 3

0.1U_0402_25V6

PCB25
10U_0805_25V6K
2200P_0402_50V7K

2200P_0402_50V7K

21
PCB7
10U_0805_25V6K

0.01U_0402_50V7K
@EMI@ PCB8
PCB4

PCB5

4
21
4

PCB9
21

21

2 1
ACDRV_CHG_R
BATDRV_CHG 1 2 BATDRV_CHG_R

PRB5
4.12K_0603_1%
PQB1
AONH36334_DFN3X3A8-10

10
5 4

D1
S2 D1
3
6 S2 D1
2
7 S2 D1
+12.6V_BATT

D2/S1
1 UG_CHG
4.12K_0603_1%

8 G2 G1
1
PRB9

12 PLB1 PRB11

9
4.7UH_5.5A_20%_7X7X3_M 0.01_1206_1%
1U_0603_25V6K 1 2

18 UG_CHG
ACP_CHG

ACN_CHG

19 LX_CHG
LX_CHG 1 2 CHG 1 4
2
2
1

PCB14
2 3

16
1U_0603_25V6K

17
20

1
BTST
HIDRV
VCC

PHASE

REGN

10U_0805_25V6K

10U_0805_25V6K
21

EMI@PRB12
4.7_1206_5%
PAD

0.1U_0402_25V6

0.1U_0402_25V6

PCB15

PCB16
15 LG_CHG

2 1 SRN_R
2 1 SRP_R
LODRV

PCB17

PCB18
2

2 1
21
14
GND PRB13
10_0603_1%
CMSRC_CHG 13 SRP1 2 SRP_R
SRP

ILIM_CHG 1 2
IOUT_CHG
ACDET_CHG

SDA_CHG

SCL_CHG
PRB16

100K_0402_1%
453K_0402_1%

1
PRB20

1
PRB17
422K_0402_1% PCB21
1 2 0.01U_0402_50V7K
+19V_VIN
2
2
0_0402_5% PRB19
0_0402_5% PRB18

1
1

2
2

EC_SMB_CK1 <33,46>
0.22U_0402_16V7K

@
100P_0402_50V8
66.5K_0402_1%

PCB23
PRB21
PCB22

EC_SMB_DA1 <33,46>
2 1

2 1

@ PRB22
2
1

0_0402_5%
1 2
ADP_I <33,45>
J

PCB24
4 4
0.1U_0402_25V6
Vin Dectector
2

Min. Typ Max.

L-->H 17.16V 17.63V 18.12V Close EC chip
H-->L 16.76V 17.22V 17.70V
Security Classification Compal Secret Data Compal Electronics, Inc.
VILIM = 20*ILIM*Rsr Issued Date 2016/09/01 Deciphered Date 2019/09/01 Title
ILIM = 3.3*100/(100+620)/20/0.02
T H IS S H E E T O F E N G I N E E R I N G D R A W I N G IS T H E P R O P R I E T A R Y P R O P E R T Y O F C O MP A L E L E C T R O N IC S , IN C . A N D C O N T AIN S CONFIDEN T I A L
CHARGER
= 2.291 A A N D T R A D E S E C R E T IN F O R MAT IO N . T H IS S H E E T MA Y N O T B E T R A N S F E R E D F R O M T H E C U S T O D Y O F T H E C O MP E T E N T D IVISIO N O F R & D
SS iz e Document Number Rev
D E P A R T ME N T E X C E P T A S A U T H O R I Z E D B Y C O MP A L E L E C T R O N I C S , IN C . N EIT H ER T H IS S H E E T N O R T H E IN F O R MA T IO N IT C O N T AIN S v0.3
MA Y B E U S E D B Y O R D ISC LO S ED T O A N Y T H I R D P A R T Y W I T H O U T P R I O R W R IT T E N C O N S E N T O F C O MP A L E L E C T R O N IC S , IN C .
Date: Friday, January 05, 2018 Sheet 47 of 59
A B C D
 5 4 3 2 1

+19VB EMI@ PL304 PU301 @ PR302 PC302

5A_Z80_0805_2P SY8286BRAC_QFN20_3X3 0_0402_5% 0.1U_0201_10V6K
1 2 +19VB_3V BST_3V 1 2 BST_3V_R 1 2

PL302
1.5UH_6A_20%_5X5X3_M
LX_3V 1 2
+3VALWP

4.7_1206_5%
PR303
@EMI@

1
9 17
+3VLP

2
PG LDO

2
1
@EMI@
3.3V LDO 150mA~300mA

PC311
2
1
<9> SPOK
ENLDO_3V5V PC312 PR305 Fsw : 600K Hz
1000P_0402_50V7K 1K_0402_1%
5V_3V_EN 3V_FB 1 2 3V_FB_1 1 2

@ PJ302
1 2
+3VALWP 1 2 +3VALW
JUMP_43X118

@ PJ303
JUMP_43X39
1 2
+3VLP 1 2 +3VL

+19VB EMI@ PL303 +19VB_5V

5A_Z80_0805_2P
1 2

0.1U_0402_25V6
10U_0805_25V6K

+5VALWP
PC314

PC317
2 1
21

21

1
5V LDO 150mA~300mA

PC324
@EMI@
4.7U_0603_6.3V6M
ENLDO_3V5V

2
PC325
B B
PR301 2 1
2.2K_0402_5% 5V_3V_EN Fsw : 600K Hz
1 2
<33,39> EC_ON @ PR311
0_0402_5%
1 2
<33> MAINPWON PC326 PR312
1000P_0402_50V7K 1K_0402_1%
5V_FB 1 2 5V_FB_1 1 2

5V_3V_EN
@ PJ305
1 2
1M_0402_1%

+5VALWP +5VALW
4.7U_0402_6.3V6M

1 2
PR313 1

JUMP_43X118
PC327
2 1
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2016/09/01 Deciphered Date 2019/09/01 Title

TH IS S H E E T O F E N G I N E E R I N G D R A W I N G IS T H E P R O P R I E T A R Y P R O P E R T Y O F C O M P A L E L E C T R O N I C S , IN C . A N D C O N TA IN S CONFIDENT IA L
3VALW/5VALW
SS iz e Document Number Rev
A N D T R A D E S E C R E T I N F O R M A T I O N . TH IS S H E E T M A Y N O T B E T R A N S F E R E D F R O M T H E C U S T O D Y O F T H E C O M P E T E N T D IV IS IO N O F R & D
D E P A R T M E N T E X C E P T A S A U T H O R I Z E D B Y C O M P A L E L E C T R O N I C S , IN C . N E ITH E R TH IS S H E E T N O R T H E I N F O R M A T I O N IT C O N TA IN S Custom
M A Y B E U S E D B Y O R D IS C L O S E D T O A N Y T H I R D P A R T Y W I T H O U T P R I O R W R I T T E N C O N S E N T O F C O M P A L E L E C T R O N I C S , IN C . LA-G07EP(KBL-U_UMA_6L) v0.3

Date: Friday, J a n u a r y 05, 2 0 1 8 Sheet 48 of 59

5 4 3 2 1
 5 4 3 2 1

D D

EMI@ PLM2
5A_Z80_0805_2P
1 2 +19VB_DDR PRM1
+19VB 2.2_0603_5%
BST_DDR_R 1 2 BST_DDR

10U_0805_25V6K
+1.2VP

2200P_0402_50V7K

PCM2
@EMI@ PCM1
+0.6VSP

2 1
21
PCM4 UG_DDR

2 1
0.1U_0603_25V7K
LX_DDR

10U_0603_6.3V6M

10U_0603_6.3V6M
PCM5

PCM6
18

19

20
PUM1

17

2 1

2 1
G5616BRZ1U_TQFN20_3X3

16

BST

VTT
VLDOIN
LX

DH
21
PAD
LG_DDR 15 1
DL VTTGND

2
4

1
14 2

D1

D1

D1

G1
PLM1 PRM2 PGND VTTSNS
1UH_11A_20%_7X7X3_M 11.5K_0402_1%
1 2LX_DDR 10 9 1 2CS_DDR 13 3
D1 CS
+1.2VP D2/S1 GND
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
1

1
PCM8

PCM9

PCM10

PCM11

PCM12

PCM13
2 1

PRM6

TON_DDR
6.04K_0402_1%

S5_DDR
+1.2VP

S3_DDR
@ PW ROK_DDR PRM7 1 2
PTPM1 470K_0402_1%
@ PJM2 +19VB_DDR 1 2
JUMP_43X118
+1.2VP 1 2 +1.2V_VDDQ @ PRM8

1
12
0_0402_5%
PG_+2.5V 1 2 PRM9
10K_0402_1%

2
12 @
@ PJM3 <12,33,40> SYSON PRM10

0.1U_0402_10V7K
JUMP_43X39 0_0402_5%

PCM17
1 2
+0.6VSP 1 2 +0.6V_0.6VS

2 1
@ Vout=0.75* (1+PRM6/PRM9)=1.2V
@ PRM11
0_0402_5%
1 2
<12,33,40> SUSP#
@ PRM12
0_0402_5%
1 2
<6> SM_PG_CTRL

@ PCM18

2 1
0.1U_0402_10V7K

B B

@ PJ2502
JUMP_43X39
PC2501 1 2
1 2
22U_0603_6.3V6M +2.5VP +2.5V
12
PU2501
@ PJ2501 PL2501
JUMP_43X39 1UH_MHCD252012A-1R0M-A8S_3A_20%
+3VALW 1 2 IN_2.5V 3 LX_2.5V
1 1 2
2 LX +2.5VP

<9,12,33,40> PM_SLP_S4#
.1U_0402_16V7K

SNB_2.5V
PC2502

PR2503 FB_2.5V
1M_0402_1%
2 1

A @ A
1
2

@EMI@ PC2503
2 1

680P_0402_50V7K PRM2507
1

10K_0402_1% Vout=0.6V *(1+PR2506/PR2507)=2.544V

Imax= 2A, Ipeak= 3A
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2016/09/01 Deciphered Date 2019/09/01 Title

T HI S S H E E T O F E NG I NE E R I NG D R AW I NG I S T H E P R O P R I E T AR Y P R O P E R T Y O F C O M P AL E L E C T R O NI C S , I NC . A N D C O NT AI NS CONFIDENTSIiAzLe Document Number

1.2VP/0.6VSP/2.5V
A N D T R A D E S E C R E T I NF O R M AT I O N . T HI S S H E E T M A Y NO T B E T R A N S F E R E D F R O M T H E C US T O D Y O F T H E C O M P E T E NT D I VI S I O N O F R & D Rev
D E P AR T M E NT E X C E P T A S AUT HO R I Z E D B Y C O M P AL E L E C T R O NI C S , I NC . NE I T HE R T HI S S H E E T N O R T H E I NF O R M AT I O N I T C O NT AI NS Custom v0.3
M A Y B E US E D B Y O R D I S C L O S E D T O A N Y T HI R D P A R T Y W I T H O U T P R I O R W R I T T E N C O NS E NT O F C O M P AL E L E C T R O NI C S , I NC .
Date: F ri da y , J a nua ry 0 5 , 2 0 1 8 Sheet 49 of 59
5 4 3 2 1
 A B C D

+1.0V_PRIMP +1.0V_PRIM
@ PJ1002
1 JUMP_43X118 1

1 2
1 2

<33> +1.0VS_PG
@EMI@ @EMI@
PR1007 PC1009
PR1005
100K_0402_1% +3VALW 1 2SNB_1V 1 2
EMI@ PL1002 2 1
PU1001
5A_Z80_0805_2P
1 2 +19VB_1V 2 @ PR1006 PC1007 4.7_1206_5% 680P_0402_50V7K
IN 9
+19VB PG 0_0402_5% 0.1U_0402_25V6
3 1 BST_1V 1 2 BST_1V_R 1 2 PL1001
IN BS 1UH_6.6A_20%_5X5X3_M

1
PC1001
4 6 LX_1V 1 2

PC1003

PC1004
IN LX +1.0V_PRIMP
19
LX

22U_0603_6.3V6M
VGA@ PC1014
<51> +1.8V_PG

@ PR1003
0_0402_5%
N :H>0.8V ; L<0.4V

N pin don't floating

f have pull down resistor at HW side,
lease delete PR601.
1

@ PR1004
0_0402_5%
2

3 3

The current limit is set to 6A, 9A or 12A when this pin

is pull low, floating or pull high.

4 4

Security Classification Compal Secret Data

Issued Date 2016/09/01 Deciphered Date 2019/09/01 Title

T H I S S H E E T O F E N G I N E E R I N G D R A W I N G IS T H E P R O P R I E T A R Y P R O P E R T Y O F C O M P A L E L E C T R O N IC S , IN C . A N D C O N T A IN S CONFIDEN TI A L
1.0V_PRIM
SS iz e Document Number Rev
A N D T R A D E S E C R E T I N F O R MA T I O N . T H I S S H E E T M A Y N O T B E T R A N S F E R E D F R O M T H E C U S T O D Y O F T H E C O M P E T E N T D IVIS IO N O F R & D
D E P A R T M E N T E X C E P T A S A U T H O R I Z E D B Y C O M P A L E L E C T R O N I C S , IN C . N E IT H E R T H IS S H E E T N O R T H E IN F O R MA T IO N IT C O N T A IN S Custom v0.3
M A Y B E U S E D B Y O R D I S C L O S E D T O A N Y T H I R D P A R T Y W I T H O U T P R IO R W R I T T E N C O N S E N T O F C O M P A L E L E C T R O N IC S , IN C .
Date: Friday, January 05, 2018 Sheet 50 of 59
A B C D
 5 4 3 2 1

D D

PC1801
22U_0603_6.3V6M
@PJ1802
12 1 2
+1.8VSP 1 2 +1.8V_PRIM
JUMP_43X79
PU1801
PJ1801
JUMP_43X39

@EMI@
PC1806
680P_0402_50V7K PR1806
10K_0402_1%

Vout=0.6V*(1+PR1803/PR1806)=1.8V
Imax= 2A, Ipeak= 3A

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2016/09/01 Deciphered Date 2019/09/01 Title

T H I S S H E E T O F E N G I N E E R I N G D R A W I N G IS T H E P R O P R I E T A R Y P R O P E R T Y O F C O M P A L E L E C T R O N I C S , I N C . A N D C O N T A I N S CONFIDENT I A L
1.8V_PRIM
A N D T R A D E S E C R E T IN FO R MA T IO N . THIS S H E E T MA Y N O T B E T R A N S FE R E D FR O M T H E C U S T O D Y O F T H E C O MP E T E N T DIVISION O F R & D
Si z e Document Number Rev
D E P A R T M E N T E X C E P T A S A U T H O R I Z E D B Y C O M P A L E L E C T R O N I C S , I N C . N E I T H E R T H I S S H E E T N O R T H E I N F O R M A T I O N IT C O N T A I N S B v0.3
MA Y B E U S E D B Y O R D IS C LO S E D T O A N Y T H IR D P A R T Y W IT H O U T P R IO R W R IT T E N C O N S E N T O F C O MP A L E LE C T R O N IC S, INC. LA-G07EP(KBL-U_UMA_6L)
Date: Sheet 51 of 59
5 4 3 2 1
 1 2 3 4 5

A A

RT3602_VREF Vref=0.6V
953_0402_1%

PCZ3
0.1U_0402_50V7K
6.8K_0402_1

1
11K_0402_1% 1.78K_0402_1%
1

1
PRZ2

PRZ3

PRZ4

2
AISPVCCSA <53>
<53> AVCCSA @PCZ4
2

0.47U_0402_25V6K
1 2
1

+VCC_SA

PCZ22<812>
10_0402_1%

VSSSA_SENSE
1

PRZ1 PRZ8 PRZ10

1

0.47U_0402_6.3V6
RT3602_VREF

<14>
16.2K_0402_1

PRZ6

VSSCORE_SENSE
100_0402_1% 10K_0402_1% 49.9K_0402_1%
PRZ11
PRZ5

1 2 VCCSA_SENSE_R 1 2 1 2 2 1 2 1

2 1
PRZ13 PRZ14
2

PRZ15
% 2
1

RT3602_SET1 1 2 1 2 64.9K_0402_1% 453_0402_1%

RT3602_SET2 <12> VCCSA_SENSE 1 2
RT3602_SET3 PCZ5 390P_0402_50V7K PCZ6 68P_0402_50V8J

100_0402_1

K
VR_PSYS 0_0402_5%
+3VS

RT3602_VREF 3.9_0402_1%
PRZ23

PRZ24
PRZ22 100_0402_1%
10K_0402_5%
464_0402_1

10K_0402_1
5.23K_0402_1

1.1K_0402_1

1
close to chock

% PRZ94

0_0402_5%
PRZ20
1 PRZ18

PRZ19

1
1 2

FB_SA
PRZ17

VR_PWRGD <33>

2
@ PHZ1 PRZ26
% 2

2
1
2

2
1
1
%

PRZ21
%

100K_0402_1%_B25/50 4250K 42.2K_0402_1% PRZ95 PRZ25

%

2
@ PCZ7 1 2 PHZ1_R 1 2 0_0402_5% 0_0402_5%
0.1U_0402_10V6K RT3602_VREF 1 2 VR_ON <33,40>
2
1

+1.0V_VCCST

2
536_0402_1

2.21K_0402_1

0_0402_5
2.1K_0402_1
PRZ29

PRZ30

1 PRZ31

1 2 IMON_CORE_R 1 2
PRZ28

%
2
2

1
% 2
1

1
%

+VCC_CORE PRZ41
100_0402_1%
1 2 VSEN_CORE
PRZ47
0_0402_5%
<14> VCCCORE_SENSE 1 2

U22 N/A

U42

+5VALW PRZ65 VSSGT_SENSE <14>

10_0402_1%
1 2
115_0402_1

374_0402_1
PRZ68
PRZ67

PCZ23

1
2 1
2

1
%

TSEN_CORE_R 4.7U_0603_10V6K PRZ66

TSEN_GT_R 110K_0402_1%

1
100K_0402_1%_B25/50
549K_0402_1

182K_0402_1
PRZ71

+5VALW

1 2
PRZ70

2
PHZ3
PRZ69
2
1

2
1

1.65K_0402_1%
%

@ PRZ72
4250K
1

0_0402_5%
11.5K_0402_1

4.02K_0402_1
PRZ74

TSEN_GT_R 2
PRZ73

DRVEN_SET
2
2

1 2
%

PRZ75
0_0402_5%
2

D D

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2016/09/01 2019/09/01 Title
Deciphered Date
CPU_CORE
THIS SHEET OF ENGINEERING DRAW ING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENT IA L
SS iiz e Documentt Number
AND TRADE SECRET INFORMATION. THIS SHEET M A Y NOT BE TRANSFERED F R O M THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-G07EP(KBL-U_UMA_6L) v0.3
M A Y BE USED BY O R DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, January 05, 2018 Sheet 52 of 59
1 2 3 4 5
 1 2 3 4 5

+19VB_CPU
EMI@ PLZ3
5A_Z80_0805_2P +19VB
1 2 +19VB_CPU
PRZ76
2.2_0603_5% 1 1
CORE1_BST 1 2 CORE1_BST_R

PRZ78
CORE1_LX 0_0603_5%
<52> PW M_CORE1 4 BOOT UGATE 3 CORE2_UG 1 2 CORE2_UG_R 4
+5VALW
Rdc=1.19 mohm

3
2
1
U42@ PRZ79 U42@
<52> DRVEN +VCC_CORE 5 PW M PHASE 2 CORE2_LX 0_0603_5% PQZ3
1 PRZ802 VCC_CORE1 PLZ1 <52> PW M_CORE2 AON6380_DFN5X6-8-5
1 4 +5VALW DRVEN
1 6 Rdc=1.19 mohm

3
2
1
1_0402_5% EN PGND +VCC_CORE
2 3 1 2 VCC_CORE2 8 7 U42@ PLZ2
A RT9610CGQW _WDFN8_2X2 PQZ2 VCC LGATE 9 1 4 A

5
PCZ40 U42@ PRZ81 GND
0.24UH_22A_+-20%_ 7X7X3_M
2 1

2.2U_0402_16V6K 1_0402_5% 2 3

AISPCORE2 <52>

VCC_SA
FSW=600kHz
DCR=6.2 mohm +/- 5%
U22
LL=10.3 mohm
TDC=4A
ICCMAX=4.5A
OCP=9.5A
U42
LL=10.3 mohm
TDC=
ICCMAX=5A
OCP=9.5A

C C

+19VB_CPU
PRA2
2.2_0603_5%
SA_BST 1 2 SA_BST_R
2 1

2 1

1 2 VCC_SA 1 4
9 10
D2/S1 D1
PRA1 1_0402_5% 2 3
RT9610CGQW _WDFN8_2X2
4.7_1206_5%
@EMI@ PRA4

0.47UH_NA 12.2A_20%
1

PCA1
2 1

G2

2.2U_0402_16V6K
7

5
8

S2

S2

S2

SA_LG
2

PRA6 PRA9 PRA7 PRA8

953_0603_1% 953_0603_1% 866_0402_1% 1K_0402_1%
1 2 1 2
AVCCSA_R
@EMI@ PCA8

1
680P_0402_50V7K
2

1 2

PHA1
1K_0402_5%_TSM0B102J3652RE

AVCCSA <52>

D D

AISPVCCSA <52>

Security Classification Compal Secret Data Com pal Electronics, Inc.

Issued Date 2016/09/01 2019/09/01 Title
Deciphered Date
CPU Pow er stage
TH I S S H E E T O F E N G I N E E R I N G D R A W I N G I S TH E P R O P R I E T A R Y P R O P E R T Y O F C O M P A L E L E C T R O N I C S , I N C . A N D C O N TA I N S CONFIDENT IA L
SS iz e Document Number Rev
A N D TR A D E S E C R E T I N F O R M A TI O N . TH I S S H E E T M A Y N O T B E TR A N S F E R E D F R O M TH E C U S T O D Y O F TH E C O M P E T E N T D I V I S I O N O F R & D
D E P A R T M E N T E X C E P T A S A U T H O R I Z E D B Y C O M P A L E L E C T R O N I C S , I N C . N E I TH E R TH I S S H E E T N O R TH E I N F O R M A T I O N I T C O N T A I N S LA-G07EP(KBL-U_UMA_6L) v0.3
M A Y B E U S E D B Y O R D I S C L O S E D T O A N Y TH I R D P A R T Y W I TH O U T P R I O R W R I TTE N C O N S E N T O F C O M P A L E L E C T R O N I C S , I N C .
Date: Friday, January 05, 2018 Sheet 5 3 of 5 9
1 2 3 4 5
 A
B
2 1 2 1 2 1 2 1
+VCC_CORE

PCZ210 PCZ200 PCZ187 PCZ167

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M
2 1 2 1 2 1 2 1

PCZ211 PCZ201 PCZ188 PCZ168

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M

5
5

2 1 2 1 2 1 2 1

PCZ212 PCZ202 PCZ189 PCZ169

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M
2 1 2 1 2 1 2 1

PCZ213 PCZ203 PCZ190 PCZ170

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M
2 1 2 1 2 1 2 1

PCZ214 PCZ204 PCZ191 PCZ171

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M
2016.12.29

2 1 2 1 2 1

PCZ205 PCZ192 PCZ172

1U_0201_6.3V6M 1U_0402_6.3V6K 1U_0201_6.3V6M
2 1 2 1 2 1

2016.11.21
PCZ206 PCZ193 PCZ173
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M
2 1 2 1 2 1

PCZ207 PCZ194 PCZ174

1U_0402_6.3V6K 1U_0201_6.3V6M 1U_0201_6.3V6M

2016.11.21
2 1 2 1 2 1

PCZ208 PCZ195 PCZ175

1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M
2 1 2 1 2 1

PCZ209 PCZ196 PCZ176

1U_0201_6.3V6M 1U_0402_6.3V6K 1U_0201_6.3V6M

2016.11.21

4
4

+VCC_GT

2 1 2 1

2
1
PCZ197 PCZ177 PCZ157
1U_0201_6.3V6M 1U_0402_6.3V6K 22U_0603_6.3V6M
2 1 2 1
2
1

PCZ198 PCZ178 PCZ158

1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M

2016.11.21
2 1 2 1
2
1

PCZ199 PCZ179 PCZ159

1U_0201_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M
2 1
2
1

PCZ180 PCZ160
1U_0201_6.3V6M 22U_0603_6.3V6M
2 1
1uF*13

2
1
22uF*33
390uF*1

PCZ181 U42@ PCZ161

VCC_GT：

1U_0201_6.3V6M 22U_0603_6.3V6M

BOM option
U22 & U42

2 1
2
1

2
1
PCZ130 PCZ182 U42@ PCZ162

Issued Date
22U_0603_6.3V6M 1U_0201_6.3V6M 22U_0603_6.3V6M
2 1

+VCC_GT_VR
2
1

3
3

Security Classification
PCZ183 PCZ163

2
1
1U_0201_6.3V6M 22U_0603_6.3V6M
PCZ133 2 1
2
1

22U_0603_6.3V6M
PCZ184 PCZ164
1U_0201_6.3V6M 22U_0603_6.3V6M
2 1
2
1

PCZ185 PCZ165
1U_0201_6.3V6M 22U_0603_6.3V6M
by JU22(for GT) and JU42A (for IA)

2 1
2
1

2016/09/01
PCZ186 PCZ166
1U_0201_6.3V6M 22U_0603_6.3V6M
U42@

2
1

U42@ PCZ149
22U_0603_6.3V6M
+VCC_GTX_VR

2
1

Compal Secret Data

Deciphered Date
U42@ PCZ152
22U_0603_6.3V6M
2

2
1uF*7
22uF*9
VCC_SA：
U22 & U42

2019/09/01

MAY BE U SED BY O R DISCLO SED T O AN Y T H IR D PAR T Y W IT H OU T PR IO R W RIT T EN C O N SEN T O F C O MPAL ELEC T R O N IC S, INC.
D EPAR T MEN T EXC EPT AS AU T H O R IZ ED BY C O MPAL ELEC T R O N IC S, INC. NEIT HER T HIS SH EET N O R T H E IN F O R MAT IO N IT CONT AINS
AN D T R AD E SEC R ET IN F O R MAT IO N . T HIS SH EET MAY N O T BE T R AN SF ER ED F R O M T H E C U ST O D Y O F T H E C O MPET EN T DIVISION O F R &D

Date:
Title

T HIS SH EET O F EN G IN EER IN G D R AW IN G IS T H E PR O PR IET AR Y PR O PER T Y O F C O MPAL ELEC T R O N IC S, INC. AN D CONT AINS CONFIDENTSSIAizLe Document Number

Friday, January 05, 2018

PC 96
Z 6.3V6
22U_0603_ M
2
1

1
1

PCZ95
@

PROCESSOR DECOUPLING

LA-G07EP(KBL-U_UMA_6L)

22U_0603_6.3V6M
Sheet
Compal Electronics, Inc.

of 54
59
Rev
v0.3
A
B