Chip Design

Professor: Sci.D., Professor

Vazgen Melikyan

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Course Overview

 Introduction to Chip Design  Physical Data Preparation

 1 lecture  3 lectures
 IC Manufacturing Process  Liberty Format
 1 lecture  2 lectures
 Phases of IC Design  Liberty NCX Introduction
 1 lecture  1 lecture
 Cell-Level Digital Design Flow  Transistor level description
 2 lectures  1 lecture
 Digital Design Flow  Physical Design Formats
 2 lectures  2 lectures
 Library/IP design  Functional Description
 1 lecture  2 lectures
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Introduction to Chip Design

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Chip Packages

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Die and Package

Die

Package

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IC Packaging

 Bonding wires connect

the package to the chip. Bonding Wire Pad
Package
 They are relatively large
Die
~950m in 45nm
technology, with pitch Mounting
Cavity
40m
 Pads are arranged in a Lead Frame
frame around the chip.
 Pads are relatively large
~20m in 45nm
technology, with pitch
Pin
15m

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Top View of real IC

Lead Frame
Bonding Wire

Package

Die

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Role of IC Package

 Package of IC providing possibilities of:

 Power supply connections
 Input and output of information signals
 Protection from external environment
 Heat removal

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Wafer and Die

 CMOS and FinFET ICs are fabricated on circular slices of silicon called
wafers.
 Wafer contains various identical dies.
Side view of a Wafer

Die

Top view of a die

Wafer
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Wafer and Die (2)

 Thickness 275um – 925um

 Diameter up to 450mm
 Wafer is cut from metal-
cast of single crystal silicon.

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IC Definition

 Integrated circuits (IC) is a complex set of

electronic components and their
interconnections etched on a chip.

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Basic Elements of IC

Transistor – is the switch

Resistor - slows down electricity

Capacitor - stores electricity

Inductor - determines the magnitude

of the electromagnetic force
Connecting them with interconnects,
an IC is obtained.

*The elements, being prepared by discrete technology, are shown.

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Types of IC Elements

 Useful

Gate
 Parasitic 
Oxide C
CGB
 CGD

C  C
GS

SB

Bul
DB

k
Ii Ij
Substrate n-well
VDD
Drain Source
Vi Vj
contact Gate contact L Cdb2
Cdg12
P+ P+ P+ n+ R= Vi Vout
L HW n  1 1 1
Lij 4  aia j  IiI j    r
n- H Cdb1 dIi dI j dai da j
well
loop a
i i loop j aj ij
W VSS
Capacitances
Bipolar Transistors Resistances Inductances
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Basic Element of IC (1)

CMOS Transistor is a switch

In In

Gate
N+ N+
e
Gate Oxide
Out = ? Source Drain
Out = In
OFF P- Substrate ON
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Basic Element of IC (2)

 FinFET Transistor is a switch

Drain

Gate
fin
Source
Oxide
Silicon substrate
OFF ON

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CMOS Transistor - Types and
Symbols
D D

G G

S S
NMOS Enhancement NMOS Depletion

D D

G G B

S S
PMOS Enhancement NMOS with Bulk Contact

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FinFET Transistor - Types and
Symbols
D D

G B
G

S S
NFET Enhancement NFET with Bulk Contact

D D

G G B

S S
PFET Enhancement PFET with Bulk Contact

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Switch Model of NFET&NMOS
Transistors
Gate

Source Drain

Open, “Off” (Gate = “0”) Closed, “On” (Gate = “1”)

Ron

| VGS | < | VT | | VGS | > | VT |

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Switch Model of PFET&PMOS
Transistor
Gate

Source Drain

Open, “Off” (Gate = “1”) Closed, “On” (Gate = “0”)

Ron

| VGS | > | VDD – | VT | | | VGS | < | VDD – |VT| |

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Sizes of IC Components

 IC components and interconnects have very small sizes

 For micron technology, a million or more switches on a
single chip are obtained.
 For nanometer technology a billion or more switches on
a single chip are obtained.

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IC as a Multi Layer Structure

M4

M3
Isolator
M2

M1
Via

CMOS transistor

P-substrate

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IC as a Multi Layer Structure (2)

Passivation

Wire Dielectric
Etch Stop Layer
Via
Global (up to 9) Dielectric Capping Layer

Capper Conductor wire

Barrier/Nucleation Layer

Intermediate (up to 8)

Metal 1 Pre Metal Dielectric

Tungsten Contact Plug

Metal 1 Pitch

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IC as a Multi Layer Structure (3)

Under the microscope

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IC as a Multi Layer Structure (4)

Under the microscope

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NMOS and PMOS Transistor
Structures
NMOS D PMOS D

G B G B

S S
Aluminium (Oxide cut) Gate Al Polysilicon Gate SiO 2
contact
W
W

LL

P+ n+ n+ P+ P+ n+

n-well

Substrate Source Drain Drain Source n-well

contact contact

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FinFET Transistor Structure
fin

Gate
Drain
Gate fin_w

fin_thic

Source
Silicon
oxide oxide Fin

Silicon Silicon Substrate

Substrate

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Circuit and Layout Editors

in vdd out

vss
Circuit Layout

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IC Component Types

 Intellectual
Property (IP)
IPs
ADC represents large
DAC
blocks performing
PLL
IOs completed
functions (DAC,
Standard ADC, PLL, etc)
Cells
 Standard Cells
Row of represent digital
Standard
Cells
nodes performing
simplest functions.
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IC Component Types (2)

 Digital Standard Cells

 Basic cells performing simplest functions (e.g. AND, OR, etc.) or more
complex functions (Multiplexers, Latches, Flip-Flops, etc.) used as
building blocks for large digital circuits
 Intellectual Property (IP) Blocks
 Large blocks performing completed functions (DAC, ADC, PLL, etc),
used in large designs
 Input/Output (I/O) Cells
 Implement the connection between IC inner circuitry and external
environment (PCB)
 Digital ICs
 Large ICs (e.g. processor, GPU, etc.), distributed to end-users
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Real IC Example

IPs

Standard
Cells
Row of
Standard Cells

IOs

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Standard Cell Example

Inverter

vss

Circuit Layout
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PLL Example

Circuit Layout
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IC Classification : Signal Type

Electrical levels move up

Analog
and down continuously

Digital Electrical levels are

either ON (“1) or OFF
(“0”)

Combination of the first

Mixed
two
Signal

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IC Classification : Active Component
Type
Bipolar High performance, large power
consumption (..., TTL, ECL)

CMOS Small performance, small power

consumption

Provision of compromise
BiCMOS
between performance and power

Smaller size, less power

FinFET
consumption

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History and Evolution of the IC
Industry (1)
Clock frequency doubles every 2 years
Clock frequency (MHz)
1010

109

108

107
1970 1975 1980 1985 1990 1995 2000 2005 2010 2015 2018 year

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History and Evolution of the IC
Industry (2)
Capacity of memories increase about three times every year

Number of bits per chip

1012
8Tbits
1011
4Tbits
1010
4Gbits
109 1Gbits
256Mbits
108
64Mbits
107
16Mbits
106 4Mbits
105 1Mbits
256Kbits
104
64Kbits
103
102 1970 1975 1980 1985 1990 1995 2000 2005 2010 2015 2018 year

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History and Evolution of the IC
Industry (3)
Die size grows by 14% every year

Die size (mm)

1000
220 mm2

100

10

1
1970 1975 1980 1985 1990 1995 2000 2005 2010 2015 2018 year

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History and Evolution of the IC
Industry (4)
Powers increase about ten times every 3 years

Power (Watts)
1000

100

10

1
1970 1975 1980 1985 1990 1995 2000 2005 2010 2015 2018 year

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History and Evolution of the IC
Industry (5)
Power densities increase twice every year

Power Density (W/cm2)

1000

100

10

1
1970 1975 1980 1985 1990 1995 2000 2005 2010 2015 2018 year

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History and Evolution of the IC
Industry (6)
The minimum length of gate is divided by two every 5.4
years
Gate length (nm)
101

100

5 nm
10-1
1970 1975 1980 1985 1990 1995 2000 2005 2010 2015 2017 year

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Cost of Transistor

The cost of transistors reduce twice every 1.5 years

cost: ¢-per-transistor
1
0.1

0.01

0.001
0.00001 ¢
0.0001

0.00001

0.000001

0.0000001
1982 1985 1988 1991 1994 1997 2000 2003 2006 2009 2012 2015 2018 Year

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History and Evolution of the IC
Industry (6)
Semiconductor Industry Association (SIA) Roadmap
Date 1999 2005 2010 2014 2015 2017
Technology (nm) 180 65 32 22 14 5
Minimum mask count 22/24 25 27 29/30 33/34 39/40
Wafer diameter (mm) 200 400 400 450 500 550
Memory samples (bits) 1G 8G 32G 1T 10T 1PB
Transistors/cm2 6.2Ø 180M 240 390M 450M 1100
Maximum number of metal layers 6-7 9 9 10 10 12
Clock frequency (MHz) 1250 3200 5200 10000 100000 480000
IC sizes (mm2 ) 400 760 810 2240 3130 3520
Power supply (V) 1.5-1.6 0.8-1.2 1.2-1 0.37-0.42 0.8 0.6
Maximum power (W) 90 150 171 183 198 220
Number of pins 700 1957 2734 3350 4740 5560

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