Ecd Final Lab Exam Spring 2021-Subjective
Ecd Final Lab Exam Spring 2021-Subjective
Ecd Final Lab Exam Spring 2021-Subjective
Experimental Validation Student efficiently validate Justify the amplifier response by Unable to justify the
CLO2 Justify the working of amplifier and working by following Circuit following schematic diagram but working of BJT
10% its frequency response. diagram. with minor errors. amplifier and its
frequency response.
Data Analysis Accurately does data analysis / Conducts computations with Conduct analysis on
Data Handling / Calculations correlate experimental results to minor error; and correlates collected data, no
CLO3 Experimental Verifications of expected theoretical values. results to known values. attempt to correlate experimental
5% amplifier. results
with known values.
Tools UtilizationHardware/ Effectively use hardware Uses hardware equipment Does not know how to use
CLO4 Software tool (MULTISIM) usage equipment / software tools to /software tools to collect data with hardware equipment
for Circuit implementation and collect readings. minor error. /software tools to collect
7% analysis and analyze data.
Properly / carefully handle Lab Properly handle lab equipment & Moderate level lab handling and Minor or no safety
CLO6 infrastructure with safety obey safety measures. safety measurements measurements has been
3% precautions considered.
Total Marks: 30
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Important Instructions:
Kindly read the following instructions before starting the final lab exam
Write your Name & S.I.D on each page of the answersheet
You HAVE to submit the hand written solution and multisim task of these questions within 2 hours 30 minutes
After submitting its hand written solution, youHAVE to solve these questions using MULTISIM software within also
submit the screen shots ofCIRCUIT, OSCILLOSCOPEOUTPUT, INPUT &OUTPUT GRAPHS&MULTISIM file of given
questions.
Please submit your solution onLMS within mentioned time.
(Those who are unable to upload the final lab exam solution on above mentioned medium for any reason could
not be entertained)
Objective:
Vcc = 10 V to 15 V
Maximum current that the transistor 2N222 can draw is 10mA.
Vin = 10mV @ 20 KHz
Input impedance (DC) approxRin =1st highest digit of your Student I.D(unit of Rin is in kilo ohms) (for
example: S.I.D = 7097 so,1st highest digit of given S.I.D is 9 so, Rin = 9k ohms)
Small signal voltage gain AV =-(1st highest digit & then 2nd highest digit), when loaded(unit of AV is V/V) (for
example: S.I.D = 7097 so,1st highest digit of given S.I.D is 9 & 2nd highest digit is 7 so, AV = 97 V/V)
Load of 40pF
AC coupled input.
Circuit performance insensitive to changes in β = 100 to 350
Only discrete components(i.e. transistors, resistors and capacitors) are allowed to use only; no integrated
circuits are allowed to use.
You will do the AC and operating point analysis and show all the desired results.
Procedure:
To meet the requirements, you will have to design a CE-BJT single-stage amplifier. Show proper calculations for
DC-Analysis (Q-point)& AC-Analysis (pi or T-model) in order to calculate the values of all the resistors &
capacitors to design the amplifier.
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QUESTION # 02: (10 Marks)
In order to obtain frequency response of the amplifier, give 10mV input to the signal and observe output
at each respective frequencies:
Gain
Band Width
NOTE:
Draw complete circuit diagram with showing all values of resistors & capacitor.
Attach screen shots of input & output characteristic graphs and also gain vs. frequency graph generated on
MULTISIM.
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BestoflUCK
.[10]
a. Draw the block diagram and the signal flow graph (SFG) of the transfer func
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