Course Name ADVANCED LOGIC CIRCUIT
This course on digital focuses on different methodologies and styles in hardware
Course Description modeling with emphasis on the use of hardware description languages (HDLs). It covers
very high speed integrated circuit hardware description language (VHDL) fundamental
language concepts and elements and the different levels od=f descriptions such as
behavioural and structural.
Number of Units for 3 units lecture
Lecture and Laboratory 1 unit laboratory
Number of Contact Hours 3hours lecture
per week 3 hours laboratory
Prerequisite Logic Circuits Switching Theory
Co-requisite Advanced Logic Circuit Lab
Course Objectives After completing this course, the student must be able to:
1. Differentiate technologies related to HDLs such as programmable logic
devices, FPGAs and ASICs and advantages ad disadvantages of each relate
field.
2. Construct, compile and execute VHDL programs using provided software
tools.
3. Differentiate and implement levels of hardware modeling abstraction using
VHDL.
4. Design digital components and circuits that are testable, reusable and
synthesizable
5. Simulate, analyze and test digital designs using provided software tools.
6. Build interest in digital design and related fields.
1. Introduction
2. Algorithm State Machines
2.1 ASM Chart
Course Outline 2.2 Control Implementation
2.3 Design with Multiplexes
3. Overview of Digital Systems
3.1 Evolution of Digital System Design Methodology
3.2 Different Hardware Description Languages (HDLs)
3.3 History of VHDL
3.4 Advantages and Disadvantages of VHDL
4. VHDL-Related Technologies and Fields
4.1 PLDs
5. Hardware Modeling using VHDL
5.1 Levels of Modeling or abstraction
5.2 VHDL Model Components or Structural Elements
6. VHDL Language
6.1 Lexical Elements
6.2 Scalar Data Types
6.3 Expressions and Operators
6.4 Control Structures
7. VHDL Language
7.1 Composite Data Types
7.2 Access Types
7.3 File types
8. Basic Modeling Concepts
9. Subprogram and packages
10. Algorithmic State Machines
10.1 ASM Charts
10.2 Control Implementation
10.3 Design with Multiplexers
Laboratory Equipment Please refer to Annex IV – Laboratory Requirements