CS2259 - Microprocessors Lab

IV Semester IT

Syllabus

1. Programming with 8085

2. Programming with 8086-experiments including BIOS/DOS calls:

 Keyboard control

 Display

 File Manipulation

3. Interfacing with 8085/8086-8255,8253

4. Interfacing with 8085/8086-8279,8251

5. 8051 Microcontroller based experiments for Control Applications

6. Mini- Project
 CYCLE I

8085 Programming
1. Introduction to 8085
2. 8 bit Addition and Subtraction
3. 8 bit Multiplication and Division
4. 16 bit Addition and Subtraction
5. 16 bit Multiplication and Division
6. Largest and Smallest number in an array
7. Sorting in Ascending and Descending Order
8. BCD Addition and Subtraction

CYCLE II

8086 Programming

BIOS/DOS calls

9. String manipulation – Search a word

10.String manipulation –Find and replace a word
11. String manipulation – Copy a string
12. String manipulation – Sorting
13. BIOS/DOS calls – Display
14. BIOS/DOS calls – File Manipulation
15. BIOS/DOS calls – Disk information

Interfacing
 16. Interfacing 8255 PPI IC with 8085
17. Interfacing 8253 Timer IC with 8085
18. Interfacing 8279 Keyboard/Display IC with 8085/8086
19. Interfacing 8251 Serial communication IC with 8085/8086
8051 Programming

20. Sum of elements in an array

21. Hexadecimal to Decimal conversion
22. Decimal to Hexadecimal conversion
23. Stepper motor interface

1. INTRODUCTION TO 8085

INTEL 8085 is one of the most popular 8-bit microprocessor capable of addressing 64
KB of memory and its architecture is simple. The device has 40 pins, requires +5 V power
supply and can operate with 3MHz single phase clock.

ALU (Arithmetic Logic Unit):

The 8085A has a simple 8-bit ALU and it works in coordination with the accumulator,
temporary registers, 5 flags and arithmetic and logic circuits. ALU has the capability of
performing several mathematical and logical operations. The temporary registers are used to
hold the data during an arithmetic and logic operation. The result is stored in the accumulator
and the flags are set or reset according to the result of the operation. The flags are affected by
the arithmetic and logic operation. They are as follows:
 Sign flag
After the execution of the arithmetic - logic operation if the bit D7 of the
result is 1, the sign flag is set. This flag is used with signed numbers. If it is 1, it is
a negative number and if it is 0, it is a positive number.
 Zero flag
The zero flag is set if the ALU operation results in zero. This flag is
modified by the result in the accumulator as well as in other registers.
 Auxillary carry flag
In an arithmetic operation when a carry is generated by digit D3 and
passed on to D4, the auxillary flag is set.
 Parity flag
After arithmetic – logic operation, if the result has an even number of 1’s
the flag is set. If it has odd number of 1’s it is reset.
  Carry flag
If an arithmetic operation results in a carry, the carry flag is set. The carry
flag also serves as a borrow flag for subtraction.

Timing and control unit

This unit synchronizes all the microprocessor operation with a clock and generates the
control signals necessary for communication between the microprocessor and peripherals.
The control signals RD (read) and WR (write) indicate the availability of data on the data
bus.

Instruction register and decoder

The instruction register and decoder are part of the ALU. When an instruction is fetched
from memory it is loaded in the instruction register. The decoder decodes the instruction and
establishes the sequence of events to follow.

Register array
The 8085 has six general purpose registers to store 8-bit data during program execution.
These registers are identified as B, C, D, E, H and L. they can be combined as BC, DE and
HL to perform 16-bit operation.

Accumulator
Accumulator is an 8-bit register that is part of the ALU. This register is used to store 8-bit
data and to perform arithmetic and logic operation. The result of an operation is stored in the
accumulator.

Program counter
The program counter is a 16-bit register used to point to the memory address of the next
instruction to be executed.

Stack pointer
 It is a 16-bit register which points to the memory location in R/W memory, called the
Stack.

Communication lines
8085 microprocessor performs data transfer operations using three communication lines
called buses. They are address bus, data bus and control bus.
 Address bus – it is a group of 16-bit lines generally identified as A 0 – A15. The
address bus is unidirectional i.e., the bits flow in one direction from
microprocessor to the peripheral devices. It is capable of addressing 2 16 memory
locations.
 Data bus – it is a group of 8 lines used for data flow and it is bidirectional. The
data ranges from 00 – FF.
 Control bus – it consist of various single lines that carry synchronizing signals.
The microprocessor uses such signals for timing purpose.
 2(A). 8 BIT DATA ADDITION

AIM:

To add two 8 bit numbers stored at consecutive memory locations.

ALGORITHM:

1. Initialize memory pointer to data location.

2. Get the first number from memory in accumulator.
3. Get the second number and add it to the accumulator.
4. Store the answer at another memory location.

RESULT:

Thus the 8 bit numbers stored at 4500 &4501 are added and the result stored at 4502 & 4503.
FLOW CHART:

START

[C] 00H

[HL] 4500H

NO

Is there a
YES
Carry ?

STOP
PROGRAM:

ADDRESS OPCODE LABEL MNEMONICS OPERAND COMMENT

4100 START MVI C, 00 Clear C reg.
4101
4102 LXI H, 4500 Initialize HL reg. to
4103 4500
4104
4105 MOV A, M Transfer first data to
accumulator
4106 INX H Increment HL reg. to
point next memory
Location.
4107 ADD M Add first number to
acc. Content.
4108 JNC L1 Jump to location if
4109 result does not yield
410A carry.
410B INR C Increment C reg.
410C L1 INX H Increment HL reg. to
point next memory
Location.
410D MOV M, A Transfer the result from
acc. to memory.
410E INX H Increment HL reg. to
point next memory
Location.
410F MOV M, C Move carry to memory
4110 HLT Stop the program

OBSERVATION:

INPUT OUTPUT
4500 4502
4501 4503
 2(B). 8 BIT DATA SUBTRACTION

AIM:

To Subtract two 8 bit numbers stored at consecutive memory locations.

ALGORITHM:

1. Initialize memory pointer to data location.

2. Get the first number from memory in accumulator.
3. Get the second number and subtract from the accumulator.
4. If the result yields a borrow, the content of the acc. is complemented and 01H is added to
it (2’s complement). A register is cleared and the content of that reg. is incremented in
case there is a borrow. If there is no borrow the content of the acc. is directly taken as the
result.
5. Store the answer at next memory location.

RESULT:

Thus the 8 bit numbers stored at 4500 &4501 are subtracted and the result stored at 4502 &
4503.
FLOW CHART:
START

Is there a
Borrow ? NO

YES
Complement [A]
Add 01H to [A]
 STOP

PROGRAM:

ADDRESS OPCODE LABEL MNEMONICS OPERAND COMMENT

4100 START MVI C, 00 Clear C reg.
4102
4102 LXI H, 4500 Initialize HL reg. to
4103 4500
4104
4105 MOV A, M Transfer first data to
accumulator
4106 INX H Increment HL reg. to
point next mem.
Location.
4107 SUB M Subtract first number
from acc. Content.
4108 JNC L1 Jump to location if
4109 result does not yield
410A borrow.
410B INR C Increment C reg.
410C CMA Complement the Acc.
content
410D ADI 01H Add 01H to content of
410E acc.
410F L1 INX H Increment HL reg. to
point next mem.
Location.
4110 MOV M, A Transfer the result from
acc. to memory.
4111 INX H Increment HL reg. to
point next mem.
Location.
4112 MOV M, C Move carry to mem.
4113 HLT Stop the program

OBSERVATION:

INPUT OUTPUT
4500 4502
4501 4503
 3(A). 8 BIT DATA MULTIPLICATION

AIM:

To multiply two 8 bit numbers stored at consecutive memory locations and store the
result in memory.

ALGORITHM:

LOGIC: Multiplication can be done by repeated addition.

1. Initialize memory pointer to data location.

2. Move multiplicand to a register.
3. Move the multiplier to another register.
4. Clear the accumulator.
5. Add multiplicand to accumulator
6. Decrement multiplier
7. Repeat step 5 till multiplier comes to zero.
8. The result, which is in the accumulator, is stored in a memory location.

RESULT:

Thus the 8-bit multiplication was done in 8085p using repeated addition method.
FLOW CHART:

START

[HL] 4500

B M

[HL]  [HL]+1

A  00

C  00

[A]  [A] +[M]

Is there any carry

NO

YES
C  C+1

B  B-1

NO IS B=0

YES

A
 A

STOP
PROGRAM:

ADDRESS OPCODE LABEL MNEMONICS OPERAND COMMENT

4100 START LXI H, 4500 Initialize HL reg. to
4101 4500
4102
4103 MOV B, M Transfer first data to
reg. B
4104 INX H Increment HL reg. to
point next mem.
Location.
4105 MVI A, 00H Clear the acc.
4106
4107 MVI C, 00H Clear C reg for carry
4108

4109 L1 ADD M Add multiplicand

multiplier times.
410A JNC NEXT Jump to NEXT if there
410B is no carry
410C
410D INR C Increment C reg
410E NEXT DCR B Decrement B reg
410F JNZ L1 Jump to L1 if B is not
4110 zero.
4111
4112 INX H Increment HL reg. to
point next mem.
Location.
4113 MOV M, A Transfer the result from
acc. to memory.
4114 INX H Increment HL reg. to
point next mem.
Location.
4115 MOV M, C Transfer the result from
C reg. to memory.
4116 HLT Stop the program

OBSERVATION:

INPUT OUTPUT
4500 4502
4501 4503
 3(B). 8 BIT DIVISION

AIM:

To divide two 8-bit numbers and store the result in memory.

ALGORITHM:

LOGIC: Division is done using the method Repeated subtraction.

1. Load Divisor and Dividend
2. Subtract divisor from dividend
3. Count the number of times of subtraction which equals the quotient
4. Stop subtraction when the dividend is less than the divisor .The dividend now becomes
the remainder. Otherwise go to step 2.
5. stop the program execution.

RESULT:

Thus an ALP was written for 8-bit division using repeated subtraction method and
executed using 8085 p kits
FLOWCHART:
START

B 00

[HL] 4500

A M

[HL] [HL]+1

M A-M

[B] [B] +1

IS A<0 NO

YES
A A+ M

B B-1

STOP
PROGRAM:

ADDRESS OPCODE LABEL MNEMO OPERA COMMENTS

NICS ND
4100 MVI B,00 Clear B reg for quotient
4101
4102 LXI H,4500 Initialize HL reg. to
4103 4500H
4104
4105 MOV A,M Transfer dividend to acc.
4106 INX H Increment HL reg. to point
next mem. Location.
4107 LOOP SUB M Subtract divisor from dividend
4108 INR B Increment B reg
4109 JNC LOOP Jump to LOOP if result does
410A not yield borrow
410B
410C ADD M Add divisor to acc.
410D DCR B Decrement B reg
410E INX H Increment HL reg. to point
next mem. Location.
410F MOV M,A Transfer the remainder from
acc. to memory.
4110 INX H Increment HL reg. to point
next mem. Location.
4111 MOV M,B Transfer the quotient from B
reg. to memory.
4112 HLT Stop the program

OBSERVATION:

S.NO INPUT OUTPUT

ADDRESS DATA ADDRESS DATA
1 4500 4502
4501 4503
2 4500 4502
4501 4503
 4(A). 16 BIT DATA ADDITION

AIM:

To add two 16-bit numbers stored at consecutive memory locations.

ALGORITHM:

1. Initialize memory pointer to data location.

2. Get the first number from memory and store in Register pair.
3. Get the second number in memory and add it to the Register pair.
4. Store the sum & carry in separate memory locations.

RESULT:

Thus an ALP program for 16-bit addition was written and executed in 8085p using
special instructions.
FLOW CHART:
START

[L] [4050 H]
[H] [4051 H]

[DE] [HL]

[L] [4052H]
[H] [4053H]

Is there a NO
Carry?

YES

STOP
PROGRAM:

ADDRESS OPCODE LABEL MNEMONICS OPERAND COMMENT

4000 START LHLD 4050H Load the augend in DE
4001 pair through HL pair.
4002
4003 XCHG
4004 LHLD 4052H Load the addend in HL
4005 pair.
4006
4007 MVI A, 00H Initialize reg. A for
4008 carry
4009 DAD D Add the contents of HL
Pair with that of DE
pair.
400A JNC LOOP If there is no carry, go
400B to the instruction
400C labeled LOOP.
400D INR A Otherwise increment
reg. A
400E LOOP SHLD 4054H Store the content of HL
400F Pair in 4054H(LSB of
4010 sum)
4011 STA 4056H Store the carry in
4012 4056H through Acc.
4013 (MSB of sum).
4014 HLT Stop the program.

OBSERVATION:

INPUT OUTPUT
ADDRES DATA ADDRESS DATA
S
4050H 4054H
4051H 4055H
4052H 4056H
4053H
 4(B). 16 BIT DATA SUBTRACTION

AIM:

To subtract two 16-bit numbers stored at consecutive memory locations.

ALGORITHM:

1. Initialize memory pointer to data location.

2. Get the subtrahend from memory and transfer it to register pair.
3. Get the minuend from memory and store it in another register pair.
4. Subtract subtrahend from minuend.
5. Store the difference and borrow in different memory locations.

RESULT:

Thus an ALP program for subtracting two 16-bit numbers was written and executed.
FLOW CHART:
START

[L] [4050 H]
[H] [4051 H]

[DE] [HL]

[L] [4052H]
[H] [4053H]

[HL] [HL]-[DE]

Is there a
borrow? NO

YES
[C] [C]+1

[4054] [ L]

[4055] [H]

[4056] [C]

STOP
PROGRAM:
ADDRESS OPCODE LABEL MNEMO OPER COMMENTS
NICS AND
4000 START MVI C, 00 Initialize C reg.
4001
4002 LHLD 4050H Load the subtrahend in DE
4003 reg. Pair through HL reg.
4004 pair.
4005 XCHG
4006 LHLD 4052H Load the minuend in HL reg.
4007 Pair.
4008
4009 MOV A, L Move the content of reg. L to
Acc.
400A SUB E Subtract the content of reg.
E from that of acc.
400B MOV L, A Move the content of Acc. to
reg. L
400C MOV A, H Move the content of reg. H to
Acc.
400D SBB D Subtract content of reg. D
with that of Acc.
400E MOV H, A Transfer content of acc. to
reg. H
400F SHLD 4054H Store the content of HL pair
4010 in memory location 8504H.
4011
4012 JNC NEXT If there is borrow, go to the
4013 instruction labeled NEXT.
4014
4015 INR C Increment reg. C
4016 NEXT MOV A, C Transfer the content of reg. C
to Acc.
4017 STA 4056H Store the content of acc. to
4018 the memory location 4506H
4019
401A HLT Stop the program execution.

OBSERVATION:
INPUT OUTPUT
ADDRES DATA ADDRESS DATA
S
4050H 4054H
4051H 4055H
4052H 4056H
 4053H
5(A). 16 BIT MULTIPLICATION

AIM:

To multiply two 16 bit numbers and store the result in memory.

ALGORITHM:

1. Get the multiplier and multiplicand.

2. Initialize a register to store partial product.
3. Add multiplicand, multiplier times.
4. Store the result in consecutive memory locations.

RESULT:

Thus the 16-bit multiplication was done in 8085p using repeated addition method.
FLOWCHART:
START

DE HL

Is Carry flag set?

NO

YES

Is Zero flag set?

NO

YES

A
 A

[4054]L
[4055]H

[4056]C
[4057]B

STOP
 ADDRESS OPCOD LABEL MNEM OPERAN COMMENTS
E ONICS D
8001 START LHLD 4050 Load the first No. in stack pointer
4001 through HL reg. pair
4002
4003 SPHL
4004 LHLD 4052 Load the second No. in HL reg.
4005 pair
4006 & Exchange with DE reg. pair.
4007 XCHG
4008 LXI H, 0000H
4009
400A Clear HL & DE reg. pairs.
400B LXI B, 0000H
400C
400D
400E LOOP DAD SP Add SP with HL pair.
400F JNC NEXT If there is no carry, go to the
4010 instruction labeled NEXT
4011
4012 INX B Increment BC reg. pair
4013 NEXT DCX D Decrement DE reg. pair.
4014 MOV A,E Move the content of reg. E to Acc.
4015 ORA D OR Acc. with D reg.
4016 JNZ LOOP If there is no zero, go to instruction
4017 labeled LOOP
4018
4019 SHLD 4054 Store the content of HL pair in
401A memory locations 4054 & 4055.
401B
401C MOV A, C Move the content of reg. C to Acc.
401D STA 4056 Store the content of Acc. in
401E memory location 4056.
401F
4020 MOV A, B Move the content of reg. B to Acc.
4021 STA 4057 Store the content of Acc. in
4022 memory location 4056.
4023
4024 HLT Stop program execution
OBSERVATION:
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4050 4054
4051 4055
4052 4056
4053 4057
 5(B). 16- BIT DIVISION

AIM:

To divide two 16-bit numbers and store the result in memory using 8085 mnemonics.

ALGORITHM:

1. Get the dividend and divisor.

2. Initialize the register for quotient.
3. Repeatedly subtract divisor from dividend till dividend becomes less than divisor.
4. Count the number of subtraction which equals the quotient.
5. Store the result in memory.

RESULT:

Thus the 16-bit Division was done in 8085p using repeated subtraction method.
FLOWCHART:

START

HL DE

Is Carry flag set ?

NO

YES

A
 A

STOP
PROGRAM:
ADDRESS OPCODE LABEL MNEM OPERA COMMENTS
ONICS ND
4000 START LHLD 4052 Load the first No. in stack pointer
4001 through HL reg. pair
4002
4003 XCHG
4004 LHLD 4050 Load the second No. in HL reg. pair
4005 & Exchange with DE reg. pair.
4006
4007 LXI B, 0000H
4008 Clear BC reg. pair.
4009
400A LOOP MOV A, L Move the content of reg. L to Acc.
400B SUB E Subtract reg. E from that of Acc.
400C MOV L, A Move the content of Acc to L.
400D MOV A, H Move the content of reg. H Acc.
400E SBB D Subtract reg. D from that of Acc.
400F MOV H, A Move the content of Acc to H.
4010 INX B Increment reg. Pair BC
4011 JNC LOOP If there is no carry, go to the location
4012 labeled LOOP.
4013
4014 DCX B Decrement BC reg. pair.
4015 DAD D Add content of HL and DE reg. pairs.
4016 SHLD 4054 Store the content of HL pair in 4054 &
4017 4055.
4018
4019 MOV A, C Move the content of reg. C to Acc.
401A STA 4056 Store the content of Acc. in memory
401B 4056
401C
401D MOV A, B Move the content of reg. B to Acc.
401E STA 4057 Store the content of Acc. in memory
401F 4057.
4020
4021 HLT Stop the program execution.

OBSERVATION:
INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4050 4054
4051 4055
4052 4056
4053 4057
 6(A). LARGEST ELEMENT IN AN ARRAY

AIM:
To find the largest element in an array.

ALGORITHM:
1. Place all the elements of an array in the consecutive memory locations.
2. Fetch the first element from the memory location and load it in the accumulator.
3. Initialize a counter (register) with the total number of elements in an array.
4. Decrement the counter by 1.
5. Increment the memory pointer to point to the next element.
6. Compare the accumulator content with the memory content (next
element).
7. If the accumulator content is smaller, then move the memory content
(largest element) to the accumulator. Else continue.
8. Decrement the counter by 1.
9. Repeat steps 5 to 8 until the counter reaches zero
10. Store the result (accumulator content) in the specified memory location.

RESULT:
Thus the largest number in the given array is found out.
FLOW CHART:
START

[HL] [4100H]

[B] 04H

[A] [HL]

[HL [HL] + 1

NO IS
[A] < [HL]?
YES

[A] [HL]

[B] [B]-1

IS NO
[B] = 0?
YES

[4105] [A]

STOP
PROGRAM:

ADDRE OPCO LABEL MNEM OPER COMMENTS

SS DE ONICS AND
4001 LXI H,4100 Initialize HL reg. to
4002 4100H
4003
4004 MVI B,04 Initialize B reg with no. of
4005 comparisons(n-1)
4006 MOV A,M Transfer first data to acc.
4007 LOOP1 INX H Increment HL reg. to point
next memory location
4008 CMP M Compare M & A
4009 JNC LOOP If A is greater than M then go
400A to loop
400B
400C MOV A,M Transfer data from M to A reg
400D LOOP DCR B Decrement B reg
400E JNZ LOOP1 If B is not Zero go to loop1
400F
4010
4011 STA 4105 Store the result in a memory
4012 location.
4013
4014 HLT Stop the program

OBSERVATION:

INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4100 4105
4101
4102
4103
4104
 6(B). SMALLEST ELEMENT IN AN ARRAY

AIM:
To find the smallest element in an array.

ALGORITHM:
1. Place all the elements of an array in the consecutive memory locations.
2. Fetch the first element from the memory location and load it in the accumulator.
3. Initialize a counter (register) with the total number of elements in an array.
4. Decrement the counter by 1.
5. Increment the memory pointer to point to the next element.
6. Compare the accumulator content with the memory content (next
element).
7. If the accumulator content is smaller, then move the memory content
(largest element) to the accumulator. Else continue.
8. Decrement the counter by 1.
9. Repeat steps 5 to 8 until the counter reaches zero
10. Store the result (accumulator content) in the specified memory location.

RESULT:
Thus the smallest number in the given array is found out.
FLOW CHART:
START

[HL] [4100H]

[B] 04H

[A] [HL]

[HL [HL] + 1

IS
YES [A] < [HL]?

NO

[A] [HL]

[B] [B]-1

IS
[B] = 0? NO

YES

[4105] [A]

STOP
PROGRAM:

ADDRE OPCO LABEL MNEM OPER COMMENTS

SS DE ONICS AND
4001 LXI H,4100 Initialize HL reg. to
4002 4100H
4003
4004 MVI B,04 Initialize B reg with no. of
4005 comparisons(n-1)
4006 MOV A,M Transfer first data to acc.
4007 LOOP1 INX H Increment HL reg. to point
next memory location
4004 CMP M Compare M & A
4009 JC LOOP If A is lesser than M then go
400A to loop
400B
400C MOV A,M Transfer data from M to A reg
400D LOOP DCR B Decrement B reg
400E JNZ LOOP1 If B is not Zero go to loop1
400F
4010
4011 STA 4105 Store the result in a memory
4012 location.
4013
4014 HLT Stop the program

OBSERVATION:

INPUT OUTPUT
ADDRESS DATA ADDRESS DATA
4100 4105
4101
4102
4103
4104
 7(A).ASCENDING ORDER

AIM:
To sort the given number in the ascending order using 8085 microprocessor.

ALGORITHM:

1. Get the numbers to be sorted from the memory locations.

2. Compare the first two numbers and if the first number is larger than second then I
interchange the number.
3. If the first number is smaller, go to step 4
4. Repeat steps 2 and 3 until the numbers are in required order

RESULT:

Thus the ascending order program is executed and thus the numbers are arranged in
ascending order.
FLOWCHART: START

[B] 04H

[HL] [4100H]

[C] 04H

[A] [HL]

[HL [HL] + 1

IS
YES [A] < [HL]?

NO

[D] [HL]

[HL] [A]

[HL] [HL] - 1

[HL] [D]

[HL] [HL] + 1

[C] [C] – 01 H

A
 A

IS
[C] = 0? NO

YES
[B] [B]-1

IS
[B] = 0? NO

YES

STOP
PROGRAM:

ADDR OPCO LABEL MNEM OPER COMMENTS

E DE ONICS AND
SS
4000 MVI B,04 Initialize B reg with number
4001 of comparisons (n-1)
4002 LOOP 3 LXI H,4100 Initialize HL reg. to
4003 4100H
4004
4005 MVI C,04 Initialize C reg with no. of
4006 comparisons(n-1)
4007 LOOP2 MOV A,M Transfer first data to acc.
4004 INX H Increment HL reg. to point
next memory location
4009 CMP M Compare M & A
400A JC LOOP1 If A is less than M then go to
400B loop1
400C
400D MOV D,M Transfer data from M to D reg
400E MOV M,A Transfer data from acc to M
400F DCX H Decrement HL pair
4010 MOV M,D Transfer data from D to M
4011 INX H Increment HL pair
4012 LOOP1 DCR C Decrement C reg
4013 JNZ LOOP2 If C is not zero go to loop2
4014
4015
4016 DCR B Decrement B reg
4017 JNZ LOOP3 If B is not Zero go to loop3
4014
4019
401A HLT Stop the program

OBSERVATION:

INPUT OUTPUT
MEMORY DATA MEMORY DATA
LOCATION LOCATION
4100 4100
4101 4101
4102 4102
4103 4103
4104 4104
 7(B). DESCENDING ORDER

AIM:
To sort the given number in the descending order using 8085 microprocessor.

ALGORITHM:

1. Get the numbers to be sorted from the memory locations.

2. Compare the first two numbers and if the first number is smaller than second then I
interchange the number.
3. If the first number is larger, go to step 4
4. Repeat steps 2 and 3 until the numbers are in required order

RESULT:

Thus the descending order program is executed and thus the numbers are arranged in
descending order.
FLOWCHART: START

[B] 04H

[HL] [4100H]

[C] 04H

[A] [HL]

[HL [HL] + 1

IS
NO [A] < [HL]?

YES

[D] [HL]

[HL] [A]

[HL] [HL] - 1

[HL] [D]

[HL] [HL] + 1

[C] [C] – 01 H

A
 A

IS
[C] = 0? NO

YES
[B] [B]-1

IS
[B] = 0? NO

YES

STOP
PROGRAM:

ADDR OPCO LABEL MNEM OPER COMMENTS

E DE ONICS AND
SS
4000 MVI B,04 Initialize B reg with number
4001 of comparisons (n-1)
4002 LOOP 3 LXI H,4100 Initialize HL reg. to
4003 4100H
4004
4005 MVI C,04 Initialize C reg with no. of
4006 comparisons(n-1)
4007 LOOP2 MOV A,M Transfer first data to acc.
4004 INX H Increment HL reg. to point
next memory location
4009 CMP M Compare M & A
400A JNC LOOP1 If A is greater than M then go
400B to loop1
400C
400D MOV D,M Transfer data from M to D reg
400E MOV M,A Transfer data from acc to M
400F DCX H Decrement HL pair
4010 MOV M,D Transfer data from D to M
4011 INX H Increment HL pair
4012 LOOP1 DCR C Decrement C reg
4013 JNZ LOOP2 If C is not zero go to loop2
4014
4015
4016 DCR B Decrement B reg
4017 JNZ LOOP3 If B is not Zero go to loop3
4014
4019
401A HLT Stop the program

OBSERVATION:

INPUT OUTPUT
MEMORY DATA MEMORY DATA
LOCATION LOCATION
4100 4100
4101 4101
4102 4102
4103 4103
 4104 4104

9(A) BCD ADDITION

AIM:
 To add two 8 bit BCD numbers stored at consecutive memory locations.

ALGORITHM:

1. Initialize memory pointer to data location.

2. Get the first number from memory in accumulator.
3. Get the second number and add it to the accumulator
4. Adjust the accumulator value to the proper BCD value using DAA instruction.
5. Store the answer at another memory location.

RESULT:

Thus the 8 bit BCD numbers stored at 4500 &4501 are added and the result stored at 4502 &
4503.
FLOW CHART:

START

[C] 00H

[HL] 4500H

NO

Is there a
Carry ? YES

STOP
PROGRAM:

ADDRESS OPCODE LABEL MNEMONICS OPERAND COMMENT

4100 START MVI C, 00 Clear C reg.
4103
4102 LXI H, 4500 Initialize HL reg. to
4103 4500
4104
4105 MOV A, M Transfer first data to
accumulator
4106 INX H Increment HL reg. to
point next memory
Location.
4107 ADD M Add first number to
acc. Content.
4108 DAA Decimal adjust
accumulator
4109 JNC L1 Jump to location if
410A result does not yield
410B carry.
410C INR C Increment C reg.
410D L1 INX H Increment HL reg. to
point next memory
Location.
410E MOV M, A Transfer the result from
acc. to memory.
410F INX H Increment HL reg. to
point next memory
Location.
4110 MOV M, C Move carry to memory
4111 HLT Stop the program

OBSERVATION:

INPUT OUTPUT
4500 4502
4501 4503

9(B). BCD SUBTRACTION

AIM:

To Subtract two 8 bit BCD numbers stored at consecutive memory locations.

ALGORITHM:

1. Load the minuend and subtrahend in two registers.

2. Initialize Borrow register to 0.
3. Take the 100’s complement of the subtrahend.
4. Add the result with the minuend which yields the result.
5. Adjust the accumulator value to the proper BCD value using DAA instruction. If
there is a carry ignore it.
6. If there is no carry, increment the carry register by 1
7. Store the content of the accumulator (result)and borrow register in the specified
memory location

RESULT:

Thus the 8 bit BCD numbers stored at 4500 &4501 are subtracted and the result stored at 4502 &
4503.

FLOW CHART:
START
 Is there a
Carry ?

YES

NOSTOP

PROGRAM:
ADDRESS OPCODE LABEL MNEMONICS OPERAND COMMENT
 4100 START MVI D, 00 Clear D reg.
4101
4102 LXI H, 4500 Initialize HL reg. to
4103 4500
4104
4105 MOV B, M Transfer first data to
accumulator
4106 INX H Increment HL reg. to
point next mem.
Location.
4107 MOV C, M Move second no. to B
reg.
4108 MVI A, 99 Move 99 to the
4109 Accumulator
410A SUB C Subtract [C] from acc.
Content.
410B INR A Increment A register
410C ADD B Add [B] with [A]
410D DAA Adjust Accumulator
value for Decimal digits
410E JC LOOP Jump on carry to loop
410F
4110
4111 INR D Increment D reg.
4112 LOOP INX H Increment HL register
pair
4113 MOV M,A Move the Acc.content to
the memory location
4114 INX H Increment HL reg. to
point next mem.
Location.
4115 MOV M, D Transfer D register
content to memory.
4116 HLT Stop the program

OBSERVATION:

INPUT OUTPUT
4500 4502
4501 4503
10. 2 X 2 MATRIX MULTIPLICATION
AIM:

To perform the 2 x 2 matrix multiplication.

ALGORITHM:

1. Load the 2 input matrices in the separate address and initialize the HL and the DE register
pair with the starting address respectively.
2. Call a subroutine for performing the multiplication of one element of a matrix with the
other element of the other matrix.
3. Call a subroutine to store the resultant values in a separate matrix.

RESULT:

Thus the 2 x 2 matrix multiplication is performed and the result is stored at 4700,4701 , 4702 &
4703.
FLOW CHART:

START A

C 00H
HL 8500H

DE 8600H
Call subroutine
MUL
Call subroutine
MUL A A+B

B A Call subroutine
STORE

Call subroutine
MUL Is A=04H?
YES

A A+B
NO
Increment HL
Call subroutine reg. pair
STORE
STOP
B

Call subroutine
MUL

B A

BA A
 MUL
STORE

Is H=0 ?
YES
RET
NO

Is H=0 ?
NO

YES

RET
PROGRAM:

ADDRESS OPCOD LABEL MNEM OPERAN COMMENT

E ONICS D
8100 MVI C, 00 Clear C reg.
8101
8102 LXI H, 8500 Initialize HL reg. to
8103 4500
8104
8105 LOOP2 LXI D, 8600 Load DE register pair
8106
8107
8108 CALL MUL Call subroutine MUL
8109
810A
810B MOV B,A Move A to B reg.
810C INX H Increment HL register pair .
810D INX D Increment DE register pair
810E INX D Increment DE register pair
810F CALL MUL Call subroutine MUL
8110
8111
8112 ADD B Add [B] with [A]
8113 CALL STORE Call subroutine STORE
8114
8115
8116 DCX H Decrement HL register pair
8117 DCX D Decrement DE register pair
8118 CALL MUL Call subroutine MUL
8119
811A
811B MOV B,A Transfer A reg content to B reg.
811C INX H Increment HL register pair
811D INX D Increment DE register pair
811E INX D Increment DE register pair
811F CALL MUL Call subroutine MUL
8120
8121
8122 ADD B Add A with B
8123 CALL STORE Call subroutine MUL
8124
8125
8126 MOV A,C Transfer C register content to Acc.
 8127 CPI 04 Compare with 04 to check whether
8128 all elements are multiplied.
8129 JZ LOOP1 If completed, go to loop1
812A
812B
812C INX H Increment HL register Pair.
812D JMP LOOP2 Jump to LOOP2.
812E
812F
8130 LOOP1 HLT Stop the program.
8131 MUL LDAX D Load acc from the memory location
pointed by DE pair.
8132 MOV D,A Transfer acc content to D register.
8133 MOV H,M Transfer from memory to H register.
8134 DCR H Decrement H register.
8135 JZ LOOP3 If H is zero go to LOOP3.
8136
8137
8138 LOOP4 ADD D Add Acc with D reg
8139 DCR H Decrement H register.
813A JNZ LOOP4 If H is not zero go to LOOP4.
813B
813C
813D LOOP3 MVI H,85 Transfer 85 TO H register.
813E
813F MVI D,86 Transfer 86 to D register.
8140
8141 RET Return to main program.
8142 STORE MVI B,87 Transfer 87 to B register.
8143
8144 STAX B Load A from memory location
pointed by BC pair.
8145 INR C Increment C register.
8146 RET Return to main program.

OBSERVATION:

INPUT OUTPUT
4500 4600 4700
4501 4601 4701
4502 4602 4702
4503 4603 4703
 11. BIOS/DOS CALLS – DISPLAY

AIM:
To display a message on the CRT screen of a microcomputer using DOS calls.

ALGORITHM:
1. Initialize the data segment and the message to be displayed.
2. Set function value for display.
3. Point to the message and run the interrupt to display the message in the CRT.

PROGRAM:

ASSUME CS: CODE, DS: DATA

DATA SEGMENT
MSG DB 0DH, 0AH, “GOOD MORNING” , ODH, OAH, “$”
DATA ENDS
CODE SEGMENT
START: MOV AX, DATA
MOV DS, AX
MOV AH, 09H
MOV DX, OFFSET MSG
INT 21H
MOV AH, 4CH
INT 21H
CODE ENDS
END START

RESULT:
A message is displayed on the CRT screen of a microcomputer using DOS calls
 12. BIOS/DOS CALLS – FILE MANIPULATION
AIM:
To open a file using DOS calls.
ALGORITHM:
1. Initialize the data segment, file name and the message to be displayed.
2. Set the file attribute to create a file using a DOS call.
3. If the file is unable t o create a file display the message
PROGRAM:
ASSUME CS: CODE, DS: DATA
DATA SEGMENT
FILENAME DB “SAMPLE.DAT”, “$”
MSG DB 0DH, 0AH, “FILE NOT CREATED”, ODH, OAH, “$”
DATA ENDS
CODE SEGMENT
START: MOV AX, DATA
MOV DS, AX
MOV DX, OFFSET FILENAME
MOV CX, 00H
MOV AH, 3CH
INT 21H
JNC LOOP1
MOV AX, DATA
MOV DS, AX
MOV DX, OFFSET MSG
MOV AH, 09H
INT 21H
LOOP1 MOV AH, 4CH
INT 21H
CODE ENDS
END START
RESULT:
A file is opened using DOS calls.
 13. BIOS/DOS CALLS – DISK INFORMATION

AIM:
To display the disk information.

ALGORITHM:
1. Initialize the data segment and the message to be displayed.
2. Set function value for disk information.
3. Point to the message and run the interrupt to display the message in the CRT.

PROGRAM:

ASSUME CS: CODE, DS: DATA

DATA SEGMENT
MSG DB 0DH, 0AH, “GOOD MORNING” , ODH, OAH, “$”
DATA ENDS
CODE SEGMENT
START: MOV AX, DATA
MOV DS, AX
MOV AH, 36H
MOV DX, OFFSET MSG
INT 21H
MOV AH, 4CH
INT 21H
CODE ENDS
END START

RESULT:
The disk information is displayed.
 1.8086 STRING MANIPULATION – SEARCH A WORD

AIM:
To search a word from a string.

ALGORITHM:
1. Load the source and destination index register with starting and the ending
address respectively.
2. Initialize the counter with the total number of words to be copied.
3. Clear the direction flag for auto incrementing mode of transfer.
4. Use the string manipulation instruction SCASW with the prefix REP to search a
word from string.
5. If a match is found (z=1), display 01 in destination address. Otherwise, display 00
in destination address.
RESULT:
A word is searched and the count of number of appearances is displayed.
 PROGRAM:
ASSUME CS: CODE, DS: DATA
DATA SEGMENT
LIST DW 53H, 15H, 19H, 02H
DEST EQU 3000H
COUNT EQU 05H
DATA ENDS
CODE SEGMENT
START: MOV AX, DATA
MOV DS, AX
MOV AX, 15H
MOV SI, OFFSET LIST
MOV DI, DEST
MOV CX, COUNT
MOV AX, 00
CLD
REP SCASW
JZ LOOP
MOV AX, 01
LOOP MOV [DI], AX
MOV AH, 4CH
INT 21H
CODE ENDS
END START

INPUT:
LIST: 53H, 15H, 19H, 02H

OUTPUT:
3000 01
2.8086 STRING MANIPULATION –FIND AND REPLACE A WORD

AIM:
To find and replace a word from a string.

ALGORITHM:
1. Load the source and destination index register with starting and the ending
address respectively.
2. Initialize the counter with the total number of words to be copied.
3. Clear the direction flag for auto incrementing mode of transfer.
4. Use the string manipulation instruction SCASW with the prefix REP to search
a word from string.
5. If a match is found (z=1), replace the old word with the current word in
destination address. Otherwise, stop.

RESULT:
A word is found and replaced from a string.
 PROGRAM:
ASSUME CS: CODE, DS: DATA
DATA SEGMENT
LIST DW 53H, 15H, 19H, 02H
REPLACE EQU 30H
COUNT EQU 05H
DATA ENDS
CODE SEGMENT
START: MOV AX, DATA
MOV DS, AX
MOV AX, 15H
MOV SI, OFFSET LIST
MOV CX, COUNT
MOV AX, 00
CLD
REP SCASW
JNZ LOOP
MOV DI, LABEL LIST
MOV [DI], REPLACE
LOOP MOV AH, 4CH
INT 21H
CODE ENDS
END START

INPUT:
LIST: 53H, 15H, 19H, 02H

OUTPUT:
LIST: 53H, 30H, 19H, 02H
 3. 8086 STRING MANIPULATION – COPY A STRING

AIM:
To copy a string of data words from one location to the other.

ALGORITHM:
6. Load the source and destination index register with starting and the ending
address respectively.
7. Initialize the counter with the total number of words to be copied.
8. Clear the direction flag for auto incrementing mode of transfer.
9. Use the string manipulation instruction MOVSW with the prefix REP to copy a
string from source to destination.
RESULT:
A string of data words is copied from one location to other.
PROGRAM:
ASSUME CS: CODE, DS: DATA
DATA SEGMENT
SOURCE EQU 2000H
DEST EQU 3000H
COUNT EQU 05H
DATA ENDS
CODE SEGMENT
START: MOV AX, DATA
MOV DS, AX
MOV ES, AX
MOV SI, SOURCE
MOV DI, DEST
MOV CX, COUNT
CLD
REP MOVSW
MOV AH, 4CH
INT 21H
CODE ENDS
END START

INPUT: OUTPUT:
2000 48 3000 48
2001 84 3001 84
2002 67 3002 67
2003 90 3003 90
2004 21 3004 21
 4.8086 STRING MANIPULATION – SORTING

AIM:
To sort a group of data bytes.

ALGORITHM:
 Place all the elements of an array named list (in the consecutive memory
locations).
 Initialize two counters DX & CX with the total number of elements in the
array.
 Do the following steps until the counter B reaches 0.
o Load the first element in the accumulator
o Do the following steps until the counter C reaches 0.
1. Compare the accumulator content with the next element present in
the next memory location. If the accumulator content is smaller go
to next step; otherwise, swap the content of accumulator with the
content of memory location.
2. Increment the memory pointer to point to the next element.
3. Decrement the counter C by 1.
 Stop the execution.

RESULT:
A group of data bytes are arranged in ascending order.

PROGRAM:
 ASSUME CS: CODE, DS: DATA
DATA SEGMENT
LIST DW 53H, 25H, 19H, 02H
COUNT EQU 04H
DATA ENDS
CODE SEGMENT
START: MOV AX, DATA
MOV DS, AX
MOV DX, COUNT-1
LOOP2: MOV CX, DX
MOV SI, OFFSET LIST
AGAIN: MOV AX, [SI]
CMP AX, [SI+2]
JC LOOP1
XCHG [SI +2], AX
XCHG [SI], AX
LOOP1: ADD SI, 02
LOOP AGAIN
DEC DX
JNZ LOOP2
MOV AH, 4CH
INT 21H
CODE ENDS
END START

INPUT:
LIST: 53H, 25H, 19H, 02H

OUTPUT:
LIST: 02H, 19H, 25H, 53H
 4. INTERFACING 8255 WITH 8085
AIM:
To interface programmable peripheral interface 8255 with 8085 and study its
characteristics in mode0,mode1 and BSR mode.

APPARATUS REQUIRED:

8085 p kit, 8255Interface board, DC regulated power supply, VXT parallel bus
I/O MODES:
Control Word:

MODE 0 – SIMPLE I/O MODE:

This mode provides simple I/O operations for each of the three ports and is
suitable for synchronous data transfer. In this mode all the ports can be configured either as input
or output port.
Let us initialize port A as input port and port B as output port
PROGRAM:
ADDRES OPCODES LABEL MNEMONICS OPERAND COMMENTS
S
4100 START: MVI A, 90 Initialize port A as Input
4101 and Port B as output.
4102 OUT C6 Send Mode Control
4103 word
4104 IN C0 Read from Port A
4105
4106 OUT C2 Display the data in port
4107 B
4108 STA 4200 Store the data read from
4109 Port A in 4200
410A
410B HLT Stop the program.

MODE1 STROBED I/O MODE:

In this mode, port A and port B are used as data ports and port C is used as control
signals for strobed I/O data transfer.
Let us initialize port A as input port in mode1

MAIN PROGRAM:

ADDRES OPCODES LABEL MNEMONICS OPERAND COMMENTS

S
4100 START: MVI A, B4 Initialize port A as Input
4101 port in mode 1.
4102 OUT C6 Send Mode Control
4103 word
4104 MVI A,09 Set the PC4 bit for INTE
A
4105
4106 OUT C6 Display the data in port
B
4107
EI
4108 MVI A,08 Enable RST5.5
4109
410A SIM
EI
410B HLT Stop the program.
ISR (Interrupt Service Routine)
ADDRES OPCODES LABEL MNEMONICS OPERAND COMMENTS
S
4200 START: IN C0 Read from port A
4201
4202 STA 4500 Store in 4500.
4203
4204
4205 HLT Stop the program.

Sub program:
ADDRESS OPCODES LABEL MNEMONICS OPERAND COMMENTS
405E JMP 4200 Go to 4200
405F
4060

BSR MODE (Bit Set Reset mode)

 Any lines of port c can be set or reset individually without affecting other lines using this
mode. Let us set PC0 and PC3 bits using this mode.

PROGRAM:

ADDRES OPCODES LABEL MNEMONICS OPERAND COMMENTS

S
4100 START: MVI A, 01 Set PC0
4101
4102 OUT C6 Send Mode Control
4103 word
4104 MVI A,07 Set PC3
4105
4106 OUT C6
 4107 Send Mode Control
word
4109 HLT Stop the program.

RESULT:
Thus 8255 is interfaced and its characteristics in mode0,mode1 and BSR mode is
studied.

6. INTERFACING 8253 TIMER WITH 8085

Interfacing 8253 Programmable Interval Timer with 8085 p

AIM:
To interface 8253 Interface board to 8085 p and verify the operation of 8253in six different

modes.

APPARATUS REQUIRED:
8085 p kit, 8253 Interface board, DC regulated power supply, VXT parallel bus, CRO.

Mode 0 – Interrupt on terminal count:

The output will be initially low after mode set operations. After loading the counter, the

output will be remaining low while counting and on terminal count; the output will become

high, until reloaded again.

 Let us set the channel 0 in mode 0. Connect the CLK 0 to the debounce circuit by
changing the jumper J3 and then execute the following program.

Program:
Address Opcodes Label Mnemonic Operands Comments
4100 START: MVI A, 30 Channel 0 in mode 0
4102 OUT CE Send Mode Control word
4104 MVI A, 05 LSB of count
4106 OUT C8 Write count to register
4108 MVI A, 00 MSB of count
410A OUT C8 Write count to register
410C HLT

It is observed in CRO that the output of Channel 0 is initially LOW. After giving six clock
pulses, the output goes HIGH.

Mode 1 – Programmable ONE-SHOT:

After loading the counter, the output will remain low following the rising edge of the gate
input. The output will go high on the terminal count. It is retriggerable; hence the output will
remain low for the full count, after any rising edge of the gate input.

Example:
The following program initializes channel 0 of 8253 in Mode 1 and also initiates
triggering of Gate 0. OUT 0 goes low, as clock pulse after triggering the goes back to high level
after 5 clock pulses. Execute the program, give clock pulses through the debounce logic and
verify using CRO.

Address Opcodes Label Mnemonic Operands Comments

4100 START MVI A, 32 Channel 0 in mode 1
:
4102 OUT CE Send Mode Control word
4104 MVI A, 05 LSB of count
4106 OUT C8 Write count to register
4108 MVI A, 00 MSB of count
410A OUT C8 Write count to register
410C OUT D0 Trigger Gate0
4100 HLT

Mode 2 – Rate Generator:

It is a simple divide by N counter. The output will be low for one period of the input clock.

The period from one output pulse to the next equals the number of input counts in the count
 register. If the count register is reloaded between output pulses the present period will not be

affected but the subsequent period will reflect the new value.

Example:
Using Mode 2, Let us divide the clock present at Channel 1 by 10. Connect the CLK1 to

PCLK.

Address Opcodes Label Mnemonic Operands Comments

4100 3E 74 START MVI A, 74 Channel 1 in mode 2
:
4102 D3 CE OUT CE Send Mode Control word
4104 3E 0A MVI A, 0A LSB of count
4106 D3 CA OUT CA Write count to register
4108 3E 00 MVI A, 00 MSB of count
410A D3 CA OUT CA Write count to register
410C 76 HLT
In CRO observe simultaneously the input clock to channel 1 and the output at Out1.

Mode 3 Square wave generator:

It is similar to Mode 2 except that the output will remain high until one half of count and go

low for the other half for even number count. If the count is odd, the output will be high for

(count + 1)/2 counts. This mode is used of generating Baud rate for 8251A (USART).

Example:
We utilize Mode 0 to generate a square wave of frequency 150 KHz at channel 0.
Address Opcodes Label Mnemonic Operands Comments
4100 3E 36 START MVI A, 36 Channel 0 in mode 3
:
4102 D3 CE OUT CE Send Mode Control word
4104 3E 0A MVI A, 0A LSB of count
4106 D3 C8 OUT C8 Write count to register
4108 3E 00 MVI A, 00 MSB of count
410A D3 C8 OUT C8 Write count to register
410C 76 HLT
Set the jumper, so that the clock 0 of 8253 is given a square wave of frequency 1.5 MHz. This
program divides this PCLK by 10 and thus the output at channel 0 is 150 KHz.

Vary the frequency by varying the count. Here the maximum count is FFFF H. So, the
square wave will remain high for 7FFF H counts and remain low for 7FFF H counts. Thus with
the input clock frequency of 1.5 MHz, which corresponds to a period of 0.067 microseconds, the
resulting square wave has an ON time of 0.02184 microseconds and an OFF time of 0.02184
microseconds.

To increase the time period of square wave, set the jumpers such that CLK2 of 8253 is
connected to OUT 0. Using the above-mentioned program, output a square wave of frequency
150 KHz at channel 0. Now this is the clock to channel 2.

Mode 4: Software Triggered Strobe:

The output is high after mode is set and also during counting. On terminal count, the
output will go low for one clock period and becomes high again. This mode can be used for
interrupt generation.
The following program initializes channel 2 of 8253 in mode 4.

Example:
Connect OUT 0 to CLK 2 (jumper J1). Execute the program and observe the output
OUT 2. Counter 2 will generate a pulse after 1 second.

Address Opcodes Label Mnemonic Operands Comments

4100 START MVI A, 36 Channel 0 in mode 0
:
4102 OUT CE Send Mode Control word
4104 MVI A, 0A LSB of count
4106 OUT C8 Write count to register
4108 MVI A, 00 MSB of count
410A OUT C8 Write count to register
410C MVI A, B8 Channel 2 in Mode 4
410E OUT CE Send Mode control Word
4110 MVI A, 98 LSB of Count
4112 OUT CC Write Count to register

6. INTERFACING 8253 TIMER WITH 8085

 Interfacing 8253 Programmable Interval Timer with 8085 p

AIM:
To interface 8253 Interface board to 8085 p and verify the operation of 8253in six different

modes.

APPARATUS REQUIRED:
8085 p kit, 8253 Interface board, DC regulated power supply, VXT parallel bus, CRO.

Mode 0 – Interrupt on terminal count:

The output will be initially low after mode set operations. After loading the counter, the

output will be remaining low while counting and on terminal count; the output will become

high, until reloaded again.

Let us set the channel 0 in mode 0. Connect the CLK 0 to the debounce circuit by
changing the jumper J3 and then execute the following program.

Program:
Address Opcodes Label Mnemonic Operands Comments
4100 START: MVI A, 30 Channel 0 in mode 0
4102 OUT CE Send Mode Control word
4104 MVI A, 05 LSB of count
4106 OUT C8 Write count to register
4108 MVI A, 00 MSB of count
410A OUT C8 Write count to register
410C HLT

It is observed in CRO that the output of Channel 0 is initially LOW. After giving six clock
pulses, the output goes HIGH.

Mode 1 – Programmable ONE-SHOT:

After loading the counter, the output will remain low following the rising edge of the gate
input. The output will go high on the terminal count. It is retriggerable; hence the output will
remain low for the full count, after any rising edge of the gate input.

Example:
The following program initializes channel 0 of 8253 in Mode 1 and also initiates
triggering of Gate 0. OUT 0 goes low, as clock pulse after triggering the goes back to high level
after 5 clock pulses. Execute the program, give clock pulses through the debounce logic and
verify using CRO.

Address Opcodes Label Mnemonic Operands Comments

4100 START MVI A, 32 Channel 0 in mode 1
:
4102 OUT CE Send Mode Control word
4104 MVI A, 05 LSB of count
4106 OUT C8 Write count to register
4108 MVI A, 00 MSB of count
410A OUT C8 Write count to register
410C OUT D0 Trigger Gate0
4100 HLT

Mode 2 – Rate Generator:

It is a simple divide by N counter. The output will be low for one period of the input clock.

The period from one output pulse to the next equals the number of input counts in the count

register. If the count register is reloaded between output pulses the present period will not be

affected but the subsequent period will reflect the new value.

Example:
Using Mode 2, Let us divide the clock present at Channel 1 by 10. Connect the CLK1 to

PCLK.

Address Opcodes Label Mnemonic Operands Comments

4100 3E 74 START MVI A, 74 Channel 1 in mode 2
:
4102 D3 CE OUT CE Send Mode Control word
4104 3E 0A MVI A, 0A LSB of count
4106 D3 CA OUT CA Write count to register
4108 3E 00 MVI A, 00 MSB of count
410A D3 CA OUT CA Write count to register
410C 76 HLT
In CRO observe simultaneously the input clock to channel 1 and the output at Out1.

Mode 3 Square wave generator:

 It is similar to Mode 2 except that the output will remain high until one half of count and go

low for the other half for even number count. If the count is odd, the output will be high for

(count + 1)/2 counts. This mode is used of generating Baud rate for 8251A (USART).

Example:
We utilize Mode 0 to generate a square wave of frequency 150 KHz at channel 0.
Address Opcodes Label Mnemonic Operands Comments
4100 3E 36 START MVI A, 36 Channel 0 in mode 3
:
4102 D3 CE OUT CE Send Mode Control word
4104 3E 0A MVI A, 0A LSB of count
4106 D3 C8 OUT C8 Write count to register
4108 3E 00 MVI A, 00 MSB of count
410A D3 C8 OUT C8 Write count to register
410C 76 HLT
Set the jumper, so that the clock 0 of 8253 is given a square wave of frequency 1.5 MHz. This
program divides this PCLK by 10 and thus the output at channel 0 is 150 KHz.

Vary the frequency by varying the count. Here the maximum count is FFFF H. So, the
square wave will remain high for 7FFF H counts and remain low for 7FFF H counts. Thus with
the input clock frequency of 1.5 MHz, which corresponds to a period of 0.067 microseconds, the
resulting square wave has an ON time of 0.02184 microseconds and an OFF time of 0.02184
microseconds.

To increase the time period of square wave, set the jumpers such that CLK2 of 8253 is
connected to OUT 0. Using the above-mentioned program, output a square wave of frequency
150 KHz at channel 0. Now this is the clock to channel 2.

Mode 4: Software Triggered Strobe:

The output is high after mode is set and also during counting. On terminal count, the
output will go low for one clock period and becomes high again. This mode can be used for
interrupt generation.
The following program initializes channel 2 of 8253 in mode 4.

Example:
Connect OUT 0 to CLK 2 (jumper J1). Execute the program and observe the output
OUT 2. Counter 2 will generate a pulse after 1 second.

Address Opcodes Label Mnemonic Operands Comments

4100 START MVI A, 36 Channel 0 in mode 0
:
4102 OUT CE Send Mode Control word
4104 MVI A, 0A LSB of count
4106 OUT C8 Write count to register
4108 MVI A, 00 MSB of count
410A OUT C8 Write count to register
410C MVI A, B8 Channel 2 in Mode 4
410E OUT CE Send Mode control Word
4110 MVI A, 98 LSB of Count
4112 OUT CC Write Count to register
The given decimal number is converted to hexadecimal number.

\
PROGRAM:
MOV DPTR, #4500
MOVX A, @DPTR
MOV B, #0A
MUL A, B
MOV B, A
INC DPTR
MOVX A, @DPTR
ADD A, B
INC DPTR
MOVX @DPTR, A
HLT: SJMP HLT

INPUT OUTPUT
4500 23 4501 17

13. STEPPER MOTOR INTERFACING WITH 8051

AIM:
To interface a stepper motor with 8051 microcontroller and operate it.
THEORY:
A motor in which the rotor is able to assume only discrete stationary angular position is a
stepper motor. The rotary motion occurs in a step-wise manner from one equilibrium position to
the next. Stepper Motors are used very wisely in position control systems like printers, disk
drives, process control machine tools, etc.
The basic two-phase stepper motor consists of two pairs of stator poles. Each of the four
poles has its own winding. The excitation of any one winding generates a North Pole. A South
Pole gets induced at the diametrically opposite side. The rotor magnetic system has two end
faces. It is a permanent magnet with one face as South Pole and the other as North Pole.
The Stepper Motor windings A1, A2, B1, B2 are cyclically excited with a DC current to
run the motor in clockwise direction. By reversing the phase sequence as A1, B2, A2, B1,
anticlockwise stepping can be obtained.

2-PHASE SWITCHING SCHEME:

In this scheme, any two adjacent stator windings are energized. The switching scheme is
shown in the table given below. This scheme produces more torque.

ANTICLOCKWISE CLOCKWISE
STEP A1 A2 B1 B2 DATA STEP A1 A2 B1 B2 DATA
1 1 0 0 1 9h 1 1 0 1 0 Ah
2 0 1 0 1 5h 2 0 1 1 0 6h
3 0 1 1 0 6h 3 0 1 0 1 5h
4 1 0 1 0 Ah 4 1 0 0 1 9h

ADDRESS DECODING LOGIC:

The 74138 chip is used for generating the address decoding logic to generate the device
select pulses, CS1 & CS2 for selecting the IC 74175.The 74175 latches the data bus to the
stepper motor driving circuitry.
Stepper Motor requires logic signals of relatively high power. Therefore, the interface
circuitry that generates the driving pulses use silicon darlington pair transistors. The inputs for
the interface circuit are TTL pulses generated under software control using the Microcontroller
Kit. The TTL levels of pulse sequence from the data bus is translated to high voltage output
pulses using a buffer 7407 with open collector.
PROGRAM :

Address
OPCODES
Label Comments
ORG 4100h

4100 START: MOV DPTR, #TABLE Load the start

address of switching
scheme data TABLE
into Data Pointer
(DPTR)
4103 MOV R0, #04 Load the count in R0
4105 LOOP: MOVX A, @DPTR Load the number in
TABLE into A
4106 PUSH DPH Push DPTR value to
4108 PUSH DPL Stack
410A MOV DPTR, #0FFC0h Load the Motor port
address into DPTR
410D MOVX @DPTR, A Send the value in A
to stepper Motor port
address
410E MOV R4, #0FFh Delay loop to cause
4110 DELAY MOV R5, #0FFh a specific amount of
: time delay before
4112 DELAY DJNZ R5, DELAY1 next data item is sent
1: to the Motor
4114 DJNZ R4, DELAY
4116 POP DPL POP back DPTR
4118 POP DPH value from Stack
411A INC DPTR Increment DPTR to
point to next item in
the table
411B DJNZ R0, LOOP Decrement R0, if not
zero repeat the loop
411D SJMP START Short jump to Start
of the program to
make the motor
rotate continuously
411F TABLE: DB 09 05 06 0Ah Values as per two-
phase switching
scheme

PROCEDURE:
Enter the above program starting from location 4100.and execute the same. The stepper
motor rotates. Varying the count at R4 and R5 can vary the speed. Entering the data in the look-
up TABLE in the reverse order can vary direction of rotation.
RESULT:
Thus a stepper motor was interfaced with 8051 and run in forward and reverse directions
at various speeds.