Analog Electronics

UNIT-I
SINGLE STAGE AND MULTISTAGE AMPLIFIERS
1) Amplifier:
A amplifier is a circuit which increases the strength or weak signal.

2) CLASSIFICATION OF AMPLIFIER
1) CLASSIFICATION BASED ON FREQUENCY.
1) DC amplifier
2) audio amplifier (20 hz to 20khz)
3) video amplifier (few mhz)
4) radio frequency amplifier ( khz to 20 mhz)
5) ultra high frequency (GHZ)
2) CLASSIFICATION BASED ON OPERATION.
1) CLASS A ( Conduction angle 0 to 3600)
2) CLASS B (conduction angle 0 to 1800)
3) C LASS c (Conduction angle < 1800)
4) CLASS AB (conduction angle grater than 1800 & lesser than 3600
3) CLASSIFICATION BASED ON COUPLING
1) RC coupling
2) Transformer coupling
3) Direct coupling
4) CLASSIFICATION BASED ON LOAD
1) resistive
2) inductive
5) CLASSIFICATION BASED ON APPLICATION
1) VOLTAGE AMPLIFIER
2) CURRENT AMPLIFIER
3) POWER AMPLIFIER
4) TUNED AMPLIFIER

TRANSISTOR HYBRID MODEL

1) consider a BJT as two part device (ce configuration)

h - parameter equations
V1 = h11 I1 + h12 V2
I2 = h21 I1 + h22 V2
For CE configuration
VBE = hie IB + hre Vce
IC = hfe IB + hoe Vce
Short circuit port 221, Vce = 0
Input impendence hie =
Forward current gain hfe =
Open circuit port 111, IB = 0
Reverse voltage gain hre =
Output admittance hoe =
 Exact h- parameter small signal model

2) COMMON COLLECTOR CONFIGURATION

1) Consider a BJT as two port device (cc configuration)

H – Parameter equations
V1 = h11 I1 + h12 V2
I2 = h21 I1 + h22 V2
For cc configuration
VBC = hie Ib + Vhrc VEC
-IE = hfc IB + hoc VEC
Short circuit port 221 VEC = 0

Input impendence hic =

Forward circuit gain hfe =

Open circuit port 111 = 0

Reverse voltage gain hrc =

Output admittance hoc =

4) CE SINGLE STAGE AMPLITIER WITH RS & RL

1) Consider CE amplifiers
 VBE = hie IB + hre VCE
IC = hfe IB + hoe VCE
2) A.C analysis
1) Current gain

AI = =

IC = hfe IB + hoe VCE

IB
= hfe + hoe
= hfe + hoe
[ 1+ hoe RL ] = hfe

=
 AI = =

2) INPUT IMPENDENCE

Ri = =
Consider equation (1)

VBE = hie IB + hre VCE

VBE = hie IB + hre (- )
= hie IB + hre (- )

Ri = = hie + hre AI . RL.

3) VOLTAGE GAIN

Av = = =
IB
=
Av =
4) OUTPUT ADMITTANCE

Y0 = =

= hfe IB + hoe VCE

VCE

= hfe + hoe

Consider input 100p ( KVL)

Vs - IB RS - IB hie – hre VCE = 0

Let VS = 0,

=
Using above equation

Output resistance R0 =

3) SIMPLIFIED H- PARAMETER MODEL

In practice the voltage ‘hre Vce’ is very less value when compared to IB hie , hence hre VCE is
neglected similarly the load resistance RL is selected minimum times lesser than (1/hoe) Ω, hence
hoe is neglected.

By removing hre VCE and hoe simplified

model is obtained. The approximate values are very near to the exact values.

Approximate h – parameter model

EXACT IMPLIFIED

1) Current gain AI = AI =

2) Input resistance Ri = hie + hre AI . RL. Ri = hie

3) Voltage gain Av = Av =

4) output admittance Y0 = hoe – Y0 =

SIMPLIFIED C.C CONFIGURATION

1) consider common collector configuration

Exact – h- parameter model.

 Simplified – h- parameter model.

2) CURRENT GAIN

AI = =

-IE = hfc IB + hoe VEC

-IE = hfc IB + hoe IE . RL
- hfc IB = IE + hoe IE . RL
- hfc IB = IE (1+ hoe RL)
AI = = - hfc = 1+ hfe

3) INPUT RESISTANCE

Ri = =

Consider eq (1) VBC = hie IB + hre VEC

VBC = hic IB + hrc VEC

IB
= hic IB + hrc
Ri = = hic + hre AI hic + 1. (1 + hfe) RL
3) VOLTAGE GAIN:

AV = = =

IB

Consider eq :

Av =

Av =

>>
 Neglected

Av =

Av = 1
4) OUTPUT RESISTANCE

R0 = =
KVL to input loop

Vs - IB RS - IB hic – hrc VEC = 0

Let VS = 0,

- IB RS - IB hic – 1. VEC = 0

– VEC = IB (RS + hic)

R0 = =

R0 =
6) SIMPLIFIED CB CONFIGURATION.

1) Consider CB configuration as shown below.

 Exact – h- parameter model

Simplified hybrid model

1) current gain (AI ).

AI = =
 =

AI 1
2) INPUT RESISTANCE (Ri)

Ri = = =

Ri =

3) VOLTAGE GAIN (AV)

AV = = =

AV =
4) OUTPUT RESISTANCE (

= =

7)CE AMPLIFIER WITH RE & CE ( BY PASS CAPACITOR)

1) A single stage CE amplifier is shown blow.

2) A.C analysis
 h- Parameter equivalent circuit VCE = - IC.

= RL ║RC
3) CURRENT GAIN AI

AI = =

-IC = hfe`1 2347890= IB + hoe VCE

IB

= hfe + hoe
+ hoe = hfe
+ [ 1+ hoe = hfe
=

AI = =
4) INPUT IMPENDANCE

Ri = =

VBE = hfe IB + hoe VCE

VBE = hfe IB + hoe (-IC )

IB

= hfe + hoe .

5) VOLTAGE GAIN:

AV = = =

IB

AV =

AV =
6) OUTPUT RESISTANCE

7) FOR CIRCUIT.

a) Current gain

AIS = =
IB = IS IL = -IC

= =
AIS =
b) VOLTAGE GAIN.
AVS = =
=
=
AVS = AV yh
c) Input resistance
= R1 R2 Ri
4) Output resistance
= R L RC RO

8) CE AMPLIFIER with EMITTER (short circuited = 0)

 1) ACE amplifier is
shown below.

VCE = -IC. , = RC RL
[NOTE: The previous circuit and this circuit are same]

1) AI = → AIS =
2) = + → = R1 R2 Ri

3) Av = → AVS = Av
4) = → = RL RC RO.

CE AMPLIFIER WITH RE RESISTOR.

1) A CE amplifier with only RE resistance is considered
Approximate h- parameter model
IE = IB + IC = IB + hfe IB = IB[1+ hfe]
VCE = -IC. , = RL RC
A.C analysis for transistor.
2) Current gain AI
AI = =
AI -
3) Input resistance
Ri = =
VBE =+ IE RE
VBE =+ (1+hfe ) RE
Ri = = + ( 1+ ) RE
[Very high input resistance]

4) VOLTAGE GAIN

AV = = =

=
 =
5) Output Resistance

RO = =
A.C analysis for circuit
1) Current gain

= =
=
=

IL = -IC
=
AIS =

2) VOLTAGE GAIN
AVS = =
=
=
AVS = AV
3) INPUT REISTANCE
= R1 R2 Ri
4) OUTPUT RESISTANCE
= R L RC RO
10) COMMON COLLECTOR (OR) EMITTER FOLLOWER (OR) VOLTAGE
FOLLOWER
1) in the emitter or voltage follower circuit the output for voltage follow is input voltage hence
named voltage follower. The voltage across RE resistor is output voltage.
2) The voltage gain of this circuit is amity. Hence if can be used as voltage buffer circuit.
3) The emitter follower circuit has high current.
4) The input resistance of this circuit is very high.
5) A emitter follower circuit is shown in below.
VEC = -IE. , = RE RL

6) AC analysis for transistor

a) Current gain AI =

- IE = hfc IB + hoc VEC

- IE = hfc IB + hoc IE

= hfc + hoc
-hfc = + hoc
[1+ hoc ] = - hfc
AI = = = 1+
B) INPUT RESISTANCE
Ri = =
VBc = hic IB + hrc VEC
VBc = hic IB + hrc .IE

= hic + hrc .

Ri = = hic + hrc .AI = hie + 1 (1+ hfe )

C) VOLTAGE GAIN

AV = = =

= = =
=
= ,

- neglected.
AV = = 1
Vo = Vi, output voltage follows input voltage.

D) OUTPUT RESISTANCE. (RO)

Ro =

7) A.C analysis for circuit.

a) Current gain

AIS = =
 IB = IS

IL = IE
=
AIS =
b) VOLTAGE GAIN
AVS = =

=
=
AVS = AV
c) Input resistance
= R1 R2 Ri
b) Output resistance
= R L RE RO

MILLERS THOREM.
1) According to millers theorem, when even a resistor is connected between two nodes fig (1), it
can be replaced as shown in fig (2)
Where Z1 & Z2 are given by
Z1 = , Z2 = Z
K = = AV
Where Vi is voltage at node 1 and V0 is voltage at node 2.

2) proof
Consider a circuit shown in fig.3

Z1 =
I=
=
Z1 = =
Z1 = =
Consider a net work shown in fig . 4
Z2 =
I=
=
Z2 = = =
Z2 = = Z [K > > 1]
12) DUAL OF MILLER’S THWOREM
Consider a network shown in fig 1 (a) now Z1 is the impendence between node 3 and ground N.
according to dual of millers theorem Z1 can be split into Z1 and Z2 such that Z1 is placed in mesh
1 and Z2 is added to mesh 2 as shown in fig 1 (b) and node 3 is grounded.

AI = , Z2 = Z1
Z1 = Z1 ( 1- AI) Z2 Z1

COLLECTOR BASE BIAS CE AMPLIFIER.

1) A CE amplifier with collector base bias is shown below.
Using miller theorem.
2) A.C analysis for transistor.
a) Current gain
b) input resistance
c) Voltage gain
AI = = = -
= = = =
= = =

=
=
= Z2
b) Output resistance R0 =
3) A.C analysis for circuit
a) current gain
= =
AIS = (-hfe)
b) VOLTAGE GAIN
= =
=

C) Input resistance ()
= Z1 Ri
d) Output resistance
= RL Z2
RC COUPLED CE AMPLIFIER DESIGN.
1) A RC coupled CE amplifier is shown below
ASSIGNMENT – I
1) explain about single stage CE amplifier. Explain function of each component.
2) Explain CB, CE, CC configuration with h- parameter analys and draw equivalent circuits.
3) Explain how h- parameters can be obtained from the transistor characteristics.
4) list the benefits or h- parameter.
5) derive the expressions for AI , AIS , AV, AVS, Ri, Ri1, R0 , R01 for CE amplifier.
6) give analysis for CE amplifier with RE
7) draw the circuit of CB amplifier and its h- parameter equivalent circuit.
8) explain follower circuit.
 (or)
Explain voltage follower circuit
(or)
Given analysis of C.C amplifier.

9) state and explain milter’s theorem and its dual.

10) design a single stage RC coupled amplifier.

ASSIGNMENT – 2

CE AMPLIFIER

1) Consider a single stage CE amplifier with

RS = 1k, R1 = 50k, R2 = 2k, Rc = 2k, RL = 2k, hfe = 50,

hie = 1.1k, hoe = 25 and hre = 2.5 10-4

as shown in fig 1. Find AV , AVS , AI , AIS , Ri , Ri1 , R0 , R01 ,

AI = -50

AIS = -15.9

AV = -45.45

AVS = -18.71

RI = 1.1K

RO = 40K

RI1 = 700Ω
Ro1 = 1 k

2) Consider a single stage CE amplifier with Rs = 1 KΩ, R1 = 50KΩ, R2 = 2K, Rc = 1KΩ, RL =

1.2 kΩ, hfe = 2.5 50, hie = 1.1K, hoe = 25µA/V, hre = 2.5 10-4, as shown in fig.2.

Find AI, AIS, Ri , , AV, Avs, R0,

AI = -49.32

AIS = -14.29

AV = -25.61

AVS = 10.1

Ri = 1093Ω

RO = 55.8K

Ri1 = 696.9Ω

Ro1 = 540Ω

3) the transistor amplifier shown in fig. 3 has h- parameter typical values hie = 1100Ω , hfe =
50, hre = 2.5 10-4 hoe = . . Find AVS , AIS , Ro1, Ri1
 AVS = 18.22

AIS = -39.856

Ro1 = 4487Ω

Ri1 = 0.9367 KΩ

4) the transistor used in the circuit show in fig 4, has following values hie = 500Ω, hre = 60,

hoe = 1/40k, calculate Ri , Ri1, AV , AVS , AI , AIS , Ro, Ro1

Ans

AI = -60

AIS = -25.58

AV = -257.16

AVS = -85.49

RI = 500Ω

Ri
1
= 498 Ω

Ro1 = 2.143K
5) For the circuit shown in fig .5:

Find, Ri , Ri1, Ro, Ri1, AVS, AI

Use typical values.

Ans:

AI = -200

AV = -200

AVS = -71.13

Ri = 4K
1
Ri = 2.76K

Ro1 = 4K

CE amplifier with RE

6) Find current gain, voltage gain, input and output resistance for unbypassed CE amplifier. In
fig 6.

Ans:
AI = -50

AIS = -2.6

AV = -1.834

AVS = -1.15

Ri = 14.87
1
Ri = 1.7K

AI = -0.454

Ro1 = 545.45Ω

7) For fig.6 use typical values of h parameter and Rs = 10K, R1 = 100K, R2 = 10K, Re = 1K, RL =
5k.

Find Ri , Ri1, AV , AVS , AI , AIS , Ro, Ro1

Ans: (AI = -43.45, -7.24 , -4.77, -2.05, 45.48K, 7.576K, 215K, 4.8K)

CC Amplifier

8) A common collector circuit shown in fig .8 has the following parameters, Rs = 600Ω, R1 = 27K,
R2 = 27K, Re = 5.6K, RL = 47kΩ. hie = 1K, hfe = 85,

hoe = 2µA/V,

Find Ri ,AV , AVS , AI , AIS , Ro

Ans:

AI = 86

AIS = -0.273,
AV = 0.997,

AVS = 0.953

Ri = 431.33K

Ri1 = 13.09K

Ro = 18.3Ω

Ro1 = 18.23Ω

9) The circuit shown in fig 9. Has hfe = 100, hie= 3.37KΩ neglected hre , hoe , find Ri1, AV, AI.

AI = 101

Ri = 568.9K

Ri1 = 231.39K

AV = 0.994,

AIS = 41

MILLER’S CIRCUIT
 10) Find, AI , AVS , Ri , Ro for circuit shown
in fig .10

AI = -8.25

Ri1 = 1.048K

R01 = 5K

AVS = -69.8

MULTISATAGE AMPLIFIERS
1) INTRODUCTION
A single stage amplifier provides amplification of for a weak signal, but the gain of single stage
may not be sufficient for contain applications. Under such cases we go for multistage
amplification i.e., amplifying ‘a signal again and again. Sometimes the impendance matching at
source and load is not proper in such matching at source and load is not proper, in such cases
using a cascaded amplifier, the above requirement can be achieved.
2)TWO STAGE RC COUPLED CE-CE CASCADED AMPLIFIER.

1) A CE -CE cascaded amplifier is shown below. fig.1

h- Parameter equivalent circuit for CE – CE cascade amplifier is shown below. Fig 2.

2) Analysis of second stage.

1) Current gain
AI2 = - =
2) Input resistance
 = +
3) Voltage gain
=

3) Analysis of first stage.

The input resistance is load resistance for first stage.

= = R3 ║ R4 ║

= ║ = ║║║

1) Current gain
= =
2) Input resistance
= +
3) Voltage gain
=

4) OVERALL GAIN.
1) Total voltage gain
AV =
= AV
2) Input resistance
= R1
3) output resistance
=
4) Current gain AI
For finding current gain, loading effect must be considered. Hence the gain is calculated as
shown below.
AI = = =

AI = -
With source resistance RS
AIS = =
AIS =
AIS = (- (-
= R1

= R3 ║ R4 ║

=
=
=
3) TWO – STAGE RC COUPLED CE-C.C CASCADED AMPLIFIER.
1) A two stage CE-C.C amplifier is shown below in fig .1

h- Parameter model of two stage CE – CC amplifier

2) A.C analysis of second stage.

1) Current gain
AI2 = -
2) Input resistance
= +
3) Voltage gain
=

3) A.C analysis of first stage.

1) Current gain
= ,
= =
2) Input resistance
= +
3) Voltage gain
=

3) Over all gain:

1) Voltage gain (AV)
AV =
= AV
2) Current gain (AI)
AI = =

AI =
3) Input resistance Ri
=
4) Output resistance Ro

Ro = ║

= -
Ro =

4) CE – CB CASCODE AMPLIFIER.
h- Parameter equivalent for CE – CB amplifier

2) A.C analysis of second stage (CB)

1) Current gain
AI2 = = 1
2) Input resistance
=
3) Voltage gain
=

3) A.C analysis of first stage (CE)

1) Current gain
=-
2) Input resistance
=
3) Voltage gain
=

4) Over all gain:

1) Voltage gain (AV)
AV =
=
2) Output resistance

RO = ║

3) Input resistance

Ri = ║║

4) Current gain
AIS = =
= = -1
= = -1
= ,

= ║.

AIS = (-1)
AIS =
5) DARLINGTON PAIR [high input resistance circuit]

1) The common collector circuit has high input impendence about 200k Ω to 300kΩ. when
considered with biasing resistors, for a emitter follower has input impendence lers 500kΩ
2) The input impendence of the circuit can be improved by direct coupling of two stages of
emitter followers amplifier. By using following two methods.
1) Using direct coupling (Darlington pair)
2) Using bootstrap technique
3) A Darlington pair is shown below.

4) A.C analysis of second stage.

1) Current gain
= =
=

Input resistance
=
- -
- -
=

= +
= +
3) voltage gain
=1
5) A.c analysis of first stage.
The output resistance of first stage is input resistance of second stage. (= . As is very high exact
model of transistor h- parameter is considered.
1) Current gain (
=
=)
= +
= + )
+)
Using eq of
=)
= )
=
[1+ = (1+)
=
= =
= =

2) INPUT RESISTANCE Ri
Ri =
KVL to input loop Ri
- -
- -u

Vi = hie + hre -
 = hie + hre - (.)

= hie - - (.)

Vi = hie +

= = hie + .

= hie + .

6) over all gain

1) Current gain =

2) overall voltage gain

AV =
AV =
= ,>>
3) output impedance (
=
= +

6) Comparison of emitter follower and Darlington

C.C Darlington
Ri Ri = ( 1+ hfe) RE Ri =
(168kΩ) (1.65mΩ)

AI Ai = 1+ hfe = 51 Ai = = 500

7) METHODS OF COUPLING
When cascading amplifier is done, coupling of one stage to one stage is done based following 3
methods.
1) Direct coupling
2) RC coupling
3) Transformer coupling

1) DIRECT COUPLING
1) A two stage direct coupled amplifier is shown below.

2) the output of first stage is directly connected to next stage input.

3) The d.c collector current of first stage passes to input of next stage is altered. This effects the
biasing condition of second stage amplifier.
4) The low frequency response of this amplifier is gold, but hight frequency response is poor
because of stray capacitance.
5) The change in temperature disturbs the VBE and B of transistor, by which outout collector
current is varied. The output is distorted.

2) RC COUPLED AMPLIFIER.
1) A RC coupled amplifier is shown below.
2) The output of first stage amplifier is connected to input of next stage amplifier through a
capacitor and resistor.
3) The capacitor ‘CC’ blocks the d,c components therefore a point is maintained stable for both
amplifier.
4) The frequency response is wide band in nature hence this amplifier provides stable gain for
AF applications.
6)At very low frequency the coupling capacitor CC effects the gain and at very high frequency
gain falls to stray capacitance.

3) TRANSFORMER COUPLING.
1) A transformer coupled amplifier is shown in fig below
2) The output of first stage amplifier is connected to input of next stage through a transformer.
3) When impendence matching is criteria then this is achieved by proper selection of transformer
between cascaded stage.
4) the d.c conditions of both stage are stable as the coupling does not effect Q point.
5) The frequency response of this amplifier is poor when compared to RC coupled amplifier.
6) The intertwining and leakage indolence does not allow amplifier to amplify the signals of
different frequencies. Equally well.
7) these amplifiers when provided with a capacitor in shunt with transformer winding , faction as
resistance circuit and provide very large or high gain at that resonant frequency.
8) The d.c resistance of the transformer winding is kept low. So that power loss is lers.

ASSIGNMENT-1
1) what is need for cascading ? explain
2) Draw and explain the block diagram of two stage CE –CE cascaded amplifier
3) Derive the overall gain of two stage cascaded
Derive the overall current and voltage gain Input and output resistance of CE-CE cascaded
amplifier.
4) Find, AI, Av, ,, for CE –CE cascaded amplifier
5) Find, AI, Av, ,, for CE –CB or cascade amplifier
6) Explain any one circuit which is used to improve the input impendence of the amplifier.
7) What is Darlington connection ? derive current gain and input resistance.
8) What are draw backs of a Darlington amplifier, how it overcomes in Boot strap CC amplifier.
Explain with neat diagram.
9) Compare emitter follower and Darlington pair with respect different AI, Av, Ri, RO,
10) What are different types of coupling used in cascading of amplifiers? Explain.

ASSIGNMENT – 2
CE-CE cascading.
1Find AV, AVS,,, consider – h- parameter typical values, for a CE-CE cascaded amplifier
(fig .1)
R1 = 22kΩ, R2 = 3.3 kΩ, = 6 kΩ , = 1kΩ, R3 = 16 kΩ R4 = 6.2 kΩ, RS = 1.1k.

= 700Ω, = 470 Ω.

(AV = 1112.39, AVS = 466.73 , = 795.18Ω = 700K)

2) Find AV, AVS,, for circuit shown in fig.1 given R1 = 200k, R2 = 20k = 15k , = 100Ω, R3 =
47 k, R4 = 4.7k, RS = 1k, = 4k, = 330 Ω.
Consider h- parameter typical values.
Ans (AV = 6123.45, AVS = 3248.6, = 1.13k, = 4K)
CE –CC cascading.

3) Find over all voltage and current gain, , for shown in fig 2.
Ans (AI = -76.56, AV = -216.5, AVS = -138.28, = 1.76k, = 199.69Ω)

4) for the circuit shown in fig.2 find AVS, AIS hfe = 76, hie = 1.5k, hre = hfe = 0.
= 10k, = 5k, RS = 1k
Ans (AVS = -295.2, AIS = -58.52)
CE – CB

5) Calculate AI, AV, AVS,,, for cascade circuit shown in fig.3

DARLINGTON PAIR.
6) Find Ri, AVS, AIS,RO for Darlington pair circuit shown in fig.4

Ans (AIS = 889.23, AV = 0.989, AVS = 0.987, = 10.76Ω Ri = 0.89MΩ)

7) For the circuit shown in fig.5 calculate, AI, AV, hfe = 50, hie = 1.1k, hre =2.5 10-4, hoe = 25
A/V.
Ans AV = 0.9918, = 2.02M, = 22.96 Ω.
= 51, = 0.258, =

BOOSTRAP CIRCUIT.
8) For the circuit shown in fig 6. Calculate AV, AVS,,RO consider typical values of h-
parameter.
Ans (AV = 0.979, = 286 k, = 92.28 Ω AVS = 0.781, = 0.979, = 51.

9) For fig .6, calculate, AV, AVS,,Ri

RS = 10k, R1 = 100k, R2 = 10 k, RB = 50k, = 10k,
Ans

(AV = 0.997, AVS = 0.9735, = 409.1k,RO = 216.5Ω

= RO ║
 UNIT – II
HIGH FREQUENCY AMPLIFIERS

1) GAIN IN DECIBELS.
The ratio of output voltage to inlput voltage is called voltage gain. The gain is expressed in
logarithmic scale rather than a linear scale. The unit of this logarithmic scale is called decibel
(dB).

AV = 2. Log ││

2) GAIN FOR N- STAGE CASECADED AMPLIFIER.

The voltage gain of cascaded amplifier of n- stages is given by

=
For any single stage in cascaded amplifier

Gain in (dB)
+. …..

ADVANTAGES.
1) Overall gain is sum of individual gains in (dB).
2) Representation of gain is convenient for small and large values
Ex: AV (dB) = -140 dB is for AV = 0,0000001
3) In audio amplifier, output is measured in decibels hence logarithmic scale is better than linear
scale.

3) FREQUENCE RESPONSE.
1) The frequency response and bandwidth of the amplifier get affected due to the cascade
connection. The bandwidth of cascaded amplifier is always less than that of the bandwidth of
single stage amplifier.

2) LOWER 3Db FREQUENCY

1) Let us consider the lower 3dB frequency of n identical cascaded stages is fL(n). The gain at
fL(n). frequency is 0.707 or -3dB of its original value.

=
Squaring both sides.
2=
2=
=
= –1
=
FL = Lower 3dB of a single stage

= lower 3dB of a identical cascaded stages.

3) UPPER 3 Db frequency.
Let us consider the upper 3dB frequency of n identical stages is fH(n). it is the frequency for which
the overall gain falls to 3dB of its original value.

Gain of n stage cascaded amplifier.

=
=

Squaring both sides.

FH(n) = cutoff frequency of cascaded amplifier.

= cutoff frequency of single stage

N = no. stages.

3) BANDWIDTH
On cascading, is always greater then fL and fH(n) is always less than fH. therefore bandwidth of
multistage amplifier is always less than single stage amplifier.

(B.W)n < (B.W)single stage

5) FOR n non identical stages of amplifier.

= 1.1

6) EFFECT OF COUPLING CAPACITOR.

1) consider a two stage RC coupled amplifier.

2) Consider small signal model of first stage output and second stage input section.
3) VOLTAGE GAIN at mid frequency range.

At mid and high frequency capacitive reactance is very small hence replaced by short circuit.

AVmid = =

4) VOLTAGE GAIN FOR LOW FREQUENCY RANGE.

At low frequency the capacitive reactance is considerable value.
Hence taking coupling capacitor into account as shown in figure.

VO = -(hfe )

= - hfe

VO =

Dividing both sides by ,

AV Low

AV Low =

At f =n

= = 0.707

At = 0 ,

=1

At = , = 0
At cutoff frequency fL the fells to 3dB from AvMid. This frequency is also called as lower 3dB
frequency fig.7

5) VOLTAGE GAIN for high frequency.

At high frequency the capacitors have low reactance hence act as short circuit, there fore the gain
drops to zero beyond frequency fH

= = 0.707

=0

At f=

At f =

6) the gain frequency response is given below.

7]ANALYSIS OF EFECT OF COUPLING AND BYPASS CAPACITORS.

1) Consider a single stage amplifier.
2) h- parameter model.
Output voltage

VO = (-hfe IB) RC

Input voltage, Applying KVL to input loop.

- -- =0

=,

3) Voltage gain.
AV = =

AV =

4) VOLTAGE GAIN FOR mid frequency.

All capacitors provide low reactance at mid and high frequencies, hence capacitance are
neglected.

= =

5) VOLTAGE GAIN for low frequency.

At low frequency capacitive reactance are considered.

AV Low =

=
 = = 0.707.

At f =,

The cutoff frequency or lower 3dB frequency is fL, at this frequency gain falls to 0.707 from
maximum.

8) HYBRID-TT MODEL
1) At high frequencies. The h- parameter model is not suitable, because of change in transistor
behavior.

i) The values of h- parameter are not constant at high frequencies.

ii) At high frequency h- parameters behavior is complex.

2) Hence the h-parameter model is replaced by HYBRID – TT model.

3) HYBRID – TT CE trans conductance model.

The parameters considered are independent of high frequency but dependent on quiescent
operating point.

Cb1 e → diffusion capacitance (Ce)

Cb1c → Transition capacitance (CC)

rbb1 → The bulk resistance between external base terminal and internal node B1 is represented as
rbb1 ( base spreading resistance.)

rb1e → base emitter internal resistance.

rb1C → the variation of voltage across the collector to emitter junction results in base-width
modulation. The change in the effective base width causes the emitter current to change. This
effect between output and input is taken into account by connecting rb1C between collector and
base.

gm → Due to the small changes in voltage Vb1e across the emitter junction, there is excers –
minority carrier concentration injected into the base which is proportional to the Vb1e. This results
in small signal collector current, with collector shorted to the emitter is also proportional to the
Vb1e.

This effect accounts for the current generation ‘gm Vb1e’

Gm = │constant

→ The rce is the output resistance.

9) TYPICAL VALUES.
Gm = 50 mA/V

Rbb1 = 100Ω

rb1e = 1kΩ

rb1C = 4MΩ

rce = 80kΩ

Cb1e = Ce = 100PF

CC = 3 PF

10] TRANSCONDUTANCE [gm]

1) consider a CE amplifier shown in fig.1
2) Consider the transistor in active region (amplifier)

a) D.C conditions

IC = IO.

IE = IC

IE = IC

VCE = VCC – IC.RC.

b) A.C condition.

Total collector current

[ Sum of a.c d.c current]

IC = IO

= IO

iC = IO .
iC = Ic.

iC = Ic

iC = Ic +

IC = d.c collector current

= a.c collector current.

Consider a.c component of collector current.

iC =

iC = gm

Hence trans conductance is ratio of output current (IC) to input voltage

Gm = =

NOTE:
1) gm is slope of curve drawn between Ic and

[this model is valid for << VT]

2) The base current and the input resistance at the base

3) The emitter current and the input resistance at the emitter.

4) Relation between re and gm

5) Relation between and

6) Voltage gain of CE amplifier is given by

 AV =

11] CE SHORT- CIRCUIT CURRENT GAIN.

1) Consider a single stage CE transistor amplifier with load resistor RL short circuited fig.1

(MILLER CAPACITANCE) IL
rb1c is very hight resistance hence neglected

rce is shunt to short circuit

Z = rb1e ║ (-j

Z=

Input voltage Vb1e = .Z

z=

Current gain of CE short circuit is given by

AI =

AI = = = =

The above equation indicates that current gain is dependent on frequency f.

At Low frequency AI -

At Low frequency current gain falls as shown in fig 4.

At f = , │ AI│=

12) FREQUENCY , ,

a) cutoff frequency .
The frequency at which gain of CE amplifier falls to 3dB or 0.707 from its maximum value is
called ‘’
b) cutoff frequency
The frequency at which gain of CB amplifier drops to 3dB or 0.707 from its maximum value is
called ‘

At f =

c) cutoff frequency fT
The frequency at which gain of CE short circuit amplifier becomes unity.

F=

>>1

13) CURRENT GAIN OF CE AMPLIFIER WITH RESISTIVE LOAD

1) A CE amplifier with is shown below (hybrid )
Considering millers theorem.

AI = = =
At f =

Gain and frequency response is shown below

14) GAIN BANDWIDTH PRODUCT

a) Gain bandwidth product for voltage
The product of gain and bandwidth is given by.

b) GAIN BANDWIDTH PRODUCT for current

15) SINGLE STAGE CE AMPLIFIER RESPONSE

a) Low frequency analysis of BJT.

1) The capacitors, provide different reactance as frequency varies.
2) Input RC network.

The voltage
At f =

The cutoff frequency

2) Output RC network.

The cutoff frequency is given by

Phase angle
 3) By pass RC network

The cutoff frequency is given by

4) Hence each RC network has a cutoff frequency.

The RC network with higher cutoff frequency will be dominant network, which determines the
over all gain. Beyond the frequency the gain drops at – 20dB/dec
is highest hence capacitance is dominant pole.

40) b) high frequency analysis of BJT

1) The capacitors CB, Cc, CE acts as short circuit at high frequency. Therefore they do not affect
the amplifier gain frequency response.

2) At high frequency, the internal stray capacitance effect the gain of amplifier.

→ Collector base junction (Transition capacitance)

→ Base emitter junction (diffusion capacitance)

3) Considering miller effect of capacitance for CE amplifier

Cin (m) = Cbc(1+AV)

Cout (m) = Cbc = Cbc

4) INPUT RC NETWORK
The cutoff frequency

Phase angle

5) OUTPUT RC NETWORK

The cutoff frequency

R=

C=

Phase angle

6) The response of circuit is decided by lower cutoff frequence out of the two frequencies , .
is lower than hence the input capacitance dominates the response of amplifier with change in
frequency.

ASSIGNMENT – I

1) explain the importance of gain in decibel in decibel unit.

2) Explain the frequency response of amplifier at low and high frequencies.

3) In a single stage RC coupled CE amplifiers, expain the effect of by pass and coupling
capacitor.

4) Explain BJT hybrid model.

5) derive expression for trans conductance gm.

6) Prove that the hybrid model the diffusion capacitance is proparional to the emitter bias
current.

7) Consider CE single stage with a resistive load R L, using millers theorem find out input
capacitance at mid band frequencies and high frequencies.

8) Explain how the parameters of hybrid model varying with IE , VCE and temperature.

9) Derive the expression for CE short circuit current gain AI as a function of frequency using
hybrid model.
10) Derive the expression for CE amplifier current gain with resistive load.

11) Define , , and give relation between ,

12) Explain low frequency response of CE amplifier.

13 Explain high frequency response of CE amplifier.

14) Derive expression for gain band width product

15) derive FL and fH for n stage cascade amplifier comment on bandwidth of cascaded amplifier.

ASSIGNMENT – 2

GAIN
1) for an amplifier, mid band gain 100 and lower cutoff frequency is 1KHZ. Find the gain of an
amplifier at frequency 20hz.

Ans = 2

2) For an amplifier, 3dB gain is 200 and higher cutoff frequency is 20khz. Find the gain of am
amplifier at frequency 100 Khz.

Ans = 115.47

3) determine the low frequency response of the amplifier shown below. Draw the frequency
response.

Ans:
4) at IC = 1MA and VCE = 10V, a certain transistor data shows = 3PF, = 200 and wT =-500 M
rad/sec

Calculate gm , = and

Ans (gm = 38.46 MA/V, , , = 2.5 M rad/sec)

5) Short circuit CE current gain of transistor is 25 at a frequency of 2Mhz. it = 200khz. Calculate

i) ii) iii) AI at frequency of 10 Mhz and 100 MHZ

Ans ( 50 Mhz, = 250, AI = 5 and 0.5)

6) for a BJT amplifier, the following values one known.

Operating temperature T = 3000 k, ICa = 2MA, rbb1 = 100 Ω, = 1000Ω, = 2MΩ,

rce = 810KΩ, fT = 50Mhz. obtain the h-parameter if K = 1.38 j/ok and q = 1.6 10-19

Ans (gm = 77.23 A/V, = 5 =51.619)

7) A BJT has following parameter measured at IC = 1MA, fT = 4 Mhz

Find , and rbb1 for RL

Ans (gm = 0.038 A/V, , rbb1 = 400 Ω, fH = 637.64 khz)

8) Given the following transistor measurement made at IC= 5MA, VCE = 10V and at room
temperature AIe = 10 at 10 MHz, Ce = 3PF.

Find Ce , , and rbb1

Ans (Ce = 304 PF, , rbb1 = 80 Ω, fT = 100.05 mhz )

9) The amplifier shown in fig below uses a BJT with gm= 0.2 A/V, Ce = 200 PF, rbb1 = 100 0 Ω,
Cc = 4PF,

Draw hybrid circuit and find AV(mid) ,

Ans (-100,

10) The hybrid –

parameters of the transistor used in the circuit of fig.below are gm = 50 m A/V, Ce = 100 PF, ,
rbb1 = 100 Ω, Cc = 3PF,

Find a) upper 3dB frequency of AI

b) The voltage gain AVS.

Ans (fH = 3.77MHZ, AVS = -50)

11) For a single CE amplifier whose hybrid parameters are given below, what is half the value
obtained with RS= 0, Hybrid – parameter, gm = 50 m A/V rbb1 = 100Ω, CC = 3PF, Ce = 100PF.

Ans (RS = 122.2 Ω)

12) A single stage CE amplifier has upper 3dB frequency of voltage gain f H = 4 MHz, with a
load resistance RL= 600Ω it the transistor parameter are gm = 50 m A/V, rbb1 = 100Ω,CC = 3PF fT
= 300mHz, hfe = 100.

Find 1) The value of RS which will result in the required value of fH.

2) The mid band gain with above value of RS. Ans ( 311.8Ω , - 24.88)

13) A high frequency amplifier uses a transistor which is driven from a source with RS= 0.
Calculate value of fH, if RL = 1KΩ, Assume typical values of hybrid – parameters.

Ans (fH = 0.629 MHz) (fH = 1.545 MHz)

14) A high frequency amplifier uses a transistor which is driven from a source with RS = 1K,
calculate value of fH, AV(Low), AV(High), it RL = 0, RL = 1KΩ, consider typical values of hybrid –
parameters.

Ans (2.95 MHz, fH = 1.2 MHz, AV(Low) = -23.8)

GAIN BRAMDWIDTH PRODUCT

15) If tour identical amplifiers are cascaded each having fL= 10mHz determine the overall lower
3dB frequency fL.

Ans (229.9Hz)

16) if foure identical amplifiers are cascaded each having fH = 100KHz, determine the over all
upper 3dB frequency fH.

Ans (43.5 kHz)

17) Three identical non – interacting amplifier stages in cascade have an overall gain of 1dB
down at 30 Hz compared to midband. Calculate the lower cutoff frequency of the individual
stages.

Ans (FLn = 15.23 Hz , fL = 7.782 Hz)

18) if the overall lower and higher cutoff frequencies of a two identical amplifier cascade are
600Hz and 18KHz respectively, compute the value of the individual cutoff frequencies of both
the amplifier stages.

Ans (FH = 27.97 KHz , fL =386 Hz)

MOS AMPLIFIERS
Basic concepts
Usually the input-output characteristics of an amplifier are non- linear. It can be approximated by
a polynomial over some signal range:

For the narrow range of x the polynomial can be approximated to

Where : represents the operating point

= Represents the small signal gain

When > > x(t) we have This indicates the linear

telationship between the input and output. The fig.4.1.1 (a) and 4.11 (b) shows the input – output
characteristic of a linear and non – linear systems

In the design of a high performance amplifier the trade- off between noise. Linearity gain,
bandwidth, supply voltage, power dissipation, input/ output impedance, speed and voltage
swings impose many challenges. This is illustrated by the analog design octagon shown in fig.
4.1.1

Noise Linearity

Gain

Speed

MOS small signal model

The fig shows the MOS small signal low frequency model. We know that the drain current is a
function of the gate- source voltage. This is represented by a voltage dependent current source gm
Vgs in the model. The resistance between D and S is represented by ro. it is the change in drain
current due to the change in drain source voltage and it is given by
The drain current also changes due to a change in the back gate bias. This dependence is
represented by another current source Vbs connected between D and S. in saturation gmb can be
given by

Neglecting the body effect the MOS small signal low frequency model is as shown in the fig

At the frequency, device capacitances have their own significance and they are represented in the
model as shown in the fig.
Common source amplifier with resistive load
The fig shows a common source stage of MOSFET amplifier. Here, the variations in the gate-
source voltage produce variations in the drain current. This current passes through a drain
resistance (RD) to generate an output voltage.

Operation
When Vi = 0, MOSFET is OFF and V0 = VDD. As Vi increases from zero and approaches VTH,
MOSFET start to turn on. Due to this, drain current ID starts flowing through RD reducing Vo. as
we go on increasing Vi and if VDD is not excessively low, M1 goes in saturation. In saturation Vo
is given by,
If we further increase Vi , Vo drops more and the MOSFET continues to operate in saturation
until VI exceeds Vo by VTH as indicated by point A in the fig At point A, we have

In the triode region, Vi > ViA and Vo is given by

If Vi is large enough to drive MOSFET into deep triode region, < < 2 and from the equivalent
circuit (See fig ) we have

Voltage gain

Since itself varies with the input signal and it is given by

The equation (4.3.4) indicates that the gain of the circuit varies significantly with the signal
swing if input signal (Vi) is large and in this case circuit operates in a large signal mode. The
dependence of the gain upon the signal level leads to nonlinearity and this is nor desirable.

Maximizing voltage gain

We have

From equation (4.3.5) we can observed that, magnitude of AV can be increased by increasing
W/L or VRD or decreasing ID if other parameters are constant.

Trade off

• There is limitations on increasing device size, since larger device size leads to greater
device capacitances.

• Higher VRD limits the maximum voltage swings.

 • Higher value of RD increases output time constant and makes channel length modulation
effect significant.

Thus more is a trade – off between gain, bandwidth and voltages swings.

Including effect of channel length modulation the voltage gain is given by

Using

The fig shows the small signal model for CS stage.

From the fig we have,

Vo = gmVgs

The expression for AV in equation 10 and 9 are same, however, later one if easy to derive.
 UNIT-III
FEEDBACK AMPLIFIERS

1) Feed back
feed back is a process in which part of outputn(i.e.faction) is fed back to input signal.
feedback improves performance of amplifier by reducing noise and distorstion and maintains
stability.

2) Types of feedback
There are two types of feedback
i) Positive feedback
ii) Negative feed back

i) Positive feed back

When the input signal and part of output signal are in phase the feedback is called positive
feedback.
Vi = Vs + Vf

ii) Negative feed back

When the input signal and part of output signal (feedback signal) are out of phase, the feedback
is called negative feedback.
Vi = Vs + (-Vf )

3) Feedback concept
The output voltage or current by means of a sampling network is applied to input through a
feedback two part network, as shown fig.1
At the input the feedback signal is combined with the input signal through a mixer network and
is feed back into the amplifier.
i) Sampling network:
There are two ways to sample the output voltage or current. The output voltage is sampled by
connecting the feedback network in shunt across the output. The output current is sampled by
connecting the feedback network in series across the output.

ii) Feedback network:

If may consists of resistors, inductors, capacitor or only resistive components. it provides
reduced portion of the output as feedback signal to the input mixer network.
Vf = Vo
factor (lies between ‘0’ and ‘1’)

iii) Mixer network:

Like sampling there are two ways of mixing feedback signal with input signal.
There are two methods
1) Series input
2) Shunt input

4) Gain of feedback amplifier

An amplifier with feedback is considered
Let gain of amplifier without feedback = A =
Let gain of amplifier with feedback = Af
Let input voltage without feedback = Vs
Let output voltage without feedback = Vo
Let the feedback voltage be = 'Vf'
But 'Vf' is fraction of output voltage

Feedback factor
Considering negative feedback
Input signal with feedback

Gain of amplifier with feedback

Divide both denominators is &

numerator with

For positive feed back

Gain with feedback

is positive if , the feed back is turned as negative feed back or degenerative feedback.
is negative if the feedback is tunned as positive feed back or regenerative feed back.

5) Sensitivity
The charge in the gain with feedback is less than the change in gain without feed back by the
factor (1 + A).
The fraction change in amplification with feedback divided by the fractional change without
feedback is called SENSITIVITY of the transfer gain.

6) De sensitivity
The reciprocal of the sensitivity is called the de sensitivity.
D=1+
is called loop gain

7) Frequency response and bandwidth

The gain of amplifier with negative feedback is given by

→ Response at lower cutoff frequency with feed back

cut off frequency without feedback.

Hence from above expression, it is clear that lower cutoff frequency with feedback is less than
lower cutoff frequency without feedback a factor ( 1 + ).

→ Therefore by introducing negative feedback low frequency response of the amplifier is

improved.

→ Response at higher cutoff frequency with feedback

Hence from above expression it is clear that upper cutoff frequency with feedback is greater than
higher cutoff frequency without feedback by factor ( 1 + ).
→ Therefore by introducing negative feedback high frequency response of the amplifier is
improved.

→ Band width of the amplifier.

B. = Upper cutoff frequency - lower cutoff frequency.
B. =

Hence from above expression it is clear that bandwidth of a amplifier increases by introducing
negative feedback.

8) Frequency distortion
The feedback network may consist of R, l, C components if the feedback network does not
contain reactive elements, the overall gain is not a function of frequency under such conditions
frequency and phase distortion is substantially reduced.
if reactive components are present in feedback network, the reactance’s or these components will
change with frequency changing ... As a result gain also changes with frequency.

9) Non linear distortion and noise

Consider a large amplitude signal applied to a stage of an amplifier so that the operations of an
active device (i.e, transistor) extend slightly beyond its range of linear operation. As a result of
this the output signal is slightly distorted. Now if a negative feedback is introduced to the
amplifier stage the voltage gain reduces. But if the input signal is increased by the same amount
by which the gain is reduced, the output signal amplitude remains the same (i.e it was without
feedback) considering distorting in both cases the distorting is reduced by employing negative
feedback

is distortion without feedback.

→ NOISE
it has been observed that there are many sources of noise in an amplifier depending upon the
active device used in the circuit. It will be interesting to know that with the use of feedback the
magnitude of noise (N) is reduces by a factor of (

N = noise without feedback

10) Stabilization of gain

The gain with negative feedback of amplifier
On differentiation with respect ‘A’

fractional change in amplifier voltage with feedback.

fractional change in amplifier voltage with out feedback.
‘sensitivity’ it indicates ratio of percentage change in voltage gain with feedback to the
percentage change in voltage gain without feedback.
‘de sensitivity’ it indicates the factor by which the voltage gain has been reduced due to
feedback.

A. voltage – series feedback connection

1. The block diagram of a voltage series feedback is shown in fig. Below.
2) The input to the feedback network is in parallel with the output of the amplifier. A fraction of
the output voltage through the feedback network is applied in series with input voltage of the
amplifier.
3) The shunt connection at the input increases the input resistance
4) The amplifier in this case is a true voltage amplifier the voltage feedback factor is given by
Input resistance
Considering input loop in fig 2.
By using KVL
Hence input resistance with feedback increases by factor than input resistance () without
feedback.
Output resistance
For determining output resistance,
is disconnected and Vs is set to zero.
A external voltage ‘V’ is applied across the output terminals and the current I delivered by ‘V’ is
calculated.

By applying KVL to output loop

V=A+I

Hence, output resistance with feedback decreases by (1+) than output resistance without
feedback.

B. Voltage shunt feedback

1) A voltage shunt feedback block diagram is shown below in fig.1
2) The fraction of the output voltage is supplied in parallel to input voltage through the feedback
network.
3) The feedback signal is proportional to the output voltage.
Feedback factor
This type of amplifier is called a trams resistance amplifier.
4) The voltage shunt feedback provides a stabilized overall gain and decreases both input
resistance by a factor

The voltage shunt feedback topology is shown below.

The amplifier input circuit is represented by Norton’s equivalent circuit and output circuit is
represented by terminals equivalent.
KCL at input node

Output voltage is given as.

= open circuit trans resistance without feedback

trans resistance without feedback taking load resistance using in eq(1)

Input resistance
with feedback is given by

Output resistance

The output resistance is calculated by open

circuiting input source and eliminating at output.
KVL to output loop

Input current

Using in eq (1)

C) Current series feedback

1) The block diagram of a current series feedback is shown below
2) In current series feedback, a voltage is developed which is proportional to the output current.
3) Because of the series connection at the input and output the input and output resistance get
increased. This type of amplifier is called trans conductance amplifier.
4) The feedback factor is given by
5) Input resistance
 Output resistance

The current series feedback topology is shown below.

The amplifier input circuit is represented by Theremins equivalent circuit and output circuit by
Norton’s equivalent circuit.

KVL to input loop

Output loop

= Trans conductance without feedback.

trans conductance without feedback taking .

Input resistance
Using value in eq(1)

Output resistance

The output resistance can be calculated

by short circuiting input source and without at output circuit.
KCL at output node

Input loop

D) Current shunt feedback

1) A current shunt feedback topology is shown below
2) It is called series derived shunt fed feedback system.
3) in this type of feedback connection, the input resistance is reduced and output resistance is
increased.
4) this is a current amplifier.
5) The feedback factor
Input resistance

Output resistance
The current shunt feedback topology is shown below
The amplifier input and output is replaced by Norton’s equivalent circuit.

KCL at input node

Output current

Using in eq (1)

Input resistance

Output resistance:
The output resistance is calculated by open circuiting the input source and is removed.

KCL at output node

Input node
[
Using in eq (1)

15) CLASSIFICATION OF AMPLIFIERS.

The amplifiers can be classified into four types.
• Voltage amplifier.
• Current amplifier.
• Trans conductance amplifier.
• Trans resistance amplifier.

1) Voltage amplifier
If the amplifier input resistance is large compared with the source resistance then. If the
external load resistance is large compared with the output resistance of the amplifier, then..
Such amplifier circuit provides a voltage output proportional to the voltage input, the
proportionality factor does not depend on magnitude of the source and load resistance.
Hence this amplifier is called VOLTAGE amplifier. Ideal voltage amplifier has infinite input
resistance and zero output resistance
Practical voltage amplifier has
 Equivalent circuit of voltage amplifier

2) Current amplifier.
If amplifier input resistance is zero then input current is equal to source current if amplifier
output resistance is infinity, then such amplifier provides a current output proportional to the
signal input current and the proportionality factor is independent of source and load resistance.
This amplifier is called current amplifier.
Ideal current amplifier has = 0 , =
Practical current amplifier has < < , > >

Equivalent circuit of current amplifier.

3)Trans conductance amplifier

In this amplifier, an output current is proportional to the input voltage and the proportionality
factor is independent of the magnitudes of the source and load resistance.
Ideally this amplifier has = , =
Practical this amplifier has > > , > >
 Equivalent circuit of Trans conductance amplifier

4)Trans resistance amplifier

In this amplifier an output voltage is proportional to the input signal current and the
proportionality factor is independent of the source and load resistance.
Ideally this amplifier must have zero input resistance and zero output resistance .
Practically < < and < <

Equivalent circuit of trans resistance amplifier

16) Analysis of feedback amplifier [identifying topology]

STEP 1) identifies topology.
 • Sampling network.
a) by shorting the output Vo = 0, if feedback signal (Vf) becomes zero then it is voltage
sampling.
b) by opening the output loop i.e. = 0, if feedback signal If becomes zero then it is
current sampling
• Mixing network.
a) if the feedback signal is subtracted from the externally applied signal as a voltage in
the input loop, then it is series mixing.
b) if the feedback signal is subtracted from the externally applied signal as a current in
the input loop, then it is shunt mixing.

STEP (2) : finding input circuit

• For voltage sampling make Vo = 0 by shorting the output.
• For current sampling make Io = 0 by opening the output loop.

Step (3) : finding output circuit

• For series mixing make Ii = 0 by opening the input loop.
• For shunt mixing make Vi = 0 by shorting the input.

Step 4): Draw the h-parameter model. For given circuit.

Step(5): Find gain ‘A’
Step (6) : find feedback factor ‘
Step (7): find all parameters.
7) Voltage series feedback:
A emitter follower circuit is example of voltage series feedback.
The voltage across RE resistor is output voltage, simultaneously RE resistor voltage is considered
for input loop also.
Here, in this circuit is feedback factor is unity.
• Output voltage

• KVL to input loop

3) If output port is short circuited then feedback signal becomes zero. There voltage sampling is
done here.
As the feedback signal ‘’ is subtracted from input signal, their input mixing is series.
Therefore the feedback used in this circuit is voltage series feedback.
4) For finding input and output circuit and a.c analysis the circuit is rearranged.
For input circuit
As output sampling is voltage, make output Vo = 0.
Then input loop is.

For output circuit,

Now, making input current , , so RE appears only in output circuit as shown above.

5) A.C analysis

6) Open loop voltage gain:

Feedback factor

De sensitivity D = 1 +

1) Open loop voltage gain

2) Feedback

3) De sensitivity
D = 1+

4) Voltage gain

5) Input resistance

= 1000 + 1100 = 2100 Ω

6) Output resistance
18) Voltage shunt feedback

A collector base bias circuit is example of voltage

shunt feedback. The circuit is shown below.

1) By short circuiting the output, VO becomes zero hence feedback current If becomes zero.
Hence it is voltage sampling. As the feedback current is given to input the mixing network is
shunt network. The topology is called voltage shunt feedback.

Using miller’s theorem is rearranged at input and output as R1 and R2

To find input circuit set Vo = 0, then is connected at base and emitter. To find output circuit, set
= 0, then is connected between collector and emitter.
We have

Input resistance
Find

D = 1+
= 2.854

19) Current series feedback

1) The common emitter circuit with un by passed is example of current series feedback.
2) A. CE amplifier is shown below.
3) The RE resistor is common to both input and output loop. Therefore voltage across RE is
considered as feedback voltage. VF

Hence output current Io = is sampled and it is converted to voltage by feedback network.

Now, feedback back voltage is subtracted from to produce. Hence the circuit uses current series
feedback.

4) Input and output circuit

In absence of output current ( then RE belongs only to input when, then belongs to output circuit.
Therefore RE appears in input and output loop. The modified circuit is shown in below.
5) Open loop transfer gain.

Feedback factor

6) Find
[Take the values from ckt.]
1) De sensitivity D=1+

= -1.72

,
,

20) Current shunt feedback.

1) A CE amplifier in cascade mode with feedback can be considered as example of current shunt
feedback.

2) Two stage cascaded with feedback

CE amplifier is shown below.
3) The feedback network consists of RF and the output current = - = - is divided by the two
resistors and feedback current is subtracted from and given to . Hence this configuration is
current shunt feedback.
4.Input and output circuit.
As the resistor is connected to input and output of Q1 and transistor respectively. This resistor is
replaced in shunt between base and emitter of by making
Similarly making is in parallel to of transistor.
The modified circuit is shown below.
4) Open circuit transfer gain

5) Find
[take the values from ckt.]
1) De sensitivity D=1+

= 0.394K
,
,

OSCILLATORS

1) OSCILLATOR
An oscillator is a circuit which generates an a.c signal without a.c input. An oscillator is a signal
generator if produces a signal of constant amplitude and constant frequency.

2) Classification of oscillators.
The oscillators are classified based nature of signal , frequency and components, applications.
a) Based on wave forms

b) Relaxation oscillators.

c) Based on feedback

c) Based on frequency generated..

Audio frequency OSC [ upto 20 KHz]
Radio frequency OSC [ 20 KHz to 30 KHz]
Very High frequency OSC [ 30 MHz to 300MHz]
ULTRA HIGH frequency OSC [300MHZ to 3GHz]
MICRO WAVE frequency OSC.[ above 3 GHz]
e) Based on components
LC oscillators
RC phase shift oscillators

3) Conditions for oscillations.

1) The oscillator circuit positive feedback. In order to produce oscillations the circuit must
satisfy BARHAUSEN criterion. The black diagram of oscillator circuit is shown below.
 Block Diagram of Oscillator

2) Barkhausen criterion
The essential conditions for maintaining oscillations are.

i) │A│= 1, magnitude of loop gain should be unity.

ii) The total phase short of feedback signal should be 00 or 3600

3) The condition that loop gain ) │A│= 1 gives a single and precise values of ) A, which should
be set throughout the operation of the oscillator circuit , but in practice as transistor character tics
and performance of other circuit components change with time, │A│will becomes greater or
lesser than unity

4) Hence in all practical circuits │A│should be set greater than unity so that the amplitude of
oscillations will continue to increase without limit.

Sustained oscillations

4) RC- phase shift oscillator

1) The Rc – phase shift oscillator are used in low frequency applications. The feedback circuit
consists of resistors and capacitors.

2) A RC phase shift oscillator is shown

below in fig.1

3) The circuit consists of CE amplifier with three RC network connected to the feedback path.
The feedback used in this circuit is voltage shunt feedback.

4) In order to generate sustained oscillations, the loop gain A ≥ 1 and phase shift of feedback
signal must be 00 or 3600 [BARKHAUSEN criteria]

5) Operation:
a) The oscillator circuit is not given any input signal. The output signal V0 is given to the
feedback network. The feedback circuit takes fraction of output gives to input through resistor
RX. the feedback signal IF is input to oscillator circuit. This signal is amplified again and again
until loop gain A is equal to or greater than unity. Once sustained oscillations are developed.
b) The phase shift is provided by RC network. Each RC network introduces a phase shift of 600
and in total three RC network provide 1800
The CE amplifier introduces -1800 phase shift and RC feedback network introduces 1800 phase
shift hence total phase shift of feedback signal is 00 or 3600
c) As the Barkhausen criteria is satisfied, now the circuit produces sustained oscillations the
output is a sinusoidal signal with constant amplitude and frequency.

6) The frequency of oscillator is determined

by the feedback network. The h-parameter equivalent circuit model is shown below.

The resistor RX is in series with the circuit is re arranged.

KVL to loop (1)

-

KVL to loop (2)

KVL to loop (3)

Using 3 equations find and (Cramer’s rule ).

I3 = output current or feedback current =

On solving above equation, the loop gain is obtained as

Where

To have 00 as phase angle of feedback signal the imaginary part is made zero.

Solving for
The frequency of oscillator is given by

Now, the loop gain is unity

│A│ = 1

Consider real part and equate to unity

The minimum value of must bet 44.54
Hence by changing capacitor and resistors desired frequency of oscillations can be produced.

7) Advantages
• Simple in design
• Complete audio frequency range is covered.
• Produces sinusoidal output
• Fixed frequency oscillator.

8) Disadvantages
• If frequency has to be altered all capacitors must be changed to same value.
• Frequency stability is poor.
5) Wien – bridge oscillator
• The weign bridge oscillator is a phase shift oscillator used for low frequency applications.
The frequency of oscillator can be varied from 10 HZ ti 1MHZ.
• Weight bridge oscillator circuit is shown below.
 • The circuit consists of a two stage RC coupled amplifier which provides a phase shift of
3600 or 00. A balanced bridge network used as shown in fig. the feedback is provided by
bridge network and no need for any additional phase shift in feedback circuit.
• In order to generate oscillations the loop gain A should be greater than or equal to unity
and phase angle of feedback signal should be 00 or 3600 ( Barkhausen rule )
• Operation
a) The oscillator circuit is not provided any input signal the output signal V0 is given
to the feedback network (bridge circuit) the feedback circuit takes fraction of output
and gives it to input i.e voltage across R2 and C2 parallel branch. This is obtained by
voltage division rule.
b) Now, the amplifier has feedback voltage Vf as input and this signal is amplified
again and again in the loop, At certain point the loop gain of amplifier becomes unity
or greater than unity and sustained oscillations are developed.
c) Once Barkhausen condition is satisfied. Sustained oscillations are obtained. The
desired frequency can be obtained by varying the capacitor values. By using common
shaft both capacitors can be varied simultaneously.
d) By using wien-Bridge feedback network the oscillator becomes sensitive to a signal
of only one particular frequency. Hence good frequency stability is obtained.
e) The frequency of oscillator circuit is given by

6) Expression for frequency

The feedback voltage

Feedback factor
On solving above equation

To have zero phase shift of feedback network, imaginary part must be zero.

Let = = R, = =C

Consider feedback factor ‘

Consider loop gain │ A│≥ 3.

In order produce sustained oscillation the gain of amplifier should be greater than or equal to 3.

LC oscillators
6) Hartley oscillator
1) The LC oscillator use inductor and capacitor (tank circuit) for producing oscillations. These
oscillators are used for high frequency range from 200 KHz up to few GHz.
2) A Hartley oscillator circuit is shown below.
3) The circuit consists of CE amplifier with a LC tank circuit connected to output of amplifier. A
coil called RFC (radiofrequency choke) is connected between the collector and Vcc supply
4) The feedback circuit consists of a tank circuit .it consists of two inductors L1 and L2 the
inductorL1 is inductively coupled to coil L2 and the combination works as an auto transformer. A
capacitor ‘C’ is connected in shunt with inductors L1 and L2
5) In order to generate oscillations, the loop gain A should be greater than or equal to unity. The
phase angle of feedback signal should be 00 or 3600 [Barkhausen rule]

6) Operation
a) The output of amplifier is taken at collector and given to feedback network. The feedback
network (LC) takes fraction of output and gives to input hence the oscillator has feedback
voltage Vf as input Vi. this signal is amplified again and again at certain point the loop gain
becomes unity or greater than unit by which oscillations are developed.
b) The CE amplifier introduces 1800 phase shift and the feedback network introduces a phare
shift of 1800.
Hence total phase shift is 3600 or 00
c) As conditions for oscillations are satisfied (barkhusen criteria) now sustained oscillations are
produced.
d) The transistor should be for oscillation to start.
e) When the circuit is energized by switching on the supply, the collector current flows, then
oscillations are produces be caused of positive feedback from the tank circuit.
f) The frequency of oscillations are given by

7) Colpitt’s oscillator
1) The LC oscillators use inductor and capacitors (tank circuit) for producing oscillations. These
oscillators are used for high frequency range from 200 KHz to few GHz.

2) A colpitts oscillator circuit is shown

below.
3) The circuit consist of CE amplifier with a LC tank circuit connected to output of amplifier. A
coil called RFC (Radio frequency choke) is connected between the collector and Vcc supply.
4) The feedback circuit consists of a tank circuit. It has two capacitors C1 and C2 and a inductor
L in shunt with capacitors. The output is taken at secondary of coupled coil with inductor L
5) In order to generate oscillations the loop gain A should be greater than or equal to unity. The
phase angle of feedback signal should be 00 or 3600 [Barkhausen Criteria].

6) Operation
a) The output of amplifier is taken at collector and given to feed back network. The feedback
network (LC) takes fraction signal acts as input to amplifier. This signal is amplified again and
again, at certain point the loop gain becomes unity or greater than unity by which oscillations are
developed.
b) The CE amplifier introduces 1800 phase shift and the feedback network introduces a phase
shift of 1800.hence total phase shift is 00 or 3600 hence the feedback is positive.
c) As conditions for oscillations are satisfied (Barkhausen criteria) now sustained oscillations are
produced.
d) The transistor = , for oscillation to start.
e) When the circuit is energized by switching on the power supply, the collector current flows.
Then oscillator is produced because of positive feedback from the tank circuit.
f) The frequency of oscillations are given by

7) Expression for frequency of oscillations

{HARTLEY & COLPITTS]
Consider the following feedback amplifier circuit
The feedback voltage is given by

Feedback factor =
As phase of feedback network is 1800

Consider therein equation circuit of amplifier

Gain of amplifier
Consider equation (1) and multiply both sides by A.
According to Barkhausen criteria – A=1, for oscillations

This is required Loop gain, substituting value.

Are purely reactive elements

To have 1800 phase shift the imaginary part of the denominator must be zero.
i.e.

According to the Barkhausen criterion must be positive and greater than or equal to unity. As is
positive is positive, then will be positive only when and will have same sign. That is and must
be of same type of reactance either both inductive or capacitive.

→ if are inductive then is capacitive then circuit is Hartley oscillator

→ if are inductive then is indicative then circuit is colpitts oscillator.

a) For Hartley oscillator, frequency is obtained by.
b) For colpitts oscillator the frequency is obtained by

8) Crystal oscillator
• The crystal oscillator is basically a tuned oscillator. The crystal oscillator uses a piezo
electric crystal as a resonant tank circuit.
• The crystal is usually made of quartz material and provides a high degree of frequency
stability and accuracy.
• A slab is mounted between two metal plates and housed in a package which is equal to
the size of postal stamp. The package as a whole is known as crystal and its symbol is
shown in fig.1
• When a crystal is placed across an a.c source its starts vibrating. The amount of
vibrations depends upon the frequency of applied voltage.
• A crystal oscillator circuit is shown in fig.2. A crystal is connected as a series element in
the feedback path from collector to the base.
• The circuit frequency of oscillations is set by the series – resonant frequency of the
crystal equivalent circuit shown in fig.3
• The frequency of crystal oscillator is given by

• The changes in supply voltage transistor device parameters have no effect on the circuit
operating frequency, which is held stabilized by the crystal.
9) Frequency stability of oscillator
• The frequency stability of an oscillator is a measure of its ability to maintain the required
frequency as precisely as possible over a long time interval as possible.
• The accuracy of frequency calibration required may be anywhere between 10-2 and 10-10
• The main draw back in transistor oscillator is that the frequency of oscillation is not
stable during a long time of operation. The following are the factors which contribute to
the change in frequency.
a) due to change in temperature the values of the frequency determining components viz
resistor, inductor and capacitor will change.
b) Due to variation in the power supply unstable transistor parameters change in climatic
conditions and aging.
c) The effective resistance of the tank circuit is changed when the load is connected.
• Due to variation in biasing conditions and loading conditions.
 The variations of frequency with temperature is given by

Where , are the desired frequency of oscillation and the operating temperature
respectively.

• As PIEZO ELECTRIC crystal have high Q values of the order of 105 they can be used as
parallel resonant circuit in oscillators to get very high frequency stability of 1 ppm.

ASSIGNMENT – I

• Define oscillators how are oscillators classified ?

• What type of feedback is employed in oscillators? What are the advantages? Discuss the
condition for sustained oscillations.

• What is Barkhausen criteria? Explain.

• Explain Hartley oscillator and derive the expression for frequency.

• Explain eoLLPIS oscillators and derive the expression for frequency

• Draw the circuit diagram of a Rc phase shift oscillator using BJT. Derive the expression
for frequency of oscillation of RC – phase shift oscillator using BJT.

• Explain the principle of operation of a weign bridge oscillator with the help of a neat
diagram obtain an expression for its frequency of oscillations.

Show that the gain of weign bridge oscillator using BJT amplifier must be at least 3
for the oscillations to occur.

• What is piezo electric effect? Explain the working of crystal oscillator?

• What is the range of frequency over which a crystal oscillator may be normally used and
why?

• What are the advantages and limitations of a crystal oscillator?

• Explain briefly about frequency and amplitude stability of oscillators.

ASSIGNMENT -2
1) in Hartley oscillator, calculate L2 IF L1 = 15 mH Sc = 50PF mutual inductance of 5 and the
frequency of oscillations is 168 Hz.

2) In a transistorized Hartley oscillator the two inductance are 2mh and 20 while the frequency is
to be changed from 950 KHZ to 2050 KHZ. Calculate the range over which the capacitor is to be
varied.

( Ans: C= 2.98FF , to 13.89 PF)

3) A colpitts oscillator has , C1 = 0.001, C2 = 0.001 and L = 5 . What is approximate frequency ?

what will be the new frequency it the value of L is doubled ?

What should be the inductance to double the frequency ?

( Ans f =3.183mHz, L = 1.25 H)

4) For phase shift oscillator the feedback network uses R = 6Ω and C = 1500PF. The
transistorized amplifier used, has a collector resistance of 18Ω. Calculate the frequency of
oscillations and minimum value of of the transistor.

(Ans: f = 4.168 KHZ, )

5) find C and of a transistor to provide f0 of 50 KHZ of a RC transistorized phase shift oscillator.

Given,

( Ans: C = 111.062Pf, )

6) A crystal has L = 0.1H, C = 0.001PF, R = 10 KΩ, and CM = 1 PF. Find the series resonance
and a factor

( Ans: )

7) A crystal has L = 2H , C = 0.01 PF and R = 2Ω its mouting capacitance is 2 PF. Calculate its
series and parallel resonance frequency.

( Ans: CM = 2PF, , )

8) A crystal L = 0.4H, C = 0.085PF and CM = 1 PF with R = 5KΩ. find.

• Series resonant frequency.

• Parallel resonant frequency.

 • By what percent does the parallel resonant frequency exceed the series resonance
frequency ?

• Find the Q factor of crystal.

(Ans: )

9) A crystal has L = 0.1H, C = 0.01PF, R = 10 KΩ and CM = 1PF find

• Series resonance frequency

• Q factor.

( Ans: f = 10 KHZ, RD = 7.87KΩ)

Sol:

OSCILLATOR
1) What type feedback is employed in oscillators? What are the advantages? Discuss the
conditions for sustained oscillations.

2) Define

• Damped oscillator

• Un dammed oscillations.

3) Classify different type of oscillators based on output waveforms, circuit components

operating frequency and feedback used.

4) Classify different type of oscillators based on frequency range.

5) Give the two Barkhausen conditions required for sinusoidal oscillations to be sustained.

6) Prove that oscillations will not be sustained if, at the oscillator frequency the magnitude of the
product of the transfer gain and feedback factor are less than unity.

7) State the condition of (1+A) which a feedback amplifier must satisfy in order to the stable.
8) Derive an expression for frequency of oscillation of Hartley oscillator using transistors.

9) Discuss and explain the basic of an LC oscillator and derive the conditions for the oscillations.

10) Derive the expression for frequency of oscillation in transistor colpitts oscillator.

11) What is piezoelectric effect? Explain the working crystal oscillator.

12) Draw the circuit diagram of a crystal oscillator. What are the advantages of a crystal
oscillator over the other oscillators?

13) What is the range of frequency over which a crystal oscillator may be normally used and
why?

14) What are the advantages and limitations of a crystal oscillator?

15) Explain the principle of operation of a Wien bridge oscillator with the help of a neat diagram
obtain an expression for its frequency of oscillations.

16) What is the type of feedback incorporated in the Wien-bridge oscillator circuit? Explain its
working.

17) Show that the gain of Wien bridge oscillator using BJT amplifier must be at least 3 for the
oscillations to occur.

18) List the advantages of Wien bridge oscillator.

19) Explain how to stabilize the amplitude against variation, due to fluctuations occasioned in
Wein bridge oscillator.

20) Draw the circuit diagram of a RC phase shift oscillator using BJT.

21) Derive the expression for frequency of oscillator RC – phase shift oscillator using BJT.

22) For the feedback network shown in fig. find the transfer function and the input impendence.
If this network is used in a phase shift oscillator, find the frequency of oscillation and the
minimum amplifier voltage gain. Assume that the network does not load down the amplifier.
23) Sketch the circuit of a phase shift oscillators using a BJT and explain its operation.

24) What are the factors that affect the frequency stability of an oscillator? How frequency
stability can be improved in oscillators.

25) Explain briefly about frequency and amplified stability of oscillators.

26) Why the LC oscillator are not suitable for low frequency applications. Explain the principle
of working of basic LC oscillators.

27) Derive the expression for frequency of oscillators. Why RC oscillators are not suitable for
high frequency applications.

28) Why RC oscillators are not suitable for high frequency applications.

29) For the JFET oscillator shown in fig. find VF/Vo , the frequency of oscillation and the
minimum gain of the source follower required for oscillations.
30) Explain why in every practical oscillator the loop gain is slightly larger than unity?

31) Prove that amplitude of the oscillations is limited by the onset of Non-linearity.

32) State the NYQUIST CRITERION for stability.

UNIT-4:POWER AMPLIFIERS
1) Introduction to power amplifier
• A power amplifier is an amplifier, which is capable to providing a large amount of power
to the load. Such as loud speaker or motor
• The power amplifier is used as a last stage in electronic system. A power amplifier is
more commonly known as audio amplifier.
• The power amplifier does not actually amplify the power, it takes power the d.c power
supply connected to the output circuit and converse it into useful a.c power. The power is
fed to load.
• The small signal amplifier is called voltage amplifier and a large signal amplifier as a
power amplifier.

2) Classification of power amplifiers

The quiescent point or operating point is fixed by selecting the d.c biasing conditions of
transistors.
The position of the quiescent point on the load line decides the class of operation of the power
amplifiers. The various classes of power amplifiers. Are
• CLASS A
• CLASS B
• CLASS C
• CLASS AB

i) class A amplifier
a) the power amplifier is said to be class A amplifier if the Q point and the input signal are
selected such that the output signal is obtained for a full input cycle.
b) For all values of input signal the transistor remain in the active region and never enters into
cutoff saturation region.
c) From the fig. shown for full input cycle a full output is cycle is obtained. Here signal is
faithfully reproduced, at the output without any distortion.
d) The efficiency of class A operation is very small.
i) class B amplifiers
a) The power amplifier is said to be class B amplifier it the Q point and the input signal are
selected, such that output signal is obtained only for one half cycle for a full input cycle. For this
operation, the Q point is shifted on X-axis , transistor is biased to cutoff.
b) Due to the selection of ‘Q’ point on the X axis, the transistor remains in the active region only
for positive half cycle is reproduced at the output. But in a negative half cycle of the input signal,
the transistor enters in a cutoff region and no signal is produced at the output.
c) The collector current flows only for 1800 (half cycle) of the input signal.
d) As only a half cycle is obtained at output for full input cycle, the output signal is distorted in
this mode of operation.
e) The efficiency of class B operation is much higher than the class A operation.
iii) Class ‘C’ amplifiers.
a) The power amplifier is said to be class C amplifier if the Q point and the input signal are
selected such that the output signal is obtained for less than a half cycle, for a full input cycle.
For this operation, the Q point is to be shifted below X –axis.
b) Due to selection of ‘Q’ point transistor remains active, for less than a half cycle. Hence only
part of input appears at output.
c) In class C, the transistor is biased well beyond cutoff. As the collector current flows for less
than 1800 the output is much more distorted and hence ‘C’ is not used for A.F power amplifier.
d) The efficiency is very high compared to class A and class B and nearly 100%
iv) Class AB amplifier
a) The power amplifier is said to be class AB amplifier it the Q point and the input signal are
selected such that the output signal is obtained for more than 1800 but less than 3600 for a full
input cycle.
b) The transistor remains active for more than one half cycle(1800) and enters to cutoff region
before (3600) of completion of output signal. The Q point is slightly above X-axis and below the
midpoint of load line.
c) The distortion exists in class AB also.
 d) The efficiency is greater than A and
less than class B. in class AB operation the cross over distortions is eliminated.

3) Analysis of class A amplifiers

Two types of class A power amplifier
• Directly coupled class A amplifier
• Transformer coupled class B amplifier.

1) Directly coupled class A amplifier

1) A simple fixed bias circuit can be used as a large signal class A amplifier as shown in figure
(1).
2) The transistor used, is a power transistor. The value of RB is selected such that Q point lie’s at
the centre of the d.c load line.
3) For all values of input signal the transistor remains in the active region and never enters into
cutoff or saturation region. When an a.c input signal is applied the collector voltage varies
sinusoid ally hence the collector current also varies sinusoid ally. The collector current flows for
3600 (full cycle) of the input signal. The input and output wave forms are shown in fig 2.
4) The circuit represents the directly coupled class A amplifier as the load resistance is directly
connected in the collector circuit. Generally value of RL = 4 to 16 Ω and (B < 100) for transistor
used.
5) The overall circuit handles large power in range few watts to 10 watts without much voltages
gain.

6) D.C operation
The collector supply voltage Vcc and resistance RB decides the d.c base = bias current IBQ

The corresponding collector current is

The corresponding collector to emitter voltage
Hence the Q point ( is determined

7) A.C operation
When an input a.c signal is applied the base current varies sinusoid ally. Assuming that the non
linear distortion is absent the nature of the collector current and also vary sinusoid ally the
varying output current and voltage deliver a.c power.

a.c power output

maximum instantaneous collector voltage
= minimum instantaneous collector voltage

= maximum instantaneous collector current

= minimum instantaneous collector current
= peak to peak value of a.c o/p current

→ Using r.m.s values Pa.c =

Power delivered to load =

→ using peak to peak values Pa.c =

Power delivered to load =

8) Efficiency
The ratio of output a.c power delivered to load to input d.c power gives the efficiency of
amplifier.

→ Power dissipation
The power dissipation occurs in the form of heat

ii) Transformer coupled class A amplifier.

1) The basic circuit of transformer coupled amplifier is shown below.
2) The primary of transformer is connected to collector of the transistor the output is taken across
load resistance connected to secondary of transformer.
3) As, the load is directly coupled to collector, power lass occurs due to d.c components, this
disadvantage is eliminated by transformer coupled load.
4) Hence for a.c input signal given to base. Appears in amplified form at collector as primary of
transformer is connected to it form at collector, as primary of transformer is connected to it,
transfer’s power to secondary of transformer and finally delivered to load resistance. (generally a
load speaker)

5) D.C operation
There is no d.c voltage drop across the primary winding of the there no d.c bias voltage . Hence
the d.c load line is a vertical straight line passing through a voltage point on the x-axis which is

→ D.C power input

6) A.C operation
For a.c analysis, a.c load line on the output characteristics must be obtained. The output current
i.e collector current varies around its quiescent value when a.c input signal is applied to the
amplifier. The corresponding output voltage also varies sinusoidally around its quiescent value
which is in this case.

→ A.C output power: the a.c power developed is on the primary side of the transformer the a.c
power delivered is on the secondary side of the transformer.
A.C power developed on the primary is
(pri) (pri)

load resistance interms of primer

A.C power delivered to load at secondary
→ The power delivered to secondary is some as power developed in primary (ideally) under
practical conditions, it is slightly less than power in primary.

7) Efficiency:
The efficiency is given by ratio of output a.c power to input d.c power

→ Maximum efficiency At maximum efficiency

Hence maximum efficiency is 50% ideally, but in practical conditions it is about 30 to 35%

8) Power dissipation
The power dissipated by the transformer is very small due to negligible (d.c) winding resistances
and can be neglected.
Class A push pull power amplifier
The distortion introduced by non – linearity of the dynamical transfer characteristic using a
single transistor as amplifier can be minimized by push-pull arrangement. The amplifier is then
known as push pull amplifier
1) The class push pull amplifier is shown below.

2) In push pull arrangement two identical transistor T1 and T2 are used. The emitter terminals of
the two transistors are connected together. The input signal is applied to the inputs of two
transistors through centre tapped transformer, this transformer provides opposite polarity signals
to the two input transistor. The collectors of both the transistors are connected to the primary of
output transformer.
The collector terminals of the two transistors are connected to the supply through the primary of
output transformer. Resistors R1 and R2 provide the biasing. The load (loud speaker) is connected
across the secondary of output transformer.
The transformer at output is chosen such that proper impendence matching is done such that
maximum power is delivered.

3) Operation
a) The two transistors T1 and T2 carry d.c components of collector currents (. These currents are
equal in magnitude and flow in opposite directions through the primary of transformer T2. So
there is practically no net d.c component of current through the primary of transformer T2. This
will increase the a.c power output which is obtained by a single transistor.
b) When an a.c signal is applied to the input. When the input signal voltage is positive, the base
of transistor T1 is more positive while of transistor T1 increases. These currents flow in opposite
direction in two halves of the primary of output transformer.
c) The flux produced by these currents will also be in opposite directions. As a result, the voltage
across the load will be induced voltages whose magnitude will be proportional to the difference
of collector currents i.e. (
d) For negative Half cycle, the collector current will be more than . In this case the voltage
developed across the load will again be due to the difference (. As > the polarity of voltage
induced across load will be reversed.
e) The overall operation results in an a.c voltage induced in secondary of output transformer and
hence a.c power is delivered to the load. The difference of two collector currents is shown in fig.

f) If is obvious that during any given half cycle of input signal, one transistor is being driven (or
pushed) deep into conduction while the other being non conduction (pushed out) hence the name
push – pull amplifier.
Class B power Amplifier [push pull amplifier
• A class B pus pull amplifier is shown below
• The push pull circuit requires two transformers; one at the input circuit requires two
transformers. One at ehe input called driver transformer and other at output called load.
Both transformers are center tapped.
• Two transistors Q1 and Q2 are connected with emitter coupled as shown in circuit
• The drives transformer drives the input signal applied to primary and secondary is
grounded at centre tap. The centre tap of primary of output transformer is connected to +
VCC. The input signals applied to the base of the transistors Q1 and Q2 will be 1800 out of
phase.
 • The transistor Q1 conducts for th positive half cycle of the input producing positive half
cycle at the load. While Q2 conducts for the negative half cycle across the load. Thus,
both the half cycles are obtained at the load i.e. full cycle is obtained.
• When point A is positive the transistor Q1 gets driven into an active region whiles the
transistor Q2 is in cutoff region. While when point A is negative the point B is positive,
hence the transistor Q2 gets driven into the active region while the transistor Q1 is in cut
off region.
• The input and output wave forms are shown below

8. D.C operation
The d.c biasing point i.e Q point is adjusted on the x – axis such that and is zero. Hence Q point
is (VCC , O).

→ D.C power input: each transistor output is half rectified wave from
Im = max. Value of output current by each transistor
d.c or average value is [ half wave form]
Total d.c or average current drawn from supply is algebraic sum of the individual currents.

9. A.C operation
= max. value of current (o/p)
= max. value of o/p voltage

→ A.C power output

10) Efficiency
The efficiency is obtained by ratio of output power to input power

→ Maximum efficiency
Maximum efficiency occurs when Vmm = VCC
= 78.5%
6) Complementary symmetry class B push pull amplifier
1) A Complementary symmetry class B push pull amplifier is shown below.
2) The circuit consists one npn an done pnp, transistor instead of two npn transistors as in push
pull amplifier. This circuit is transformer less circuit.
3) The matched pair of complementary transistors are used in common collector configuration.
This is because C.C configuration has lowest output impedance and hence the impedance
matching is possible.
4) The circuit is driven from a dual supply of VCC. The transistor Q is npn while Q2 is pnp type.

5) Operation:
a) In the positive half cycle of the input signal the transistor Q1 gets driven into active region and
starts conduction. The same signal is applied to the base of the Q2 but as it is of complementary
type it remains in off condition, during positive half cycle. Finally the output is taken at the load
resistance RL.
b) During negative half cycle of the signal the transistor Q2 being PNP gets biased into
conduction, while the transistor Q1 gets driven into cutoff region. Hence only Q2 conducts during
negative half cycle of input, producing negative half cycle at the load RL.
c) Thus for a complete cycle of input a complete cycle of output signal is developed across load
RL.

6) D.C power input

7) A.C power output

8) Efficiency
7) Distortion in amplifiers
1) The input signal applied to amplifiers is alternating in nature. The basic features of any
alternating signal are amplitude, frequency and phase.
2) The amplifier output should be reproduced faith fully i.e there should be no no change or
distortion in the amplitude, frequency and phase of the signal.
3) The possible distortions are in any amplifier are amplitude frequency distortion, phase
distortion.
4) The amplification is faith full (i.e. distortion less) when the transistor is perfectly linear device
i.e the dynamic characteristics of a transistor is a straight line over the operating rang [ic = Kib]
5) Under practical conditions, dynamic characteristics is not perfectly linear. Due to such non
linearity in the dynamic characteristics, the wave form of the output voltage differs from that of
the input signal. Such a distortion is called as non linear distortion or amplitude distortion or
hormone distortion.

a) Harmonic Distortion
1) The harmonic distortion means the presence of the frequency components in the output wave
form, which are not present in the input signal.
2) Fundament frequency component
The component with frequency same as the input signal is called as fundamental frequency
components.
3) The additional frequency components present in the output signal are having frequency
components which are integral multiples of fundamental frequency component.
These components are called as harmonic components or harmonics.
Ex: Fundamental frequency FHz, harmonics are 2F,3F,4F……
Has the largest amplitude, with increase in order of harmonics amplitude decreases, so it is more
important to study second harmonic distortion.
5)The percentage harmonic distortion due to each order (2nd , 3rd ….nth) can be calculated by
comparing the amplitude of each order of harmonic with the amplitude of the fundamental
frequency component.
6) If the fundamental frequency component has an amplitude of B1 and the nth harmonic
component has an amplitude of Bn then the % harmonic distortion due to nth harmonic
component is expressed as.
% nth harmonic distortion

Total harmonic distortion is due to all the individual components

D = Total harmonic distortion.

b) Cross over distortion
1) A transistor to be in active region the base emitter junction must be forward biased. The
junction cannot be forward biased till the voltage applied becomes greater than cut in voltage
(Vr) of the junction, which is generally 0.7 V for silicon and 0.2 V for germanium transistor.
2) Hence, as long as input signal is less than cut in voltage (Vr) of the base emitter junction, the
collector current is zero and transistor remains in cutoff region.
3) In class B amplifiers this cross over distortion is seen.
4) Hence there is a period between the crossing of the half cycles of the input signal, which none
of the transistors is active and output is zero. Hence the nature of the output signal gets distorted
and no longer remains same as that of input. This is called CROSS OVER DISTORION.
Complementary class B push pull amplifier
 ASSIGNMENT – I

LARGE SIGNAL AMPLIFIER

1. Define power amplifier. How are power amplifiers classified?
2. Explain about class A series fed power amplifier? What is the efficiency?
3. Explain about transformer coupled class a power amplifier find its efficiency.
4. Compare series fed and transformer coupled class A amplifier.
5. Explain about class B push pull amplifier. Derive its efficiency.
6. With the help of a neat diagram explain the operation of a complementary symmetry
configured class B power amplifier.
7. Compare and contrast push pull and complementary symmetry configurations for class B
power amplifier.
8. Discuss in detail the origin and effect of cross – over distortion. How do you avoid the cross –
over distortion in power amplifier circuit? Discus in detail
9. Discuss the origin of various distortions in transistor amplifier circuits.
10. Explain method of determinations of total harmonic distortion in push pull power amplifiers
using 5 – point analysis.
11. What is thermal resistance? What is the unit of thermal resistance?
12. Explain the commonly available heat sinks.
What is the necessary o f hear sinks for a power transistor?

ASSIGNMENT – 2
POWER AMPLIFIER

CLASS A
1) Calculate the input power output power and the efficiency of class A amplifier. Shown in fig.
the input voltage causes a base current 5 mA r.m.s

Ans: Pin = PDC = 10.38w

Po = Pa.c = 640 ml
2) A series fed class A amplifier uses a supply voltage of 20V. The a.c input voltage results in a
bare current of 9 mA peak calculate.
1) Co – ordinates of the Q point, 2) D.C input power, 3) A.C output power
4) Efficiency, 5) Power dissipation, 6) maximum power dissipation.

Ans: 1) Q [ 14.85V, 321.67mA]

2) Pdc = 6.433w
3) Pa.c = 404.95 mw
4) %
5) Pd = PDC -Pac
= 6.028w
6) Pdmax = 6.433w

CLASS B
3) A push pull class B A.F power amplifier uses the ideal transformer having a total of 160 turns
on the primary an d40 turns on the secondary. It must be capable of delivering 40w power to the
8 Ω speaker, under maximum condition. How much should be the value of VCC?
Ans: VCC = 50.60V
4) For a class B amplifier using common collector configuration the supply voltage is 25V while
the load resistance is 16Ω. If the input a.c signal of 20V peak is supplied, determine the input
power, output power and the efficiency.
 Ans: Pdc = 19.89w
Pa.c = 12.5w

5) Calculate the efficiency of a complementary symmetry A.F power amplifier using Ideal
emitter follower circuit and two d.c power supplies of +20V and -20V when driving an 8Ω load
for a sinusoidal input voltage of i)Vin = 10 V(r.m.s) and ii) Vin = 5V(r.m.s) what value of Vin
(r.m.s) yields maximum efficiency ?
Ans 2)
1)

DISTORTION
6) A single transistor amplifier with transformer coupled load produces harmonic amplitudes in
the output as
Bo = 1.5 mA , B1 = 120 mA , B2 = 10 mA , B3 = 4mA, B4 = 2mA, B5 = 1mA.
1) Determine the percentage total harmonic distortion
2) Assume a second identical transistor is used along will a suitable transformer provide push
pull operation. Use the above harmonic amplitudes to determine the total harmonic distortion.
Ans : 1)% D = 9.1624%
2) % D = 3.4326%
7) A sinusoidal signal VS= 1.75 sin (600t) is fed to a power amplifier the resulting output current
is
I0 = 15 sin 600t + 1.5 Sin 1200t + 1.2 Sin 1800t + 0.5 sin 2400t c
Calculate the percentage increase in the power due to distortion.
Ans: P(a.c)D = 0.0175
% P increase = 1.75 %
8) Prove that in class A amplifier if distortion is 10% power given to the load is increased by 1 %
Ans: -D = 10%
P(a.c)D = 1.01 Pac

9) A Power amplifier supplies 3 w to a load of 6KΩ. the zero signl d.c collector current is 55 mA
and the collector current with signal is 60mA. How much is the percentage second harmonic
distortion?
 Ans: % D2 = 16.01%
10) A silicon power transistor is operated with a heat sin K with . The transistor is rated for 120
w at 250C and Qjc = 0.50C/w. the mounting insulation has 0C/w. what maximum power can be
dissipated if the ambient temperature is 350C and (Tj)max = 2000C.
Ans: Pd = 68 .75 w
11) A silicon transistor has maximum allowable junction temperature of 1750C. in ambient
temperature of 250C , the transistor can dissipate 0.5w. if the transistor dissipates 0.3 w when an
ambient temperature is changed to 350C. Find the junction temperature under this condition.
Ans: Tj = 1250C
12) The operating junction temperature of a transistor is 1250C. the total dissipation at a 250C
case temperature is 0.5 w and at a 250C of ambient temperature, the total dissipation is 0.2 w.
what is the value of thermal resistance
Ans:
5000C/w
3000 C/w

UNIT--5
1) Tuned amplifiers
1) Tuned amplifier circuits are designed to amplify a signal over a narrow band of frequencies
centered at fo. To achieve this, tuned amplifiers use a tuned or resonant circuit as load.

2) A tuned circuit is shown below, the amplifies employ a tuned parallel Lc

circuit, ahich resonates at a resonant frequency.
fr =
impedance zr =

3) The response of tuned amplifier is maximum at resonant frequency and it falls sharply for
frequencies below or above fr.
4) Quality factor determines the 3dB bandwidth for the resonant circus the 3dB band width is
given as B.w = , Q

2) Classification of tuned amplifiers.

For obtaining large gain, multi stage amplifiers are used.

They are classified as.

1) Single tuned amplifier
2) Double tuned amplifier
3) Stagger tuned amplifier.

These are further classified according to coupling used to cascade the stages of multi stage
amplifier.
1) Capacitive coupled 2) inductive coupled 3) transformer coupled.

3) Single tuned amplifier

1) Single tuned multistage amplifier circuit uses one parallel tuned circuit as a load in each stage
with tuned circuits in all stages. Tuned to the same frequency.
2) A single tuned amplifier (CE configuration) is shown below.
3) The tuned circuit by L and C acts as collector load and resonates at frequency of operation.
The resistors R1, R2 and RE along with capacitor CE provides self bias for the circuit.
4) The equivalent circuit for single tuned amplifier using hybrid parameters.
Ri is input resistance of next stage and Ro is output resistance of current generator. gm
The reactance of the bypass capacitor CE and the coupling capacitors Cc are negligibly small at
the operating frequency and hence these elements are neglected in equivalent ckt

Input capacitance
Ci = + (I –A ), where A is the voltage gat of the amplifier
Ceq = ( c – tuned circuit capacitance output capacitance
The output resistance of current general or gm vbe
gce = = hoe - gm hre hoe =

5) Centre frequency
1) The centre frequency or resonant frequency is given as
, ceq = ( + C
 = C0 + C

2) Quality factor ‘Q’

Effective quality factor Q =
\
=

3) Voltage gain (AV)

AV = = - gm + – fractional
Variation in
Resonant freq.
AV at resonance
gm x Rt
4) The 3xB band width is given as
f= =
The band width of n stage identical amplifier is given as
(B.w)n = f2 – f1= B w1
Bw1 is band width of single stage and Bwn is the bandwidth
4) Double tuned amplifier
1) A double tuned amplifier in CE configuration is shown below.
2) The voltage developed actors tuned circuit is coupled inductively to another tuned circuit.
Both tuned circuit are tuned to the semi frequency.
3) The coefficient of finical coupling is given as
Kc = Qp = Quality factor for primary winding
Qs = Quality factor for secondary winding
If K ( coefficient of coupling)
1) K< Kc , circuit is linden coupled
2) K > Kc, circuit is over coupled
The frequently response is shown in figs for critical, under and over coupled circuits.
4) The bandwidth incase of double tuned amplifier over which the power amplification do not
drop to less than one half, or – 3dB, of the power amplification al resonance, this makes voltage
amplification dropping to 70.7% of if maximum value.
The 3dB bandwidth in a double tuned amplifier exceeds that un single tuned amplifier by factor
b = 1 for critical coupling
=, = 3d band width for double tuned
= 3dB bandwidth for single tuned.

6) Companied with a single tuned amplifier, the double tuned amplifier.

i) Posses a falter response lowing steeper sides

ii) Provides larger 2dB band width

iii) Provides large gain bandwidth product

7) Efferent of cascading on band width for n stage. 3dB bandwidth = Az (

= 2dB bandwidth for double tuned amplifier.

5) Stagger tuned amplifier
1) The double tuned amplifier gives greater 2dB bandwidth loving stepper sides and flat top. But
alignment of double tuned amplifier is difficult. To overcome this problem two single tuned
cascaded amplifiers laving certain bandwidth are taken and their resonant frequencies are so
adjusted that they are separated by an amount equal to bandwidth of each stage,

Since the resonant frequencies are displaced or staggered, they are known as stagger tuned
amplifiers.

2) The advantage of staggered tuned amplifier is to have a better flat, wide band characteristics
in contrast with a very sharp, rejective, narrow band char aclaisties of synchronous tuned
circuits.

3) The overall response of the two stage stagger tuned pair is compared with individual stages in
fig2.

4) The half power (3dB) band width of the staggered pair is times as great as the half power
(3dB) band width of an individual single tuned slage.

5) The gain bandwidth product per stage of a stagger tuned pairs is 0,707. = 1 times that of
individual single timed stages.
6) Class c tuned amplifier
1) The amplifier is said to be class c amplifier, if the Q point and the input signal are selector
such that the output signal is obtained for less than a half cycle, for a full input cycle.

2) Due to such a selection of the Q point, transistor remains active, for less than a half cycle.
Hence only that much part is reproduced at the output. For remaining cycle of the input cycle,
the transistor remains cut off and no signal is produced at the output.

3) A class ’C’ tuned amplifier is shown below

4) The parallel resonant circuit acts as a load impedance
5) As collector current flows for less than half a cycle, the collector current consists of a series of
pulses with the harmonies of the input signal.
6) A parallel tuned circuit a eating as a load impedance is tuned to input frequency. Therefore, it
filters the harmonic frequencies and prod ever a sine wave output vole age consorting of
fundamental component of the input signal.
7) The output voltage is maximum at the resonant frequency the resonant frequency for parallel
tuned circuit is given
Fr =
8) Rower gam G = =
9) Output power pout = = I2oums RL
= Vm =

10) Power dissipation

In class ‘c’ amplifier, the conduction angle is much less 1800. The power dissipation of the
transistor depends on the conduction angle. If increases when conduction angle increases.
The maximum power dissipation for class c amplifier can be given as
PD max =
Under normal condition, conduction angle will be less than 1800 and the transistor power
dissipation will be less than.
But considering worst case condition, the transistor
Power rating must be greater than PD max.

11) Efficiency
The efficiency of the amplifier is given as
100
100
The dc collector current depends on the conduction angle for a conduction angle of 1800 ca half
– wave signal), the average or dc collector current is (Ic) sat / for smaller conduction angle, the
dc current is less than this.
In a class c amplifier, most of the dc input power is converted into ac load power because the
transistor and ceil losses are small. When the conduction angle is 1800, the efficiency is 78.5%.
The efficiency increases when conduction angle decrease as said earlier class c amplifier has
maximum efficiency of 100% approached at very small conduction angles.

12) Band width

The band width of resonant circuit is defined as B.w = fz – f1
The band width of class c tuned amplifier is given as B.w =
Where Q is the quality factor of the circuit.

Assignment -1 tuned amplifier.

1. What is a tuned amplifier and low do you classify tuned amplifier briefly explain.
2. Explain the significance of Q – factor.
3. Explain single tuned amplifier.
4. Briefly explain the capacitive coupled single tuned amplifier with its equivalent circuit.
5. With the help of a circuit diagram, explain tapped single tuned capacitance coupled amplifies.
6. Draw the circuit of double tuned amplifier [trams forms coupled]. Discuss the nature of
responses of the amplifies for different values of kQ = 1, KQ > | and kQ < |.
7. Explain what do you mean by synchronous tuning of tuned amplifiers? Draw the frequency
response of a synchronously tuned amplifies showing the response of individual stages and
overall responses?
8. Explain about stagger funned amplifier draw the frequency response.
9. Compare stagger funned and synchronous funning
10. What is the effect of cascading in single funned amplifies.
11. What is the effect of cascading in double funned amplifies
12. Explain about class c tanned amplifier derive the efficiency.
1) A single tuned RF amplifier uses a transistor with an output resistance of 50k, output
capacitance of 15PF. And input resistance of next stage is 20kΩ the tuned circuit consist of 47
inductance and 2Ω resistance calculate
i) Resonant frequency (ii) effective quality factor (iii) Band width of the circuit
Ans:- fr = 20.2MHz
Q eff = 40. 5 2
B.w = 498.5kHz
2) A single tuned transistor amplifies is used to amplify modulated R.F carries of 600Hz and
band width of 15Hz

The circuit has a total output resistance Rt = 20kΩ and output capacitance C0 = 50PF. Calculate
values of inductance and capacitance of the tuned circuit
Ans eff = 40, , c = 480.5PF
L = 132.6

3) An RF tuned voltage amplifier using FET with rd = 100kΩ and gm = 500us has tuned circuit,
consisting of L = 2.4mH and c = 200 PF, as its load. At its resonant frequency the circuit offers
an equivalent shun resistance of 100kg.
For the amplifier determine.
The resonant gain, Q eff 3) B.w
Ans :- Av = - 25,
Q eff = 14.147
B.w = 15. 904 kHZ
4) A tuned amplifies should have a gain of 50 for a centre frequency of 107. MHZ. and band
width of 200KHZ .
A FET with gm = 5mt |v and rd = 100k is to be used calculate the tank circuit parameters
Ans L = 3.288
C = 71.6PF

R = 3.98Ω

5) A simple tuned amplifier using FET has tank circuit components L = 100H, R = 5Ω, and c =
1000 PF. The FET used has rd = 500kΩ, and gm = 5m A/v. find
1) Fr 2) Tank circuit impedance at resonance 3) Voltage gain at resonance 4) Band width
Ans:- Fr = 503.29KHZ, Rp = 20k
Av = B.w = 7.957KHZ
- 96,15

6) A tuned amplifier is required to have a voltage gain of 30 at 10.7MHZ with 200kHZ. B.w. ano
FET with gm = 5m A/v. and rd = 100kΩ is available calculate of tank circuit elevenths

C = 124.5PF Rp = 2.236Ω
L = 1.777

7. A three stage double tuned amplifies system is to have a half power B.w of 20KHZ centered
on a centre frequency of 450 kHZ Assuming that all stages are identical, determine the half
power band width of single stage. Assuming that each stage couple to get maximum fathers
(B.w)n = 28.01KHz
Where rage double tuned amplifies system is to have a half power B.w of 30 KHZ centered on a
centre frequency of 400 kHZ. Assuming that all stages one identical determine the half power
band width of single stage Assume that each stage couple to get maximum fatners
B.W = 42Khz
CLASS C
9) A class c tuned amplifier has inductance of 3H and capacitance of 470 PF. In the tank circuit
calculates the resonal frequency.
Fr = 4.238 MHz.
10) for the circuit shown calculate resonant frequency a.c collector resistance quality factor and
bandwidth QL = 100.
Fr = 5.19 MHZ

RC = 867 Ω Q= 13.29
B.W = 390.5 KHz
11) For the circuit show fig (1) what is the worst care power dissipation
Ans: Vpp = 30V
PD max = 26 mw.
12. For circuit fig.1 calculate
1) P6 when voltage output is 50 Vpp
2) Pac(max)
3) Pid.c if 0.4 mA and the output voltage is 30 Vpp
5) Band width of amplifier if Q = 125
6) Worst care transistor power dissipation.
Ans: Pout = 31.25 mw Pac(max) = 45 mw, Pdc = 15 mw
= 93.75% B.W = 85.84 KHZ, PDmax = 19.68mw.

3. If class c tuned amplifier has RL = 6KΩ and required tank circuit Q = 80 calculate the values
of L and C of the tank circuit. Assume VCC = 20V, resonant frequency = 5MHz and worst care
power dissipation = 20 mw.

Ans: PDmax = 2kΩ Rp = 3kΩ, L = 1.195 C = 851 PF)

4. Calculate the turns ration required to connect four parallel 16Ω speakers so that they appear as
an 8kΩ effective load
Ans
Ratio 44.72 : 1