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RF MmWave IC Design Engineer - Cambridge

This job posting is for an RFIC Design Engineer position in Cambridge, UK. The role involves circuit design of blocks for satellite communication transceivers, including LNAs, mixers, filters, and PAs. Responsibilities include block-level design, layout coordination, and documentation. Requirements include an engineering degree, experience with RF IC design up to 15GHz, and proficiency with Cadence tools. The company offers competitive salary and benefits.

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Ramnath Kini
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0% found this document useful (0 votes)
155 views4 pages

RF MmWave IC Design Engineer - Cambridge

This job posting is for an RFIC Design Engineer position in Cambridge, UK. The role involves circuit design of blocks for satellite communication transceivers, including LNAs, mixers, filters, and PAs. Responsibilities include block-level design, layout coordination, and documentation. Requirements include an engineering degree, experience with RF IC design up to 15GHz, and proficiency with Cadence tools. The company offers competitive salary and benefits.

Uploaded by

Ramnath Kini
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Job Spec Details

Job Title: RFIC Design Engineer

Department/Group: ASIC

Location: Cambridge Target Start Date:

Level/Salary Range: Case basis Position Type: full-time

About the client:

They are one of the leading developers of high throughput, modular phased arrays, and has developed
electronically steerable antennas (ESAs), based on patented innovations in dynamic beam-forming
technologies and system architecture. By using its unique innovations, they have developed its
antenna technology to be well-suited to commercial land-mobile, aeronautical and maritime satellite
communication applications.

Their parent company who are Korea’s No. 1 leading technology company developing high tech
communications and radar technologies, and it is entering the growing satellite communication antenna
market, through its acquisition.
 
They are committed to developing and launching market leading ESAs to serve the broadband mobility,
satellite communications, Internet of Things (IoT) and Non-Geosynchronous Satellite Operator (NGSO)
markets.

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Job Title: RFIC Design Engineer

Job Overview:

IC Design Engineer to work on the specification, architecture design and circuit design of key circuits and sub-
systems of integrated RF transceivers for next generation of satellite communications in various deep sub-micron
technologies.

Technical Responsibilities:

 Responsible for design of a transceiver blocks (currently in Ku band) in BiCMOS, FDSOI process or other
technologies.
 Hands-on block-level design of various blocks such as LNA, Mixer, TIA, Filter, PA, Opamps, LO and Filters
 Delivering highly competitive RF/Analog blocks with leading edge performance using innovative
architectures and circuit implementations.
 Work closely with the layout team on IP floor-planning, trial layout design, parasitic extraction and
modifications.
 Co-ordinate design activities with other colleagues and possible contractors.
 Collaborate with CAD, process technology, package design and Antenna teams
 Document own work and participate in design reviews

Organizational Responsibilities:

 Ongoing development of core competencies & technical skills


 Receptive and agile to the project needs.
 Good estimation of timescales for projects & sub tasks
 Follow good engineering practices including processes, documentation, tools & automation.
 Identify risks, flag issues in a timely manner so project milestones remain on schedule.

Qualifications & Skills:

Essential:
 An Engineering degree in a relevant discipline
 Experience in RF, Analog and Mixed-Signal IC design (preferably up to 15GHz operating frequencies)
 Excellent understanding of state-of-the-art RF CMOS circuit design and transceiver architectures
 Experience of designing high performance Analog/RF circuits in deep sub-micron technology as well as a
strong analytical approach with a clear track record of success and delivery
 Cadence Virtuoso Design Framework Experience
 Ability to work and interact with engineering teams across multiple disciplines during ASIC project stream
development
 Great communication skills and able to take responsibility for complex circuit and system designs and
delivery to tight timescales

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Desirable:
 Experience on circuit design on 22nm FDSOI, and BICMOS process nodes for RF, Analogue and Mixed-
Signal IPs.
 Experience on EM modelling tools such as RFPro or EMX
 Experience on mmw RF IC design
 Experience on LNA design and RF PA
 Understanding of Radio systems, gain and noise budgeting, phase noise and intermodulation mechanisms
 Experience on ESD design and strategy overview
 Experience on Cadence/Calibre verification tools
 Experience on revision control tools

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Benefits:

They offer a competitive remuneration and benefits package, including:


 Competitive salary
 Bonus scheme
 Contributory pension
 25 days holiday (plus recognised public holidays) and holiday purchase scheme
 Flexible working
 Season ticket loan
 Cycle to work scheme
 Life Insurance

Our Office:

Cambridge ASIC Centre of excellence is located on Cambridge Science Park

A bustling science park, with a vibrant tech community, close to transport and rail links.

Showers and cycle racks are available.

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