DEPARTMENT OF ELECTRICAL & ELECTRONICS ENGINEERING

Subject Name: ELECTRONIC DEVICES AND CIRCUITS Subject Code: EE T34

UNIT IV SMALL AND LARGE SIGNAL AMPLIFIERS

Transistor hybrid model and H-parameters – Determination of H-parameters from transistor

characteristics – Analysis of CB, CE and CC circuits using H-parameter model–Comparison–
Transistor Re model
Cascading amplifier – Direct and RC coupled two stage CE amplifiers – Darlington pair –
Cascode amplifier – Tuned amplifier
Classification of Power amplifiers – Class A , Class B , Class AB , Class C , Class D and Class
E amplifier
Conversion efficiency calculations– Power transistor heat–Low frequency FET model – Source
follower – Analysis of CS and CD circuits.
TWO PORT DEVICES & NETWORK PARAMETERS

Figure below shows a box representing a 2 port network. The terminal behaviour of a two
port network may be specified by the voltage.

 A transistor can be treated as a two port network.

 T h e terminal behavior of any two port network can be specified by the terminal
voltages v1 & v2 at ports 1 and ports 2 respectively, & currents i1 and i2 entering port1
and port2.
 Out of these four variables, we may select any two as the independent variables and
express the remaining two in terms of these independent variables.
 This leads to a variety of two port parameters, out of which the following three are more
important.

i) Open circuit impedance or Z parameters Z11, Z12,Z21,Z22

ii) Short circuit admittance or Y-parameters Y11, Y12,Y21,Y22.

Iii) Hybrid parameters or h-parameters h11, h12, h21, h22.

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Dept of EEE, SMVEC, Pondicherry
OPEN CIRCUIT IMPEDANCE OR Z PARAMETERS Z11, Z12,Z21,Z22

𝑣1
𝑍11 = /𝑖2 = 0 Input impedance (driving point impedance at port 1) with output port
𝑖1

open circuited.

𝑣2
𝑍22 = /𝑖1 = 0 Output impedance (driving point impedance at port 2) with input open
𝑖2

circuited.

𝑣1
𝑍12 = /𝑖1 = 0 Reverse transfer impedance with port 1 open circuited.
𝑖2

𝑣2
𝑍21 = /𝑖2 = 0 Forward transfer impedance with port 2 open circuited.
𝑖1

SHORT CIRCUIT ADMITTANCE PARAMETERS OR Y PARAMETERS:

With reference to fig, we may write the following two equations giving the currents 𝑖1 and 𝑖2 in
terms of port voltages V1 and V2 and four admittance parameters y11, y12,y21,y22.

i1 = y11 V1 + y12V2
i2 = y21 V1 + y22V2
i1
y11 = /v2 = 0 Input admittance (driving point admittance at port 1) with port short
v1

circuited.

i2
y21 = /v2 = 0 Forward transfer admittance with port 2 short circuited.
v1

i1
y12 = /v1 = 0 Reverse transfer admittance with port 1 short circuited.
v2

i2
y22 = /v1 = 0 Output admittance with port 1 short circuited.
v2

y11 and y22 apply to any two port network either active or passive. In a passive
network y12 = y21 ,while in an active networky12 ≠ y21 .

HYBRID PARAMETERS OR h-PARAMETERS

With reference to the general two port network if we select current i1 and V2 in terms of currents
V1 and i2 and four h parameters h11, h12,h21,h22.
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 V1 = h11 i1 + h12V2
i2 = h21 i1 + h22V2
The name hybrid is given to the parameters because all the four parameters are not like dimension
but are hybrid in nature (i.e) combinations of admittance, impedance and dimensionless
quantities.

v1
h11 = /v2 = 0 Input impedance with output port short circuited.
i1

i2
h21 = /v2 = 0 Forward transfer current gain with output port short circuited.
i1

v1
h12 = /i1 = 0 Reverse transfer voltage ratio with port 1 open circuited.
v2

i2
h22 = /i1 = 0 Output admittance with input port open circuited.
v2

The dimensions of h-parameters are as follows:

a. h11 –Ω

b. h22 – mho

c. h12, h21 – dimensionless

The following convenient alternative subscription notation recommended by IEEE is popularly

used

i1 =11=input; 0=22=output
F=21=forward transfer; r=12=reverse transfer.
Therefore h11, h22, h12, h21 may be written as hi, ho, hr, hf respectively.
NOTATIONS IN TRANSISTOR CIRCUITS

When dealing with transistor parameters, it is a common practice to add another subscript (b,e or
c) to designate the type of configuration ‘b’ for common base ,’e’ for common emitter and ’c’
for common collector. Thus we have,

h11e = hie 𝐬𝐡𝐨𝐫𝐭 𝐜𝐢𝐫𝐜𝐮𝐢𝐭 Input impedance in CE configuration.

h21e = hfe 𝐬𝐡𝐨𝐫𝐭 𝐜𝐢𝐫𝐜𝐮𝐢𝐭 Forward transfer current gain in CE configuration.

h12e = hre Open circuit Reverse transfer voltage ratio in CE configuration.

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h22e = hoe Open circuit Output admittance in CE configuration.

HYBRID MODEL FOR TWO PORT NETWORK

By using the hybrid parameters we may construct a mathematic model for two port network. The
two generator h-parameter model for any two port network characteristics by the equation.

V1 = hi i1 + hrV2………..(1)
i2 = hf i1 + hoV2………..(2)

If we apply KVL and KCL to the input and output ports of the model, we can arrive at equation
(1) and (2).

MERITS OF HYBRID PARAMETER TRANSISTOR MODEL

 They are real numbers at audio frequencies.
 They are easy to measure.
 They can be determined from the transistor static characteristic curve.
 They are convenient to use in circuit analysis and design.

To derive the h model for a transistor, we consider the following variables iB , iC

, 𝑣𝐵 (=𝑉𝐵𝐸 )and 𝑣𝐶 (=𝑉𝐶𝐸 ) and these are instantaneous total values of currents and voltages. The
input current iB and output voltage V𝐶 are chosen as independent variables and 𝑣𝐵 and iC as
dependent variables for common emitter configuration.

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H PARAMETERS FROM THE TRANSISTOR CHARACTERISTICS
Consider common emitter transistor, the input voltage V1 is the base to emitter voltage 𝑉𝐵𝐸
and the output voltage V2 is the collector to the emitter voltage 𝑉𝐶𝐸 .
Similarly the input current is iB and the output current is iC .Therefore we may write,

VBE = hie iB + hreVCE………… (1)

ic = hfe iB + hoeVCE…………(2)

Taking partial derivatives for the above two equations we can obtain h parameters for CE
transistor.

𝜕𝑉𝐵𝐸 ∆𝑉𝐵𝐸
ℎ𝑖𝑒 = = (for constant VCE )
𝜕𝑖𝐵 ∆𝑖𝐵
𝜕𝑉𝐵𝐸 ∆𝑉𝐵𝐸
ℎ𝑟𝑒 = = (for constant 𝑖𝐵 )
𝜕𝑉𝐶𝐸 ∆𝑉𝐶𝐸
𝜕𝑖𝑐 ∆𝑖𝑐
ℎ𝑓𝑒 = = (for constant VCE )
𝜕𝑖𝐵 ∆𝑖𝐵
𝜕𝑖𝑐 ∆𝑖𝑐
ℎ𝑜𝑒 = = (for constant 𝑖𝐵 )
𝜕𝑉𝐶𝐸 ∆𝑉𝐶𝐸

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Dept of EEE, SMVEC, Pondicherry
  From above equation, the parameter hie is determined by the ratio of small change in base
to emitter voltage (∆VBE ) to the corresponding change in base current ∆iB for a constant
value of collector to emitter voltage VCE .
 ℎ𝑟𝑒 is determined by the ratio of small change in base to emitter voltage (∆𝑉𝐵𝐸 ) to the
corresponding change in collector to emitter voltage ∆𝑉𝐶𝐸 for a constant value of 𝑖𝐵
 ℎ𝑓𝑒 is determined by the ratio of small change in collector current ( ∆𝑖𝑐 ) to the
corresponding change in base current ∆𝑖𝐵 for a constant value of collector to emitter
voltage VCE
 ℎ𝑓𝑒 is determined by the ratio of small change in collector current ( ∆𝑖𝑐 ) to the
corresponding change in collector to emitter voltage ∆𝑉𝐶𝐸 for a constant value of 𝑖𝐵 .
 The values of ℎ𝑖𝑒 and ℎ𝑟𝑒 parameters are determined graphically from the input or base
character while the values of ℎ𝑓𝑒 and ℎ𝑜𝑒 are determined from the output or collector
characteristics.

DETERMINATION OF ℎ𝑖𝑒 AND ℎ𝑟𝑒 PARAMETERS

 To find out the value of ℎ𝑖𝑒 ,we have to draw a line which is tangent to the curve marked
VCE2 and passes through the Q point.

 A small change in VBE ∆VBE is then chosen and the corresponding change in base current
∆𝑉𝐵𝐸
𝑖𝐵 is measured. Substituting the values in the relation we get the value ofℎ𝑖𝑒 .
∆𝑖𝐵

 The parameter ℎ𝑟𝑒 can be found by selecting another point on the curve marked VCE1 in
such a way so that the point P and Q have the same value of base current.

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  Then measure the values of changes in collector to emitter voltage ∆VCE (i.e VCE2 −
VCE1 )and the resulting change in base to emitter voltage ∆𝑉𝐵𝐸 (equal to (i.e VBE2 −
VBE1 ).
∆𝑉𝐵𝐸
 Substituting these values in the relation , we get the value of ℎ𝑟𝑒 .
∆𝑉𝐶𝐸

DETERMINATION OF ℎ𝑓𝑒 AND ℎ𝑜𝑒 PARAMETERS

 To find out the value of ℎ𝑓𝑒 ,we select two points R and S in such a way that these points

have the same collector to emitter voltage (i.e VCE2 ).

 Then measure the values of the selected change in base current i.e 𝑖𝐵2 − 𝑖𝐵1 and the
corresponding change in collector current 𝑖𝑐2 − 𝑖𝑐1.
∆𝑖𝑐
 Substituting the value in relation ,we get the value of ℎ𝑓𝑒 .The parameter ℎ𝑜𝑒 can be
∆𝑖𝐵

found by drawing a line which is tangent to the curve marked 𝑖𝐵 = 𝑖𝐵 and passes through
Q point.
 A small change in ∆VCE is then chosen and corresponding change in collector current
∆𝑖𝑐
( ∆𝑖𝐶 )is measured and substitute this in relation ,we get the value of ℎ𝑜𝑒 .
∆𝑉𝐶𝐸

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ANALYSIS OF TRANSISTOR AMPLIFIER USING h-PARAMETERS (Nov 2011,
April/May 2012,Nov 2013, Nov/Dec 2014)-general derivation for CE replace hi as hie for cc
replace hi as hic and for cb replace hi as hib like that for all h parameter terms

 Figure shows a general amplifier circuit. In this circuit, a transistor is connected in any
one of the three possible configurations (i.e CE, CC and CB) to a voltage source Vs and
impedance RL.
 The voltage source Vs has an internal resistance Rs at the input port.
 For analysis of circuit, we replace this transistor by its small signal hybrid model.

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From the figure 𝑖1 and V1 is the input current and voltage at port 1-1’ and 𝑖2 and V2 is the output
current and voltage at port 2-2’respectively.
Current gain AI:
It is ratio of the output current iL to the input current i1.
IL −I2
Ai = = … … . . (1)
I1 I1
The voltage across ZL is given by,
V2 = IL R L = −I2 R L ………. (2)
W.K.T from the h parameters,
I2 = hf I1 + ho V2 ………….. (3)

Sub (2) in (3)

𝐼2 = ℎ𝑓 𝐼1 + ℎ𝑜 (−𝐼2 𝑅𝐿 )
𝐼2 = ℎ𝑓 𝐼1 − ℎ𝑜 𝐼2 𝑅𝐿
ℎ𝑜 𝐼2 𝑅𝐿 + 𝐼2 = ℎ𝑓 𝐼1
(ℎ𝑜 𝑅𝐿 + 1)𝐼2 = ℎ𝑓 𝐼1
I2 hf
=
I1 (ho . R L + 1)
−𝑰𝟐 −𝒉𝒇
𝐀𝐢 = =
𝑰𝟏 (𝐡𝐨 . 𝐑 𝐋 + 𝟏)
Current gain𝐀 𝐢𝐬 :

It is the current gain taking into account the source resistance Rs, if the model is driven
by the current source instead of voltage source .It is given by,
The current gain is given by,
IL −I2
Ais = =
Is Is
Multiply and divide byI1 ,
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 −I2 I1
Ais = =
I1 Is
I1
Ais = Ai … … … . . (1)
Is
From the figure, by using current divider equation,

𝐼𝑠 𝑅𝑠
𝐼1 =
𝑍𝑖 + 𝑅𝑠
I1 𝑅𝑠
= … … . . (2)
Is 𝑍𝑖 + 𝑅𝑠
Sub (2) in (1)
𝐀 𝐢 𝑹𝒔
𝐀 𝐢𝐬 =
𝒁𝒊 + 𝑹𝒔
If R s = ∞, then Ais = Ai
Input Impedance𝐙𝐢 :
The input impedance is the impedance at port 1 seen looking into the amplifier and is
therefore given by,
V1
Ri =
I1
W.K.T from the h parameters,

𝑉1 =ℎ𝑖 𝑖1 + ℎ𝑟 𝑉2 … . (1)

𝑉2 =−𝑖2 𝑅𝐿 …….. (2)

We know,
−𝐼2
𝐴𝑖 =
𝐼1
−𝐼2 = 𝐴𝑖 . 𝐼1 … … . (3)
Sub (3) in (2),
𝑉2= −𝐼2 𝑅𝐿 = 𝐴𝑖 . 𝐼1 𝑅𝐿 ………. (4)

Subs (4) in (1),

𝑉1 =ℎ𝑖 𝐼1 + ℎ𝑟 (𝐴𝑖 . 𝐼1 𝑅𝐿 )

𝑉1 =𝐼1 (ℎ𝑖 + ℎ𝑟 𝐴𝑖 . 𝑅𝐿 )

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 V1
𝑍1 = =(ℎ𝑖 + ℎ𝑟 𝐴𝑖 . 𝑅𝐿 )
I1

−h
Sub Ai = (h .R f+1) in above equation,
o L

V1 −hf
𝑍1 = =hi + hr . [ ]R L
I1 (ho .RL +1)

𝐡𝐟 𝐡𝐫 𝑹𝑳
𝐙𝐢 = 𝐡 𝐢 −
(𝐡𝐨 . 𝐑 𝐋 + 𝟏)

Voltage gain or Voltage amplification𝐀 𝐕 :

It is the ratio of the output voltage 𝑉2to the input voltage 𝑉1.Thus,

V
Av = V2………… (1)
1

We know,

𝑉2= −𝐼2 𝑅𝐿

𝑉1= 𝐼1 𝑍𝑖

Subs the above equations in (1)

−𝐼2 𝑅𝐿
Av =
𝐼1 𝑍𝑖

𝑅𝐿
Av = Ai … … . (2)
𝑍𝑖

−ℎ𝑓 ℎ𝑓 ℎ𝑟 𝑅𝐿
Subs the value of Ai = 𝑎𝑛𝑑 𝑍𝑖 = ℎ𝑖 − 𝑖𝑛 𝑒𝑞 (2)
(ho . R L + 1) (ℎ𝑜 . 𝑅𝐿 + 1)
−ℎ𝑓 𝑅𝐿
Av =
(ho . R L + 1) ℎ𝑓 ℎ𝑟 𝑅𝐿
ℎ𝑖 −
(ℎ𝑜 . 𝑅𝐿 + 1)

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 −ℎ𝑓 R L
Av =
ℎ𝑖 + ℎ𝑖 ℎ𝑜 . 𝑅𝐿 − ℎ𝑟 ℎ𝑓 R L
−𝒉𝒇 𝐑 𝐋
𝐀𝐯 =
𝒉𝒊 + 𝑹𝑳 (𝒉𝒊 𝒉𝒐 . −𝒉𝒓 𝒉𝒇 )
Voltage gain considering source resistance 𝐑 𝐬

V2
AVS =
VS

Multiply and divide by V1 ,

V2 V1
AVS = .
V1 VS

V1
AVS = AV . … … . (1)
VS

Fig shows the equivalent input circuit of the amplifier represented by its input impedance 𝑍𝑖 ,the
voltage source VS with series resistance𝑅𝑠 .

W.K.T, by voltage divider rule,

𝑉𝑠 𝑍𝑖
𝑉1 = … … . . (2)
𝑍𝑖 + 𝑅𝑠
V1 𝑍𝑖
= … … . . (3)
VS 𝑍𝑖 + 𝑅𝑠

Subs (3) in (1),

𝒁𝒊
𝐀 𝐕𝐒 = 𝐀 𝐕 .
𝒁𝒊 + 𝑹𝒔

If R s = 0, then Avs = Av
Output admittance 𝐘𝐨
It is the ratio of output current I2 to the output voltageV2 . It is given by,

𝐼2
Yo = with Vs =0
𝑉2

W.K.T from the h parameters,

I2 = hf I1 + ho V2
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 Dividing by V2 we get,

𝐼2 hf I1
= + ho
𝑉2 𝑉2

hf I1
Yo = + ho … … … (1)
𝑉2

From the figure, with Vs =0

𝑅𝑠 𝐼1 + ℎ𝑖 . 𝐼1 + ℎ𝑟 . 𝑉2 = 0

(𝑅𝑠 + ℎ𝑖 )𝐼1 = −ℎ𝑟 . 𝑉2

𝐼1 −ℎ𝑟
= … … … (2)
𝑉2 (𝑅𝑠 + ℎ𝑖 )

Subs (2) in (1),

𝐡𝐟 𝒉𝒓
𝐘𝐨 = 𝐡𝐨 −
𝑹𝒔 + 𝒉𝒊

Operating power gain 𝐀 𝐏 :

The operating gain AP is defined as the ratio of power PL delivered to the load to the input
power PI at the port 1.this is given by,

PL
AP = … … … . (1)
PI

Output power is given by,

P2 = V2 IL = −V2 I2

Input power is given by,

P1 = V1 I1

Now,

−V2 I2
AP =
V1 I1

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 RL
AP = A2P
𝑍𝑖

Re model of transistor:
The primary function of a "model" is to predict the behaviour of a device in a particular
operating region. At DC the bipolar junction transistor (BJT) works in either the cut-off or
saturation regions (as a switch). See these articles:
BJT Biasing
Transistor as a Switch

In the AC domain (audio frequencies) operation is quite different and the transistor works in
the linear operating region. The re model reflects the operation of the BJT at mid-frequencies
and is sufficiently accurate. The re model is an equivalent circuit that can be used to predict
performance.
Small re is the resistance looking into the emitter terminal of a transistor. As there is a voltage
on the base of a transistor and a current flowing in the emitter, then from ohm's law re = v/i,
see diagram below.

If the BJT is working in the linear region of its characteristic curves and base emitter junction
is forward biased, then re can be defined as:

The base emitter junction acts the same as a conducting diode and has an exponential
relationship between the current and voltage in the forward region. The following equation
can now be used to find an approximate value for re:

where:
K is Boltzman's constant 1.38 x 10-23 joule/K
T is absolute temperature in Kelvin (K = 273 + °C)
q is electronic charge 1.602 x 10 -19 coulombs

By diode current equation:

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 𝑉𝐷
𝐼𝐷 = 𝐼𝑆 𝜂𝑉
(𝑒 𝑇 − 1)
Differentiate the above equation with respect to voltage 𝑉𝐷
𝑑𝐼𝐷 𝑑 𝑉𝐷
= 𝐼𝑆 (𝑒 𝜂𝑉𝑇 − 1)
𝑑𝑉𝐷 𝑑𝑉𝐷
η=1 for silicon diode

on solving above equation :

𝑉𝐷

1 𝐼𝑆 (𝑒 𝑉𝑇 )
=
𝑟𝐷 𝑉𝑇
𝑉𝐷
From diode current equation we can rewrite our 𝐼𝑆 (𝑒 𝑉𝑇 ) = 𝐼𝐷 + 𝐼𝑆

1 𝐼𝐷 + 𝐼𝑆
=
𝑟𝐷 𝑉𝑇
Since saturation current is low we can neglected it

1 𝐼𝐷
=
𝑟𝐷 𝑉𝑇
𝑉𝑇
𝑟𝑒 𝑜𝑟 𝑟𝐷 =
𝐼𝐷

At room temperature re equates to 25 / IE at 20 °C and 26 / IE at 30 °C, see below:

As IE is approximately the same as IC some text books quote re as 25 / IC. It is important that
IE is measured in milliamps and to use the appropriate ambient temperature to calculate re.

In any BJT, the collector current ic, is equal to the product of the base current, ib multiplied by
the small signal forward current gain, hfe or β of the transistor. Thus βib can be thought of as a
constant current generator. The equivalent circuit is shown below:

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This model is quite accurate provided the DC conditions are evaluated to find the quiescent
point of the circuit. Just one parameter is required which can be measured or taken from the
manufacturers data sheet. Separating the above diagram and arranging in common emitter,
the re model is drawn below:

Common Emitter re Model

The output equivalent circuit between terminals C and E is now a constant current generator.
The input impedance is between terminals B and E and has a value of: re ( β )

Common Base re Model

In common base the input signal is applied between B and E terminals and has the value: re

Common Collector re Model

In common collector (emitter follower) the input impedance is: re ( β + 1 )

The re model can be used to quickly estimate input impedance, gain and operating conditions
of transistor circuits.
LOW FREQUENCY FET MODEL

We know that ,drain to source current of JFET is controlled by gate to source voltage
.The change in the drain current due to the gate to source voltage can be determined by using
transconductance factor gm.

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 ΔId= gm ΔVgs

 Fig .shows the small signal low frequency model of a field effect transistor .
 In this model, the gate to source junction is represented by open circuit and no current is drawn
by the input terminal of the field effect transistor.
 It is because of the fact that the input resistance is very large.
 Although the gate source junction appears as open circuit, yet the gate to source voltage affects
the value of drain current.

 It is indicated by a voltage controlled current source (gm Vgs) whose value is proportional to

gate to source voltage.

COMMON SOURCE FET AMPLIFIER (April/may 2012, Nov 2013, April 2013,
April/May 2016)
In common source amplifier circuit input is applied between gate and source and output
is taken from drain and source.

JFET with Fixed bias

Construction:

 Fig shows the common source amplifier with fixed bias.

 The coupling capacitor C1 and C2 which are used to isolate the dc biasing conditions
from the applied ac signal act as short circuits for the ac analysis.

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  The low frequency equivalent model for the common source amplifier is drawn by
replacing
 All capacitors and dc supply voltages with short circuits and JFET with its low
frequency equivalent circuit.

Input impedance

𝑍𝑖 = 𝑅𝐺
Output impedance:

The output impedance is measured looking from the output side and with input voltage 𝑉𝑖 =0

Vgs = 0 and hence g m Vgs =0.

Then g m Vgs =0 allows current source to be replaced by an open circuit. Therefore the output
impedance is given by,

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Dept of EEE, SMVEC, Pondicherry
 𝑍𝑜 = 𝑅𝐷 ||𝑟𝑑
𝑍𝑜 ≈ 𝑅𝐷 (𝑟𝑑 ≫ 𝑅𝐷 )
The voltage gain

Vds Vo
Av = =
𝑉𝑔𝑠 𝑉𝑖

Vo = −g m Vgs 𝑅𝐷 ||𝑟𝑑

Vo = −g m Vi 𝑅𝐷 ||𝑟𝑑 (Vi = Vgs )

Vo
Av = = −g m (𝑅𝐷 ||𝑟𝑑 )
𝑉𝑖

Av = −g m 𝑅𝐷 (𝑟𝑑 ≫ 𝑅𝐷 ).

The negative sign indicates there is a phase shift of 180o between input and output voltages.

JFET with Fixed bias (Bypassed Rs)

 Fig shows the common source amplifier with fixed bias.

 The coupling capacitor C1 and C2 which are used to isolate the dc biasing conditions
from the applied ac signal act as short circuits for the ac analysis.
 Bypass capacitor also acts as short circuit for the ac analysis.

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Dept of EEE, SMVEC, Pondicherry
Input impedance

𝑍𝑖 = 𝑅𝐺
Output impedance:

The output impedance is measured looking from the output side and with input voltage 𝑉𝑖 =0

Vgs = 0 and hence g m Vgs =0.

Then g m Vgs =0 allows current source to be replaced by an open circuit. Therefore the output
impedance is given by,

𝑍𝑜 = 𝑅𝐷 ||𝑟𝑑
𝑍𝑜 ≈ 𝑅𝐷 (𝑟𝑑 ≫ 𝑅𝐷 )
The voltage gain

Vds Vo
Av = =
𝑉𝑔𝑠 𝑉𝑖

Vo = −g m Vgs 𝑅𝐷 ||𝑟𝑑

Vo = −g m Vi 𝑅𝐷 ||𝑟𝑑 (Vi = Vgs )

Vo
Av = = −g m (𝑅𝐷 ||𝑟𝑑 )
𝑉𝑖

Av = −g m 𝑅𝐷 (𝑟𝑑 ≫ 𝑅𝐷 ).

The Negative sign indicates there is a phase shift of 180o between input and output voltages.
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Dept of EEE, SMVEC, Pondicherry
COMMON DRAIN/SOURCE FOLLOWER (Nov 2011, Nov/Dec 2014)
In common drain amplifier circuit input is applied between gate and source and output is
taken between source and drain.

In common drain circuit source voltage Vs is,

Vs = VG + VGS

Input impedance:

𝑍𝑖 = 𝑅𝐺
The output impedance is given by,

𝑍𝑜 = 𝑍′𝑜 ||𝑅𝐷

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Dept of EEE, SMVEC, Pondicherry
 Vo
𝑍′𝑜 = /𝑉 = 0
𝐼𝐷 𝑖
Applying KVL to outer loop we get,

𝑉𝑖 + 𝑉𝑔𝑠 − 𝑉𝑜 = 0

As 𝑉𝑖 = 0,

𝑉𝑔𝑠 = 𝑉𝑜 ………..(1)

From the fig shown above we can write

g m Vgs = 𝐼𝐷 … … . (2)

Subs (1) in (2),

g m Vo = 𝐼𝐷
Vo 1
𝑍′𝑜 = =
𝐼𝐷 g m
1
𝑍𝑜 = ||𝑅
gm 𝑆

The voltage gain

Vo
Av =
𝑉𝑖

Vo = −𝐼𝐷 (𝑅𝑠 ||𝑟𝑑 )

Since g m Vgs = 𝐼𝐷

Vo = −g m Vgs (𝑅𝑠 ||𝑟𝑑 )…….(3)

W.K.T

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Dept of EEE, SMVEC, Pondicherry
 𝑉𝑖 = −𝑉𝑔𝑠 + 𝑉𝑜

𝑉𝑖 = −𝑉𝑔𝑠 − g m Vgs (𝑅𝑠 ||𝑟𝑑 )…..(4)

Subs (3) and (4) in

Vo
Av =
𝑉𝑖

−g m Vgs (𝑅𝑠 ||𝑟𝑑 )

Av =
−𝑉𝑔𝑠 − g m Vgs (𝑅𝑠 ||𝑟𝑑 )

−g m (𝑅𝑠 ||𝑟𝑑 )
Av =
1 + g m (𝑅𝑠 ||𝑟𝑑 )

If (𝑟𝑑 ≫ 𝑅𝑠 )

g m 𝑅𝑠
Av =
1 + g m 𝑅𝑠

MULTISTAGE AMPLIFIER

Amplifier can amplify a signal from a very weak source such as microphone to a level which
is suitable for operation of another transducer such as loudspeaker. This is achieved by
cascading number of amplifiers in series known as multistage amplifier.

NEED FOR CASCADING

 To have desired voltage gain, current gain and to match the input impedance with the
source plus the output impedance with the load.
 Due to limitations of transistor and FET parameters, these parameters are not met. In
order to meet these two or more amplifier stages are connected in cascade such as an
amplifier with two or more stages is known as multistage amplifer.In a multistage
amplifier if we feed the output of one stage to the input of the next such a connection
of amplifiers is called cascading.
 A multistage amplifier, using two or more single stage common emitter amplifier is
called cascade amplifier.
 A multistage amplifier with common emitter as first stage and common base amplifier
as second stage is called as cascade amplifier.

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Dept of EEE, SMVEC, Pondicherry
GAIN OF A MULTISTAGE AMPLIFER

The voltage gain of a multistage amplifier is equal to the product of the gain of individual
stages. Different coupling schemes are used in amplifiers. All amplifiers need some kind of
coupling network. Even a single stage amplifier needs coupling to the input source and the
output load. The multistage amplifiers need coupling between their individual stages.

This type of coupling is called interstage coupling .It serves following two purposes:

It transfers AC output of one stage to the input of the next stage.

It isolates the DC conditions of one stage to the next. This is necessary to prevent the shifting
of Q point.

The coupling network (or coupling device) must ensure that both the above purposes are
fulfilled, when an AC signal is to be amplified.

 Resistance –capacitance coupling(RC coupling)

 Impedance coupling
 Transformer coupling
 Direct coupling

DIRECT COUPLED AMPLIFIER AND ITS FREQUENCY RESPONSE.

 Direct coupled amplifier is also called as DC amplifier and is used to amplify very
low frequency (below 10 Hz) signals including DC or Zero frequency.
 It may be noted that the capacitors, inductors and transformers cannot be used as a
coupling network at very low frequencies because the electrical size of these devices
at low frequencies becomes very large.

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Dept of EEE, SMVEC, Pondicherry
  It may be noted that the capacitors, inductors and transformers cannot be used as a
coupling network at very low frequencies because the electrical size of these
devices at low frequencies becomes very large.

Circuit Description:

 It may be noted that the output of the first stage is directly connected to the base of the
next transistor.
 Moreover there are no input output coupling capacitors.

Operation:

 T h e signal to be amplified is applied directly to the input of the first stage.

 Due to the transistor action, it appears in the amplified form across the collector
resistor or transistor Q1.
 This voltage then drives the base of the second transistor Q2 and the amplified
output is obtained across the collector resistor of transistor Q2.

Calculation of voltage gain for Direct coupled Amplifier:

 The AC equivalent circuit for direct coupled amplifier shown above can be drawn
as below.

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Dept of EEE, SMVEC, Pondicherry
 It is evident from the figure shown above that the input resistance of the first stage,

R i1 = (R1 ||R 2 )||β1 (re1 ′ + R 4 )

And the input resistance of the second stage,

R i2 = β2 (re1 ′ + R 6 )

Similarly the output resistance of the first stage,

R o1 = (R 3 ||R i2 )

And the output resistance of the second stage,

R o2 = R 5

Voltage gain of the first stage,

𝑅𝑜1 𝑅𝑜1
𝐴𝑣1 = 𝛽 𝑋 = ′
𝑅𝑖1 𝑟 𝑒1 + 𝑅4

And the voltage gain of the second stage,

𝑅𝑜2 𝑅𝑜2
𝐴𝑣2 = 𝛽2 𝑋 = ′
𝑅𝑖3 𝑟 𝑒2 + 𝑅4

The overall voltage gain is given by the relation,

Av = Av1 Av2

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Dept of EEE, SMVEC, Pondicherry
Frequency response of Direct coupled amplifier:

 The frequency response of direct coupled amplifier is shown below.

 It is evident from the figure that the gain is uniform up to a certain frequency
denoted by f2.
 Beyond this frequency, the gain rolls off slowly.
 The gain rolls off at high frequencies due to the increased emitter diode
capacitance and stray wiring capacitance.

Advantages:

 The circuit is very simple because it uses a minimum number of resistors.

 The circuit cost is low because of the absence of expensive coupling devices.
 It can amplify very low frequency signals down to zero frequency.

Disadvantages:

 It cannot amplify high frequency signals.

 It has poor temperature stability.

Applications:

 Analog computation
 .Power supply regulators
 Bioelectric measurements
 Linear integrated circuits

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Dept of EEE, SMVEC, Pondicherry
 RC COUPLED AMPLIFIER AND ITS FREQUENCY RESPONSE. (APR -13)

Circuit Description:
 RC coupled transistor amplifier consists of two single stage common emitter transistor
amplifiers. T h e resistors Rc, RB and capacitor Cc form the coupling network.
 T h e capacitor C1 is used to couple the input signal to the base of Q1, while the capacitor
C2 is used to couple the output signal from the collector of Q2 to the load.
 T h e capacitor CE connected at the emitters of Q1 & Q2 are needed because they bypass
the emitter to the ground. W i t h o u t these capacitors, the voltage gain of each stage will be
lost.
Operation:
 When an AC signal is applied to the input of the first stage, it is amplified by a transistor and
appears across the collector resistor (Rc).
 The signal is given to the input of the second stage through a coupling capacitor Cc.
 The second stage does further amplification of the signal.
 In this way, the cascade stage amplifies the signal and the overall gain is equal to the product
of the individual stage gains.

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Dept of EEE, SMVEC, Pondicherry
 Calculation of voltage gain for RC coupled Amplifier:
For the two stage RC coupled transistor amplifier circuit the A.C equivalent circuit
for each amplifying stage of that circuit is shown below.

 The parameters Ri1 & Ro1 in the equivalent circuits shown above represent the
input resistance and output resistance of the first stage respectively.
 Similarly the parameters Ri2 & Ro2 in the equivalent circuits shown above represent the
input resistance and output resistance of the second stage respectively.
 The parameters r’e1 & r’e2 represents the A.C emitter diode resistance of the transistor
Q1 and Q2 respectively.

The parameters re1 ′′ and re2 ′′ represents a.c emitter diode resistance of the transistor Q1 and Q2
respectively.

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𝑟𝑒1 ′ =
𝐼𝐸1

25
𝑟𝑒2 ′ =
𝐼𝐸2

The input resistance of input stage is,

′ ′ ′
𝑅𝑖2 = 𝑅𝐵 ||(𝛽1 𝑟𝑒1 ) = 𝛽1 𝑟𝑒1 … … . . 𝑖𝑓𝑅𝐵 ≫ (𝛽1 𝑟𝑒1 )

And the output resistance,

𝑅𝑜1 = 𝑅𝑐 ||𝑅𝑖2

The input resistance of second stage is,

′ ′ ′
𝑅𝑖2 = 𝑅𝐵 ||(𝛽2 𝑟𝑒2 ) = 𝛽2 𝑟𝑒2 … … . . 𝑖𝑓𝑅𝐵 ≫ (𝛽2 𝑟𝑒2 )

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Dept of EEE, SMVEC, Pondicherry
And the output resistance,

𝑅𝑜2 = 𝑅𝑐 ||𝑅𝐿

Voltage gain of first stage,

𝑅𝑜1 𝑅𝑜1 𝑅𝑜1

𝐴𝑣1 = 𝛽1 𝑋 = ′
= ′
𝑅𝑖1 𝛽1 𝑟𝑒1 𝑟𝑒1

Voltage gain of the second stage

𝑅𝑜2 𝑅𝑜2 𝑅𝑜2

𝐴𝑣2 = 𝛽2 𝑋 = ′
= ′
𝑅𝑖2 𝛽1 𝑟𝑒2 𝑟𝑒2

Overall voltage gain of the amplifier,

𝑅𝑜1 𝑅𝑜2
𝐴𝑣 = 𝐴𝑣1 . 𝐴𝑣2 = ′
𝑥 ′
𝑟𝑒1 𝑟𝑒2

If the transistors used in both the stages are identical, then current gain of the transistor Q1 and
Q2 will be equal.

Then the overall voltage gain will be

Frequency response of RC coupled amplifier:

 The frequency response of an amplifier is a graph, which indicates the

relationship between the voltage gain as a function of frequency.
 Usually, the voltage gain (in decibels) is plotted along the vertical axis and the
frequency (in hertz or KHz) along the horizontal axis of the frequency response
graph.
 The frequency response of RC coupled amplifier is shown below

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Dept of EEE, SMVEC, Pondicherry
  I t is evident from the graph that the voltage gain drops off at low frequencies (below
50Hz) and at high frequencies (above 20KHz), while it is constant in the mid frequency
range called band width.

At low frequencies (below 50 Hz):

 Since the capacitive reactance (XC) is inversely proportional to the frequency

at low frequencies , so at low frequencies the reactance of the capacitor Cc is quite
large.
 Therefore it will allow only a small part of the signal to pass from one stage to the
next stage.

At high frequencies (above 20K Hz):

 In this frequency range the reactance of capacitor C c becomes quite small,

therefore it behaves like a short circuit.
 As a result of this, the loading effect of the next stage increases, which reduces
the voltage gain.
 T h e capacitance of the emitter diode increases the base current of the transistor
due to which the current gain (β) reduces.
 Hence voltage gain rolls off at high frequencies.

At mid frequencies (50Hz to 20K Hz):

 The effect of coupling capacitor in this frequency range is such that it maintains
a constant voltage gain.
 Thus as the frequency increases the reactance of capacitor Cc decreases, which
tends to increase the gain.
 However at the same time, the lower capacitive reactance increases the loading
effect of the next stage due to which the gain reduces.

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Dept of EEE, SMVEC, Pondicherry
  These two factors almost cancel each other & constant gain is maintained
throughout this frequency range

Advantages:

 It is the most convenient and least expensive multistage amplifier. It has a wide
frequency response.
 It provides less frequency distortion.

Disadvantages:

 The overall gain of the amplifier is comparatively small because of the loading
effect of successive stages.
 Noisy with age, especially in moist climate

Applications:

Public Address systems

DARLINGTON AMPLIFIER.
In order to achieve some increase in the overall values of circuit current gain and input impedance,
two transistors are connected as shown in the following circuit diagram, which is known
as Darlington configuration. The Darlington amplifier consists of two cascaded emitter follower.

The Darlington amplifier has a high input resistance, low output resistance and high current gain.
The voltage gain of a Darlington amplifier is less than unity.

Let,

Ib1-base current of Q1 transistor

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Dept of EEE, SMVEC, Pondicherry
Ie1-emitter current of Q1 transistor

β1-current gain of Q1 transistor

β2-current gain of Q1 transistor

Ib2-base current of Q2 transistor

Ie2-emitter current of Q2 transistor

W.K.T,

Ie1= β1. Ib1

Ie2= β2. Ib2

= β2. Ie1

= β1. β2 Ib1

=β2. Ib1

𝐼𝑒2
= β2
𝐼𝑏1

𝐼𝑒2 2
𝐴𝐼 = β
𝐼𝑏1

Characteristics

The following are the important characteristics of Darling ton amplifier.

 Extremely high input impedance (MΩ).

 Extremely high current gain (several thousands).
 Extremely low output impedance (a few Ω).
Since the characteristics of the Darling ton amplifier are basically the same as those of the
emitter follower, the two circuits are used for similar applications.
CASCODE AMPLIFIER (Nov -12)

Cascode amplifier is a composite amplifier pair with a large bandwidth used for RF application
and as a video amplifier. It consists of a CE stage followed by a CB stage directly coupled to each
other and combines some of the features of both amplifiers.

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Dept of EEE, SMVEC, Pondicherry
 For high frequency, CB configuration has the most desirable characteristics.However; it
suffers from low input impedance. The cascode configuration is designed to have the input
impedance, current gain, voltage gain essentially that of CE amplifier and good isolation between
input and output.

The a.c equivalent circuit for cascode amplifier is drawn by shorting the d.c supply and
coupling capacitors as shown. The simplified h-parameter equivalent circuit for cascode amplifier is
further drawn by replacing the transistors with their simplified equivalent circuit as shown.

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Dept of EEE, SMVEC, Pondicherry
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Dept of EEE, SMVEC, Pondicherry
TUNED AMPLIFIERS

Radio and television stations transmit signals at a particular radio frequency (i.e frequency in the
range of 30 KHz to 300 MHz).The receiver is required to pick up and amplify the desired radio
frequency signal while rejecting others. To obtain the above requirements a tuned amplifier is
required instead of audio amplifier. In order to pick up and amplify the desired radio frequency signal,
the resistive load in the audio amplifier is reduced by a tuned circuit. The tuned circuit is capable of
selecting a particular frequency while rejecting the others. Thus the use of tuned circuit in the
transistor amplifier circuit makes possible the selection and amplification of particular desired radio
frequencies.

Such an amplifier is called tuned voltage amplifier or simply tuned amplifiers. It serves the following
two purposes.

 Selecting a desired radio frequency signal

 Amplification of the selected signal to a suitable voltage level.

SINGLE-TUNED VOLTAGE AMPLIFIER AND ITS FREQUENCY RESPONSE

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Dept of EEE, SMVEC, Pondicherry
Figure shows capacitively coupled tuned amplifier using a BJT and figure (b)shows inductively
coupled tuned amplifiers, using a BJT because the output is taken across an inductor. Both the circuits
consists of a transistor amplifier and tuned circuit as a load.

 The values of C and L of tuned circuit are selected I such a way the the resonant frequency
of the tuned circuit is equal to the frequency to be selected and amplified.
 The resistors R1 R2 RE are called biasing resistors and these resistors provide the d.c operating
currents and voltages for the transistor.
Working:
 The working of tuned amplifier may be understood by considering radio frequency signal to
be amplified, applied at the input of the amplifier.
 The resonant frequency of the tuned circuit is made equal to the frequency of the input signal
by the changing the value of L and C.
 When the frequency of the tuned circuit becomes equal to that of the input signal a large
signal appears across the output terminals.
 It may be noted that if the input signal is a complex wave (i.e. it contains many frequency
components) in that case the signal with frequency equal to the resonant frequency will be
amplifed,and all the other frequencies will be rejected by the tuned circuit.

Frequency response

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Dept of EEE, SMVEC, Pondicherry
We know that, the voltage gain of an amplifier depends on current gain (β), input resistance (Ri) and
load resistance (RL ).The voltage gain is

𝑟𝐿
𝐴𝑣 = 𝛽
𝑟𝑖

W.K.T the load resistance of a parallel resonant circuit (tuned circuits)is given by the relation

𝐿
𝑟𝐿 =
𝐶𝑅

Where L-value of inductance

C-value of capacitance

R- Value of effective resistance of the inductor.

𝐿
𝐴𝑣 = 𝛽 𝐶𝑅
𝑟𝑖

 The value of L/CR is very high at the resonant frequency and it decreases as the frequency
changes above or below the resonant frequency.
 Therefore voltage gain of a tuned amplifier is very high at the resonant frequency and it
decrease the frequency changes above or below the resonant frequency.
 The bandwidth of the amplifier is equal to the frequency difference between fL and fH, where
1
the value of the voltage gain drops at of its maximum value at resonance.
√2
𝑓
 Thus bandwidth, Bw= fH- fL=𝑄𝑜 , where Qo is the quality factor.
𝑜

Limitations of single tuned amplifier

 It can’t be used in communication system. In communication, transmitters transmit the signal

with narrow bandwidth.
 Tuned voltage amplifiers are required to be highly selective.
 High Q in the circuit a high voltage gain but it will give a reduced bandwidth .
 It means that the voltage amplifier with reduced bandwidth may not be able to amplify equally
the complete band of the transmitted signal.
 In other words, narrow bandwidth or smaller pass band of the amplifier will result in a poor
reproduction of the audio signal.

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Dept of EEE, SMVEC, Pondicherry
D O U B L E -TUNED AMP L I F I E R A N D F R E Q U E N C Y RESPONSE (Nov 12)

Circuit Description: The circuit of double tuned voltage amplifier using bipolar junction
transistor is shown below.

 It consists of a transistor amplifier with two tuned circuits.

 One of the tuned circuits (L1, C1) is shown as collector load and other (L2C2) as output.
 The resistors R1, R2 & RE are used to provide DC currents and the voltage for the
transistor operations.

Operation:

 The signal to be amplified is applied at the input terminal through the coupling capacitor
(C C).
 The resonant frequency of the tuned circuit L1C1 is made equal to that of the signal.
 Under these conditions the tuned circuit offers very high impedance to the input
signal.As a result of this large output appears across the tuned circuit L1C1.
 The output from this tuned circuit is inductively coupled to the L2C2 tuned circuit.

Frequency response of double tuned voltage amplifier

 The frequency response of a double tuned voltage amplifier depends upon its degree
of coupling between two tuned circuits.
 The degree of coupling gives us an idea of the amount of energy transferred between
the two tuned circuits.

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Dept of EEE, SMVEC, Pondicherry
 Fig.(a) shows the response curve for tight coupling .

 Here the resonance is shown to occur at two new frequencies (f’o & f’’o) which are
different from the resonance frequency (fo).

 As the degree of coupling is decreased , the two frequencies (f’o & f’’o) come closed
and merge into one frequency (fo) at critical coupling and it is show in Fig(b). When
the degree of coupling is decreased below the critical coupling, a single peak of
reduced height is obtained as shown in Fig(c).

 The tuned circuit of double tuned voltage amplifier is tightly coupled to each other.
Therefore the frequency response of a double tuned voltage amplifier is shown above.
 This type of response curve provides a high selectivity, high gain and relatively
large bandwidth to the tuned voltage amplifier
Applications:

 Intermediate frequency (IF) amplifiers in radio and television receivers.

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Dept of EEE, SMVEC, Pondicherry
STAGGER-TUNED AMPLIFIER AND ITS FREQUENCY RESPONSE (Nov/Dec -14)

Stagger Tuning:

 If two or more tuned circuits which are synchronously tuned are cascaded, the overall
bandwidth decreases.
 However if the different tuned circuits which are cascaded are tuned to slightly different
frequencies, it is possible to obtain an increased bandwidth with a flat pass band with steep
sides.
 This technique is known as stagger tuning.
 Stagger tuned voltage amplifier is a cascade tuned amplifier which gives wider bandwidth
and flat pass band

Circuit Description & Operation:

 A two stage tuned voltage amplifier is shown above. The stagger tuning in this circuit
may be achieved by resonating the tuned circuits L1C1 & L2C2 to slightly different
frequencies.
 When the frequency of the tuned circuit becomes equal to that of the input signal,
a large signal appears across the output terminals.
 It may be noted that if the input signal is a complex wave in that case the
signal with frequency equal to the resonant frequency will be amplified.
 And all other frequency will be rejected by the tuned circuit.

Frequency response of two stage stagger tuned voltage amplifier

 The frequency response of stagger tuned amplifier is shown below.
 In this figure curve ‘a’ shows the gain versus frequency response of the L1C1 tuned
circuit. The curve ‘c’ indicates the combined response of the circuit.
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Dept of EEE, SMVEC, Pondicherry
 It is evident from this curve that the amplifier has a greater bandwidth and flatter pass band
 .It has been found that more the number of stages used, the flatter will be the pass band and
steeper will be the gain fall off outside the pass band.
 It may be noted that because of stagger tuning there is a loss of voltage gain (the gain reduces
from Av to A’v) .
 If an optimum stagger tuning is employed the response curve of the amplifier is very close
to a rectangular response curve. Such a response curve is known as Butterworth response.

DIRECT COUPLED CLASS A POWER AMPLIFIER

Introduction:

 I f the collector current flows at all times during the full cycle of the signal, the
power amplifier is known as CLASS A POWER AMPLIFIER
 T h e direct coupled class A amplifier is basically a common emitter amplifier as shown
below.

Circuit Description & operation:

 The only difference between this circuit and the small signal version is that the
signals handled by the power amplifier circuit are in the range of volts.
 The transistor used is a power transistor capable of operating in the range of few watts.
 The circuits d i a g r a m of class A amplifier shown above supplies power to a pure
resistance load RL.

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Dept of EEE, SMVEC, Pondicherry
  In the class A amplifier the transistor bias and amplitude of the input signal are such
that the output current flows for the complete cycle (i.e. 360o) of the input signal.
 This condition is achieved by locating the Q point somewhere near the center of the
load line.
 However in order to obtain the maximum output signal the Q point is set at the center
of the load line. Figure shown below is the AC load line and the variation of collector
current and the collector to emitter voltage above and below their Q point values for
maximum output.

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Dept of EEE, SMVEC, Pondicherry
  It may be noted from that ideally the collector current can vary from its Q point value
(i.e ICQ) to its saturation value (i.e IC(sat) ) = 2ICQ and down to its cut off vale (i.e
zero).
 The maximum value of the collector current is ICQ and that of collector to emitter
voltage VCEQ.It is the largest signal possible from a class A amplifier.
 If the signal is too large, the amplifier is driven further.

Characteristics of Class A amplifier:

1. The output current flows during the entire cycle of the a.c input signal.
2. The operation of the amplifier is restricted to smaller central region of the load line. So
that it can operate in the linear region of the load line. The large – signals may shift the
Q – point into the non-linear regions near saturation or cut-off and hence produce
amplitude distortion.
3. Since the transistor operates over the linear region of the load line, therefore the output
waveform is almost similar to the input waveform.
4. The a.c power output per active device is smaller than that of class-B or class-C
amplifier.
5. the overall efficiency or circuit efficiency of the amplifier circuit is an important
parameter. It is defined as the ratio of ac power delivered to the load to the total power
supplied by the dc source. Mathematically, the overall efficiency ,

𝑎𝑐 𝑝𝑜𝑤𝑒𝑟 𝑑𝑒𝑙𝑒𝑖𝑣𝑒𝑟𝑒𝑑 𝑡𝑜 𝑡ℎ𝑒 𝑙𝑜𝑎𝑑

𝜂𝑜 =
𝑇𝑜𝑡𝑎𝑙 𝑝𝑜𝑤𝑒𝑟 𝑠𝑢𝑝𝑝𝑙𝑖𝑒𝑑 𝑏𝑦 𝑑𝑐 𝑠𝑜𝑢𝑟𝑐𝑒
𝐴𝑣𝑒𝑟𝑎𝑔𝑒 𝑎𝑐 𝑜𝑢𝑡𝑝𝑢𝑡 𝑝𝑜𝑤𝑒𝑟
𝜂𝑜 =
𝐴𝑣𝑒𝑟𝑎𝑔𝑒 𝑑𝑐 𝑖𝑛𝑝𝑢𝑡 𝑝𝑜𝑤𝑒𝑟

The Maximum possible overall efficiency of a Class – A amplifier with series fed resistive load
is 25 %.

6. The collector efficiency of the amplifier circuit is another important parameter. it is

defined as the ratio of ac power delivered to the load to the power supplied by the dc
source to the transistor. Mathematically, the Collector efficiency ,

𝑎𝑐 𝑝𝑜𝑤𝑒𝑟 𝑑𝑒𝑙𝑒𝑖𝑣𝑒𝑟𝑒𝑑 𝑡𝑜 𝑡ℎ𝑒 𝑙𝑜𝑎𝑑

𝜂𝑜 =
ower supplied by the dc source to the transistor

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Dept of EEE, SMVEC, Pondicherry
 𝐴𝑣𝑒𝑟𝑎𝑔𝑒 𝑎𝑐 𝑜𝑢𝑡𝑝𝑢𝑡 𝑝𝑜𝑤𝑒𝑟
𝜂𝑜 =
𝐴𝑣𝑒𝑟𝑎𝑔𝑒 𝑑𝑐 𝑖𝑛𝑝𝑢𝑡 𝑝𝑜𝑤𝑒𝑟 𝑡𝑜 𝑡ℎ𝑒 𝑡𝑟𝑎𝑛𝑠𝑖𝑠𝑡𝑜𝑟

The Maximum possible value of collector efficiency is 50 %

7. If we use a transformer coupled load instead of a direct coupled resistive load, the
maximum possible overall efficiency increases to 50 %.

Overall and collector Efficiency of Class A amplifier:

The overall efficiency is defined as the ratio of power delivered to the load to the total power
supplied by the DC source.

𝑎𝑐 𝑝𝑜𝑤𝑒𝑟 𝑑𝑒𝑙𝑒𝑖𝑣𝑒𝑟𝑒𝑑 𝑡𝑜 𝑡ℎ𝑒 𝑙𝑜𝑎𝑑

𝜂𝐶 =
𝑇𝑜𝑡𝑎𝑙 𝑝𝑜𝑤𝑒𝑟 𝑠𝑢𝑝𝑝𝑙𝑖𝑒𝑑 𝑏𝑦 𝑑𝑐 𝑠𝑜𝑢𝑟𝑐𝑒

𝐴𝑣𝑒𝑟𝑎𝑔𝑒 𝑎𝑐 𝑜𝑢𝑡𝑝𝑢𝑡 𝑝𝑜𝑤𝑒𝑟 𝑃𝑜(𝑎𝑐)

𝜂𝐶 = =
𝐴𝑣𝑒𝑟𝑎𝑔𝑒 𝑑𝑐 𝑖𝑛𝑝𝑢𝑡 𝑝𝑜𝑤𝑒𝑟 𝑃𝑖𝑛(𝑑𝑐)

We know that average ac output power,

𝑉𝑝2 𝑉𝑃 𝐼𝑃
𝑃𝑜(𝑎𝑐) = =
2𝑅𝐿 2

and the average dc input power,

𝑃𝑖𝑛(𝑑𝑐) = 𝑉𝐶𝐶 𝐼𝐶𝑄

𝑉𝑃 𝐼𝑃
𝑉𝑃 𝐼𝑃
∴ 𝜂𝑜 = 2 =
𝑉𝐶𝐶 𝐼𝐶𝑄 2𝑉𝐶𝐶 𝐼𝐶𝑄

Now for the largest possible output signal, from a class A amplifier, the Q-point must be located
at the center of ac load line. As a result of this, the maximum or peak value of the output voltage
VP is equal to VCEQ and the peak value of output current IP is equal to ICQ

𝑉𝑃 𝐼𝑃 𝑉𝐶𝐸𝑄 𝐼𝐶𝑄 1
∴ 𝜂𝑜 = = = = 0.25 = 25 %
2𝑉𝐶𝐶 𝐼𝐶𝑄 2(2𝑉𝐶𝐸𝑄 )𝐼𝐶𝑄 4

Since VCC = 2VCEQ

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Dept of EEE, SMVEC, Pondicherry
 The above value is the maximum possible value of overall efficiency and is designated
as ηo(max). It means that the maximum value of overall efficiency for class A amplifier is 25
%. However, in actual practice, it is always found to be less tha this value.

TRANSFORMER COUPLED CLASS A POWER AMPLIFIER (Apr -12, Nov -14)

The overall efficiency of a direct coupled class A amplifier does not exceed 25 %. The
main reason for this is that load resistance is directly connected in the output circuit of the
amplifier, because of this it results in waste of power. This problem is solved by using a suitable
transformer for coupling the load to the amplifier. Since the primary winding of a transformer
has a low resistance, therefore the power absorbed in the winding is negligible as compared to
the resistive load.

Circuit Description & operation:

 To transfer a significant amount of power to a practical load such as a loud speaker

with a voice coil impedance of 4 to 20 Ω, it is necessary to use an output matching
transformer.

Fig: Transformer coupled transistors amplifiers

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Dept of EEE, SMVEC, Pondicherry
  Otherwise the internal device resistance which might be higher than that of the
speaker will lead to most of the power generated be lost in active device.

 The secondary load RL when reflected into the primary becomes R’L=RL/n2
where n is voltage transformation ratio.(N2/N1)
 By making secondary turns N2 lesser than primary turns N1, n can be made less
than unity and RL can be made to look much bigger than the actual value.
 In order to determine maximum collector efficiency, refer to the figure shown above.
Under zero signal condition, the effective resistance in the collector circuit is that of
the primary winding of the transformer.
 When the signal is applied the collector current will vary about the operating point Q.
 In order to get maximum AC power output, the peak value of collector current due to
signal alone should be equal to the zero signal collector current Ic.
 In terms of AC load line, the operating point Q should be located at the center of the
AC load line.
 It can be proved that maximum possible overall efficiency and maximum possible
collector efficiency of Class A amplifier using an output transformer are both 50%.

Proof:

W.K.T the average power delivered by the dc supply

𝑃𝑖𝑛(𝑑𝑐) = 𝑉𝐶𝐶 𝐼𝐶𝑄

and the power delivered in the transistor under zero signal condition is

𝑃𝑡𝑟(𝑑𝑐) = 𝑉𝐶𝐶 𝐼𝐶𝑄 = 𝑉𝐶𝐸𝑄 𝐼𝐶𝑄

The peak or maximum value of the output voltage developed across the load resistor is

𝑉𝑃 = 𝑉𝐶𝐸𝑄

and the peak value of output current,

𝐼𝑃 = 𝐼𝐶𝑄

𝐴𝑣𝑒𝑟𝑎𝑔𝑒 𝑎𝑐 𝑜𝑢𝑡𝑝𝑢𝑡 𝑝𝑜𝑤𝑒𝑟 𝑃𝑜(𝑎𝑐)

𝜂𝐶 = =
𝐴𝑣𝑒𝑟𝑎𝑔𝑒 𝑑𝑐 𝑖𝑛𝑝𝑢𝑡 𝑝𝑜𝑤𝑒𝑟 𝑃𝑖𝑛(𝑑𝑐)

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Dept of EEE, SMVEC, Pondicherry
 𝑉𝑃 𝐼𝑃
2 𝑉𝑃 𝐼𝑃
∴ 𝜂𝑜 = =
𝑉𝐶𝐶 𝐼𝐶𝑄 2𝑉𝐶𝐶 𝐼𝐶𝑄

𝑉𝑃 𝐼𝑃 𝑉𝐶𝐸𝑄 𝐼𝐶𝑄 1
𝜂𝑜 = = = = 0.5 = 50 %
2𝑉𝐶𝐶 𝐼𝐶𝑄 2𝑉𝐶𝐸𝑄 𝐼𝐶𝑄 2

The maximum value of the collector efficiency is obtained when the output signal is the
largest possible. Under this condition, the average ac output power,

𝑉𝑃 𝐼𝑃 𝑉𝐶𝐸𝑄 𝐼𝐶𝑄
𝑃𝑜(𝑎𝑐) = =
2 2

The dc input power to the transistor is maximum under zero signal condition and its value is

𝑃𝑡𝑟(𝑑𝑐) = 𝑉𝐶𝐸𝑄 𝐼𝐶𝑄

𝑉𝐶𝐸𝑄 𝐼𝐶𝑄
2 1
𝜂𝐶(𝑚𝑎𝑥) = = = 0.5 = 50%
𝑉𝐶𝐸𝑄 𝐼𝐶𝑄 2

CLASS B AMPLIFIER

In class B amplifier, the transistor bias and amplitude of the input signal is chosen such
that the output current flows for one half cycle (i.e 180o) of the input signal. fig below shows
the variation of collector current with the input signal. It may be noted that with no input signal,
the transistor is biased at the cut off. At this point, there is no current flow through the transistor.

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Dept of EEE, SMVEC, Pondicherry
Characteristics of class B amplifier:

1. The output current flows for only half of the cycle i.e. 180o of the input signal.
2. The transistor dissipates no power with zero input signal.
3. The average current drawn by the circuit in class B operation of the circuit is smaller
than that of class A. Thus the overall efficiency of the circuit is higher than that of class
A. Its maximum value has been found to be equal to 78.5 %.

W.K.T the ac output power in a class B amplifier is developed only during one half
cycle of the input signal. Therefore its value is given by the relation,

1 𝑉𝑐𝑐 𝐼𝐶𝑃 1
𝑃𝑜(𝑎𝑐) = = 𝑉𝑐𝑐 𝐼𝐶𝑃
2 √2 √2 4

Maximum overall efficiency for a class B amplifier,

𝐴𝑣𝑒𝑟𝑎𝑔𝑒 𝑎𝑐 𝑜𝑢𝑡𝑝𝑢𝑡 𝑝𝑜𝑤𝑒𝑟 𝑃

𝜂𝑜 = 𝐴𝑣𝑒𝑟𝑎𝑔𝑒 𝑑𝑐 𝑖𝑛𝑝𝑢𝑡 𝑝𝑜𝑤𝑒𝑟 𝑡𝑜 𝑡ℎ𝑒 𝑡𝑟𝑎𝑛𝑠𝑖𝑠𝑡𝑜𝑟 = 𝑃 𝑜(𝑎𝑐)
𝑖𝑛(𝑑𝑐)

𝐼𝐶𝑃
𝑃𝑖𝑛(𝑑𝑐) = 𝑉𝑐𝑐 𝐼𝐷𝐶 = 𝑉𝑐𝑐
𝜋

Therefore maximum value of overall efficiency,

1
𝑃𝑜(𝑎𝑐) 4 𝑉𝑐𝑐 𝐼𝐶𝑃 𝜋
𝜂𝑜(𝑚𝑎𝑥) = = = = 0.785 = 7.5 %
𝑃𝑖𝑛(𝑑𝑐) 𝐼 4
𝑉𝑐𝑐 𝐶𝑃
𝜋

CLASS B PUSH PULL AMPLIFIER ( May-15, Apr-12, Nov -12, Apr -14)

In Class B amplifier, the transistor conducts only for half cycle. It means that either
positive or negative half cycle is missing. This type of output signal gives a large distortion.
In order to avoid this, we use two transistors connected in a push pull arrangements.

Circuit Description:

 The circuit shown below uses a center-tapped input transformer to produce opposite
polarity signals to the two transistor inputs and an output transformer to drive the load in a
push-pull mode of operation.

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Dept of EEE, SMVEC, Pondicherry
 It employs two transistors operating as a single stage of amplification.
 As shown in above figure the base of two CE connected transistors have been connected to
the opposite ends of the primary of the output transformer T2
 For getting a balanced circuit the two emitters have been returned to the center tap of
transformer T1 secondary & Vcc connected to the center tap of transformer T2.
 Since zero bias is required for cut off, the two bases have been earthed.
 A push pull amplifier is also called as balanced amplifier.

Working Principle:

 It is seen that transistor A & B are driven by two input signals which are 180o out of phase
with each other. These two signals are produced by T1.
 Transistor A takes positive half cycles of the signals whereas B handles negative half cycle.
 During the first half-cycle of operation, transistor A is driven into conduction whereas
transistor B is driven off.
 The current IC.1 through the transformer results in the first half-cycle of signal to the load.
 During the second half-cycle of the input signal, B conducts whereas A stays off, the current
IC2 through the transformer resulting in the second half-cycle to the load.
 The overall signal developed across the load then varies over the full cycle of signal
operation.
During Positive half cycle:

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Dept of EEE, SMVEC, Pondicherry
  During the positive half cycle of the signal A is turned ON because its base is driven
positive.
 It draws collector current IC1 in the upward direction from Vcc.
 Meanwhile transistor B remains OFF because its base has negative voltage.
 Hence IC2= 0. Obviously one positive half cycle of the output signal appears across
secondary load Rl of T2.

During Negative half cycle:

 During negative half cycle the input signal B conducts whereas A remains OFF.
 Hence Ic2 is taken by B but Ic1 =0.
 Now negative output half cycle is produced across RL because IC2 is pulled down
through secondary of T2.
 It is obvious that in the absence of input signal, neither A nor B draws any collector
current.
 Hence, there is no drain on Vcc battery.
Uses:

 Audio work in portable record players as stereo amplifiers & high fidelity radio
receivers.

Power efficiency:
Operating point and the output current and voltage for a push – pull circuit are as shown
in fig below. In this figure, the ac load line for Q2 transistor has been plotted upside down with
respect to that of Q1 transistor in order to get the combined effect.

The ac power delivered to the load resistor,

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Dept of EEE, SMVEC, Pondicherry
 1 𝑉𝑃 𝐼𝑃 1
𝑃𝑜(𝑎𝑐) = 2 ( ) = 𝑉𝑃 𝐼𝑃
2 √2 √2 2

and the power dissipation of the two transistors,

𝐼𝐶𝑃
𝑃𝑖𝑛(𝑑𝑐) = 2(𝑉𝑐𝑐 𝐼𝐷𝐶 ) = 2𝑉𝑐𝑐
𝜋

𝐼𝐶𝑃
Since 𝐼𝐷𝐶 = 𝜋

Therefore maximum value of overall efficiency,

1
𝑃𝑜(𝑎𝑐) 𝑉𝑃 𝐼𝑃 𝜋 𝑉𝑃
𝜂𝑜 = =2 = = 0.785
𝑃𝑖𝑛(𝑑𝑐) 2𝑉 𝐼𝑃 4 𝑉𝑐𝑐
𝑐𝑐 𝜋

For the Largest possible output signal, the peak value of the output voltage is equal to the
VCC supply (i.e VP = VCC). In that case, the overall efficiency is maximum and its value,
𝜂𝑜(𝑚𝑎𝑥) = 0.785 = 78.5 %
The Value of collector efficiency is equal to the overall efficiency, whose maximum value is
also 78.5 %.

Cross over distortion in class B push pull operation

In class B push pull operation there is severe distortion at very low signal level because

a) Bases of the transistor do not turn ON at 0 V but at 0.3 V for Ge and 0.7 V for Si

b) There is non – linearity in the low signal area.

 In simple words, crossover distortion occurs as a result of one transistor cutting

off before the other begins conducting. The effect is illustrated in fig below.
 For silicon transistors, there is 2 x 0.7 =1.4 V dead zone on the input signal
within which neither transistor is turned ON and output is zero.
 The distortion so introduced is called crossover distortion because it occurs
during the time operation crosses over form one transistor to the other in the
push pull amplifier.

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Dept of EEE, SMVEC, Pondicherry
  Crossover distortion can be eliminated by applying slight forward bias to each
emitter diode. It in fact, means locating the Q point of each transistor slightly
above the cut off so that one operates for more than one half cycle. Strictly
speaking, it results in class AB operation because each transistor may operate
for about 200o (instead of 180o). However for all practical purposes, it is still
regarded as class B push pull operation.

COMPLEMENTARY SYMMETRY CLASS B PUSH PULL AMPLIFIER (Apr -13)

Introduction:
The class B push pull amplifier suffers from two major drawbacks such as
 It requires bulky and expensive output transformer.
 It requires two out of phase input signals which necessitates an input center tapped
transformer or phase inverter. It makes the driver circuit quite complicated.

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Dept of EEE, SMVEC, Pondicherry
Circuit Description & operation:

 It is a transformer less circuit. But with common emitter configuration, it

becomes difficult to match the output impedance for maximum power transfer
without output transformers.
 Hence the matched pair of complementary transistors is used in common
collector configuration in this circuit.
 The term ‘symmetry’ means that the biasing resistors are equal. In addition,
voltage feedback can be used to reduce the output impedance for matching. It
is shown in figure.
 The circuit driver from a dual supply of ±VCC. The transistor Q1 gets driven into
the active region and start conducting.
 The same signal gets applied to the base of the Q1 but as it is complementary
type, remains in OFF condition, during positive half cycle.
 This result into positive half cycle across the load.
 During the negative half cycle, the transistor Q2 being PNP gets biased into
conduction.
 While the transistor Q1 gets driven into the cut-off region.
 Hence only Q2 conducts during the negative half cycle of the input, producing
the negative half cycle across the load RL.
 Thus for a complete cycle of input, a complete cycle of output signal is
developed across the load as shown in the waveform.
 All the results derived for push pull transformer coupled applicable to the
complementary class B amplifier , the only change is that as the output
transformer is not present, hence in the expression RL value must be used as it
is instead of RL’.

Advantages

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Dept of EEE, SMVEC, Pondicherry
  As the circuit is transformer, its weight size and cost are less.
 Due to common collector configuration, impedance matching is possible.
 The frequency response improves due to transformer class B circuit

Disadvantages
 The circuit needs two separate voltage supplies.
 The output is distorted to cross-over distortion.

Power Calculation
𝑉𝑝2
The Output ac power, 𝑃𝑜(𝑎𝑐) = 2𝑅𝐿

when Vp = VCC the output power is maximum. Therefore,

𝑉𝑃
𝑅𝐿 =
𝐼𝑃
𝑉𝑃 𝑉𝐶𝐶
𝐼𝑃 = =
𝑅𝐿 𝑅𝐿
2
Hence 𝑃𝑑𝑐 = 𝑉 𝐼
𝜋 𝐶𝐶 𝑃

2 𝑉𝐶𝐶 2
𝑃𝑑𝑐 =
𝜋 𝑅𝐿
𝑉𝐶𝐶 2
Power Dissipated at collector = 𝑃𝑑𝑐 − 𝑃𝑜(𝑎𝑐) = 0.1366
𝑅𝐿

Efficiency ,
𝑉𝑝2
𝑃𝑜(𝑎𝑐) 2𝑅𝐿
𝜂𝑜 = = = 78.5 %
𝑃𝑖𝑛(𝑑𝑐) 2 𝑉𝐶𝐶 2
𝜋 𝑅𝐿
CLASS AB POWER AMPLIFIER (Apr -13)

Circuit Description & operation:

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Dept of EEE, SMVEC, Pondicherry
 Fig Class AB Amplifier
 Class AB amplifier overcomes the problem of crossover distortion present in class B
amplifiers, in which a small current flows at zero input signal level.
 The circuit of a Class AB push pull amplifier is shown above.
 The circuit, which is essentially the same as that of class B amplifier, has additional RE
resistors referred to as the emitter stabilizing resistors.
 This biases the transistor away from class B slightly towards class A operation.
 The transistors Q1 and Q2 are biased such that the Q point of class AB amplifier is
placed in between the active region of class A and cut off region of class B.
 The transistors therefore conduct for more than 180o, so that the crossover distortion
present in class B is eliminated.
 The voltage drop across resistor R2 is equal to the cut in voltage of the transistor.
 When an ac signal is applied to the base, the collector current starts flow immediately.
 But there will be a decrease in the output power due to the negative feedback effect
CLASS C POWER AMPLIFIER
The power amplifiers is said to be class C amplifier if the Q-point and the input signal
are collected such that the output signal is obtained for less than a half cycle, for a full input
cycle.

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Dept of EEE, SMVEC, Pondicherry
 Fig: Class C power amplifier
 Referring to the figure above, the negative supply voltage VEE connected to the base
circuit reverse biases the base-emitter junction so that it will conduct only when input
signal exceeds the reverse bias.
 As a result, the collector current IC will be in the form of pulses.
 Hence the class C amplifier is not used in the audio frequency but used in the radio
frequency range.
 The tank circuit connected to the collector of the amplifier restores the sine wave of
the input signal, but complex audio signal waveform and rectangular waveforms cannot
be restored.
 Class C amplifiers are designed to ensure small conduction angle in order to maintain
high efficiency.
 Hence a signal biasing arrangement is used so that the conduction angle is maintained
constant irrespective of varying amplitude of input signal.
 As shown in fig below, the conduction angle is less than 900 for small, input signal and
more than 1200 for large input signal.
 Conduction angle more than 1200 is too large and amplifier efficiency will decrease.
 Since large current overheat the transistors, signal biasing is used to overcome the
problem and maintain the constant conduction angle.
 From figure A, if the input signal of the self bias circuit exceeds, average charge of the
capacitor C1 increases, thereby decreasing the reverse bias of base –emitter junction,
thus maintaining the constant conduction angle.

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  Thus the effective reverse bias of base emitter junction automatically adjust to the
amplitude of the input signal so that the transistor is switched ON over a constant
conduction angle.

Fig A

Operation:
 A parallel resonant circuit acts as load impedance.
 The collector current flows for less than half a cycle hence it consists of a series of
pulses with the harmonics of the input signal.
 A parallel tuned circuit acting as a load is tuned to the input frequency.

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  Thus it filters the harmonic frequencies and produces a sine wave output.
 Voltage consisting of fundamental component of the input signal.
 The AC input voltage derives the base and amplified output voltage is available at the
collector.
 The amplified and inverted collector voltage is connected to the load resistance RL
through coupling capacitor.
 As class C amplifier is used with parallel tuned circuit, the output voltage is maximum
at the resonant frequency. It is given by
fr = 1/2π√LC
 The gain drops on either side of the resonant frequency.
 Thus the response of class C amplifier is shown in figure.
 As the gain is maximum at the resonant frequency, these amplifiers are used to amplify
only narrow of frequencies.

Efficiency

It is given by the ratio of AC output to the DC input power.

%η = Pout/PDC * 100 = Pout/VCCIDC * 100
 The efficiency depends on the conduction angle Ø. The figure shows the graph of
efficiency against the conduction angle Ø.
 In a class C amplifier, most of the DC input power is connected into AC load power
because the transistor and coil losses are small.
 When the conduction angle is 180°, the efficiency is 78.5%.
 The efficiency increases when the conduction angle decreases. It has maximum
efficiency of 100% approached at very small conduction angles Ø.

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Dept of EEE, SMVEC, Pondicherry
Applications

 The class C operation is not suitable for audio frequency power amplifiers.

 The class C amplifiers are used in tuned circuits used in communication areas and in
radio frequency (RF) circuits with tuned RLC loads.

 It is used in tuned circuits; class C amplifiers are called tuned amplifiers.

 Used in mixer convertor circuits used in radio receivers and wireless communication
systems.

 Used as final amplifier stage in communication circuits.

CLASS D POWER AMPLIFIER (Nov/Dec -14)

Figure shows the basic concept of class D amplifier. The amplifier consists of two
complementary symmetry transistors driving a load RL. This means one transistor is PNP and
other is NPN.

Fig Class D amplifier

 The transistors are biased in such a way that they behave as ideal switches.
 When transistor is ON, it is biased to saturation so that the voltage across it is zero
while the current is high.
 When the transistor is OFF, it is biased so that the current through it is zero while the
voltage is high.

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Dept of EEE, SMVEC, Pondicherry
  Thus when the input goes positive Q1 conducts heavily acting as closed switch while
Q2 is OFF.
 While the input goes negative, Q2 conducts heavily acting as closed switch while Q1 is
OFF.
 Thus the load voltage V0 across RL has one of two possible values which are Vsupply or
0V.
 This is a type of digital output having two levels high and low.
 This square wave is given as input to a high Q series resonance circuit which will
transmit the fundamental frequency alone while blocking the harmonics.
 The transistors dissipate almost zero power as in any of the states, either voltage is zero
or current is zero for the transistors.
 Thus entire power input, available to the load. Here efficiency of class D amplifiers is
almost 100%. The figure of merit which is the ratio of the maximum power dissipated
in transistor to that delivered to the load is zero. The facts make the class D amplifier
as an ideal amplifier.

Applications
 It is mainly used in pulse and digital circuits.
(2 MARKS)
1 What is an amplifier? (Nov 2011)
An amplifier is a circuit, which can be used to increase the amplitude of the input current or
voltage at the output by means of energy drawn from an external source
2 Based on the transistor configuration how amplifiers are classified. (April/May 2012)
Based on transistor configuration, the amplifier are classified as
a. Common Emitter amplifier
b. Common Collector amplifier
c. Common Base amplifier
3 Draw a CE amplifier & its hybrid equivalent circuit and hybrid equation.(April/May
2012)(Nov 2011)

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Dept of EEE, SMVEC, Pondicherry
4 Write the Hybrid parameters equation for transistor amplifier? (or) Write the hybrid
parameters of a two port network.[Nov 2012] [Nov 2013][Nov/Dec 2014]
Vi = hi Ii + hrVo
Io = hf Ii + hoVo
5 Write the CE amplifier Current gain, Voltage gain, Input Impedance, Output Impedance
in terms of h-parameters.
Current gain Ai = -hfe /(1+hoe ZL)
Voltage gain Av = ( - hfe*RL)/hie
Input Impedance Zi = hie –(hrehfeZL/1+hoZL)
6 What is current amplification factor in transistor amplifier configurations?
In a transistor amplifier with AC input signal, the ratio of change in output current to the change
in input current is known as the current amplification factor.
7 Which amplifier is called as voltage follower? Why?
The common collector transistor amplifier configuration is called as voltage follower. Since it
has unity voltage gain and because of its very high input impedance. It doesn’t draw any input
current from the signal. So, the input signal is coupled to the output circuit without making any
distortion.
8 What are the limitations of H parameter.[April/May 2014]
The h parameters has the following limitations,
a. The accurate calculation of h parameters is difficult.
b. A transistor behaves as a two port network for small signals only, hence h parameters can be
used to analyze only the small signal amplifiers.
9 Mention two advantages of emitter follower.[Nov 2012]June 2015] [April 2013]
a) It has unity voltage gain.
b) Less distortion.
c) They are convenient to use in circuit analysis and design
d) Readily supplied by manufactures.

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10 What is the need of a model for a device?[May/June 2015]
The primary function of a "model" is to predict the behavior of a device in a particular operating
region. The models are equivalent circuit that allows methods of circuit analysis to predict
performance
11 Define input resistance of a transistor. ?[May/June 2015]
Input resistance is defined as the ratio of change in input voltage to change in input current .It is
denoted as Zin.
Zin=ΔVin/ ΔIin
12 What are hybrid parameters or h –parameters?[Nov 2013]

The dimensions of the hybrid parameters are not alike, that is they are hybrid in nature so they
are called hybrid parameters.
h11 = [ V1/I1] at V2=0; h11 = Input impedance with output port short circuited.
h12 = [ V1/V2] at I1=0; h12 = Reverse voltage gain with input port open circuited.
h21 = [ I2/I1] at V2=0; h11 = Forward current gain with output port short circuited.
h22 = [ I2/V2] at I1=0; h11 = output impedance with input port open circuited.
13 . What is the classification of tuned amplifiers? (Nov 2011)
 Single tuned
 Double tuned
 Stagger tuned

14 What is cascade amplifier ?(Nov 2011)

The cascade configuration is an amplifier stage composed of a direct coupled common emitter
/ common base combination. This offers the possibility of a very large bandwidth.

15 What is single tuned amplifier? (April/May 2012)

An amplifier circuit that uses a single parallel tuned circuit as a load is called single tuned
amplifier.

16 What are the advantages of tuned amplifiers? (Nov 2012,April 2013)

 They amplify defined frequencies.
 Signal to noise ratio at output is good
 They are suited for radio transmitters and receivers
17 What is Darlington connection in amplifier? Mention its advantages[May/June 2015]

A multistage amplifier, which two cascades emitter follower are arranged are called Darlington
amplifier. It has high input resistance, low output resistance and high current gain. These
characteristics make it very useful as a current amplifier.
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 Darlington Pair: Two identical transistors are connected in such a way that the emitter of one
transistor is connected to the base of the other.

Advantages:
A Darlington transistor connection provides a transistor having a very large current gain,
typically a few thousand. The main features of the Darlington connection is that the composite
transistor acts as a single unit with a current gain that is the product of current gains of the
individual transistors

18 Define lower and upper cut off frequencies for amplifiers?

Lower cut-off frequency
The frequency (on lower side) at which the voltage gain of the amplifier is exactly 70.0% of
the maximum gain is known as lower cut off frequency.
Upper cut-off frequency
The frequency (on higher side) at which the voltage gain of the amplifier is exactly 70.0% of the
maximum gain is known as upper cut off frequency.
19 What is tuned amplifier?(April/May 2012)[Nov 2012][April 2013]

An amplifier, which amplifies a specific frequency, is called tuned amplifier .It serves the
following two purposes:
 Selection of a desired radio frequency signal
 Amplification of the selected signal to a suitable voltage level.

20 What do you mean by multistage amplifier?(or) What is the purpose of coupling

amplifiers?[Nov 2013][April 2013] (April/May 2012)

 The voltage (or power) gain of a small signal amplifier is limited. Moreover it is not
sufficient for all practical applications.
 Therefore in order to achieve greater voltage and power gain, we have to use more than
one stage of amplification. Such an amplifier is called a multistage amplifier.

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Dept of EEE, SMVEC, Pondicherry
21 What is cascode amplifier?[Nov 2012]
A multistage amplifier with common emitter configuration as the first stage and common base
(or common collector) as the second stage, is called a cascode amplifier.

22 What is RC coupled amplifier?[Nov/Dec 2014]

 In this method, the signal developed across the collector resistor of each stage is coupled
through a capacitor into the base of the next stage.
 The cascaded stages amplify the signal and the overall gain is equal to the product of
individual stage gains.
 The amplifiers using this coupling scheme, are called RC coupled amplifiers.

23 Draw the frequency response of RC coupled amplifier.[Nov /Dec 2014]

24 What are the disadvantages of tuned amplifiers?

 The circuit is bulky and costly
 The design is complex.
They are not suited to amplify audio frequencie

25 What are the advantages of stagger tuned amplifier?

The advantages of stagger tuned amplifier are better flat, wideband characteristics.
26 What are the advantages of double tuned over single tuned?
1. Possess flatter response having steeper sides
2. Provides larger 3 db bandwidth
3. Provides large gain-bandwidth product.

27 How the tuned circuits are classified?

Tuned amplifiers

Small signal large signal

Single tuned double tuned staggered tuned

Capacitor coupled inductance coupled

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Dept of EEE, SMVEC, Pondicherry
28 Define the frequency response of Amplifier?
The frequency response of an amplifier can be defined as the variation of output of
quantity with respect to input signal frequency. In otherwise it can be defined as a graph drawn
between the input frequency and the gain of an amplifier.
29 What is the coupling methods used for coupling in multistage amplifiers?
The coupling methods used are,
a. RC coupling
b. Transformer coupling
c. Direct coupling
30 State the reason for fall in gain at low frequencies.
The coupling capacitance has very high reactance at low frequency. Therefore it will allow
only a small part of signal from one stage to next stage and in addition to that the bypass
capacitor cannot bypass or shunt the emitter resistor effectively. As a result of these factors,
the voltage gain rolls of at low frequency.
31 State the reason for fall in gain at higher frequencies?
At high frequency the reactance of coupling capacitor is very low. Therefore it behaves like a
short circuit. As a result of this the loading effect of the next stage increase which reduces the
voltage gain. Hence the voltage gain rolls off at high frequencies.
32 List out the classification of large signal amplifiers?
The large signal amplifiers are classified as follows.
a. Based on the input
i. small signal amplifiers
ii. large signal amplifiers
b. Based on the output
I. Voltage amplifier
II. Power amplifier
III. Current amplifier
c. Based on the transistor configuration
I. CE amplifier
II. CB amplifier
III. CC amplifier
d. Based on the number of stages
I. Single stage amplifier

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Dept of EEE, SMVEC, Pondicherry
 II. Multistage amplifier
e. Based on the Bandwidth
I. Un-tuned amplifier (wide band amplifier)
II. Tuned amplifier (narrow band amplifier)
f. Based on the frequency response
I. AF (Audio frequency) amplifier
II. IF (Intermediate frequency) amplifier
III. RF (Radio Frequency) amplifier
g. Based on the Biasing condition
I. Class A amplifier
II. Class B amplifier
III. Class C amplifier
IV. Class AB amplifier
V. Class D amplifier
VI. Class S amplifier
33 What is class D amplifier?
In order to increase the conversion efficiency, it would be desirable to make the device to
operate as a switch. So that its voltage drop remains almost at minimum value over the half cycle
of output current flow. Such a system is called class D amplifier

34 How do you bias the class A operation? [Nov/Dec -14]

In class A mode, the output current flows throughout the entire period of input cycle and the Q
point is chosen at the midpoint of AC load line and biased.
35 Explain impedance matching.(Nov 2011)
It is the process of matching the load impedance to the source impedance of a driving source.

36 Give two advantage of push-pull amplifier(Nov 2011)[April/May 2014][Nov 2013]

The merits of push pull configurations are,
a. Efficiency is high (78.5%)
b. Figure of merit is high
c. Distortion is less.
d. Ripple present in the output due to power supply is multiplied.

37 Which amplifier gives minimum distortion? [Nov/Dec -14]

Class S amplifier gives minimum distortion.

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Dept of EEE, SMVEC, Pondicherry
38 Give the applications of class C power amplifier[Apr -13] [April/May 2014]
The applications of class C power amplifier are,
a. Used in radio and TV transmitters.
b. Used to amplify the high frequency signals.
c. Tuned amplifiers

39 Define Class B mode of operation and its advantages and disadvantages[Apr -13]
Class B mode of operation
In class B the Biasing signal and input signal flow through the circuit for half cycle i.e., 180 o.
Advantages
a. Efficiency is increased from 25% to 78.5%
b. Due to push pull configuration all even harmonics are reduced. So harmonic distortions are
reduced.
c. Due to centre-tapped transformer at input and output, the core saturation loss is reduced.

Disadvantages
a. Transistor is biased above the cut off region
b. Due to the centre-tapped transformer at both input and output, the circuit becomes complex

40 What is cross over distortion?

In class B mode, both transistors are biased at cut off region because the DC bias voltage is zero.
So input signal should exceed the barrier voltage to make the transistor conduct, Otherwise the
transistor doesn’t conduct. So there is a time interval between positive and negative alternations of
the input signal when neither transistor is conducting. The resulting distortion in the output signal
is cross over distortion.

41 How will you check the stability of amplifier circuit[April/May 2012]

Stability is checked using stability factor which is given below,
S=dIc/dIco
It is defined as rate of change of collector current with respect to reverse saturation current
keeping β and IB constant.
Higher the stability factor indicates poor stability.

42 What is meant by conversion efficiency of an amplifier?[Nov 2012]

The ratio of the AC output power delivered to the load to DC input power applied is referred
to as conversion efficiency. It is also called as collector circuit efficiency in case of transistor
amplifier.
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Dept of EEE, SMVEC, Pondicherry
 Signal power delivered to the load x 100 = DC Power supplied at input circuit

43 What do you understand by complementary symmetry.[April/May 2014]

 The term complementary means that the circuit uses two identical transistors –one NPN and
other PNP.Both these have identical input and output characteristics.
 The term symmetry means biasing resistors are equal.

44 What are the two conditions to be met with by transistors used in complementary
symmetry amplifiers?[April 2013]

 The circuit should use two identical transistors –one NPN and other PNP.
 Biasing resistors should be equal.

45 What is the necessity of heat sink in power transistor?[April 2013]

The heat sink is used to observe the heat produce in the transistor junctions while its operation.
Usually power amplifiers are provided with heat sinks. The heat sink is a large, black metallic
heat-conducting device placed in close contact with the transistor.

46 Drawbacks of Class A power amplifier[Nov/Dec 2014]

 The amount of power dissipation is more in class A amplifier.
 Efficiency is low.

47 Write down the values of maximum possible power conversion efficiency for class A direct
coupled and transformer coupled.
For class A direct coupled = 25%
For class A transformer coupled = 50%
The disadvantages of transformer-coupled amplifiers are,
a. Transformer is bulky
b. Loss is more c. Centre-tapped of transformer is difficult.

48 Why RC coupling is popular?

RC coupling is popular because it is simple, less expensive, less distortion and it
provides uniform bandwidth.
49 List the advantages of transformer coupled amplifier.
The advantages of transformer coupled amplifier are,
a. it is more efficient because the low DC resistance of the primary is connected to the collector
circuit.
b. It provides excellence impedance matching, thus voltage and power gains are improved.
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Dept of EEE, SMVEC, Pondicherry
50 What is the use of transformer coupling in the output stage of multistage amplifier?
The transformer coupling provides impedance matching between input and output. As
a result the power gain is improved.
72. What is amplitude or non linear distortion?
In case of large signal amplifier, the input signals are large in amplitude. So the operation
extends to non linear region of its transfers characteristics. Of the signal excursion enters the
non-linear region then distortion occurs in the output. Such a distortion is called non-linear
distortion

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Dept of EEE, SMVEC, Pondicherry