TVS Diode Arrays (SPA® Diodes)

General Purpose ESD Protection - SP721 Series

SP721 Series 3pF 4kV Diode Array RoHS Pb GREEN

Description

The SP721 is an array of SCR/Diode bipolar structures for

ESD and over-voltage protection to sensitive input circuits.
The SP721 has 2 protection SCR/Diode device structures
per input. There are a total of 6 available inputs that can be
used to protect up to 6 external signal or bus lines. Over-
voltage protection is from the IN (Pins 1 - 3 and Pins 5 - 7)
to V+ or V-.

The SCR structures are designed for fast triggering at a

threshold of one +VBE diode threshold above V+ (Pin 8) or
a -VBE diode threshold below V- (Pin 4). From an IN input,
a clamp to V+ is activated if a transient pulse causes the
input to be increased to a voltage level greater than one
Pinout VBE above V+. A similar clamp to V- is activated if a negative
pulse, one VBE less than V-, is applied to an IN input.
Standard ESD Human Body Model (HBM) Capability is:
IN 1 8 V+

SP721 (PDIP, SOIC) IN 2 7 IN Features

TOP VIEW
IN 3 6 IN
• ESD Interface Capability for HBM Standards
V- 4 5 IN - MIL STD 3015.7.................................................. 15kV
- IEC 61000-4-2, Direct Discharge,
- Single Input........................................... 4kV (Level 2)
Functional Block Diagram - Two Inputs in Parallel............................. 8kV (Level 4)
- IEC 61000-4-2, Air Discharge................15kV (Level 4)
• High Peak Current Capability
- IEC 61000-4-5 (8/20µs)........................................ ±3A
- Single Pulse, 100µs Pulse Width......................... ±2A
- Single Pulse, 4µs Pulse Width............................. ±5A
• Designed to Provide Over-Voltage Protection
- Single-Ended Voltage Range to......................... +30V
- Differential Voltage Range to............................. ±15V
• Fast Switching..............................................2ns Rise Time
• Low Input Leakages.............................1nA at 25ºC Typical
• Low Input Capacitance......................................3pF Typical
• An Array of 6 SCR/Diode Pairs
• Operating Temperature Range....................-40ºC to 105ºC

Additional Information Applications

• Microprocessor/Logic • Analog Device Input

Input Protection Protection
• Data Bus Protection • Voltage Clamp
Resources Samples

© 2017 Littelfuse, Inc.

Specifications are subject to change without notice.
Revised: 05/12/17
 TVS Diode Arrays (SPA® Diodes)
General Purpose ESD Protection - SP721 Series

Absolute Maximum Ratings Thermal Information

Parameter Rating Units Parameter Rating Units

Continuous Supply Voltage, (V+) - (V-) +35 V Thermal Resistance (Typical, Note 1) θJA oC/W

Forward Peak Current, IIN to VCC, IIN to GND PDIP Package 160 C/W
o
±2, 100µs A
(Refer to Figure 5)
SOIC Package 170 C/W
o

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause
Maximum Storage Temperature Range -65 to 150 C
o
permanent damage to the device. This is a stress only rating and operation of the device
at these or any other conditions above those indicated in the operational sections of this Maximum Junction Temperature (Plastic
150 C
o
specification is not implied. Package)
Note: Maximum Lead Temperature
260 C
o
ESD Ratings and Capability (Figure 1, Table 1) (Soldering 20-40s)(SOIC Lead Tips Only)
Load Dump and Reverse Battery (Note 2)

1. θJA is measured with the component mounted on an evaluation PC board in free air.

Electrical Characteristics TA = -40oC to 105oC, VIN = 0.5VCC , Unless Otherwise Specified

Parameter Symbol Test Conditions Min Typ Max Units

Operating Voltage Range, VSUPPLY - 2 to 30 - V
VSUPPLY = [(V+) - (V-)]
Forward Voltage Drop
IN to V- VFWDL IIN = 1A (Peak Pulse) - 2 - V
IN to V+ VFWDH - 2 - V
Input Leakage Current IIN -20 5 +20 nA
Quiescent Supply Current IQUIESCENT - 50 200 nA
Equivalent SCR ON Threshold Note 3 - 1.1 - V
Equivalent SCR ON Resistance VFWD/IFWD; Note 3 - 1 - Ω
Input Capacitance CIN - 3 - pF
Input Switching Speed tON - 2 - ns

Notes:
2. In automotive and battery operated systems, the power supply lines should be externally protected for load dump and reverse battery. When the V+ and V- Pins are connected to het same
supply voltage source as the device or control line under protection, a current limiti ng resistor should be connected in series between the external supply and the SP721 supply pins to
limit reverse battery current to within the rated maximum limits. Bypass capacitors of typically 0.01µF or larger romf the V+ and V- Pins to ground are recommended.
3. Refer to the Figure 3 graph for definitions of equivalent “SCR ON Threshold” and “SCR ON Resistance”. These characteristics are given here for thumb-rule nformation to determine peak
current and dissipation under EOS conditions.

Typical Application of the SP721

(Application as an Input Clamp for Over-voltage, Greater
than 1VBE Above V+ or less than -1VBE below V-)

© 2017 Littelfuse, Inc.

Specifications are subject to change without notice.
Revised: 05/12/17
TVS Diode Arrays (SPA® Diodes)
General Purpose ESD Protection - SP721 Series

ESD Capability

ESD capability is dependent on the application and defined

test standard.The evaluation results for various test Figure 1: Electrostatic Discharge Test
standards and methods based on Figure 1 are shown in
Table 1.

For the “Modified”MIL-STD-3015.7 condition that is defined

as an “in-circuit” method of ESD testing, the V+ and V- pins
have a return path to ground and the SP721 ESD capability
is typically greater than 15kV from 100pF through 1.5kΩ.By
strict definition of MIL-STD-3015.7 using “pin-to-pin”device
testing, the ESD voltage capability is greater than 6kV.The
MIL-STD-3015.7 results were determined from AT&T ESD
Test Lab measurements.

The HBM capability to the IEC 61000-4-2 standard is

Table 1: ESD Test Conditions
greater than 15kV for air discharge (Level 4) and greater
than 4kV for direct discharge (Level 2).Dual pin capability (2
Standard Type/Mode RD CD ±VD
adjacent pins in parallel) is well in excess of 8kV (Level 4).
Modified HBM 1.5kΩ 100pF 15kV
MIL STD 3015.7
For ESD testing of the SP721 to EIAJ IC121 Machine Standard HBM 1.5kΩ 100pF 6kV
Model (MM) standard, the results are typically better than
HBM, Air Discharge 330Ω 150pF 15kV
1kV from 200pF with no series resistance.
IEC 61000-4-2 HBM, Direct Discharge 330Ω 150pF 4kV
HBM, Direct Discharge,
330Ω 150pF 8kV
Two Parallel Input Pins
EIAJ IC121 Machine Model 0kΩ 200pF 1kV

Figure 2: Low Current SCR Forward Voltage Drop Curve Figure 3: High Current SCR Forward Voltage Drop Curve

© 2017 Littelfuse, Inc.

Specifications are subject to change without notice.
Revised: 05/12/17
 TVS Diode Arrays (SPA® Diodes)
General Purpose ESD Protection - SP721 Series

Peak Transient Current Capability of the SP721

The peak transient current capability rises sharply as the Figure 4: T

 ypical SP721 Peak Current Test Circuit
width of the current pulse narrows. Destructive testing with a Variable Pulse Width Input
was done to fully evaluate the SP721’s ability to withstand
a wide range of peak current pulses vs time. The circuit
used to generate current pulses is shown in Figure 4.

The test circuit of Figure 4 is shown with a positive pulse

input. For a negative pulse input, the (-) current pulse input
goes to an SP721 ‘IN’ input pin and the (+) current pulse
input goes to the SP721 V- pin. The V+ to V- supply of the
SP721 must be allowed to float. (i.e., It is not tied to the
ground reference of the current pulse generator.) Figure
5 shows the point of overstress as defined by increased
leakage in excess of the data sheet published limits.

The maximum peak input current capability is dependent

on the ambient temperature, improving as the temperature
is reduced. Peak current curves are shown for ambient Figure 5: S
 P721 Typical Single Peak Current Pulse
temperatures of 25ºC and 105ºC and a 15V power supply Capability
condition. The safe operating range of the transient peak
 howing the Measured Point of Overstress in Amperes vs
S
current should be limited to no more than 75% of the
pulse width time in milliseconds
measured overstress level for any given pulse width as
shown in the curves of Figure 5. 7
CAUTION: SAFE OPERATING CONDITIONS LIMIT
6
Note that adjacent input pins of the SP721 may be THE MAXIMUM PEAK CURRENT FOR A GIVEN
PULSE WIDTH TO BE NO GREATER THAN 75%
PEAK CURRENT (A)

paralleled to improve current (and ESD) capability. The 5 TA = 25°C OF THE VALUES SHOWN ON EACH CURVE.
V+ TO V-SUPPLY = 15V
sustained peak current capability is increased to nearly 4

twice that of a single pin. 3 TA = 105°C

0
0.001 0.01 0.1 1 10 100 1000

PULSE WIDTH TIME (ms)

© 2017 Littelfuse, Inc.

Specifications are subject to change without notice.
Revised: 05/12/17
TVS Diode Arrays (SPA® Diodes)
General Purpose ESD Protection - SP721 Series

Soldering Parameters

Reflow Condition Pb – Free assembly

- Temperature Min (Ts(min)) 150°C

Pre Heat - Temperature Max (Ts(max)) 200°C
- Time (min to max) (ts) 60 – 180 secs
Average ramp up rate (Liquidus) Temp
5°C/second max
(TL) to peak
TS(max) to TL - Ramp-up Rate 5°C/second max
- Temperature (TL) (Liquidus) 217°C
Reflow
- Temperature (tL) 60 – 150 seconds
Peak Temperature (TP) 260+0/-5 °C
Time within 5°C of actual peak
20 – 40 seconds
Temperature (tp)
Ramp-down Rate 5°C/second max
Time 25°C to peak Temperature (TP) 8 minutes Max.
Do not exceed 260°C

Package Dimensions — Dual-In-Line Plastic Packages (PDIP)

Package PDIP
Pins 8 Lead Dual-in-Line
JEDEC MS-001
Millimeters Inches
Notes
Min Max Min Max
A - 5.33 - 0.210 4
A1 0.39 - 0.015 - 4
A2 2.93 4.95 0.115 0.195 -
B 0.356 0.558 0.014 0.022 -
B1 1.15 1.77 0.045 0.070 8, 10
C 0.204 0.355 0.008 0.014 -
Notes: D 9.01 10.16 0.355 0.400 5
1. Controlling Dimensions: INCH. In case of conflict between English and Metric
dimensions, the inch dimensions control.
D1 0.13 - 0.005 - 5
2. Dimensioning and tolerancing per ANSI Y14.5M-1982. E 7.62 8.25 0.300 0.325 6
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. E1 6.10 7.11 0.240 0.280 5
95.
e 2.54 BSC 0.100 BSC -
4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane
gauge GS-3. eA 7.62 BSC 0.300 BSC 6
5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or eB - 10.92 - 0.430 7
protrusions shall not exceed 0.010 inch (0.25mm).
L 2.93 3.81 0.115 0.150 4
6. E and eA are measured with the leads constrained to be perpendicular to datum -C- .
7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero N 8 8 9
or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall
not exceed 0.010 inch (0.25mm).
9. N is t he maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1
dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).

© 2017 Littelfuse, Inc.

Specifications are subject to change without notice.
Revised: 05/12/17
 TVS Diode Arrays (SPA® Diodes)
General Purpose ESD Protection - SP721 Series

Package Dimensions — Small Outline Plastic Packages (SOIC)

N
Package SOIC
INDEX
AREA H 0.25(0.010) M B M
E Pins 8
-B- JEDEC MS-012

1 2 3
Millimeters Inches
L Notes
Min Max Min Max
SEATING PLANE
A 1.35 1.75 0.0532 0.0688 -
-A-
D A h x 45o
A1 0.10 0.25 0.0040 0.0098 -
-C- B 0.33 0.51 0.013 0.020 9
μ
e A1
C
C 0.19 0.25 0.0075 0.0098 -
B 0.10(0.004) D 4.80 5.00 0.1890 0.1968 3
0.25(0.010) M C A M B S
E 3.80 4.00 0.1497 0.1574 4
Notes:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication e 1.27 BSC 0.050 BSC -
Number 95.
NOTES: H 5.80 6.20 0.2284 0.2440 -
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
1. Symbolsare definedin the “MOSeries SymbolList”in Section 2.2 of
3. Dimension “D” does Number
Publication not include
95. mold flash, protrusions or gate burrs. Mold flash,
h 0.25 0.50 0.0099 0.0196 5
protrusion and gate burrs shall not exceed
per0.15mm (0.006 inch) per side.
2. Dimensioning and tolerancing ANSI Y14.5M-1982. L 0.40 1.27 0.016 0.050 6
4. Dimension “E” does“D”
3. Dimension notdoes
include
notinterlead flashflash,
includemold or protrusions.
protrusionsInter-lead flash and
or gate burrs.
protrusions shall
Mold not protrusion
flash, exceed 0.25mm (0.010
and gate burrsinch) per
shall notside.
exceed 0.15mm(0.006 N 8 8 7
5. The chamfer onper
inch) theside.
body is optional. If it is not present, a visual index feature must be
located4.within the crosshatched
Dimension “E”does notarea.
includeinterleadflash or protrusions.Inter- µ 0º 8º 0º 8º -
6. “L” is the lead
lengthflash and protrusions
of terminal shall not
for soldering to aexceed 0.25mm (0.010 inch) per
substrate.
7. “N” is theside.
number of terminal positions.
5. The chamferon the bodyis optional.If it is not present,a visualindex Product Characteristics
8. Terminal numbers are shown for reference only.
feature must be located withinthe crosshatchedarea.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating
6. “L” is the lengthof terminalfor solderingto a substrate.
plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
7. “N”is the numberof terminalpositions. Lead Plating Matte Tin
10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily
exact. 8. Terminal numbersare shownfor reference only.
9. The lead width“B”, as measured0.36mm (0.014 inch) or greater Lead Material Copper Alloy
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
Part Numbering System Lead Coplanarity 0.004 inches (0.102mm)
10. Controllingdimension:MILLIMETER. Convertedinch dimensions
are not necessarilyexact. Substitute Material Silicon
SP 721 ** **
Body Material Molded Epoxy
TVS Diode Arrays G = Green
(SPA® Diodes) Flammability UL 94 V-0
P = Lead Free
TG= Tape and Reel

Series Package
AB = 8 Ld SOIC
AP = 8 Ld PDIP

Ordering Information

Environmental
Part Number Temp. Range (ºC) Package Marking Min. Order
Informaton
SP721APP -40 to 105 8 Ld PDIP Lead-free SP721AP(P) 1 2000
SP721ABG -40 to 105 8 Ld SOIC Green SP721A(B)G 2 1960
SP721ABTG -40 to 105 8 Ld SOIC Tape and Reel Green SP721A(B)G 2 2500
Notes:
1. SP721AP(P) means device marking either SP721AP or SP721APP.
2. SP721A(B)G means device marking either SP721AG or SP721ABG which are good for types SP721ABG and SP721ABTG.

Disclaimer Notice - Information furnished is believed to be accurate and reliable. However, users should independently evaluate the suitability of and
test each product selected for their own applications. Littelfuse products are not designed for, and may not be used in, all applications.
Read complete Disclaimer Notice at www.littelfuse.com/disclaimer-electronics.

© 2017 Littelfuse, Inc.

Specifications are subject to change without notice.
Revised: 05/12/17