Issued Date: Dec.

28, 2007
Model No.: V400H1 - L01
Approval

TFT LCD Approval Specification

MODEL NO.: V400H1 - L01

Customer:

Approved by:
Note:

TVHD
Approved By
LY Chen

QA Dept. Product Development Div.

Reviewed By
Tomy Chen WT Lin

LCD TV Marketing and Product Management Div.

Prepared By
WY Li Steven Tu

1
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 Issued Date: Dec. 28, 2007
Model No.: V400H1 - L01
Approval

- CONTENTS -
REVISION HISTORY ------------------------------------------------------- 3

1. GENERAL DESCRIPTION ------------------------------------------------------- 4

1.1 OVERVIEW
1.2 FEATURES
1.3 APPLICATION
1.4 GENERAL SPECIFICATIONS
1.5 MECHANICAL SPECIFICATIONS

2. ABSOLUTE MAXIMUM RATINGS ------------------------------------------------------- 5

2.1 ABSOLUTE RATINGS OF ENVIRONMENT
2.2 PACKAGE STORAGE
2.3 ELECTRICAL ABSOLUTE RATINGS
2.3.1 TFT LCD MODULE
2.3.2 BACKLIGHT UNIT

3. ELECTRICAL CHARACTERISTICS ------------------------------------------------------- 7

3.1 TFT LCD MODULE
3.2 BACKLIGHT UNIT
3.2.1 CCFL(Cold Cathode Fluorescent Lamp) CHARACTERISTICS
3.2.2 BALANCE BOARD CHARACTERISTICS

4. BLOCK DIAGRAM ------------------------------------------------------- 11

4.1 TFT LCD MODULE

5. INTERFACE PIN CONNECTION ------------------------------------------------------- 12

5.1 TFT LCD MODULE
5.2 BACKLIGHT UNIT
5.3 BALANCE BOARD UNIT
5.4 BLOCK DIAGRAM OF INTERFACE
5.5 LVDS INTERFACE
5.6 COLOR DATA INPUT ASSIGNMENT

6. INTERFACE TIMING ------------------------------------------------------- 21

6.1 INPUT SIGNAL TIMING SPECIFICATIONS
6.2 POWER ON/OFF SEQUENCE

7. OPTICAL CHARACTERISTICS ------------------------------------------------------- 24

7.1 TEST CONDITIONS
7.2 OPTICAL SPECIFICATIONS

8. DEFINITION OF LABELS ------------------------------------------------------- 28

8.1 CMO MODULE LABEL

9. PACKAGING ------------------------------------------------------- 29
9.1 PACKING SPECIFICATIONS
9.2 PACKING METHOD

10. PRECAUTIONS ------------------------------------------------------- 31

10.1 ASSEMBLY AND HANDLING PRECAUTIONS
10.2 SAFETY PRECAUTIONS
10.3 SAFETY STANDARDS

11. MECHANICAL CHARACTERISTICS ------------------------------------------------------- 32

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Approval

REVISION HISTORY
Page
Version Date Section Description
(New)
Ver 2.0 Aug. 02,’07 All All Approval Specification was first issued.
Ver 2.1 Oct. 16,’07 4 1.5 Depth(D), Note, To inverter cover → To Balance Board cover
29 9.2 Modify Figure.9-1 packing method, Cushion (Bottom) and Cushion (Top)
30 Modify Figure.9-2 packing method, Sea / Land Transportation
Corner Protector: L1650mm*50mm*50mm →
L1000mm*50mm*50mm(down) + L625mm*50mm*50mm(up)
Ver 2.2 Dec. 28,’07 3 1.2 High brightness (550 nits) → (530 nits)
3 1.4 Surface Treatment: Anti-Glare coating (Haze 25%) → (Haze 17%)
9 3.2.2 Oscillating Frequency: Min: 41, Typ: 44, Max: 47 →
Min: 45, Typ: 48, Max: 51
Dimming frequency: Min: 150, Typ: 160, Max: 170 →
Min: 135, Typ: 150, Max: 165
10 Modify contents of picture: 1 HV (Blue +), 2 HV (White -) →
1 HV (Blue +(-)), 2 HV (White +(-))
11 4.1 Modify contents of picture:
CN103: KN30-5P-1.25H (Hirose) → CN103: KN30-7P-1.25H (Hirose)
CN101: SM02-BDAS-3-TB (JST) → CN101: 13001WR-02E (YEONHO)
15 5.3 CN101: SM02-BDAS-3-TB (JST) → CN101: 13001WR-02E (YEONHO)
CN103: KN30-5P-1.25H (Hirose) → CN103: KN30-7P-1.25H (Hirose)
Pin No.: 1~5 → Pin No.: 1~7
24 7.1 Lamp Current(HV): 8.0 ± 0.5 → 8.0 ± 0.3
Oscillating Frequency (Inverter): 44±3 →
Oscillating Frequency (Balance Board): 48±3
7.2 Center Luminance of White: Min: 450, Typ: 550 → Min: 450, Typ: 530
28 8 Modify DEFINITION OF LABELS. (Change form)
29 9.1 3 LCD TV modules / 1 Box → 4 LCD TV modules / 1 Box
Box dimensions：1070(L) X 283 (W) X 640(H) → 1040(L) X 310 (W) X 640(H)
Weight：approximately 36.5Kg ( 3 modules per box) →
Weight：approximately 47Kg ( 4 modules per box)
9.2 Modify Figure.9-1 packing method (3pcs to 4pcs)
30 Modify Figure.9-2 packing method
32 11 Modify MECHANICAL CHARACTERISTICS

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 Issued Date: Dec. 28, 2007
Model No.: V400H1 - L01
Approval

1. GENERAL DESCRIPTION
1.1 OVERVIEW
V400H1- L01 is a 40” TFT Liquid Crystal Display module with 20-CCFL Backlight unit and 2ch-LVDS
interface. This module supports 1920 x 1080 FHD format and can display true 16.7M colors (8-bit colors).
The inverter module for backlight is built-in.

1.2 FEATURES
- High brightness (530 nits)
- Ultra-high contrast ratio (1800:1)
- Faster response time (Gray to gray average 6.5ms)
- High color saturation NTSC 72%
- Ultra wide viewing angle : 176(H)/176(V) (CR>20) with Super MVA technology
- DE (Data Enable) only mode
- LVDS (Low Voltage Differential Signaling) interface
- Color reproduction (nature color)
- Optimized response time for both 50/60 Hz Frame rate
- Low color shift function
- RoHS compliance

1.3 APPLICATION
- TFT LCD TVs
- Multi-Media Display

1.4 GENERAL SPECIFICATI0NS

Item Specification Unit Note
Active Area 885.6(H) x 498.15 (V) (40” diagonal) mm
(1)
Bezel Opening Area 891.7 (H) x 504.2 (V) mm
Driver Element a-si TFT active matrix -
Pixel Number 1920 x R.G.B. x 1080 pixel
Pixel Pitch (Sub Pixel) 0.1730 (H) x 0.5190 (V) mm
Pixel Arrangement RGB vertical stripe -
Display Colors 16.7M color
Display Operation Mode Transmissive mode / Normally black -
Surface Treatment Anti-Glare coating (Haze 17%), Hard coating (3H) -

1.5 MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note
Horizontal(H) 951 952 953 mm (1)
Vertical(V) 550 551 552 mm (1)
Module Size Depth(D) 45.6 46.6 47.6 mm To PCB cover
To Balance Board
Depth(D) 52.2 53.2 54.2 mm
cover
Weight - 10350 - g
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.

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2. ABSOLUTE MAXIMUM RATINGS

2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Value
Item Symbol Unit Note
Min. Max.
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 +50 ºC (1), (2)
Shock (Non-Operating) SNOP - 50 G (3), (5)
Vibration (Non-Operating) VNOP - 1.0 G (4), (5)
Note (1) Temperature and relative humidity range is shown in the figure below.
(a) 90 %RH Max. (Ta ≦ 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The maximum operating temperature is based on the test condition that the surface temperature of
display area is less than or equal to 65 ºC with LCD module alone in a temperature controlled chamber.
Thermal management should be considered in final product design to prevent the surface temperature of
display area from being over 65 ºC. The range of operating temperature may degrade in case of improper
thermal management in final product design.
Note (3) 11 ms, half sine wave, 1 time for ± X, ± Y, ± Z.
Note (4) 10 ~ 200 Hz, 10 min, 1 time each X, Y, Z.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture.

Relative Humidity (%RH)

100
90

80

60
Operating Range

40

20

10 Storage Range

-40 -20 0 20 40 60 80

Temperature (ºC)

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2.2 PACKAGE STORAGE

When storing modules as spares for a long time, the following precaution is necessary.
(a) Do not leave the module in high temperature, and high humidity for a long time. It is highly recommended to
store the module with temperature from 0 to 35 ºC at normal humidity without condensation.
(b) The module shall be stored in dark place. Do not store the TFT-LCD module in direct sunlight or fluorescent
light.

2.3 ELECTRICAL ABSOLUTE RATINGS

2.3.1 TFT LCD MODULE
Value
Item Symbol Unit Note
Min. Max.
Power Supply Voltage Vcc -0.3 13.5 V
(1)
Input Signal Voltage VIN -0.3 3.6 V

2.3.2 BACKLIGHT UNIT

Value
Item Symbol Unit Note
Min. Max.
Lamp Voltage VW － 3000 VRMS
Note (1) No moisture condensation or freezing.

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3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE Ta = 25 ± 2 ºC
Value
Parameter Symbol Unit Note
Min. Typ. Max.
Power Supply Voltage VCC 10.8 12.0 13.2 V (1)
Power Supply Ripple Voltage VRP - - 350 mV
Rush Current IRUSH - - 4.5 A (2)
White - 1.2 1.5 A
Power Supply Current Black ICC - 0.6 0.7 A (3)
Vertical Stripe - 1.0 1.2 A
Differential Input High
VLVTH - - +100 mV
Threshold Voltage
LVDS
Differential Input Low
Interface VLVTL -100 - - mV
Threshold Voltage
Common Input Voltage VLVC 1.125 1.25 1.375 V
Terminating Resistor RT - 100 - ohm
CMOS Input High Threshold Voltage VIH 2.7 - 3.3 V
interface Input Low Threshold Voltage VIL 0 - 0.7 V
Note (1) The module should be always operated within above ranges.
Note (2) Measurement Conditions:
+12.0V
Q1 2SK1475

Vcc
C3
FUSE (LCD Module Input)

R1 1uF

47K

(High to Low)
(Control Signal)
Q2
R2

SW 2SK1470

1K
+15V

VR1 47K C2

C1
0.01uF

1uF

Vcc rising time is 470us

+12V

0.9Vcc

0.1Vcc

GND
470us

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Note (3) The specified power supply current is under the conditions at Vcc = 12 V, Ta = 25 ± 2 ºC, fv = 60
Hz, whereas a power dissipation check pattern below is displayed.

a. White Pattern b. Black Pattern

Active Area Active Area

c. Vertical Stripe Pattern

R G B R G B

B R G B R G B R

B R G B R G B R
R G B R G B

Active Area

3.2 BACKLIGHT UNIT

3.2.1 CCFL (Cold Cathode Fluorescent Lamp) CHARACTERISTICS (Ta = 25 ± 2 ºC)
Value
Parameter Symbol Unit Note
Min. Typ. Max.
Lamp Voltage VW - 1400 - VRMS Ih = 8.0mA
Lamp Current IL 7.7 8.0 8.3 mARMS (1)
- - 2290 VRMS (2), Ta = 0 ºC
Lamp Starting Voltage VS
- - 2060 VRMS (2), Ta = 25 ºC
Operating Frequency FO 40 - 70 KHz (3)
Lamp Life Time LBL 50,000 - - Hrs (4)

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3.2.2 BALANCE BOARD CHARACTERISTICS (Ta = 25 ± 2 ºC)

Value
Parameter Symbol Unit Note
Min. Typ. Max.
Input High Voltage V(HV1/HV2 - 1400 - V (2)
Input Current IBL(HV) 175 mArms No Dimming
Oscillating Frequency FW 45 48 51 kHz
Individual Lamp Current IL 7.7 8.0 8.3 mA H.V
High (LD) LD 5 V Normal Operation
Lamp Detection
Low (LD) LD 1.5 V Lamp Connector Open
Dimming frequency FB 135 150 165 Hz
Minimum Duty Ratio DMIN - 15 - %
Note (1) Lamp current is measured by utilizing high frequency current meters as shown below:
Note (2) Input High Voltage Hv based on spec. +-7% tolerance.
Note (3) Asymmetric ratio must be from 90% to 110% (0.9<Ip/ Irms@T/2X√2 <1.1)

T
Ip

I-p

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H V (B lue +(-))
A 1
H V (W hite +(-))
A 2

H V (B lue +(-))
A 1 H V (W hite +(-))
A 2

H V (B lue +(-))
A 1
H V (W hite +(-))
A 2

H V (B lue +(-))
A 1
H V (W hite +(-))
A 2

H V (B lue +(-))
Balance A 1
H V (W hite +(-)) LC D M odule
A 2
Board
H V (B lue +(-))
A 1
H V (W hite +(-))
A 2

H V (B lue +(-))
A 1
H V (W hite +(-))
A 2

H V (B lue +(-))
A 1
H V (W hite +(-))
A 2

H V (B lue +(-))
A 1
H V (W hite +(-))
A 2

H V (B lue +(-))
A 1
H V (W hite +(-))
A 2

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4. BLOCK DIAGRAM
4.1 TFT LCD MODULE

ERX0(+/-)
ERX1(+/-)

ERX2(+/-)
ERX3(+/-)
ECLK(+/-)

SCAN DRIVER IC
FRAME BUFFER
INPUT CONNECTOR

TFT LCD PANEL

(FI-RE51S-HF )

SELLVDS
(1920x3x1080)
REF

ODSEL TIMING
CONTROLLER
ORX0(+/-)
ORX1(+/-)
DC/DC CONVERTER & DATA DRIVER IC
ORX2(+/-)

ORX3(+/-)
REFERENCE VOLTAGE
OCLK(+/-)
CN1
Vcc
GND

CN103: KN30-7P-1.25H (Hirose)

BACKLIGHT
BALANCE UNIT
IP Board BOARD

CN201 - CN210 : SM02-BDAS-3-TB(JST)

+/- HV

CN101: 13001WR-02E (YEONHO)

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5. INTERFACE PIN CONNECTION

5.1 TFT LCD MODULE
CNF1 Connector Pin Assignment
Pin Name Description Note
1 VCC +12V power supply
2 VCC +12V power supply
3 VCC +12V power supply
4 VCC +12V power supply
5 VCC +12V power supply
6 GND Ground
7 GND Ground
8 GND Ground
9 GND Ground
10 ORX0- Odd pixel, Negative LVDS differential data input. Channel 0
11 ORX0+ Odd pixel, Positive LVDS differential data input. Channel 0
12 ORX1- Odd pixel, Negative LVDS differential data input. Channel 1
13 ORX1+ Odd pixel, Positive LVDS differential data input. Channel 1
14 ORX2- Odd pixel, Negative LVDS differential data input. Channel 2
15 ORX2+ Odd pixel, Positive LVDS differential data input. Channel 2
16 GND Ground
17 OCLK- Odd pixel, Negative LVDS differential clock input
18 OCLK+ Odd pixel, Positive LVDS differential clock input.
19 GND Ground
20 ORX3- Odd pixel, Negative LVDS differential data input. Channel 3
21 ORX3+ Odd pixel, Positive LVDS differential data input. Channel 3
22 N.C. No Connection
(1)
23 N.C. No Connection
24 GND Ground
25 ERX0- Even pixel Negative LVDS differential data input. Channel 0
26 ERX0+ Even pixel Positive LVDS differential data input. Channel 0
27 ERX1- Even pixel Negative LVDS differential data input. Channel 1
28 ERX1+ Even pixel Positive LVDS differential data input. Channel 1
29 ERX2- Even pixel Negative LVDS differential data input. Channel 2
30 ERX2+ Even pixel Positive LVDS differential data input. Channel 2
31 GND Ground
32 ECLK- Even pixel Negative LVDS differential clock input.
33 ECLK+ Even pixel Positive LVDS differential clock input.

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34 GND Ground
35 ERX3- Even pixel Negative LVDS differential data input. Channel 3
36 ERX3+ Even pixel Positive LVDS differential data input. Channel 3
37 N.C. No Connection
(1)
38 N.C. No Connection
39 GND Ground
40 ODSEL Overdrive Lookup Table Selection (3)
41 N.C. No Connection (1)
42 N.C. No Connection (1)
43 N.C. No Connection (1)
44 N.C. No Connection (1)
45 SELLVDS LVDS Data Format Selection (2)
46 N.C. No Connection
47 N.C. No Connection (1)
48 N.C. No Connection
49 N.C. No Connection
50 N.C. No Connection (1)
51 N.C. No Connection
Note (1) Reserved for internal use. Please leave it open.
Note (2) Low : JEIDA LVDS Format (default), High : VESA Format.
Note (3) Overdrive lookup table selection. The overdrive lookup table should be selected in accordance to the
frame rate to optimize image quality.
ODSEL Note
L Lookup table was optimized for 60 Hz frame rate.
H Lookup table was optimized for 50 Hz frame rate.
Note (4) Low =Open or Connect to GND, High = Connect to +3.3V

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5.2 BACKLIGHT UNIT

The pin configuration for the housing and leader wire is shown in the table below.
CN201-CN210 (Housing): BDAMR-02VAS-3 (JST)
Pin No. Symbol Description Wire Color
1 HV High Voltage Blue
2 HV High Voltage White
Note (1) The backlight interface housing for high voltage side is a model BDAMR-02VAS-3 (JST),
manufactured by JST. The mating header on inverter part number is SM02-BDAS-3-TB (JST).

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5.3 BALANCE BOARD UNIT

CN101 (Header): 13001WR-02E (YEONHO)
Pin No. Symbol Description
1 HV- CCFL high voltage
2 HV+ CCFL high voltage

CN201-CN210 (Header): SM02-BADAS-3-TB(JST)

Pin No. Symbol Description
1 HV+ CCFL high voltage
2 HV- CCFL high voltage

CN103 (Header): KN30-7P-1.25H (Hirose)

Pin No. Symbol Description
1 VCC Power Supply for Protection Circuit
2 FB Lamp Current Detected Voltage
3 FB Lamp Current Detected Voltage
4 GND Signal Ground
5 GND Signal Ground
6 LD CCFL Connector Open & Non-lighting signal
7 LD CCFL Connector Open & Non-lighting signal

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5.4 BLOCK DIAGRAM OF INTERFACE

CNF1

ERx0+ 51Ω
100pF RxOUT
TxIN ERx0-
ER0-ER7 51Ω ER0-ER7
ERx1+ 51Ω
EG0-EG7 100pF EG0-EG7
ERx1-
51Ω EB0-EB7
EB0-EB7
ERx2+ 51Ω
DE 100pF DE
ERx2-
51Ω
ERx3+ 51Ω OR0-OR7
OR0-OR7
100pF
OG0-OG7 ERx3- OG0-OG7
51Ω
OB0-OB7 OB0-OB7
ECLK+ 51Ω
DCLK PLL ECLK-
100pF
PLL DCLK
51Ω
Host
Graphics Timing
Controller Controller
ORx0+ 51Ω
100pF
ORx0-
51Ω
ORx1+ 51Ω
100pF
ORx1-

ORx2+ 51Ω
100pF
ORx2-
51Ω
ORx3+ 51Ω
100pF
ORx3-
51Ω

OCLK+ 51Ω
PLL OCLK-
100pF
PLL
51Ω

LVDS Transmitter LVDS Receiver

THC63LVDM83A
(LVDF83A)

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ER0~ER7 : Even pixel R data

EG0~EG7 : Even pixel G data
EB0~EB7 : Even pixel B data
OR0~OR7 : Odd pixel R data
OG0~OG7: Odd pixel G data
OB0~OB7 : Odd pixel B data
DE : Data enable signal
DCLK : Data clock signal

Note (1) The system must have the transmitter to drive the module.
Note (2) LVDS cable impedance shall be 50 ohms per signal line or about 100 ohms per twist-pair line when it is
used differentially.
Note (3) Two pixel data send into the module for every clock cycle. The first pixel of the frame is even pixel and
the second pixel is odd pixel.

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5.5 LVDS INTERFACE

TRANSMITTER INTERFACE RECEIVER

SIGNAL TFT CONTROL INPUT
THC63LVDM83A CONNECTOR THC63LVDF84A

SELLVDS= SELLVDS=
SELLVDS=H PIN INPUT Host TFT-LCD PIN OUTPUT SELLVDS=H
L or OPEN L or OPEN

R0 R2 51 TxIN0 27 Rx OUT0 R0 R2
R1 R3 52 TxIN1 29 Rx OUT1 R1 R3
R2 R4 54 TxIN2 TA OUT0+ Rx 0+ 30 Rx OUT2 R2 R4
R3 R5 55 TxIN3 32 Rx OUT3 R3 R5
R4 R6 56 TxIN4 33 Rx OUT4 R4 R6
R5 R7 3 TxIN6 TA OUT0- Rx 0- 35 Rx OUT6 R5 R7
G0 G2 4 TxIN7 37 Rx OUT7 G0 G2
G1 G3 6 TxIN8 38 Rx OUT8 G1 G3
G2 G4 7 TxIN9 39 Rx OUT9 G2 G4
G3 G5 11 TxIN12 TA OUT1+ Rx 1+ 43 Rx OUT12 G3 G5
G4 G6 12 TxIN13 45 Rx OUT13 G4 G6
G5 G7 14 TxIN14 46 Rx OUT14 G5 G7
B0 B2 15 TxIN15 TA OUT1- Rx 1- 47 Rx OUT15 B0 B2
B1 B3 19 TxIN18 51 Rx OUT18 B1 B3
B2 B4 20 TxIN19 53 Rx OUT19 B2 B4
24 B3 B5 22 TxIN20 54 Rx OUT20 B3 B5
bit B4 B6 23 TxIN21 TA OUT2+ Rx 2+ 55 Rx OUT21 B4 B6
B5 B7 24 TxIN22 1 Rx OUT22 B5 B7
DE DE 30 TxIN26 6 Rx OUT26 DE DE
R6 R0 50 TxIN27 TA OUT2- Rx 2- 7 Rx OUT27 R6 R0
R7 R1 2 TxIN5 34 Rx OUT5 R7 R1
G6 G0 8 TxIN10 41 Rx OUT10 G6 G0
G7 G1 10 TxIN11 42 Rx OUT11 G7 G1
B6 B0 16 TxIN16 TA OUT3+ Rx 3+ 49 Rx OUT16 B6 B0
B7 B1 18 TxIN17 50 Rx OUT17 B7 B1
RSVD 1 RSVD 1 25 TxIN23 2 Rx OUT23 NC NC
RSVD 2 RSVD 2 27 TxIN24 TA OUT3- Rx 3- 3 Rx OUT24 NC NC
RSVD 3 RSVD 3 28 TxIN25 5 Rx OUT25 NC NC
DCLK 31 TxCLK IN TxCLK RxCLK 26 RxCLK OUT DCLK
OUT+ IN+
TxCLK RxCLK
OUT- IN-

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R0~R7: Pixel R Data (7; MSB, 0; LSB)

G0~G7: Pixel G Data (7; MSB, 0; LSB)
B0~B7: Pixel B Data (7; MSB, 0; LSB)
DE: Data enable signal
Note (1) RSVD (reserved) pins on the transmitter shall be “H” or (“L” or OPEN)

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5.6 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 8-bit gray scale data input for
the color. The higher the binary input, the brighter the color. The table below provides the assignment of
color versus data input.
Data Signal
Color Red Green Blue
R7 R6 R5 R4 R3 R2 R1 R0 G7 G6 G5 G4 G3 G2 G1 G0 B7 B6 B5 B4 B3 B2 B1 B0

Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
Basic Blue 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Colors Cyan 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Magenta 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Yellow 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
White 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Red(0) / Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red(1) 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red(2) 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Gray
: : : : : : : : : : : : : : : : : : : : : : : : :
Scale
: : : : : : : : : : : : : : : : : : : : : : : : :
Of
Red(253) 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red
Red(254) 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red(255) 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green(0) / Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Green(1) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
Green(2) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
Gray
: : : : : : : : : : : : : : : : : : : : : : : : :
Scale
: : : : : : : : : : : : : : : : : : : : : : : : :
Of
Green(253) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0
Green
Green(254) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0
Green(255) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
Blue(0) / Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Blue(1) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
Blue(2) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
Gray
: : : : : : : : : : : : : : : : : : : : : : : : :
Scale
: : : : : : : : : : : : : : : : : : : : : : : : :
Of
Blue(253) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 1
Blue
Blue(254) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0
Blue(255) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Note (1) 0: Low Level Voltage, 1: High Level Voltage

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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max. Unit Note
Frequency 1/Tc 60 74 80 MHZ
LVDS Receiver Clock Input cycle to
Trcl - - 200 ps
cycle jitter
Setup Time Tlvsu 600 - - ps
LVDS Receiver Data
Hold Time Tlvhd 600 - - ps
Frame Rate Fr5 47 50 53 Hz (1)
Fr6 57 60 63 Hz (2)
Vertical Active Display Term Total Tv 1115 1125 1135 Th Tv=Tvd+Tvb
Display Tvd 1080 1080 1080 Th -
Blank Tvb 35 45 55 Th -
Total Th 1050 1100 1150 Tc Th=Thd+Thb
Horizontal Active Display Term Display Thd 960 960 960 Tc -
Blank Thb 90 140 190 Tc -
Note (1) (ODSEL) = (H). Please refer to 5.1 for detail information.
(2) (ODSEL) = (L). Please refer to 5.1 for detail information.

INPUT SIGNAL TIMING DIAGRAM

Tv
Tvd
Tvb

DE
Th

DCLK

Tc
Thd
Thb
DE

DATA Valid display data (960 clocks)

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LVDS RECEIVER INTERFACE TIMING DIAGRAM

Tc

RXCLK+/-

RXn+/-

Tlvsu

Tlvhd

1T 3T 5T 7T 9T 11T 13T
14 14 14 14 14 14 14

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6.2 POWER ON/OFF SEQUENCE

To prevent a latch-up or DC operation of LCD module, the power on/off sequence should be as the
diagram below.

Power Supply 0.9 VCC 0.9 VCC

VCC
0.1VCC 0.1Vcc
0V

0.5≦
≦T1≦10ms T1 T3
0≦
≦T2≦50ms
0≦
≦T3≦50ms
500ms ≦T4 T2
T4

VALID
Signals
0V

Power On Power Off

Backlight (Recommended) 50% 50%

500ms≦ ≦T 5
100ms≦T6

T5 T6

Power ON/OFF Sequence

Note (1) The supply voltage of the external system for the module input should follow the definition of Vcc.
Note (2) Apply the lamp voltage within the LCD operation range. When the backlight turns on before the LCD
operation or the LCD turns off before the backlight turns off, the display may momentarily become
abnormal screen.
Note (3) In case of Vcc is in off level, please keep the level of input signals on the low or high impedance.
Note (4) T4 should be measured after the module has been fully discharged between power off and on period.
Note (5) Interface signal shall not be kept at high impedance when the power is on.

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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Symbol Value Unit
o
Ambient Temperature Ta 25±2 C
Ambient Humidity Ha 50±10 %RH
Supply Voltage VCC 12 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
Lamp Current(HV) IL 8.0 ± 0.3 mA
Oscillating Frequency
FW 48±3 KHz
(Balance Board)
Frame rate 60 Hz

7.2 OPTICAL SPECIFICATIONS

The relative measurement methods of optical characteristics are shown in 7.2. The following items should
be measured under the test conditions described in 7.1 and stable environment shown in Note (6).
Item Symbol Condition Min. Typ. Max. Unit Note
Contrast Ratio CR 1200 1800 - - (2)
Gray to gray
Response Time - 6.5 12 ms (3)
average
Center Luminance of White LC 450 530 - cd/ (4)
δW
2
White Variation - - 1.3 - (7)
Cross Talk CT - - 4.0 % (5)
θx=0°, θY =0°
Rx 0.650 -
Red
Ry Viewing angle at 0.330 -
Gx 0.264 -
Green Normal direction
Gy Typ. – 0.612 Typ. + -
Color (6)
Bx 0.03 0.148 0.03 -
Chromaticity Blue
By 0.063 -
Wx 0.280 -
White
Wy 0.290 -
Color Gamut CG 70 72 % NTSC
θx+ 80 88 -
Horizontal
Viewing θx- 80 88 - Deg
CR≥20 (1)
Angle θY+ 80 88 - .
Vertical
θY- 80 88 -

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Note (1) Definition of Viewing Angle (θx, θy):

Viewing angles are measured by EZ-Contrast 160R (Eldim)

Normal
θx = θy = 0º

θy- θy+

θX- = 90º x- 12 o’clock direction

y+
θx− θy+ = 90º
θx+

6 o’clock
y- x+ θX+ = 90º
θy- = 90º

Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L255 / L0
L255: Luminance of gray level 255
L 0: Luminance of gray level 0
CR = CR (5), where CR (X) is corresponding to the Contrast Ratio of the point X at the figure in
Note (7).

Note (3) Definition of Gray to Gray Switching Time :

100%
90%

Optical
Response
10%
0%

Time
Gray to gray Gray to gray
switching time switching time

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The driving signal means the signal of gray level 0, 63, 127, 191, 255.
Gray to gray average time means the average switching time of gray level 0 ,63,127,191,255 to each
other .

Note (4) Definition of Luminance of White (LC, LAVE):

Measure the luminance of gray level 255 at center point and 5 points
LC = L (5)
LAVE = [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
where L (x) is corresponding to the luminance of the point X at the figure in Note (7).

Note (5) Definition of Cross Talk (CT):

CT = | YB – YA | / YA × 100 (%)
Where:
YA = Luminance of measured location without gray level 0 pattern (cd/m2)
YB = Luminance of measured location with gray level 0 pattern (cd/m2)

(0, 0) Active Area (0, 0)

Active Area
YA, U (D/2,W/8) YB, U (D/2,W/8)
(D/4,W/4)

YA, L (D/8,W/2) YB, L (D/8,W/2) YB, R (7D/8,W/2)

Gray 128 Gray
Gray0 0
YA, R (7D/8,W/2)
(3D/4,3W/4)
YA, D (D/2,7W/8)
YB, D (D/2,7W/8) Gray 128
(D,W) (D,W)

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Note (6) Measurement Setup:

The LCD module should be stabilized at given temperature for 1 hour to avoid abrupt temperature
change during measuring. In order to stabilize the luminance, the measurement should be
executed after lighting Backlight for 1 hour in a windless room.

LCD Module

LCD Panel

Center of the Screen Display Color Analyzer

(Minolta CA210)

Light Shield Room

(Ambient Luminance < 2 lux)

Note (7) Definition of White Variation (δW):

Measure the luminance of gray level 255 at 5 points
δW = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]

Horizontal Line
D
D/4 D/2 3D/4
Vertical Line

W/4 1 2

W W/2 5 X : Test Point

X=1 to 5

3W/4 3 4

Active Area

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8. DEFINITION OF LABELS
8.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

V400H1 -L01 Rev. XX

CHI MEI XXXXXXXYMDLNNNN

E207943
OPTOELECTRONICS MADE IN TAIWAN

CM40H11XXXXXLXXLYMDNNNN

(a) Model Name: V400H1-L01

(b) Revision: Rev. XX, for example: A0, A1… B1, B2… or C1, C2…etc.
(c) CMO barcode definition:
Serial ID: XX-XX-X-XX-YMD-L-NNNN
Code Meaning Description
XX CMO internal use -
XX Revision Cover all the change
X CMO internal use -
Year, month, day Year: 2001=1, 2002=2, 2003=3, 2004=4…
YMD Month: 1~12=1, 2, 3, ~, 9, A, B, C
Day: 1~31=1, 2, 3, ~, 9, A, B, C, ~, W, X, Y, exclude I, O, and U
L Product line # Line 1=1, Line 2=2, Line 3=3, …
NNNN Serial number Manufacturing sequence of product

(d) Customer’s barcode definition:

Serial ID: CM-40H11-X-X-X-XX-L-XX-L-YMD-NNNN
Code Meaning Description
CM Supplier code CMO=CM
40H11 Model number V400H1-L01=40H11
X Revision code Non ZBD: 0~9, ZBD: A~Z
Source driver IC code Century=1, CLL=2, Demos=3, Epson=4, Fujitsu=5, Himax=6,
X
Hitachi=7, Hynix=8, LDI=9, Matsushita=A, NEC=B, Novatec=C,
Gate driver IC code OKI=D, Philips=E, Renasas=F, Samsung=G, Sanyo=H, Sharp=I,
X
TI=J, Topro=K, Toshiba=L, Windbond=M
XX Cell location Tainan, Taiwan=TN
L Cell line # 1~12=0~C
XX Module location Tainan, Taiwan=TN
L Module line # 1~12=0~C
Year, month, day Year: 2001=1, 2002=2, 2003=3, 2004=4…
YMD Month: 1~12=1, 2, 3, ~, 9, A, B, C
Day: 1~31=1, 2, 3, ~, 9, A, B, C, ~, W, X, Y, exclude I, O, and U
NNNN Serial number By LCD supplier

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9. PACKAGING
9.1 PACKING SPECIFICATIONS
(1) 4 LCD TV modules / 1 Box
(2) Box dimensions：1040(L) X 310 (W) X 640(H)
(3) Weight：approximately 47Kg ( 4 modules per box)

9.2 PACKING METHOD

Figures 9-1 and 9-2 are the packing method

LCD TV Module

Anti-static Bag

Cushion(Top)

Figure.9-1 packing method

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Sea / Land Transportation (40ft Container)

(Pallet:L1250*W1050*H140mm)

Air Transportation

(Pallet:L1250*W1050*H140mm)

Figure. 9-2 Packing method

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10. PRECAUTIONS
10.1 ASSEMBLY AND HANDLING PRECAUTIONS
(1) Do not apply rough force such as bending or twisting to the module during assembly.
(2) It is recommended to assemble or to install a module into the user’s system in clean working areas.
The dust and oil may cause electrical short or worsen the polarizer.
(3) Do not apply pressure or impulse to the module to prevent the damage of LCD panel and backlight.
(4) Always follow the correct power-on sequence when the LCD module is turned on. This can prevent the
damage and latch-up of the CMOS LSI chips.
(5) Do not plug in or pull out the I/F connector while the module is in operation.
(6) Do not disassemble the module.
(7) Use a soft dry cloth without chemicals for cleaning, because the surface of polarizer is very soft and
easily scratched.
(8) Moisture can easily penetrate into LCD module and may cause the damage during operation.
(9) High temperature or humidity may deteriorate the performance of LCD module. Please store LCD
modules in the specified storage conditions.
(10) When ambient temperature is lower than 10ºC, the display quality might be reduced. For example, the
response time will become slow, and the starting voltage of CCFL will be higher than that of room
temperature.

10.2 SAFETY PRECAUTIONS

(1) The startup voltage of a backlight is over 1000 Volts. It may cause an electrical shock while assembling
with the inverter. Do not disassemble the module or insert anything into the backlight unit.
(2) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contact with hands, skin or clothes, it has to be washed away thoroughly with soap.
(3) After the module’s end of life, it is not harmful in case of normal operation and storage.

10.3 SAFETY STANDARDS

The LCD module should be certified with safety regulations as follows:
Regulatory Item Standard
UL UL 60950-1: 2003
Information Technology equipment cUL CAN/CSA C22.2 No.60950-1-03
CB IEC 60950-1:2001
UL UL 60065: 2003
Audio/Video Apparatus cUL CAN/CSA C22.2 No.60065-03
CB IEC 60065:2001

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11. MECHANICAL CHARACTERISTICS

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CAUTION
HIGH VOLTAGE
RISK OF ELECTRIC SHOCK.
DISCONNECT THE ELECTRIC
POWER BEFORE SERVICING.
COLD CATHODE FLUORESCENT LAMP IN LCD PANEL CONTAINS A SMALL AMOUNT OF
MERCURY PLEASE FOLLOW LOCAL ORDINANCES OR REGULATIONS FOR DISPOSAL.

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