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04 Microprocessor Systems Lecture No 04 RISC Architecture

This document discusses RISC vs CISC architectures and assembly language programming. It begins by defining instruction set architecture (ISA) and how it describes a processor at a logical level. It then contrasts RISC and CISC, noting that RISC uses fixed-length instructions while CISC uses variable-length instructions. The document also discusses why programs are written in assembly language for time efficiency and hardware control. Finally, it briefly introduces the Harvard and Von Neumann architectures and their differences in having separate or common data/instruction paths.

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Muhammad Zubair
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66 views14 pages

04 Microprocessor Systems Lecture No 04 RISC Architecture

This document discusses RISC vs CISC architectures and assembly language programming. It begins by defining instruction set architecture (ISA) and how it describes a processor at a logical level. It then contrasts RISC and CISC, noting that RISC uses fixed-length instructions while CISC uses variable-length instructions. The document also discusses why programs are written in assembly language for time efficiency and hardware control. Finally, it briefly introduces the Harvard and Von Neumann architectures and their differences in having separate or common data/instruction paths.

Uploaded by

Muhammad Zubair
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Microprocessor Based

Systems
Lecture No 04 RISC Architecture

By Nasir Mahmood
Overview of Last Lecture
  IC Integration Trends
  Intel has plans to continue riding on the Moore’s Law curve for another
ten years and has announced a 2.9 billion transistor chip for the
second quarter of 2011.
  The chip will fit into an area the size of a fingernail and use 22
nanometer technology

  Von Neumann Architecture


  Execution of program stored in memory
  Instruction cycle

  Fetch, decode, Fetch operand, Execute, Store results


Today’s Lecture Outline
  Instruction Set Architecture (ISA)
  RISC Versus CISC Architecture
  Need for Assembly Language
  Harvard architecture
  Summary
Instruction Set Architecture
  What is an ISA?
  It essentially describes the processor at a logical
level, as opposed to giving the implementation
details.
  For example, the Intel 32-bit ISA(IA-32) has

several implementations including the Pentium


processors, cheaper Celeron processors, high-
performance Xeon processors
Programmer’s View of Computer System
RISC Versus CISC
  At the ISA level, we can divide the designs
into two categories: RISC and CISC
  CISC
  Complex Instruction Set Computers
  Intel IA-32 architecture
  RISC
  Reduced Instruction Set Computers
  The MIPS, SPARC, PowerPC and ARM processor
families
ISC Versus CISC Contd..
RISC Versus CISC Contd..
  RISC architectures use fixed-length instructions and
support simple addressing modes.
  CISC designs use variable-length instructions to
accommodate various complex addressing modes.
  Instruction length increases if an operand is in memory
as opposed to in a register. This is because we have to
specify the memory address as part of instruction
encoding, which takes many more bits. This
complicates instruction decoding and scheduling
  RISC uses Single-cycle execution; CISC processors
typically took many clock cycles to complete a single
instruction.
Why Programs written in Assembly Language?

  One of the main reasons for writing programs


in assembly language is to generate code that
is time-efficient.
  The superiority of assembly language
programs in producing efficient code is a direct
manifestation of specificity. That is, assembly
language programs contain only the code that
is necessary to perform the given task
Why Programs written in Assembly Language?

  Assembly language programs is to have direct


control over system hardware. High-level
languages, on purpose, provide a restricted
(abstract) view of the underlying hardware
  It allows us to look at the internal details of the
processors
Harvard architecture
  It is a computer architecture with physically separate
storage and signal pathways for instructions and data.

  Von Neumann architecture the CPU can be either


reading an instruction or reading/writing data from/to
the memory. Both cannot occur at the same time
Book Reference for RISC Architecure

  More on RISC Architecture


  Book “Guide to RISC Processors for Programmers
and Engineers” by Sivarama P. Dandamudi
Summary
  ISA
  Describes the processor at a logical level
  Difference Between RISC and CISC
Architectures
  CISC controlled by micro-programmed control
  Why to write programs in Assembly Language
  More optimization and efficient code
  Harvard Architecture Versus Von Neumann
Architecture
  In Harvard Architectures separate instructions and
data paths, in Von Neumann it has common paths
THE END

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