A Hierarchy of Languages

Basic Concepts Computer Organization and Assembly Language slide 1/43

 Assembly and Machine Language
❖ Machine language
 Native to a processor: executed directly by hardware
 Instructions consist of binary code: 1s and 0s
❖ Assembly language
 A programming language that uses symbolic names to represent
operations, registers and memory locations.
 Slightly higher-level language
 Readability of instructions is better than machine language
 One-to-one correspondence with machine language instructions
❖ Assemblers translate assembly to machine code
❖ Compilers translate high-level programs to machine code
 Either directly, or
 Indirectly via an assembler
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 Compiler and Assembler

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 Instructions and Machine Language
❖ Each command of a program is called an instruction (it
instructs the computer what to do).
❖ Computers only deal with binary data, hence the
instructions must be in binary format (0s and 1s) .
❖ The set of all instructions (in binary form) makes up the
computer's machine language. This is also referred to as
the instruction set.

Basic Concepts Computer Organization and Assembly Language slide 4/43

 Instruction Fields
❖ Machine language instructions usually are made up of
several fields. Each field specifies different information
for the computer. The major two fields are:
❖ Opcode field which stands for operation code and it
specifies the particular operation that is to be performed.
 Each operation has its unique opcode.
❖ Operands fields which specify where to get the source
and destination operands for the operation specified by
the opcode.
 The source/destination of operands can be a constant, the
memory or one of the general-purpose registers.

Basic Concepts Computer Organization and Assembly Language slide 5/43

 Assembly vs. Machine Code

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 Translating Languages
English: D is assigned the sum of A times B plus 10.

High-Level Language: D = A * B + 10

A statement in a high-level language is translated

typically into several machine-level instructions

Intel Assembly Language: Intel Machine Language:

mov eax, A A1 00404000
mul B F7 25 00404004
add eax, 10 83 C0 0A
mov D, eax A3 00404008

Basic Concepts Computer Organization and Assembly Language slide 7/43

 Mapping Between Assembly Language
and HLL
❖ Translating HLL programs to machine language
programs is not a one-to-one mapping
❖ A HLL instruction (usually called a statement) will be
translated to one or more machine language instructions

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 Advantages of High-Level Languages
❖ Program development is faster
 High-level statements: fewer instructions to code
❖ Program maintenance is easier
 For the same above reasons
❖ Programs are portable
 Contain few machine-dependent details
▪ Can be used with little or no modifications on different machines
 Compiler translates to the target machine language
 However, Assembly language programs are not portable

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 Why Learn Assembly Language?
❖ Accessibility to system hardware
 Assembly Language is useful for implementing system software
 Also useful for small embedded system applications
❖ Space and Time efficiency
 Understanding sources of program inefficiency
 Tuning program performance
 Writing compact code
❖ Writing assembly programs gives the computer designer the needed
deep understanding of the instruction set and how to design one
❖ To be able to write compilers for HLLs, we need to be expert with
the machine language. Assembly programming provides this
experience

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 Assembly vs. High-Level Languages
❖Some representative types of applications:

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 Next …
❖ Welcome
❖ Assembly-, Machine-, and High-Level Languages
❖ Assembly Language Programming Tools
❖ Programmer’s View of a Computer System
❖ Basic Computer Organization

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 Assembler
❖ Software tools are needed for editing, assembling,
linking, and debugging assembly language programs
❖ An assembler is a program that converts source-code
programs written in assembly language into object files
in machine language
❖ Popular assemblers have emerged over the years for the
Intel family of processors. These include …
 TASM (Turbo Assembler from Borland)
 NASM (Netwide Assembler for both Windows and Linux), and
 GNU assembler distributed by the free software foundation

Basic Concepts Computer Organization and Assembly Language slide 13/43

 Linker and Link Libraries
❖ You need a linker program to produce executable files

❖ It combines your program's object file created by the

assembler with other object files and link libraries, and
produces a single executable program

❖ LINK32.EXE is the linker program provided with the

MASM distribution for linking 32-bit programs

❖ We will also use a link library for input and output

❖ Called Irvine32.lib developed by Kip Irvine

 Works in Win32 console mode under MS-Windows

Basic Concepts Computer Organization and Assembly Language slide 14/43

 Assemble and Link Process

Source Object
File Assembler File

Source Object Executable

File Assembler File Linker
File

Link
Source Object
Assembler Libraries
File File

A project may consist of multiple source files

Assembler translates each source file separately into an object file
Linker links all object files together with link libraries
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 Debugger
❖ Allows you to trace the execution of a program
❖ Allows you to view code, memory, registers, etc.
❖ Example: 32-bit Windows debugger

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 Editor
❖ Allows you to create assembly language source files
❖ Some editors provide syntax highlighting features and
can be customized as a programming environment

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 Next …
❖ Welcome
❖ Assembly-, Machine-, and High-Level Languages
❖ Assembly Language Programming Tools
❖ Programmer’s View of a Computer System
❖ Basic Computer Organization

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 Programmer’s View of a Computer System

Increased level Application Programs

of abstraction High-Level Language Level 5

Assembly Language Level 4

Operating System
Level 3

Instruction Set
Architecture Level 2

Microarchitecture Level 1
Each level
Digital Logic hides the
Level 0 details of the
level below it

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 Programmer's View – 2
❖ Application Programs (Level 5)
 Written in high-level programming languages
 Such as Java, C++, Pascal, Visual Basic . . .
 Programs compile into assembly language level (Level 4)
❖ Assembly Language (Level 4)
 Instruction mnemonics are used
 Have one-to-one correspondence to machine language
 Calls functions written at the operating system level (Level 3)
 Programs are translated into machine language (Level 2)
❖ Operating System (Level 3)
 Provides services to level 4 and 5 programs
 Translated to run at the machine instruction level (Level 2)
Basic Concepts Computer Organization and Assembly Language slide 20/43
 Programmer's View – 3
❖ Instruction Set Architecture (Level 2)
 Specifies how a processor functions
 Machine instructions, registers, and memory are exposed
 Machine language is executed by Level 1 (microarchitecture)
❖ Microarchitecture (Level 1)
 Controls the execution of machine instructions (Level 2)
 Implemented by digital logic (Level 0)
❖ Digital Logic (Level 0)
 Implements the microarchitecture
 Uses digital logic gates
 Logic gates are implemented using transistors

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 Instruction Set Architecture (ISA)
❖ Collection of assembly/machine instruction set of the
machine
❖ Machine resources that can be managed with these
instructions
 Memory
 Programmer-accessible registers.
❖ Provides a hardware/software interface

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 Instruction Set Architecture (ISA)

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 Next …
❖ Welcome
❖ Assembly-, Machine-, and High-Level Languages
❖ Assembly Language Programming Tools
❖ Programmer’s View of a Computer System
❖ Basic Computer Organization

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 Basic Computer Organization
❖ Since the 1940's, computers have 3 classic components:
 Processor, called also the CPU (Central Processing Unit)
 Memory and Storage Devices
 I/O Devices
❖ Interconnected with one or more buses
❖ Bus consists of data bus

 Data Bus registers

 Address Bus Processor

I/O I/O
Memory Device Device
(CPU)
 Control Bus #1 #2

ALU CU clock

control bus

address bus

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 Processor (CPU)
❖ Processor consists of
 Datapath
▪ ALU
▪ Registers
 Control unit
❖ ALU
 Performs arithmetic
and logic instructions
❖ Control unit (CU)
 Generates the control signals required to execute instructions
❖ Implementation varies from one processor to another

Basic Concepts Computer Organization and Assembly Language slide 26/43

 Clock
❖ Synchronizes Processor and Bus operations
❖ Clock cycle = Clock period = 1 / Clock rate

Cycle 1 Cycle 2 Cycle 3

❖ Clock rate = Clock frequency = Cycles per second

 1 Hz = 1 cycle/sec 1 KHz = 103 cycles/sec
 1 MHz = 106 cycles/sec 1 GHz = 109 cycles/sec
 2 GHz clock has a cycle time = 1/(2×109) = 0.5 nanosecond (ns)

❖ Clock cycles measure the execution of instructions

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 Memory
❖ Ordered sequence of bytes
 The sequence number is called the memory address

❖ Byte addressable memory

 Each byte has a unique address
 Supported by almost all processors

❖ Physical address space

 Determined by the address bus width
 Pentium has a 32-bit address bus
▪ Physical address space = 4GB = 232 bytes
 Itanium with a 64-bit address bus can support
▪ Up to 264 bytes of physical address space
Basic Concepts Computer Organization and Assembly Language slide 28/43
 Address Space

Address Space is
the set of memory
locations (bytes) that
can be addressed

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 CPU Memory Interface
❖ Address Bus
 Memory address is put on address bus
m
 If memory address = m bits then 2 locations are addressed
❖ Data Bus: b-bit bi-directional bus
 Data can be transferred in both directions on the data bus
 Note that b is not necessary equal to w or s. So data transfers
might take more than a single cycle (if w > b) .
❖ Control Bus
 Signals control
transfer of data
 Read request
 Write request
 Complete transfer
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 Memory Devices
❖ Random-Access Memory (RAM)
 Usually called the main memory
 It can be read and written to
 It does not store information permanently (Volatile , when it is powered
off, the stored information are gone)
 Information stored in it can be accessed in any order at equal time
periods (hence the name random access)
 Information is accessed by an address that specifies the exact location
of the piece of information in the RAM.
 DRAM = Dynamic RAM
▪ 1-Transistor cell + trench capacitor
▪ Dense but slow, must be refreshed
▪ Typical choice for main memory
 SRAM: Static RAM
▪ 6-Transistor cell, faster but less dense than DRAM
▪ Typical choice for cache memory

Basic Concepts Computer Organization and Assembly Language slide 31/43

 Memory Devices
❖ ROM (Read-Only-Memory)
 A read-only-memory, non-volatile i.e. stores information
permanently
 Has random access of stored information
 Used to store the information required to startup the computer
 Many types: ROM, EPROM, EEPROM, and FLASH
 FLASH memory can be erased electrically in blocks
❖ Cache
 A very fast type of RAM that is used to store information that is
most frequently or recently used by the computer
 Recent computers have 2-levels of cache; the first level is faster
but smaller in size (usually called internal cache), and the
second level is slower but larger in size (external cache).
Basic Concepts Computer Organization and Assembly Language slide 32/43
 Processor-Memory Performance Gap
CPU: 55% per year
1000
“Moore’s Law”
Performance

100
Processor-Memory
Performance Gap:
(grows 50% per year)
10

DRAM: 7% per year

1
1985

1989

1991

1995

1997
1981
1982
1983
1984

1986
1987
1988

1990

1992
1993
1994

1996

1998
1999
1980

2000
❖ 1980 – No cache in microprocessor
❖ 1995 – Two-level cache on microprocessor
Basic Concepts Computer Organization and Assembly Language slide 33/43
 The Need for a Memory Hierarchy
❖ Widening (expand) speed gap between CPU and main memory
 Processor operation takes less than 1 ns
 Main memory requires more than 50 ns to access

❖ Each instruction involves at least one memory access

 One memory access to fetch the instruction
 Additional memory accesses for instructions involving memory data
access

❖ Memory bandwidth limits the instruction execution rate

❖ Cache memory can help bridge the CPU-memory gap
❖ Cache memory is small in size but fast
Basic Concepts Computer Organization and Assembly Language slide 34/43
 Typical Memory Hierarchy
❖ Registers are at the top of the hierarchy
 Typical size < 1 KB
 Access time < 0.5 ns
❖ Level 1 Cache (8 – 64 KB) Microprocessor

 Access time: 0.5 – 1 ns Registers

❖ L2 Cache (512KB – 8MB) L1 Cache

 Access time: 2 – 10 ns L2 Cache

Bigger
❖ Main Memory (1 – 2 GB) Faster Memory Bus
 Access time: 50 – 70 ns Memory

❖ Disk Storage (> 200 GB) I/O Bus

Disk, Tape, etc
 Access time: milliseconds
Basic Concepts Computer Organization and Assembly Language slide 35/43
 Magnetic Disk Storage
Disk Access Time =
Seek Time +
Rotation Latency +
Transfer Time
Read/write head
Sector

Actuator
Recording area

Track 2
Track 1
Seek Time: head movement to the Track 0

desired track (milliseconds)

Arm
Rotation Latency: disk rotation until
desired sector arrives under the head Direction of Platter
rotation
Transfer Time: to transfer data Spindle

Basic Concepts Computer Organization and Assembly Language slide 36/43

 Example on Disk Access Time
❖ Given a magnetic disk with the following properties
 Rotation speed = 7200 RPM (rotations per minute)
 Average seek = 8 ms, Sector = 512 bytes, Track = 200 sectors
❖ Calculate
 Time of one rotation (in milliseconds)
 Average time to access a block of 32 consecutive sectors
❖ Answer
 Rotations per second = 7200/60 = 120 RPS
 Rotation time in milliseconds = 1000/120 = 8.33 ms
 Average rotational latency = time of half rotation = 4.17 ms
 Time to transfer 32 sectors = (32/200) * 8.33 = 1.33 ms
 Average access time = 8 + 4.17 + 1.33 = 13.5 ms
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