223

Appendix A: 8085 Instruction

Set by Opcode

The information in this appendix is reproduced by kind permission of the Intel

Corporation. The symbols and abbreviations used are listed below .
Symbol Meaning
A Accumulator
B,C,D
} One of the internal registers
E,H,L
F Represents the flag register
M The 16-bit memory address currently held by the register pair Hand L
byte An 8-bit data quantity
dbIe A 16-bit (two byte) data quantity
addr A 16-bit address
port An 8-bit I/O port address
r, rl, r2 One of the registers A, B, C, D, E, H, L
rp One of the following register pairs
B represents the register pair Band C
D represents the register pair D and E
H represents the register pair Hand L
PSW represents the register pair A and F
SP represents the 16-bit stack pointer
PC The 16-bit program counter
CY Carry flag
P Parity flag
AC Auxiliary carry flag
Z Zero flag
S Sign flag
224 Microelectronics and Microprocessor-based Sy stems

Data Transfer Group

These instructions transfer data between registers and memory.

Flags - none affected by instructions in this group.
Move
A,A 7F B,A 47 C,A 4F
A,B 78 B,B 40 C,B 48
A,C 79 B,C 41 C,C 49
A,D 7A B,D 42 C,D 4A
MaV MaV MaV
A,E 7B B,E 43 C,E 4B
A,H 7C B,H 44 C,H 4C
A,L 7D B,L 45 C,L 4D
A,M 7E B,M 46 C,M 4E

D,A 57 E,A SF H,A 67

D,B 50 E,B 58 H,B 60
D,C 51 E,C 59 H,C 61
D,D 52 E,D SA H,D 62
MaV MaV MaV
D,E 53 E,E 5B H,E 63
D,H 54 E,H 5C H,H 64
D,L 55 E,L 5D H,L 65
D,M 56 E,M 5E H,M 66

Move Immediate
L,A 6F M,A 77 A,byte 3E
L,B 68 M,B 70 B,byte 06
L,C 69 M,C 71 C,byte OE
L,D 6A M,D 72 D,byte 16
MaV MaV MYI
L,E 6B M,E 73 E,byte IE
L,H 6C M,H 74 H,byte 26
L,L 6D M,L 75 L,byte 2E
L,M 6E M,byte 36

Load Immediate (Reg. pair) Load/Store A direct

{ B,db!, 01 LDAXB OA
D,dble 11 LDAXD lA
LXI
H,dble 21 STAXB 02
SP,dble 31 STAXD 12

Load/Store A direct Load/Store HL direct

LDA addr 3A LHLD addr 2A
STA addr 32 SHLDaddr 22
Appendix A : 8085 Instruction Set by Opcode 225

Exchange HL with DE
XCHG EB
Data Manipulation Group - Arithmetic
Instructions in this group perform arithmetic operations on data in the registers and
the memory.

Add*
A 87 A 8F
B 80 B 88
C 81 C 89
D 82 D 8A
ADD ADC
E 83 E 8B
H 84 H 8C
L 85 L 8D
M 86 M 8E

Subtract*
A 97 A 9F
B 90 B 98
C 91 C 99
D 92 D 9A
SUB SBB
E 93 E 9B
H 94 H 9C
L 95 L 9D
M 96 M 9E

Add/Subtract Immediate* Double Length Add***

{~
ADI byte C6 09
ACI byte CE 19
SUI byte D6 DAD 29
SBI byte DE SP 39

Increment/Decrement**
A 3C A 3D
B 04 B 05
C OC C OD
D 14 D 15
INR DCR
E lC E 10
H 24 H 25
L 2C L 2D
M 34 M 35
226 Microelectronics and Microprocessor-based Systems

Increment/Decrement Register Pair****

U
03 OB

Hp
13 IB
INX DCX
23 2B
33 3B

Decimal Adjust A* Complement AU**

DAA 27 CMA 2F

Complement/Set CY*** Arithmetic Immediate*

CMC 3F AD! byte C6
STC 37 ACI byte CE
SUI byte D6
SBI byte DE

Notes
* All flags may be affected.
** All flags except CARRY may be affected.
*** Only CARRY FLAG affected.
**** No flags affected.

Data Manipulation Group - Logical

Instructions in this group perform logical operations on data in the registers and the
memo ry .

AND* OR* Exclusive-OR*

A A7 A B7 A AF
B AO B BO B A8
C Al C Bl C A9
D A2 D B2 D AA
ANA ORA XRA
E A3 E B3 E AB
H A4 H B4 H AC
L AS L B5 L AD
M A6 M B6 M AE
Appendix A : 8085 Instruction Set by Opcode 227

Compare* Rotate*** Logical Immediate*

A BF RLC 07 ANI byte E6
B B8 RRC OF XRI byte EE
C B9 RAL 17 ORI byte F6
D BA RAR IF CPI byte FE
CMP
E BB
H BC
L BD
M BE

Notes
* All flags may be affected .
*** Only the CARRY flag may be affected.

Transfer of Control Group or Branch Group

This group of instructions alters the sequence of program flow by testing th e
condition flags.

Jump Call Return

IMP addr C3 CALL addr CD RET C9
INZ addr C2 CNZ addr C4 RNZ CO
IZ addr CA CZ addr CC RZ C8
INC addr D2 CNC addr D4 RNC DO
IC addr DA CC addr DC RC D8
IPO addr E2 CPO addr E4 RPO EO
JPE addr EA CPE addr EC RPE E8
IP addr F2 CP addr F4 RP FO
1M addr FA CM addr FC RM F8

Jump Indirect
PCHL E9

Input/Output Group
This group of instructions performs I/O instructions between the accumulator and a
specified port.
IN port DB
OUT port D3
228 Microelectronics and Microprocessor-based Systems

Stack and Machine Control Group

This group of instruc tions maintains the stack and internal control flags.

Stack operations

{L {L
C5 CI
D5 D1
PUSH POP
E5 EI
F5 FI
XTHL E3 SPHL F9

Interrupt Control Processor Control

EI FB NOP 00
DI F3 HLT 76
RIM 20
SIM 30

Restart
0 C7
1 CF
2 D7
3 DF
RST
4 E7
5 EF
6 F7
7 FF