Power On Sequence Introduction PDF
Power On Sequence Introduction PDF
Sephiroth Kwon
GRMA
26-05-2009
OUTLINE
• General Power On Sequence
• Power On Sequence (P5Q3)
• Power On Sequence (M3N78-VM)
• No Power Problem Debug Point
General Power On Sequence
PSON#
ATX
TOP VIEW
+5 + 12 PWRBTN PANNEL
5VSB to 3VSB Cap./ 3VSB
+5 5VSB
Linear Reg. Res.
-5
1/0
PWOK 5VSB 1
GND GND 1
GND + 5
GND GND
0
PSON + 5
GND GND
- 12V + 3V
+ 3V + 3V IT8282
PSON
PSON Pull low circuit
PWRBTN
Super I/O
0 0
South
Bridge
General Power On Sequence
+5 + 12
-5 PWOK
(2)
CPURST (5)
GND GND
PG1
GND + 5
IDERST
S
GND GND
Circuit IDE SLOT
PSON + 5 PWROK (4)
(3) PCIRST
GND GND
PCI SLOT
- 12V + 3V North Bridge
+ 3V + 3V
Circuit
PSON
South Bridge
(1)
PANNEL
PWRBTN
Power On Sequence (P5Q3 Sample)
S_PLTRST
S_PLTRST
O_PWROKO_PWROK_NB
7 7 6 O_PSON#
9
ST#
O_PCIRST#_PCIEX16_12 PCI_PCIEX16
Super I/O
USER PRESS 3 O_PCIRST#_PCIEX1_123
PCI_PCIEX1
POWER BTN 9
O_PWRBTNIN# 2 5 5 4 7
O
O_PWROK
O PCIRST# SLOT
O_PCIRST#_SLOT
O
O_RSMRST#
O
O_PWRBTN
O
O_KB_RST#
S_SLPS
S_SLPS
S
S
PCI SLOT
P_VRM_GD
EPU 7
3 4
User
#
#
#
press RSTCON# S_PCIRST#
Rest TPM
8
button
S_TRCRST# ICH10R JMB363
User clear
CMOS 1 VA6308P
8
VCORE
8 S_PLTRST#
CPU H CPUPWRGD
H_CPUPWRGD
LAN
Power On Sequence(M3N78-VM)
14. CPU_RST#
13. PCI_RST#
CPU PCI SLOT 1,2
12. CPU_PWROK# 13. PCIE_RST#
10. 1.2VHT_EN
MCP78 PCIE X1
9. VCORE_PG
8. VCORE_EN
7 11 3
4 4 1
.PWR
.SIO_
.SIO_
.SU
.SU
.RS
USB#
USC#
SMRST#
ROK_SB
_PWRBTN#
_RST#
VRM
6. 12V
6. 3V 6. 5V #
ATX PCIE
C X166
SIO 13.PCIERST#
Power ITE8712F
5. PSON# IDE Port
11. IDE_RST#
2. PWR_BTN#
No Power Problem Debug Point
POWER UP PROBLEM
1 Check if any burned components or traces
1.
2. Check no voltages short with GND such as +5, +12 , +5VSB, +3, -
12,, +3VSB,, VCORE 1.5V,, 2.5V
3. Check Battery voltage
4 Check X’tal
4. X tal 32
32.768
768 KHz
5. Check 5VSB ,3VSB, PWRBTN#
6 Check PSON signal & related circuit
6.
Thank You!