Colour television 14GR 1021 /o28/o2w/osByostjosw 9 /07B/08B/10B/10L/10W : Service /16B/16W/22B/22W 4 i. va im 14GR 122.1 foze/osejostiaswore . ray) a /O8B/OBL/OB8W/10B/10L/10 Sel WIGS /6B/16L/16W/228/29L/22W Service Service Manual 4822 727 16623 is herewith cancelled Service Manua Safety regulations require that the set be restored to its, CHASSIS GR1-AX original condition and that parts which are identical with those specified be used. Only for 14GR1221 fea RC5701 [02/08/10 PAL B/G “_, axbxc — [05/07 PAL | | > 954%314%362 mm [22 PAL SECAM B/G 5 =) — various DocumentationTechnique Service Dokumentation Documentazione di Servizio Huolte-Ohje Manual de Servicio Manual de Servcio a “caz Tor wore PHILIPS .2-. Copyright reservedTem VERSION VERSION VERSION VERSION VERSION . pe 193,/04, pee por ne a 106,/09, Nyn3 1000 uve17 uve17 uve17 uve17 uit 1020 x = = = = 1030 OFWwa1961 OFWG1961 OFWG1961 OFWG1951 OFWG1961 1036 5.5MHz 5.5MHz 5.5MHz 6.0MHz 5.5MHz 1037 - - - - - 1038 5.5MHz 5.5MHz 5.5MHz 6.0MHz 5.5MHz 2002 ty iW Ww Ww Mw 2003, tu W tw Ww Ww 2006 6p8 - 68 = > 2505 22y 2a 22 22y 22u 2515 22y 22u 224 22u 22u 2606 68 68u eau eau 68u 2782 - = = = = 3023, 470K 470K 470K 470K 470K 3037 750R 750R 750R 750R 750R 3315, ore 9R1 Rt 9Rt 9Rt 3503, 2K4 2ka 2ka 2k4 2K4 3504 2K4 aka 2ka 2K4 2K 3506 43k 43k 43K 43k 43k 3511 3R6 3R6 3R6 3R6 3R6 3512 3R6 3R6 3R6 3R6 3R6 3668 9K} 9k1 9kt 9Ki 9k1 3669 9Ki 9K1 9Kt 9kt 9Kt 3781 - = - - = 3788 4M5 1M5 1M5 1M5 1M5 5035 - - - - - 5301 100uH = - - - 6638 BZX79-F36 BZX79-F36 BZX79-F36 BZx79-F36 BZX79-F36 6639 BZX79-F36 BZX79-F36 B2X79-F36 BZX79-F36 BZX79-F36 6640 82X79-F33 BZX79-F33 BZX78-F33 82X79-F33 BZx79-F33 6645 - - - - - 6646 - - - - - - 6647 : - : E - 7528 BUTITAF BUTIIAF BUTITAF BUTITAF BUTIIAF 7610 BUK444-500B | BUK444-500B | BUK444-5008 | BUK444-500B | BUK444—500B 7614 BF487 Br487 BF487 BF487 BF487 9003 - x x x x 9004 - x x x x present = not present” Continued on next page CS OF BAYITEM VERSION VERSION VERSION VERSION 105 SETS los/10 SETS los/10 SETS 105 SETS WITH "SV.. WITH *S\ WITH "PI WITH "PM. SERIAL NO SERIAL No OR "zB. OR "2B." SERIAL NO SERIAL NO 1000 743 uve17 uve17 u7a3 1020 - a - = 1080 OFWJ1953 OFWa1961 OFWa1961 OFWa1951 1036 6.0MHz 5.5MHZ 5.5MHz 6.0MHz 1087 - - - 1038 6.0MHz 5.5MHZ 5.5MHz 6.0MHz 1524 - = TI25MA, TI25MA 2002 - Ww ww - 2003 - i. iy = 2005 180n 180n 270n 270 2006 - - 5 = 2028 120p 120p - = 2044 10y 10p 4u7 4u7 2048, 2n7 2n7 3n0 3n0 2110 4700 470n - - 2310 = a 100n 100n 2322 iw 1p 220n 2200 2324 22n 22u 10y 104 2341 2an 22n 5 5 2342 = 5 22n 22n 2390 120p 120p 100p 100p 2391 120p 120p 100p 4100p 2392 120p 120p 100p 100p 2445 an? 4n7 68n 68n 2505 33n 33 22 22 2514 1nd 1nd 2n2 2n2 2515 100 100y, 22h 22u 2517 220 2201 470 470. 2527 680p 680p in in 2540 470n 470u 220 2200 2606 eau 68n 66 68h 2720 1n0 1n0 - - 2734 - - 1nd 10 2782 ty 1 - a 3023 390K 390K 470K 470K 3025 1K 4K1 3K3 3k3 3034 1K3 1k3 3 J 3037 22 2k2 750R 750R 3052 18 4K8 1KO 18 3059 1K0 1KO 1K2 1K2 3061 2k2 2k2 = = 3100 1R5 4R5 2R2 2R2 3303 - SI 2K2 2k2 3311 2k2 2k2 1K0 1KO 3315 9Ri 9R1 9R1 9Rt 3322 430K 430K = = 3323 - 5 680K 680K 3390 100R 100R - 3391 100R 100R - - 3392 100R 100R - 3393 270R 270R e - 3503 4k3. 4k3 2k4 2s 3504 2K 2KO 2K 2k4 3506 13K 13K 43K 43k 3511 2R4 2R4 aR6 3R6 9512 2R7 2R7 3R6 3R6 3513 2k2 2k2 = = 3520 33k 33h, aR 47R, 3521 4k7 4K7 3 5 aTem VERSION VERSION VERSION VERSION [05 SETS jos/10 SETS los10 SETS 105 SETS WITH "Sv..” WITH "SV." WITH "PI WITH "PI ‘SERIAL NO SERIAL NO OR "zB. OR "2B. ‘SERIAL NO ‘SERIAL NO 3531 SiR SIR - - 1532 SIR SiR 4100R 100R 3535 aR2 eRe 2R7 2R7 3646 150R 150R = = 3668, 9kt 9K1 9kt 9Kt 3669 9Kt 9k1 9K1 9K1 3670 4K6 4K6 1K0 41K0 3671 1K0 1KO = = 3675, - - 22K 22K 3716 1K6 1K6 620R 4K6 718 27K 27K 33k 27K 3725 27K 27K 22k 27K 3726 30K 30K 39k ask 3730 240K 240K 470K 470K 3752 - 1K2 1K2 - 3753, - 1K 1K2 - 3754 - 2k7 2k7 = 3760 2k7 2K7 3k9 3k9 3762 560R 560R 680R 680R 3778 1K 1K - - 3781 150K 150K = = 3788 3M 3M 1M5 M5 3790 = = 10K 10K 3791 39R 39R - - 3799 - - 1K 1K 5035, - - - . 5038 104 104 aur 4u7 5301 = = - = 5519 33u 33u 3u9 3u9 5544 S - 10u. 10u 5621 ou7 our w Ww 5752 - 40u 104 - 5753, - 104 100 - 6521 BAT85 BATS - - 6545 BZX79-F5V1 Bzx79-Fsv1 | — = 6602 By627 Bye27 1N4005GP 41N4005GP 6603 BY627 BY627 ‘1N4O05GP 1N4005GP 6604 BY627 By627 N4005GP 41N4O05GP 6605 By627 By627 11N4005GP 1N4005GP 6638, BZX79-B36 BZX79-B36 B2X79-F36 BZX79-F36 6639 82x79-B36 BZX79-B36 BZX79-F36 BZX79-F36 6640 BZX78-B30 BZX79-B30 BZX79-F33 BZX79-F33 6645 - - - - 6646, - = = S 6647 - = = = 6671 BZx79-B5V6 | BZx79-B5Ve | Bzx79-F4v3 | BZX79-F4V3 6675 BZx79-F5V1_ | BZX79-F5V1_ | = = 6736 1N4148 - = 1N4148 7100 BC558 BC558 - = 7528 28037958 2SC3795B BUTITAF BUTIAF 7610 BUK444-5008 | BUK444-5008 | BUK444-5008 | BUK444-500B 7614 BF487 BF487 BF487 Br487 7674 Bc548 BC548 - - 7750 - LA7910 La7a10 = 7785 x2402 x2402 sT24co2cP sTeaco2cP 9003 x x x x 004 x x x x "x" = present = not present” iainColour television CHASSIS GR1-AX Service Circuit Description CONTENTS page page 4. Block diagram 2 5. Luminance and chrominance circuit 2 2. Power suoply 4 Luminance circuit 2 ; . ‘ Chrominarce sircut 2 wai Jower supply . 5. rae wanscoger 13 23.1 Basic operation i sec. Fy 2 gal path for SECAM reception 3 oo A Signal path for PAL reception 13 uise-width modulation circu A i 2.2.4 — Control of the output voltage 5 SECAM/PAL identification 2.25 Overvottage protection 5 7. RGB amplifiers 14 2.2.6 — 5-volt power supply 6 14 2.2.7 P.O.R.(Power On Reset) 6 Cd 2.2.8 Standby 6 9, Synchronisation circuit 14 229 Shortcircult protection 8 3.1 Starting up the synchronisation IC 14 23 110V converter 8 9.2 ‘Syne separator 14 ; 3.3 Horizontal synchronisation and oscilator 14 a paral os : 2.4 Vertical synchronisation and contol 14 32 Block diagram 3 10. Frame output stage 15 33° Switching the unit on eh i 34 Local keyboard 8 i Ente cutea siave) aero a 11.1. Line control and horizontal deflection circuit 16 3.6 — AF.C(Automatic Fraquency Ca 3 11.2 Generation of the supply voltages for the 8 7 ‘Automatic tuning 9 cathode-ray tube So rcoanresacry 5 11.3 Limitation of the beam current 8 3.8.1 Storing program information 9 11.4 Derived supply voltages 18 3.8.2 Program selection 9 12. Convergence 19 383 Tuning afer program switchover 3 a fa Pe eee 8 Static convergence for red and blue > 3.10 Parsonal preference 10 Coour purty and vertoaomesy ig 3:11 Timer funeton ie ut if 13 312 250 {Cn Screen Display) function 10 aoe ances ea 313 Automatic switching of 10 verona at a 3.15 Error messages 10 ndix | diagram: ea 3181 Intoducton io Appendix * diagram A 3 3.15.2 Explanation of the error messages 10 or o 4. Channel selector and IF circuit n 44 Channel selector 8 42 iF ampitier and demodulator 4 B "tenn To 15788 CS 26 069 GB ‘Copyright served2 1. BLOCK DIAGRAM Al the circuits of the GRIAX chassis arg contained on a ‘monochassis, with the exception of the cathode-ray tube PCB, the SECAM/PAL transcoder and the muttvoltage PCB u1020. ‘The SECAM/PAL transcoder is only present in equipment suitable for receiving SECAM signals and the mutivoltage PCB is only present if the equipment is Suitabla for mains voltages of 90-276V. The monochassis contains the following blocks: 1. There is a channel selector in position 1000. 2. There is an IC of type TDA8305 in position 7020. This IC contains the MF amplifier and detector, the MF sound detector and the synchronisation circuit. 3. The chrominance/luminance processor is in position 7300. 4. The RGB amplifiers are contained on the cathode-ray tube PCB. The cathode-ray tube PCB is suitable for Various types of 14” cathode-ray tubes: 1, A34JRHB1X(Y) 2, ABAEACOTX45 3. 370KSB22-SYB For 20'/21" the cathode-ray tube PCB is mo because this is not pin compatible. 5. The sound amplifier which supplies an output power of 1W is in position 7103. 6. The horizontal output stage TS7528 is controlled by the horizontal control stage TS7521/TS7523. The horizontal output stage supplies: 1. the Norizontat deftection current 2 tha Sigh 3. the focus voltage 4. various derived supply voltages 7. The vertical output stage 1C7500 supplies the vertical deflection current. 8. The power supply which is not mains isolated of the BUCSO type (BUck Converter Self Oscillating) supplies the main supply +95 and several derived voltages. ‘A separate 5V supply circuit supplies the 5—volt standby power. 9. The operating system (VST) is based on the ‘microcomputer 1C7700. 826070 aa‘SECAM PAL aes crane. ie Avesen cromunce, [75 a TT it ate, wane eteanwes fet! I i #00 = ae, | s |-| Jit [eam = | ee) sone ot suo || Wher : ii ih | _ | | smorsowearen| season, sencomn cee SEF thce as 2 ro) | ta $-—- | vemen [> —_| SIS te ae wen . ws + ~ AECTIFER POWER SUPPLY - MULTI-VOLTAGE, (@ucs0) “ woe | BARS Hot r Soansumren DS Recewer2 POWER SUPPLY 2.4 Mains rectifying device and degaussing ‘The mains voltage is supplied via mains switch SK1, fuse VL1600. and interference fiter C2600-L5601 to the full-wave rectifier circuit D6602 to D6605 (see appendix + 1), The capacitors C2603 and C2605 are for limiting peak voltage. ‘The rectified voltage which is produced over smoothing capacitor C2606 is supplied to the main power circuit and the 5V circutt The mains voltage is also supplied to the degaussing circuit R3602, L560. When it is switched on, R3602 is cold. The current which flows through the degaussing coil L5600 is initially very high (approx. 5A), but very quickly decreases to several milliamperes as a result of the quick heating up of the PTC, 3602. R9602a is thermally coupled with R3602b and ensures that the PTC stays warm, 2.2 Main power supply The power supply used in GRI-AX is of the BUCSO (BUck Converter Self Oscillating) type. It is a self-oscillating power supply, however it is not mains lated. The following mains voltages are available: -220-240V (direct) ~80-140 and 160-276V (with a transformer, see section 23) ‘The power supply is 97.5V (+95) for the line output stage and 10V(+9) for the sound amplifier. In addition, the supply is protected against output voltages which are too high and against short circuits. ‘The output voltage is 97.5V in the unloaded state. In standby the main supply is completely switched off and the microcomputer is powered by 5V. 2.2.1 Basic operation (fig 2.1) It the FET 7610 conducts, current I, will start to flow, which means that C,660 is charged. Magnetic energy is now also built up in the transformer 5610.At a given moment the FET will block and then T5610 will supply power to C2660 via 06620 (see fig. 2.2). ©2660 is thus supplied with current when the FET is conducting and blocking. The current variation is shown in fig. 22. Time t, 1S ~2t,, as during t, the voltage over the coil is approximately "200V (=300-95¥) and during t,~100V (UC2660). 2.222 Start of the osciliator ‘A.Ugg voltage must first be generated so that the FET can start ‘conducting. This is done using a voltage divider 9610, R9613, R961 and D6613 (see fig. 2.3). In order to explain the formation of the starting voltage, use Is made of the ‘equivalent-circuit diagram shown in fig. 2.4. The voltage is first stabilised to U, (=15V) using 06613 and is then divided over the two, resistors R3613/R9611. The Usg voltage is thus (56/176)"15=4.77V. This is sufficient to start the FET conducting. Point 2 of T5610 is now positive as compared with point 12. ‘Once the FET is conducting, this is made to continue conducting as follows (see fig. 2.5) If the unit is working normally, there is 97.5V on pin 12 of 78610. There is 300V on pin 2 and a voltage of 30V will be produced by the winding ratio over winding 13-2. As a result of this, current | charges the capacitor 2613. As a result of this current, the U,, voltage increases, which means that the FET continues'to conduct. The Ugg voltage is limited by a zener diode of 10V (06610). ©S26072 GB Fig. 2-3Fig. 2-52.2.3 Pulse-width modulation circuit Once the FET 7610 is conducting, this must also be switched off again. This is done in the following way. le fC ° 7 | Lf Shs = Fig. 2-6 Because of the magnetic coupling, when TS7610 is gonducting current will also flow through winding 4~11 This current charges via 9618 C2616. Ifthe voltage is 1.2V over C2616, TS7614 starts to conduct so that the U, voltage becomes low and TS7610 will block. 1.2V %$ needed to make TS7614 conductive, because of the threshold voltages of 066144757614. !t TS7610 blocks, then the energy built up in T5610 is supplied to the load via D6620. | TS7610 is switched off, then there is a positive voltage ‘on pin 12 as compared with pin 2. Because of the winding direction there will also be a negative voltage over winding 13-2. This voltage charges C2613 and, as a result of this discharge current, a negative voltage is produced over 3611, ‘which again is limited by D6610 at —~0.6V. Because U2—-12 is now negative, U4—11 will also become negative. In this way C2616 can be discharged once more via D6617/R3617. Here it must be noted that when starting up the load should not be too great (thus take care when carrying out repair), as then the voltage is ~300V over winding 2-12, There is thus a considerable voltage over winding 4—11 of T5610 and TS7610 is switched off quickly each time. The output voltage will now not be higher than ~5V. The Output voltage must be more than 15V if the circuit is to take over with C2613/R9612. The energy will then be transferred to the load. The circuit in fig. 2.7a will then start to oscillate. The voltage on pin 2 of T5610 varies, as shown in fig. 2.7b. At time t! C2620 is charged to 97.5V via T5610 by the charge ‘of 2660. During this charging process, energy is also built up in T5610. T5610 will also let this energy flow off to C2620, so that the voltage over C2620 increases further. Att the voltage at pin 2 is positive as compared with pin 12 and because of the winding ratio pin 13 will also be positive as compared with pin At time t the voltage U'®-? is again 20V, which once more ‘switches on the FET. This means that US becomes 300V and the whole process can start again from the beginning.2.2.4 Control of the output voltage The output voltage can be set using R3625. This is used to determine the voltage level at which TS7628 must become conductive. When operating normally TS7628 will start conducting when the output voltage exceeds 97.5 V. A current will then flow to the base of TS7614 so that this starts to conduct and TS7610 is switched off 2.2.5 Overvoltage protection (see fig. 2.9) The overvoltage protection circuit is based on thyristor 6641. The overvoltage protection can be controlled in 2 ways: ~ if the filament voltage becomes too high because of some fault or other, then diodes D8646 and 06647 become conductive so that TH6641 starts conducting. = 1f97.5V becomes too high, then thyristor 6641 is made conductive via D6638, 06639 and 06640. Inthe GR1AX units only one of these two methods is used. The power supply is now almost short circuited. Approximately 1.5V remains as the output voltage. If the Protection is active, then the BUCSO operates in short-circuit mode (see 2.2.9). However, the remaining voltage is not sufficient to maintain’ TH6641 conductive. The thyristor stops ‘conducting. The power supply is then started again and the protection becomes active and the supply will again be short circuited. AS a result of this a hiccup effect will be Produced. In order to prevent this hiccup effect, TH6641 is ‘maintained conductive using D6643 and D8644. These two diodes ensure that the thyristor obtains sufficient current. As a result of this the'5 V will also drop. 06642 must prevent current flowing to the load via this path. CS 26073 GB; ; ‘ 2.2.6. 5-volt power supply (see fig. 2.9) ‘The supply voltage for the microcomputer is derived directly from the rectified mains voltage. 06671 serves as a reference of 5.6V for the series stabilisation transistor 7674 for the +5A (+5V). 2.2.7. POR, (fig. 2.10) |p order to make sure that the microcomputer starts from an initialised state after it has been switched on, a Power ‘On Reset (P.O.R.) pulse should be supplied to pin 33. ‘Once the supply voltage is present, pin 33 should remain low for 1 msec. After switching on, the +5V power supply will appear but, because ‘transistor 7673 blocks, pin 33 of the microcomputer wil stil be low. ‘Transistor 7673 remains blocked. If the supply voltage reaches the zener point (5.6V) of zener diode 6671, transistor 7673 will become conductive. Limited by zener diode 6675, the P.O.R. signal now becomes high (4.7V). While pin 33 is low, the oscillator of the microcomputer starts, because the supply voltage of the microcomputer is supplied via the conducting transistor 7674. The microcomputer starts to operate at a supply voltage of 45V. CS 26 074 GB 2.2.8 Standby (see appendices 1 and 2) The TV can be set to standby using the remote control. The uC 167700 makes pin 19 low (and also pin 20 for the control of the LED 6757) and TS7631 starts conducting. 187610 is completely switched off via TS7614 There is stil voltage (=5V) at the +95 because of 3610-06613. 2.2.9 Short-circuit protection If the +95 is short circuited, then the power supply is not interrupted. There is then suddenly a much greater voltage over winding 4-11 of T5610. TS7614 starts conducting, which means that the gate of 7610 is no longer controlled 37610 blocks and the power supply switches off Because C2613 must first be discharged and then recharged by a positive voltage, TS7610 can only start conducting again after ~1 msec. Fig. 2-106 2.3 110 converter 2.3.1 Basic function ‘The automatic voltage converter is based on a Greinacher voltage doubler. A simplified diagram is given in fig. 2.11 The circuit is controlled by a voltage detection circuit that ensures that from thyristor 6306 I,u0 if the supplied voltage is between 160 and 276V ard |,>0 if the mains voltage is between 90 and 140V. If 1-0, then thyrisie: ...c does net tane part aru wie circuit operates as a single-phase rectifying device via 6942, C2606. The load current is removed via R, and 106690/06691. For safety reasons two diodes are Positioned in parallel, as C2309 should not be negatively charged, If the gate current {,>0, thyristor 6306 will start conducting and the cifcuit’ will operate as a voltage doubler. This works as follows: During the positive half of the mains voltage, 06342 conducts and C2608 is charged positively (up tO Vg) with the polarity as indicated in the figure. Ouring the egative period of the mains voltage C2308 is charged by I, (up to Vpaq) 880 figure. The output voltage V, is now 2°V, with which the voltage was doubled. The operation of the mains voltage detection circuit is explained using fig. 2.12. The mains voltage is rectified via D6303/D6304 and C2301 is charged to 140V (for 110V mains voltage) or 290V (for 220V mains voltage). A voltage V, of 6.8V is derived from this rectified voltage via R3301, 13302, D6344 and zener diode 06307 which is parallel to C2302. As soon as V, is Present, the thyristors 6305 and 6306 will be lit via R331 and voltage doubler R3346 and R3345, so that the voltage doubling described above takes place. Thyristor 6306 is controled by thyristor 6305 because the gate current at low mains voltage is not sufficient to light thyristor 6308. of the mains voltage 45 037 C14 If the mains voltage is more than 150V, the voltage cannot be doubled and thyristor 6306 must be switched off. This can be done by switching V, off. V, can be switched off in the following two ways: 1. If the rectified mains voltage rises above 190V (mains voltage >140V), the voltage on the cathode of 'the Zener diode 6308 becomes more than 6.2V, so that this diode and thus also TS7303 start to conduct and V, is switched off. TS7304 ensures that no current flows through the zener diode 6308 at a lower mains voltage. 2. If method 1 does not work because of a defect, the following should take place: ‘At 140V mains voltage, after rectification via diodes 6303, 6304, a direct current will low via R301, R3302 through the measuring resistor 3344 and then via 2348, 3349 to the chassis earth 2V3. This current through 3344 is so great that the voltage {or itis smaller than the zener voltage 6.2V of 6344 and the be voltage. TS7301_ will not conduct and will thus leave V, undisturbed. V, will light thyristor 6305 and the voltage is doubled via TH6306. However, if the mains voltage is 220V, | will increase, which means that US increases. D6344 will conduct, 87301 will conduct and this will make TS7302 conduct. The underneath of R334 is now resting on the virtual earth point A, which means that the current increases through R3344. As a result of this, U4 will increase and TS7301 will conduct further via 6344. In this way the circuit becomes stable. of the tolerance in components, it may happen that the voltage doubling does not work properly if the mains voltage is between 140 and 160V. This area falls outside the specification.MULTI VOLTAGE PANEL DIAGRAM C‘MULTI VOLTAGE PANEL DIAGRAM C3 VST-4 OPERATING SYSTEM 3.1 Introduction ‘The VST-4 (Voltage Synthesis Tuning) operating system Js based on the principle that tuning to a transmitter in the unit is done by varying linearly the varicap voltage for the channel selector. ‘The central part of the VST—4 system is a microcomputer which processes the operating commands,.the analogue control voltages and takes care of tuning. The system has the capacity to store 40 personal Preference channels with their tuning and band voltage in program memory. Using an OSD (= On Screen Display) generator, information is given regarding the tuned band, Position in the tuning range (tuning bar), program numb sleep timer and setting of the analogue controls. ‘There are 4 analogue controls available: volume, brightness, contrast and colour saturation, for which a certain setting can also be preprogrammed in a memory as personal preference (PP). ‘Sound suppression (mute) takes place during tuning to a transmitter or when interrupting a transmitter signal. The whole system is operated by an infrared remote control with RCS command code or by a local operating unit on the equipment. 3.2 Block diagram (fig. 3.1) The central part of the operating system is a 42-pin C-mos_— microcomputer (IC7840) of the type ‘TMPC47C434. In order to ensure that the microcomputer starts from an initialised state, as soon as the units switched on @ Power Cn Reset signa! (RESET; should first be given cn pin 33. During this RESET signal the internal oscillator of the microcomputer starts. The frequency of the oscillator (4 MHz) is set using a crystal or a resonator (178) on pins 31 and 32. ‘The RCS operating code, coming from the infrared remote control receiver U1785, Is available on pin 35. The operating unit is scanned using pins 10 to 14. For tuning the channel selector the microcomputer ives a pulse-width modulated (PMW = Pulse-width modulated) signal at pin 1, from which an integrating network that operates as a D/A convertor builds up the tuning voltage vi Using the AFC switch TS7786, pin 41 ensures that during tuning the AFC control voltage originating from the MF detector (IC7020-A) has no effect on the Wvarl. The AFC voltage is measured on pin 9. The binary code for the band in which tuning takes place is on pins 17 and 18. 1C7750 (LA7910) makes a1 out of 4 code from this binary code, which directly operates the band selection of the channel selector. During tuning the microcomputer ensures that the volume on pin 2 is set to minimum (Silent tuning) The transmitter recognition signal (coincidence) comes in on pin 16. This becomes high if a transmitter has been found and then the microcomputer switches the sound on agai Pins 2,3,4 and 6 supply pulse-width modulated signals which ‘are convarted by D/A converters into analogue control voltages for volume, brightness, colour saturation and contrast, respectively. Using pins 39 and 40 which are the clock (SCL) and data (SDA) line respectively (together forming the I2G bus), the memory is controlled. 3.3 Switching unit on (see appendix 2). ‘As described in section 2.27, after the unit has been switched on with the mains switch, the supply voltage is, resent, which means that a RESET pulse is generated. This starts the oscillator in the microcomputer. After th RESET pulse the microcomputer starts with the initialisation, CS 26076 GB Daring the initialisation the following take place one after the other: ~ The internal RAM is tested. It a fault is found, error message FO is given using the LED 6757 (see section 3.12) = The presence of the non-remote option diode (between pin 14 and 10) is checked. If the diode is present, the Unit cannot be put to standby. — The presence of a diode between pin 14 and 11 is checked. If the diode is present, only the UHF band will be selected. = The presence of a diode between pin 14 and 12 is checked. If the diode is present, when the unit is, switched on it will start with program 2 (used for units for Australia). The internal dividers and timers as well as the RCS input are released. From this moment operating commands can be given. - The last system status is read. if the status was standby, then the unit will be in standby. — The working stores of the analogue controls are given the personal preferance values. — The internal timers of the microcomputer are tested. If they are not working properly, error message F1 is shown (see 3.12). 3.4 Local keyboard The local keyboard has the facility to connect 9 keys arranged in a matrix of 3 columns and 3 rows. The keyboard is scanned every 16.4 msec. For this the pins 10, 2 lrSt Made fayi( 1) and Gien a Gives Should be carried out to establish whether one of the pins 11, 12 F 13 is low. This means then that one of the keys “store, “control up” or “program plus" has been pressed. Pin 10, then becomes low, it should be checked whether one of the keys “control min’, "menu" or “volume plus” has been Pressed. If no key has been pressed, proceed immediately to make pin 11 low and then pin 12. if a key has been found, scanning stops and the function is put in the memory. After one second the uC tries to read in the ‘command again. This prevents the switches ratting. 3.5 Tuning The microcomputer has 40 fixed locations to store Program data. in these locations 14 bits are reserved for generating a pulse-width modulated signal to-build up the tuning voltage. ‘The pulse-width modulated signal becomes available on pin 1. The period time of the pulse-width modulated signal is 8192 usec. Because the tuning voltage must be able to go up to 30V and the output level of the microcomputer does not supply this voltage, a resistor network (3703,3704 and 3705) is controlled with transistor 7705. Because this resistor network is powered from the 33V supply voltage, at the junction of 3710, 3703 ‘and A3704 there is a Pulsewidth modulated signal with a maximum level of approx. 20, Via an integrator network consisting of R3710 and C2710 and ripple filter R371. and C2711, a controllable tuning voltage Wvari (from 0-30V) is now built up for the channel selector.B mone: a we “MENU FUNCTION Fig. 3-23.6 A.F.C. For correcting the tuning voltage using the AFC control voltage (Vafc) the microcomputer has two connecting pins, one of which is used as an output and the other as an input. = ping This continuously measures the AFC control voltage. ‘The control voltage is supplied in the microcomputer to two comparators. One comparator obtains a reference voltage of 2.55V, while the other is supplied with 4.24V. Thus 3 voltage areas can now be identified on pin 9: <2.58V, 2.55-4.24V and >4.24V. Because resistor network R3730, R3731 divides the voltage, for the AFC control voltage the following areas, apply: <45V, 45-75V and >7.5V. The microcomputer uses the AFC control voltage on pin 9 during the automatic fine tuning and just after a program switchover command. = pin at This pin is used as an output and ensures that the AFC control voltage has no effect on the adjustment during tuning via switching transistor 7786. 3.7 Automatic tuning Automatic tuning can be started by first pressing the “store” and then the “control up” key. The tuning bar then appears on the screen to indicate where the tuning is in the tuning range. If automatic tuning is started, pin 2 of IC7700 becomes “ow” so that the sound is suppressed. Moreover, the aect of the AZO “silage ie == sated by macina TST7B8 conductive, Tais transistor scarts .o conauct, 30 that on the collector there is a voltage of 6V. This is the nominal value for the Vate. ‘The contents of the 14-bit tuning register are now quickly increased with the resuit that the duty cycle of the pulse-width modulator, from which the tuning voltage is derived, also changes. As soon as a video signal is recognised by the identification circuit in IC7020-B, the MDENT" signal becomes high. The output of pin 41 of the uC becomes low again, so that the AFC can be measured (once more. The uC continues to tune at an accelerated rate until Vagc=4.5V. The fine tuning then starts. The tuning voltage is “slowly increased until Varc=7.5V. It is then adjusted back until Veg is approximately 6V. During fine tuning the tuning voltage is only adjusted a limited number of steps, because it may be the case that “IDENT” has become high as a result of an interference signal or an incorrect video signal. If in the meantime the "IDENT" signal has become low again, the uC will continue to tune automatically if the tuning voltage has come to “he end of the band, it switches over to the next band. The switchover takes place using IC7750. This IC obtains the band information in binary form and ensures that the correct band is switched. ‘As soon as it has tuned to a transmitter, the program number under which the located transmitter must be stored can be entered. vs Program selection 3.8.1 Storing the program information The tuning information in the 14-bit tuning register of the microcomputer, together with the band information (2 bits) is stored in’ an internal 16-bit memory of the microcomputer, after the store procedure has been completed, Each program number has a fixed location. ‘The store procedure is carried out on the command of the local control and is as follows: = After the tuning has found a required transmitter, a flashing line appears on the screen to indicate that the tuning information present at that moment can be stored in the memory. = Using the program selection key, select a program umber under which the program information is to be stored. This number then flashes. Then press the store key, so that the tuning information for the location belonging to that program number is stored. 3.8.2 Program selection (Program step) ‘The program step function (+ or ~) is carried out using the remote control of the keyboard. By using this function, the user can sequentially select all programs, beginning with the program most recently selected. When the highest (89) or the lowest (0) number is reached, there is automatic switchover to the lowest or highest program number, respectively. if the "program step" key is pressed when the units in the standby mode, the TV will switch on with the last program shown. If the TV is switched on with the mains switch, the first program shown is always program 1 (except versions, for Australia where this will be program 2). 3.8.3 Tuning after program switchover During switchover the microcomputer will carry out the = suppress the sound, switch off the AFC loop, = fill the working stores with tuning and band information from the corresponding program memory and pass these to the corresponding outputs, = start the fine tuning procedure and check whether the transmitter recognition signal is present. 3.8.4 Fine tuning The Vatc is checked after each program change. If this is, not approximately the nominal value (betwoen 4.5 and 7.5V), one attempt is made using a slow tuning procedure t0 obtain optimum tuning, If this is successful, the new value is automatically stored in the program memory. Variation of the channel selector is automatically corrected using this procedure, 3.9 Analogue controls ‘The control of volume, brightness, contrast and saturation takes place in a set sequence in a menu (see fig. 3.2). By pressing the menu key, the brightness first appears on the screen and this can then be set using “control up" or “down The microcomputer has four 6-bit “working stores” available for the analogue settings which can be controlled in 64 stages from maximum to minimum. ‘On the pins 2,3,4 and 5 there is a pulse-width modulated signal with a repetition time of 32 usec and the duty cycle is dependent on the contents of the working stores. The control rate of the analogue functions is determined by the internal software timer in the microcomputer and the time from minimum to maximum is approximately 7 sec. Direct voltages are generated by the pulse-width modulated signals via integrator networks. Volume, brightness, colour saturation and contrast are minimum at an output level of OV and maximum at SV CS 26 077 GB10 Notes: If the sound if suppressed using the mute key (which becomes visible on the screen), the sound is switched on by a volume +/~ command or by pressing the mute key again. 3.10 Personal preference ‘The preference positions of the 4 analogue controls can be stored in the internal memory of the microcomputer. For this the personal preference should first be set (in the menu) and then the store execute key pressed. ‘When the unit is switched on, the contents of the personal preference memories are transferred to the working stores. - 3.11 Timer function ( (1) ‘The microcomputer also has a “sleep timer”. This can only be switched on using the remote control. When this function is switched on, the unit goes to standby after a set time. The maximum time is 90 minutes and this can be reduced in steps of 15 minutes by pressing the timer key. 3.12 OSD function (On Screen Display) This gives the following functions on the screen (in green}: = set values for the analogue controls, = program number iimer information = a search bar so that it is possible to see where the tuning is, pulse via pin 27 anc wita the sandcastle pulse via pin 26. Using ‘these signals the correct place for displaying information on the screen can be determined. The frequency for the OSD generator (approximately 5 MHz) is determined by the LC network between pin 28 and 29. The output signal of the generator is at pins 23 and 25. Pin 23 supplies the information for a letter (or a line) which must be shown. Pin 25 is used to suppress the TV signal at the place where the OSD information is visible. 3.13 Automatic switching off (only for units with standby) ‘The microcomputer looks every 50 msec to see whether there is a video signal present on pin 16 of IC7700 (the identification signal). If there is no longer a video signal, a counter is started and after 10 minutes the unit is switched to standby. The counter is of course reset to zero as soon as a signal is recognised or when a command is given (using the keyboard or the remote control) 3.14 Hotel mode The microcomputer also has a hotel mode which is only intended for use in hotels. By pressing a combination of keys, this mode can be activated. A number of functions are then blocked: = It is no longer possible to store a transmitter. If the “store” key is pressed, nothing happens. = Itis no longer possible to change a personal preference setting. Cars must be taken with the sound, as in the hotel mode the sound cannot be set louder than it was sot previously using the preference setting. ~ Ifthe unit is in the standby mode and the p+ or p- key is pressed, the unit will start with program 1 instead of the most recently selected program. ‘The hotel mode can be switched on by first selecting program 38 and pressing the “store” and p+ at the same time. (Here the “store” key should be pressed first and then the p+ key) ‘The hotel mode can be switched off by selecting program 38 once more and then pressing the “store” key and Controls key at the same time. cS 26078 GB 3.15 Error messages 3.15.1 Introduction The VST4 operating system can generate 3 error messages (FO to F/), These error messages are displayed using’a flashing LED. The on time of the LED is, always 50 ms. The off time depends on the error message (see table 3.1) ‘error message off time (ms) FO. 50 Ft 400 F2 150 3.15.2 Explanation of the error me: FO: Internal RAM fault {t during the initialisation a fault is discovered in the RAM of the microcomputer, FO is generated and the TV will stop working. F1: Internal timer fault The timers of the microcomputer are checked during the initialisation. If there is something wrong, FI is generated. F2: EEPROM fault or +5B not present It when reading or writing to the EEPROM no confirmation is received, F2 is generated.4, THE CHANNEL SELECTOR AND IF CIRCUIT 4.1 Channel selector Figure 4.1 gives a block diagram of the VHF + UHF channel selector. The VHF, bandswitch voltage is applied to pin 7 and the VHF, bandwitch voltage to pin 8. The UHF bandswitch voltage Is fed to pin 10. The tuning of the RF amplifier and the oscillators is determined by the tuning voltage that is fed to pin 11. This, tuning voltage can originate from any control system and is correctedby the AFC voltage. After mixing of the oscillator and the RF signal the IF signal is formed which is amplified and fed to outputs 16 and 17, If an UV7.. or U743 is applied then pin 16 is connected with earth, because this range has an assymetric output. ‘The UV6.. range is also used and this has a symmetric output. ‘The AGC voltage at pin 5 controls the amplification of the AF amplifiers. 4.2 IF amplifier and demodulator (enclosure 1) ‘The IF output signal of the channel selector present at pin 16-17-U1000 is fed to the SAW (Surface Acoustic Wave) filter U1030. The SAW fitter provides the correct IF band pass. The IF signal at the output of the SAW filter is applied to the input of the IF amplifier detector 1C7020-A pins 8 and 9, In this IC the IF signal is first amplified and is then applied Via an overload detector to a balance demodulator. The reference signal needed for demodulation is obtained via US045. which is exactly tuned to the picture carrier By demodulation the luminance signal is formed, the colour and sound information superposed on it. These signals are fed via an amplifier stage to pin 17, In the IC the demodulated video signal is also fed, via a low-pass filter, to an AGC (Automatic Gain Control) circuit. This circuit supplies a DC voltage, which is dependent on the average value of the video signal. With this DC voltage the amplification of the IF amplifier is controlled. Thus a video signal is generated at the output the amplitude of which is practically independent of the amplitude of the IF signal applied. If the video signal exceeds a specified value, the AGC circuit also provides a delayed AGC voltage. This delayed AGC voltage is fed to the VHF and UHF amplifier in the channel selector. In this way overdrive of these amplifiers is prevented. The threshold value of the delayed AGC Circuit can be adjusted with potentiometer R021 1" The “AFC (Automatic Frequency Control) circuit ir 1C7020-A is supplied with two signals: the reference signal, which is first shifted 90°, and the carrier wave o the video signal. The frequency at which the phase is shifted 90° is determined by the tuning of reference circuit US045 which is also exactly tuned to the picture carrier frequency. ‘The AFC circuit supplies a DC voltage, the value of which is determined by the phase difference (trequency) of the {wo signals applied (picture carrier and reference signal. The resulting AFC ‘voltage, which is present at pin 18-IC7020-A, is fed via voltage devider 3730/3731 to pin 9 of microcomputer 7700. Now correct tuning is Performed via the microcomputer. A voltage coming from the coincidence circuit in IC7020-8 is fed to the AFC circuit in 1C7020-A. This voltage turns the AFC circuit off during tuning, because automatic frequency control is Undesirable during tuning. For-the functioning of the AFC, see chapter 3.6 AFC. cs 26 079 GB12 5, LUMINANCE AND CHROMINANCE CIRCUIT 5.1 Luminance circuit The circuit is built up around IC7300 (TDASSES). The video signal which is present on pin 17 of IC7020-A is applied via network $5040, TS7040, R038, U1038, R3324, Ui326 3327 and C2328 to pin 8 of IC7300. In this network, 1U1038 is used for suppressing the sound intermediate frequency and US602 for delaying (330 nsec) the brightness signal in ralation to the colour signal. This delay is necessary because the colour signal passes through an extra band-pass circuit with small bandwidth, as a result ‘of which the colour signal gets a greater envelope delay time than the brightness signal. As the brightness signal and the colour signal have the same delay during their entire signal paths, they arrive simultaneously on the picture screen. ‘The brightness signal present on pin 8-IC7300 is amplified by a controlled amplifier. The gain is adjusted by the voltage on pin 6-IC7300, which is dependent on the contrast contro! 5-IC7700. The black level is determined by the voltage on pin 8-IC7300, which is dependent on the brightness control 3-IC7700. The voltage on pin 6~IC7300 (contrast setting) can also be influenced by the beam-current information. If the beam current becomes too great, diode 6551 will start conducting so that the voitage on pin 6-IC7300 decreases and hence also the contrast. The amplified brightness signal is then applied to the B~G-R matrices, in which the brightness signal is added to the colour difference signals. 5.2 Chrominance circuit The video signal is fed via U1038, R3320-C2321, C2320, 5320 (band-pass filter for the colour signal) to'pin 3 of 167300. ‘The colour signal is amplified with a controlled amplifier, the gain of which is determined by: = the DC voltage on pin 5-IC7300, which is determined by saturation control coming from 4~1C7700 = the output signal of the colour switch in 17300, = the output signal of the burst peak detector in IC7300 (Hi2). ~ the voltage on pin 6-IC7300, which is applied via the contrast circuit to the controlled amplifier. ‘The output signal present on pin 18-IC7300 is fed via 62300 and R3300 to PAL delay line U1303. Furthermore the output signal of pin 18-1C7300 is symmetrically added ~ via R3301, R3302 and C2302 - to the delayed signals on the output of delay line U1303. “The phase is set between the delayed signal and the direct signal by means of L5303. The ratio between the amplitudes of the direct and delayed signals is set by means of R302 So the input signal for the B-Y and R-Y demodulators is the sum of the colour signal of a line plus the colour signal of the preceding line. Tha B-Y and R-Y demodulators are synchronous demodulators which receive their reference signals via a crystal oscillator which is synchronized with the burst signal. This oscilator works at twice the frequency (8.86 MHz) of the burst signal (4.43 MHz). The oscillator frequency is divided by two and then forms the reference signal for the B-Y demodulator. This reference signal is also fed to the PAL switch. Every other line the reference signal for the R-Y demodulator is rotated 180° in phase by the PAL switch. Depending on the phase of the burst signal received, the phase of the R-Y reference signal is either the same or is given an extra 180° phase shif. In this way the reference signals for +(R-Y) and (RY) are formed, cs 26080 GB ‘The crystal oscillator is synchronized with the burst signal To this end the phase of the crystal oscilator is compared by means of a phase detector with the phase of the burst signal received. The burst signal which Is present in the colour signal on pins 13 and 14 of IC7300is used for this. The output signal of the phase detector is dependent on the phase relation between the signals applied and is used to correct the phase of the crystal oscillator. The network at pin 15-IC7300 determines the time constant of the phase detector, and furthermore the free-running frequency of the crystal oscillator can be adjusted by means of 13313. The time constant is so great that the average phase of the burst signal is followed Ina second phase detector (H/2) the phase of the burst signal is compared with the phase of the H/2 flip-flop. Depending on the phase of the burst signal, this flip-flop is elther set or reset to bring the PAL switch in the right position, It the burst signal is too weak or if itis not present at all, orif the H/2 fipflop is in the wrong position, the BY and R-Y demodulators are turned off via the colour switch, so that the colour reproduction is suppressed. The signals, present on the outputs of the B-Y and R-Y demodulators are fed to the B and A matrices and also to the G-Y matrix. In the G-Y matrix the B-Y and R-Y signals are added in the proper proportions, resulting in the G-Y signal which is added to the G matrix The output signals of the B-G-R matrices are applied to ine B-G-R pre~ampiiiers. The goncoast!s signal which is fed to this pre~amplifier is responsible for the vision suppression during line and frame flyback The output signals of the B-G-A pre-amplifiers are available on pins 12, 11 and 10 of IC7300 respectively, and are fed via L~C networks to the B-G-R amplifiers on the picture tube panel.6.SECAM PAL/TRANSCODER Sets equipped with a SECAM/PAL transcoder U1020 offer the possibility of demodulating apart from PAL also SECAM signals The transcoder, see Fig. 6.1, converts incoming SECAM signals into a PAL signal which is then supplied to the already present PAL demodulator. The demodulated video signal that is present_on the ‘emitter of TS7040 is. supplied via connector 2M7 to the ‘SECAM/PAL transcoder. 6.1 Signal path for SECAM reception. The video signal is supplied, via C2316, R9316 and fiter $5316, to pin 3 of IC7310. Filter 86316 is tuned to the average frequency of the two SECAM colour carriers viz, 4.328 MHz. Next the signal is amplified in block A, limited and then demodulated SECAM by block 8. Demodulator B is a FM demodulator; circuit $6347 forms part of this demodulator and is tuned to the average frequency of the two SECAM colour carriers (4.328 MH2). Block B supplies three output voltages: = the demodulated R-Y signal: = the demodulated B-Y signal; = an identification signal " for the ~~ SECAM/PAL identification block. The SECAM/PAL identiication block is dealt in 6.3. During the line flyback demodulator B is blocked by a line pulse passed on from block W and via block D. In blocks K and L the detected R-Y and B-Y signals are every other line clamped at a defined DC voltage level and supplied to block M. ‘The above-mentioned process is controlled by the output signal of the H/2 flip-flop, block H, thus switching ‘lactronic switches V and M in the correct positions. If the switches are in the drawn mode during one line, the R-Y signal is clamped and passed on via M; the B-Y signal is blocked then. During the next line H changes state and V and M assume the non=drawn moda. Now the BY signal is clamped and assed on; the R-Y signal is blocked. ‘The composite signal, at the output of block M, is via blocks N and P supplied to PAL encoder block R. In block N the deemphasis takes place and higher harmonics of the SECAM subcarrier frequencies are filtered out while in block P the BURST signal is added. in block R the R-Y and B-Y signals are modulated in the correct (PAL) way on a 4.43 MHz subcarrier (supplied by block Q) and then the modulated signals are available at, pin 9 of IC7310. Finally, these signals are via R3336, R3335, C2335 supplied directly to the PAL matrix, block U, and via C2337, R9337,U1337, C2338 delayed one line duration and also passed on to the PAL matrix. ‘The PAL matrix, block U, combined ‘the direct and the delayed signal which results in a PAL modulated chroma signal which is via switch T present at pin 14 of IC7310. Next this signal is supplied to the chrominance input of 17300 (CHROM./LUM. circuit) The video signal is also via R3920, U1920, R3322 and C2321 supplied to pin 16 of IC7310. The luminance signal present at this point is amplified in block S. ‘The output signal of block S is available at pin 15 of 1C7310 and is supplied to the luminance input of 107300 (CHROM/LUM. circuit). 6.2 Signal path for PAL reception. the SECAM/PAL transcoder is fed a PAL signal, switch Twill be in the PAL mode. Then the SECAM decoding and the PAL encoding, as described in 6.1 are switched off. The signal present at connector 2M7 is via R3320, U1320, 23322 and C2321 supplied to pin 16 of IC7310 and next it is amplified in block S. In case of PAL, block S supplies ‘two video signals: one is available at pin 15 of IC7310 and is supplied to the luminance input of 1C7300 (CHROM./LUM.circuit); the other signal is available at pin 44 of IC7310 and is supplied to the chrominance input of 1C7300 6.3 SECAM/PAL identification. The SECAM/PAL identification is based on the assumption that the received signal is a PAL signal and the transcoder is thus switched in the PAL mode, ‘The voltages at pins 6 and 7 of IC7310 are high then. I BURST signal is present in the transmitter signal, the colour killer in CHROM./LUM. demodulator 1C7300 gives a high level (>1.7V) which via connector 1M7 is passed on to pin 13 of 107310. ‘The voltage at pin 13 of 1C7310 thus goes high causing the voltage at pin 6 of C7310 to remain high. Consequentiy, the transcoder maintains the PAL mode. if no BURST signal is present, the colour killer gives a low signal. Consequently the voltage at pin 13 of IC7310 is low, which causes pin 6 of IC7310 to go low as well. Not until some time later the voltage at pin 7 of [C7310 also goes low. In this way is achieved that the identification is ot affected all kinds of interferences. The transcoder will assume the SECAM mode if moreover the SECAM identification signal is also detected by block B. Both line and frame identification takes place. To this end two signals are supplied to the LINE/FRAME identification block E: = one complete sync signal for frame identiication from block W. = one pulse supplied by block F which has been dielayed 0.8 sec. relative to the trailing edge of the BURST key-out pulse (BK). Frame identification takes place at the moments the identification signal is present during the trame flyback After the transcoder has identified a SECAM signal, it ‘converts the SECAM signal into a “quasi” PAL signal. Now the colour killer in C7300 again supplies a high’ signal because once again a BURST signal is present in the PAL signal. As a result the transcoder would again assume the PAL mode! ‘This undesired phenomenon is automatically prevemted in 1C7310: once the SECAM/PAL transcoder is in the SIECAM ‘mode, this mode is maintained as long as the transmitter signal is present. Various blocks in 1C7310 are fed control signals thatt have been derived from the sandcastle pulse. This pulse is coming from the sync circuit. Here one should think of blocks E, F, V,M and P. ‘These signals are obtained from block W which is wia pin 48 of IC7310 fed the sandcastle pulse. It is decomposed in three signals: ~ a BURST key-out signal (BK); ~ a horizontal sync signal (H); = a composite sync signal (H+V). soy ss 1020_ SECAM/PAL_ TRANSCODER/TRANSCODIFICATORE | ara *, Fig. 6-1Fig. 6-17. B-G-R AMPLIFIERS The B-G-R amplifiers are situated on the picture tube PCB. As these amplifiers are all identical, only the R amplifier wll be described. ‘The DC setting of TS7415 is partly determined by TS7402. As a result of voltage division of the +128 supply vottage via R3400 and 3401, the base voltage of TS7402 is 2.4V. Consequently the emitter voltage of TS7402 is 3.1 V. The DC voltage on pin 10 of C7300 varies depending on the brightness control. The voltage on point 5 of the CRT-panel is set at3.1 V with, the brightness control. in this situation no current flows, through R3409, so that no basecurrent flows to TS7415, The collector voltage of TS7415 is now set at 125 V with 9412. ‘The VG2 control is now adjusted such that the light on the picture tube screen just disappears. This is done for the colour which disappears first. For the other two colours, AA3412, R342 and/or R3432 should be adjusted slightly until the picture tube is just dark for all three colours. With this the cut-off points of the picture tube are set. The advantage of the circuit applied is that no changes in background colour occur as a result of temperature influences or drift of the +126 supply voltage. The RC network R2414, 3414 compensates the reduction in gain at the higher video frequencies, so that the largest possible bandwidth is obtained. Resistor R3440 protects the circuit against the adverse consequences of voltage flash—over in the picture tube. With trimming potentiometers 3421 and R3431 white balance is adjusted at high picture brightness. CS 26 082 GB 14 8. SOUND CIRCUIT ‘The IF sound signal which is present in the demodulated video signal on pin 17-IC7020-A is fed via L5040, C2037, ceramic filter 1036/1037 and C2036 to pin 15 of IC7020-c. The ceramic filter has been tuned to the sound intermediate frequency, so that only this frequency is passed ‘The signal is fed via pin 15-1C7020-C to an amplifier, in which the signal is symmetrically limited. Any amplitude Modulations on the signal applied are thus effectively ‘Suppressed ‘After amplification, the signal is applied to a balaice demodulator. The reference signal for the demodulator is obtained via parallel circuit 5034, L5035, C2033, which is connected through C2033 to pin 13-IC7020-C. This Gireuit is exactly tuned to the sound intermediate frequency. ‘After demodulation the LF signal obtained is fed to a controlled LF pre-ampiifier. The control voltage for this preamplifier is obtained via microcomputer 7700 in the Control unit. (See chapter 3.9 analogue controls). The amplified LF signal which is present on pin 12-1C7020-C is fed via R3032, C2032, C2102, A3i02, 3103 and C2103 to the 1W output amplifier 1C7103, (T1DA7052), This an amplifier of 1W whitch is supplied with ‘OV (+9A) from the BUCSO-supply peeve ue4desmeccco4 tod 037, =C. und y is rin ude valy ce is nis This ito 08 this the 02, 103 ith “4 9. SYNCHRONISATION CIRCUIT 9.1 Starting the synchronisation IC This is possible via pin 11 of IC7020-C. This pin has a double function: = volume control = starting the synchronisation. When the unit is switched on, there is a power supply of 97.5V. This voltage charges C2058. The capacitor which is still empty is charged and the voltage pulse which for a short time is on pin 11 of 1C7020-C starts up the line oscillator. The current which then flows in the IC should not be too great (8.5mA max.). The voltage peak is thus limited by D8030 to 12V. Via TS7521 and TS7523 the line oscillator now started provides the line transistor TS7528 th the control pulses required. The 12V supply voltage now produced from the line output stage, which is supplied via pin 7 to the IC7020-C. Various supply voltages are produced by the line output stage which is now working, 9.2 Sync separator If tuning to a transmitter has taken plac will be present at pin 25 of 1C7020-B. This signal contains picture information and sync signals. 3052 and C2052 ensure that the unnecessary picture information at pin 25-IC7020-8 is attenuated. ‘The sync separator at this pin only allows sync pulses to pass, a video signal 9.3 Horizontal. synchronization and oscillator The horizontal oscillator contains a free-running sawtooth generator. Its free-running frequency is by means of 3049 adjusted for the line sync frequency. During adjustment of the R3049 the input (pin 25) should be connected with pin 7 (+12A).Across capacitor C2048, which forms part of this tor, a sawtooth voltage develops. The horizontal oscillator is synchronised with the transmitter signal by means of a control voltage coming from the phase-1 detector. To this end the phase-1 detector is supplied with two signals: = via the gate, the transmitter syne signal = the fed back oscillator signal. With the control voltage that is generated in the process the horizontal oscillator is adjusted via the time constant switch and the network between pins 23 and 24, ‘The control time constant Is affected by the time constant of circuit R051, C2050, C2051 and the time constant switch, When the set is out of synchronization, the gate is kept c. c.sting as long as: _.ible, so that as many sync Pulses as possible can be supplied to the phase-1 vw ic 15 wen 0 The description is based on the assumption that the capacitance of C2 is infinitely great. In that case the current through coil L is really purely linear. However, a purely linearly increasing deflection results in a linearity error on the picture because the picture screen is part of a circle, whose centre does not coincide with the centre of the deflection coils: the picture screen is too flat. To offset the occurring linearity error the capacitance of C2 is not infinite, causing the deflection current to undergo an S-shaped distorsion, see fig. 11.4 2 =@ xo Fig. 11.4 od 7 cs 26085 GB18 11.2 Generation of the power supply voltages for the picture tube ‘The picture tube circuit, see fig. 11.5, is supplied the following high voltages: ~ the 25 kV high voltage = the focussing voltage = the VG2 voltage The various voltages are obtained through rectification of the line flyback pulses that are present across the secondary of T5530. Here use has been made of a series of diodes that each rectify part of the voltage. This way of switching is called the diode-split method. All diodes have been accomodated in the secondary winding (co-wound). The diode-split method works as follows: The voltage that develops across winding a-b is rectified with 01 and smoothed with C1. The resultant DC voltage is supplied to the lower side of winding c-d. The voltage across winding c-d is rectified with D2 and smoothed with C2. The voltage that results at cathode D2 is the sum of the voltages across C1 and C2. ‘The above is repeated for all windings and diodes in the transformer. The advantage of the diode-split method is that the voltage across each diode is relatively low. The focussing voltage and the VG2 voltage are obtained from a tap on the secondary winding of T5530 and from the sliders of the FOCUS and VG2 potentiometers supplied to the picture tube, Both potentiometers are situated in the line output transformer. The filaments of the picture tube are supplied from winding 9-8 of T5530, fase 509 ae eae, CS 26 086 GB 11.3 Beam current limitation ‘The beam current for the picture tube flows from the +26 via R350 and the secondary winding of T5530 to the picture tube. The result across C2550 is a voltage that is the ditference between the +26V and the beam current times the resistance value of R3S50: as the beam current increases the voltage across C2550 decreases. At a certain value of the beam current D8551 starts to conduct and as a result further increase of the beam current makes the voltage across C2342 lower. The luminance for the picture tube thus decreases because pin 6 is the contrast control point of 1C7300, the chrominanee/luminance IC. In this way the beam current is limited to @ maximum value. 11.4 Derived power supply voltage The voltage that is present at pin 1 of T5530 is recttied by means of 06595 and smoothed with C2596. The +160 power supply voltage that results across C2536 is used for supply of the RGB amplifiers in the set The voltage at pin 2 of T5530 is rectified by D6540 and used for the vertical output stage. The voltage at pin 3 is rectified by 08542 to +12V. Several 12V are built up to supply various parts in the television 100 45 036 B11 Fig. 11.519 12. CONVERGENCE 12.1 Static corrections All these corrections are performed with magnetic rings in the so-termed "multipole unit’. This unit comprises two magnet rings for RED-BLUE convergence, two for Magenta-Green convergence and two for colour purity and vertical symmetry. The ‘multipole unit is mounted on the back of the picture tube neck. Each ring of a set always comprises an equal umber of magnet poles. The two rings of each set may be rotated arbitrarily relative to each other and also arbitrarily relative to the picture tube neck, so that any desired field strengt and any desired field direction can be obtained. 12.1.1 Static convergence for red and blue For this purpose two four-pole rings are employed. Fig. 12-1 clearly shows that the green beam is not influenced and that the red and the blue beam can be moved towards and away from each other. in other words, these four-pole rings enable the static convergence of the red and the blue pictur. 12.1.2 Static convergence for magenta and green For this purpose two six-pole rings are used (Fig. 12-2) ‘Again the green beam is not influenced, but only the red and the blua beams in the same direction. This means that the magenta picture can be moved relative to the stationary green picture. Fig. 12-2 12.1.3 Colour purity and vertical symmetry For this purpose the unit comprises one pair of two-pole rings. Fig. 12-3 shows that if the field extends vertically, the three beams are shifted horizontally. This is the colour purity adjustment. However, ifthe field extends horizontally, the three electron beams are shifted vertically, which results in a change in curvature of the central horizontal. This is the vertical symmetry adjustment. The rings should be adjusted so that they produce a field which contains the appropriate vertical and horizontal components, so that both the colour purity and the vertical symmetry are correct. Fig. 12-3 CS 26 087 GB20 12.2 Dynamic corrections ‘These corrections are realised by vertically and horizontally tilting the deflection unit. ‘The guns will then be situated in a slightly different field. ‘The field distribution in the vertical deflection coil is as shown in Fig. 12-4 and that in the horizontal deflection coil as shown in Fig. 12-5. ‘The special distribution of the horizontal pin-cushion shaped and the vertical barrel-shaped deflection field renders the system self-converging. Moreover, the north-south distortion is very small owing to the barrel-shaped vertical deflection field, so that no correction for this is needed. 12.2.1 Horizontal tilting (Fig. 12-6) ‘The guns appear to be shifted along the horizontal axis. Either the red or the blue gun is then brought into a stronger deflection field. The dimensions of the red Picture then, for example, increase, whilst the dimensions of the blue picture decrease. By a suttable choice of the horizontal titing the picture dimensions can be equalised exactly. 12.2.2 Vertical tilting Viewed in the vertical deflection field the Rand B guns are situated in oblique field lines; so that the R and 8 beams are also subject to a certain amount of horizontal deflection. The blue vertical lines for example tilt clock-wise, whereas the red vertical lines are tilted anti-clock-wise (see Fig. 12-7) Viewed in the horizontal deflection field the same happens so that the R and B beams are also subject to a certain amount of vertical deflection (see Fig. 12-8) ‘Summarising, this means that if the deflection coils are tited vertically, the red picture is rotated relative to the blue picture. in this way the fault of Fig. 12-9 may be aliminated. After the appropriate horizontal and vertical titing has been performed, the deflection unit is kept in position with rubber wedges. Fig. 128 CS 26 088 GB vertical detection ES R68 e ory — Fig. 12-4 horizontal deftection Fig. 12-9 RGB| piGRAM-SCHALTBILO-SCHEMA-DIAGRAM OReZONTLE We). gm Oe Samp. Bp Pl Seals ne ee ele ONES r ALI CS 26 089CS 26 089Ere A seLecton Fanalwicrtee Selerione CoNALE SELECTON O& Canales ‘ x V. it R28DIAGRAM-SCHALBILD-SCHEMA-DIAGRAM_B re oe