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Chapter02 - StorageComponents - Part2 - 2 PDF

This document discusses storage components used in digital logic design, including registers, counters, register files, queues, stacks, and how they are used to construct datapaths and controllers. It provides an example of a one's count algorithm implemented using a datapath with a 3-port register file, and presents the corresponding finite state machine representation and control logic. Finally, it discusses different styles for implementing control units, such as using a state register, ROM, and push-down stack.

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42 views18 pages

Chapter02 - StorageComponents - Part2 - 2 PDF

This document discusses storage components used in digital logic design, including registers, counters, register files, queues, stacks, and how they are used to construct datapaths and controllers. It provides an example of a one's count algorithm implemented using a datapath with a 3-port register file, and presents the corresponding finite state machine representation and control logic. Finally, it discusses different styles for implementing control units, such as using a state register, ROM, and push-down stack.

Uploaded by

Trần Thảo Nguyên
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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1

DIGITAL LOGIC DESIGN


( CE_118 )

CHAPTER 2:
Storage Components
(part_2)
2

Storage components
➢ Storage components store data and perform some simple
operations.
➢ Storage components include:
o registers
o counters
o register files
o queues
o stacks
➢ Combinatorial and storage components are used for
construction of:
o datapaths
o controllers
➢ Main subsystems of modern processors and other
microchips.
3

Simple datapath with one accumulator


➢Datapath are used to perform complex
numerical computation or data manipulation.
➢Datapath consists of temporary storage in
addition to arithmetic, logic, and shift unit.

Datapath schematic

Control word
4

Datapath with 3 port register-file

Datapath
ALU operations
schematic

Shifter operations
Control word
5

One’s-count algorithm
➢Example: One’s-counter implementation.

➢Problem: Using a datapath with a 3 port register file, design


a one’s counter that will count the number of ones in an
input dataword , and return the result after completion
6

One’s-count algorithm

Repeated
while
Data ≠ 0

Control words for one’s counter


7

FSM representation of One’s-counter


➢State lasts for a clock cycle.
➢In each state the datapath executes the statement
indicated on its right side.
8

Next-state logic for One’s- counter


Q2(next) = Q2’Q1Q0 + Q2Q1’ + (Data=0)Q2Q1Q0’
Q1(next) = Q1’Q0 + Q2’Q1Q0’ + (Data=0)Q1Q0’
Q0(next) = Q2’Q1Q0’ + Q2Q1’Q0’ + StartQ2’Q0’
+ (Data=0)Q2Q0’

Next-state equations
9

Output logic for One’s- counter controller

IE = Q’2Q’1Q0 RAA2= 0 RAB2= Q’1Q0 S2 = Q1 + Q0


RAB1= Q’1Q’0 S1= Q’2Q0
WA2= Q’1Q’0 RAA1= Q2Q0
RAB0= 0 S0= 1
WA1= Q2Q0+Q2Q’1 RAA0= Q2
Sh2= Sh1= Q2Q1Q’0
WA0= Q’1Q0+Q1Q’0 REA = Q2+Q1 REB = Q2+Q1Q’0
Sh0= 0
WE = Q2Q’1+Q’2Q0+Q1Q0
OE = Q2Q1Q0
10

Design model
11

One’s-counter
schematic
12

Parallel datapath
➢Datapath allows 2 operations in each clock cycle.
➢Choice of operations performed simultaneously is limited.
13

An example of a custom datapath


➢Uses latches as temporary storage on the input and
output of functional units.
➢Latches shorten the amount of time the buses will be used
for operand and result transfer.
14

Control-unit implementation styles


15

Control-unit implementation styles


16

Control-unit implementation styles


17

Control-unit implementation styles

Control unit with state-register, ROM and push-down stack


( microprogrammed control unit )
18

Chapter Summary
➢We introduced sequential components

o Simple (registers, counters)

o Storage (register-files, memories)

o Complex (stacks, queues, datapaths and control units)

➢Datapath and control units are used to implement

standard processors and application specific integrated


circuits (One’s count example)

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