ELEC4614 Power Electronics
Lecture 8 - Effect of source inductance on rectifier
operation
8.1 Rectifier with input source inductance
The output DC voltage and current of rectifier circuits
discussed so far have been found by assuming that diode
currents transfer (commutate) from one diode to another
instantaneously. However this can not happen when the
AC source has some inductance Ls. (Change of current
through any inductance must take some time!). This
source inductance is associated with the leakage
inductance of the supply transformer and the inductance
of the AC supply network to the input transformer. The
commutation process (or the overlap process) forces more
than one diode or a pair of diodes (in a bridge rectifier) to
conduct simultaneously, resulting in a drop of voltage
from the output terminals which is proportional to the
load current.
The output DC voltage Vd of a rectifier falls with load
current Id, by an amount which is much larger than
additional voltage drop across the conducting diodes
when the current through the diodes increases. The AC
source inductance, which consists of the AC line and the
input transformer leakage inductances, is mostly
responsible for the additional voltage drop. Consider the
half-wave diode rectifier shown below.
Let us assume that the load current Id is smooth and
ripple-free (i.e., of constant, due to the highly inductive
load). Assume also that for t > 0, the load current flows
Lecture 8 - Effect of overlap 1 F. Rahman
on rectifier circuits
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through the rectifier diode and that for t > , it
commutates to the free-wheeling diode Df. This transfer
of the load current between the rectifier and the
freewheeling diodes can not however be instantaneous,
because of the source inductance Ls. This transfer takes
place over a small commutation or overlap angle ,
during which time, the current gradually falls to zero in
one circuit and it rises to Id in the other circuit at the same
rate. Clearly, the two diodes conduct simultaneously
during the commutation process ().
Because of the prolonged conduction of Df, the load
voltage is clamped to zero for 0 < t <, resulting in
some loss of positive voltage in the vo waveform.
Consequently Vd is reduced, the extent of which depends
on , which in turn depends on Ls and Id.
Lecture 8 - Effect of overlap 2 F. Rahman
on rectifier circuits
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is Ls D
vs Id
iDf
vs = vi
Df Load
Vmaxsint
Figure 8.1. Half-wave diode rectifier with source
inductance.
vs
iD Id
iDf
vo
vi
Figure 8.2 Waveforms in the rectifier circuit of figure 8.1
During the process of overlap, all of the ac source voltage
drops across Ls, so that for 0 < t < ,
Lecture 8 - Effect of overlap 3 F. Rahman
on rectifier circuits
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di
v Vmax sin t Ls 8.1
dt
Integrating,
Id
0
Vmax sin td( t ) Ls
0
di Ls I d 8.2
or, Vmax ( 1 cos ) Ls I d 8.3
Ls
and cos = 1 Id 8.4
Vmax
The overlap, or commutation angle, can the found from
(8.4), for given Id and Ls.
1 1
Vd Vmax sin( t )d( t ) Vmax sin td( t )
2 0 2 0
Vmax
1 Vmax Ls
= 2 Ls I d 1 2V Id 8.5
max
V max
Vd
Id
Figure 8.3 Voltage regulation characteristic of the
rectifier of figure 8.1 due to source inductance.
Lecture 8 - Effect of overlap 4 F. Rahman
on rectifier circuits
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8.2 Overlap in a single-phase bridge rectifier due to
source inductance
During the positive half cycle, diodes D1 and D4 carries
the load current Id. During the negative half cycle, diodes
D3 and D2 carry the load current. During overlap all four
diodes carry the load current. The output voltage during
overlap is zero and all of the supply voltage applies across
the source inductor Ls.
vo
ip Ls is D1 D3 Id
vs = Vd Loa
Vmaxsint
vi
D2 D4
N:1
Figure 8.4 Diode bridge rectifier with source inductance
Thus, during commutation overlap,
di
Vmax sin t Ls 8.6
dt
Id
0
Vmax sin td( t ) Ls
Id
di 2 Ls I d
2 Ls
cos 1 Id 8.7
Vmax
Lecture 8 - Effect of overlap 5 F. Rahman
on rectifier circuits
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The DC output voltage of the converter is given by
1
Vd Vmax sin td( t )
1 1
Vmax sin td( t ) Vmax sin t( d t )
0 0
2Vmax 2 Ls I d
8.8
2Vmax Ls
1 Id 8.9
Vmax
Lecture 8 - Effect of overlap 6 F. Rahman
on rectifier circuits
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Figure 8.5 Waveforms in the diode bridge rectifier with
source inductance.
Lecture 8 - Effect of overlap 7 F. Rahman
on rectifier circuits
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Figure 8.5 contd.
2Vmax
Vd
Id
Figure 8.6 Regulation characteristic of a 1-phase bridge
rectifier due to source inductance.
Lecture 8 - Effect of overlap 8 F. Rahman
on rectifier circuits
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Effect of overlap on three-phase center-tap rectifier
In the three-phase, center-tap rectifier of figure 8.7, the
load current starts to commutate to diode D2 after vb starts
to become more positive than va. This starts from /6
after the zero crossing of vb. During overlap, both diodes
D1 and D2 carry the load current which is assumed to
remain constant during the process.
During overlap,
dia
van Ls vo 8.10
dt
dib
vbn Ls vo 8.11
dt
Assuming that Id remains constant during the overlap
time, and noting that ia ib I d , so that
dia dib
8.12
dt dt
Adding the voltage equations and canceling the equal but
opposite terms, during overlap,
van vbn
vo 8.13
2
Lecture 8 - Effect of overlap 9 F. Rahman
on rectifier circuits
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v an L s V ai D 1
vo
v bn L s D2 Id
v cn L s D3 Vd L oad
Figure 8.7 Three-phase center-tap rectifier with source
inductance.
van vbn vcn
vo
vabi
ia
ib
ic
Figure 8.8 Waveforms in the rectifier of figure 8.7
Lecture 8 - Effect of overlap 10 F. Rahman
on rectifier circuits
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Thus, during the commutation overlap, the converter
output voltage vo is the average of the voltages of the
lines undergoing commutation. Once the load current is
fully commutated, vo jumps up to the potential vb. Form
the ideal output voltage waveform, the area bounded by vb
and (va +vb)/2 is lost due to overlap of two conducting
diodes.
In the following analysis, the line-neutral voltages are:
van Vmax sin t ; vbn Vmax sin t 2 / 3 ;
vcn Vmax sin t 4 / 3
The part of the positive voltage pulse lost due to overlap
starting from angle t = /6 is given by
vbn van vbn van di
vbn Ls 8.14
2 2 dt
The area (shaded) inside the voltage pulse lost due to
overlap is given by
vbn van Id
6
6
2
d( t ) Ls
0
di Ls I d
8.15
in which vbn has been taken as the reference waveform.
Note that (vb - va) is the line-line voltage vba. The integral
on the right hand side can be evaluated by shifting the
origin by /6 to the right, at the crossing of vbn and van.
Thus
Lecture 8 - Effect of overlap 11 F. Rahman
on rectifier circuits
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3Vmax
sin td( t ) Ls I d 8.16
0 2
2 Ls
1 cos Vmax l l
Id , so that 8.17
2 Ls
cos 1
max l-l = 3 Vmax
I d where V 8.18
Vmax l l
The DC output voltage is
3 3Vmax 3 Ls
Vd Id
2 2
8.19
3Vmax l l Ls
1 Id
2 Vmax l l
Ideal Vd-Id
3Vmaxll characteristic,
2 i.e., for Ls = 0
Vd
Vd-Id
characteristic,
with Ls
Id
Figure 8.9 Regulation characteristic of the rectifier in
figure 8.7
Lecture 8 - Effect of overlap 12 F. Rahman
on rectifier circuits
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Figure 8.10 Commutation notch voltage at the input to the
rectifier.
Lecture 8 - Effect of overlap 13 F. Rahman
on rectifier circuits
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Effect of source inductance on three-phase diode
bridge rectifier.
vL+ vo = vL+ vL
van L s ia
D1 D3 D5
iL
Ls i vabi R
vbn b
Vd Load
vcn L s ic L
D4 D6 D2
vL
Figure 8.11 Three-phase, diode-bridge rectifier with
source inductance.
As for the three-phase CT rectifier, the voltage equations
are
dia
va Ls vL 8.20
dt
di
vb Ls b vL 8.21
dt
when D1 and D3 are in overlap due to the source
inductance Ls and where all voltages are with respect to
the fictitious neutral point. vL+ is the potential of the
positive DC-link voltage bus (cathodes of the upper
diodes) of the rectifier with respect to the neutral point.
Lecture 8 - Effect of overlap 14 F. Rahman
on rectifier circuits
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As before, during each overlap, the positive and negative
dc buses have voltages which are average values of the
commutating line-line potentials.
During the commutation overlap of diodes D1 and D3,
the positive rail voltage is (vb + va)/2, and the positive
voltage lost from VL+ as a result of the overlap is
vb va vb va di
vb vL vb Ls 8.22
2 2 dt
Integrating for the duration of the overlap
vb va Id
d( t ) Ls di Ls I d
6
8.23
6
2 0
Note again that (vb - va) is the line-line voltage. The
integral in the right hand side by shifting the origin by /6
to the left. Thus
3Vmax
sin td( t ) Ls I d 8.24
0 2
2 Ls
1 cos I d , so that 8.25
Vmax l l
2 Ls
cos 1 I d where V
Vmax l l max l-l = 3 Vmax 8.26
The DC output voltage Vd is given by
Lecture 8 - Effect of overlap 15 F. Rahman
on rectifier circuits
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3Vmax l l V
1 max l l
Vd sin td t
/3 0 2
8.27
3Vmax l l 3 Ls
Id
3Vmax l l Ls
Vd 1 Id
8.28
Vmax l l
3Vmax l l
Vd
Id
Figure 8.13 Voltage regulation characteristic of the three-
phase diode bridge rectifier due to source inductance.
Lecture 8 - Effect of overlap 16 F. Rahman
on rectifier circuits
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va vb vc
vo
vABi
ia
ib
ic
Commutation notches in vabi
Figure 8.12 Waveforms in the rectifier of figure 8.11.
Lecture 8 - Effect of overlap 17 F. Rahman
on rectifier circuits
