Chapter 1 : Introduction
Instructor: Dr. Po-Wen Chiu
(EE/NTHU)
Reference:
1. J. D. Plummer, M. M. Deal, and P. B. Griffin, Silicon VLSI
Technology, Prentice Hall, 2000.
2. Michael Quirk and Julian Serda, Semiconductor
Manufacturing Technology, Prentice Hall, 2001.
3. Robert Doering and Yoshio Nishi, Handbook of
Semiconductor Manufacturing Technology, CRC Press 2008.
The first transistor made in Bell Lab. The first IC made on a silicon wafer by Fairchild
Semiconductor.
1-1
Technology nodes such as 45, 40, 32, 28, 22, 20 nm, etc., are not defined as the minimum
critical dimension (CD) of the devices. The definition of technology node is related to the
pitch of the gate pattern.
Different definition:
NAND flash devices: half pitch of the gate pattern
20-nm NAND flash device has gate patterns of 40-nm pitch.
Logic IC devices: one quarter of the gate pitch
20-nm logic device has an 80-nm gate pitch.
1-2
ITRS:
1-3
Linewidth vs. Cost
1-4
1-5
Historical Perspective
Junction transistor technology Alloy junction technology
of the 1950s of the 1950s
Planar progress of the 1950s Double-diffused transistor
technology of the 1950s
1-6
Photolithography
1-7
Planar Integrated Circuit
1-8
Planar Digital IC
1-9
CMOS inverter
1-15
1-10
Layout and binary mask for CMOS inverter
1-11
1.3 Semiconductors
(a) Atomic configuration:
3. period, 4. main group in the periodic table. Two electrons
in 3s shell and two electrons in 3p shells, forming sp3
hybridization (tetrahedral structure).
(b) Electronic properties:
Atomic density N = 5.0x1022 atoms/cm3
Resistivity r = 2.3x105 Wcm
Energy gap = 1.12 eV (indirect bandgap)
(c) Electrical conduction:
The average phonon energy is a few kT. Bond breaking by phonons is
a very rare event since kT is much less than the bond energies and a
multiple phonon interaction is required. At thermal equilibrium there is
only one broken bond per 1012 silicon atoms. Thus pure silicon can
conduct current due to
thermal generation of
electrons and holes ni = (5x1022)x(1x10-12)
~ 1010
through the bond-
breaking process.
1-12
(d) Controlling electrical conduction:
The salient feature of IC technology is the control of the
conductivity of Si that is achieved by doping.
N -- : N D < 1014 cm -3
N - : 1014 cm -3 < N D < 1016 cm -3
N : 1016 cm -3 < N D < 1018 cm -3
N + : 1018 cm -3 < N D < 10 20 cm -3
N + + : N D > 10 20 cm -3
1
The resulting resistivity is given by r=
qµn n + qµ p p
µn » 1500 cm 2 / V × s This is why NMOS is often preferred.
µ p » 500 cm 2 / V × s
1-13
Effective mass is inversely
proportional to the curvature of
the subband.
! !2
m0 m0
m* (k ) = =
dv d 2e (k )
dk dk 2
æ dv ! ö
çç" = for free electron ÷÷
è dk m0 ø
Charge mobility is again inversely
proportional to the effective mass.
et
µ=
1-14 m*m0
For N-type doping, the fifth valence electrons are only weakly
bound to the dopant atoms and hence can be easily freed by
thermal energy. This is why a lightly doped semiconductor
turns into insulator as the temperature drops. (see Problem 1.4)
The intrinsic carrier concentration is given by
æ 0.605 eV ö -3
ni = 3.9 ´1016 T 3 / 2 expç - ÷ cm
è kT ø
(ni = 1.45 ´1010 cm -3 at room temperature )
Intrinsic dominance
Extrinsic dominance
1-15
To calculate the actual population of n in the conduction band
and p in the valence band, we need to know about the available
(2p)3/LxLyLz
“density of states (DOS)” and “distribution function”.
Density of states:
We start with a 1D conductor where the electrons are constrained to
move freely only in one direction, and assume that the electrons are
noninteracting, so that we are dealing with a single-particle problem.
The wave function that satisfies the boundary conditions, y(0)=y(L)
and y’(0)=y’(L), is
1
y= exp(ikn x)
L
The allowed k values are equally separated by 2p/L.
The number of states in a three dimension k space can be counted by plotting the allowed k values as cubes.
Each unit cell encloses volume (2p)3/LxLyLz. The number of states is given by
L 3 kF 1 2mE
N = 2´ ( ) ò 4pk 2dk = 2 ( 2 )3 / 2 Number of states
2p 0 3p !
¶N m
n (E) = = 2 3 2mE Density of states
¶E¶V p !
¶N m
Using the conduction band edge as reference: n (E) = = 2 3 2m( E - Ec ) for E > E c
¶E¶V p !
1-16
Distribution function:
Electrons are fermions and follow the Fermi-Dirac distribution function given by F ( E ) = 1
E - EF
The electron concentration n in the conduction 1 + exp( )
kT
band is then written as
¥
æ E - EF ö
n = ò F ( E )n ( E )dE @ NC expç - C ÷
EC è kT ø
The hole concentration p in the valence
band is then written as
EV
æ E - EV ö
p = ò [1 - F ( E )]n ( E )dE @ NV expç - F ÷
-¥ è kT ø
T=5K
f(E-EF,T)
0.5 T=10K
T=30K
EF
0
-20 -10 0 10 20
E-EF (meV)
1-17
(e) Bandgap properties:
The bandgap changes as a function of temperature because the
lattice constant changes with temperature and hence the energy
needed to break bonds changes with temperature.
4.73 ´10 -4 T 2
EG = 1.17 - » 1.16 - 3 ´10 -4 T
T + 636
Fermi level becomes closer to the intrinsic level as T increases
because the carrier concentration is now dominated by the
electron-hole generation at high T.
Bandgap narrows as
temperature increases
In order to conserve the momentum, the recombination of
electron-hole pairs are indirect via SRH process: occurs through
an intermediate level in the bandgap (such as an impurity atom,
a vacancy, and an interstitial) which captures
the electron and hole for recombination and
transfer the excess momentum to a phonon. Trap level
The recombination lifetime is given by
1 s = capture cross section
tR =
svth N t vth = minority carrier thermal velocity
N t = density of traps
1-18
1.4 Semiconductor devices
1.4.1 PN diodes
The PN junction is the simplest semiconductor device which is formed by starting
with a wafer of one type and then doping the surface layer the opposite type.
(a) The free carriers in the vicinity of the junction flow to the opposite side, creating
the depletion region and sets up an electric field. The strength of the electric
field determines the width of the depletion region.
(b) A reverse bias (positive voltage to the N side) enlarges the built-in field and
hence blocks the current to flow.
A forward bias (negative voltage to the N side) reduces the built-in field and
increases the current exponentially.
It acts like a two-terminal switch. It is turned on (conducts) under forward bias
and is turned off (blocks) under reverse bias.
é qV ù
I = I 0 êexp( ) - 1ú
ë kT û
(c) The depletion region can be thought of as a parallel plate capacitor. The capacitance
decreases under reverse bias because the depletion widens and increases under
forward bias. In an asymmetric doping, the capacitance is determined by the more
lightly doped side.
e s = permittivity of Si
C es qe s æ N AND ö 1 xd = depletion width
= = çç ÷÷
A xd 2 N
è A + N D ø (fi ± V )
fi = built - in voltage
Only valid for symmetric doping and at small bias
1-19
1.4.2 MOS transistors
(a) The n-channel (right figure) is formed by applying
sufficient positive voltage to the gate so that there
is an accumulation of electrons in the region under
the oxide. These electrons form the n-channel and
conduct current between the N+ source and drain
regions.
(b) At VG = 0, there is no bending of the conduction
and valence bands in the semiconductor, and the
Fermi level in the metal and p-type semiconductor
line up. With a small positive bias applied to the
gate, the voltage drops in oxide and semiconductor. VG = Vox + Vs With an increase in VG, more voltage appears
across the semiconductor, and the bands bend further until some free electrons begin to accumulate at the
semiconductor surface. Now the NMOS is turned on.
(c) The rate of turning the MOS device on or off would be very slow (ms) if it were not for the presence of the N+
regions. Because the substrate is p-type and there are only few electrons which are present due to SRH generation.
The N+ regions (drain and source) provide electrons which flow into/out of the channel, and this increases the
switching rate to ps regime.
This tells you why we need ohmic contact.
This also tells you why Schottky barrier FET has been phased out.
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