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MPMC@ASSMENT5

mpmc ASSIGNMENTS

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0% found this document useful (0 votes)
265 views4 pages

MPMC@ASSMENT5

mpmc ASSIGNMENTS

Uploaded by

VenkatGolla
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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2/23/2018 Microprocessors and Microcontrollers - - Unit 6 - Week 5

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Unit 6 - Week
5

Course
outline Week 5 Assignment
Due date for this assignment: 2018-02-28, 23:59 IST.
How to access
1) Which register pair of 8085 is NOT accepted in LDAX instruc on? 1 point
the portal
BC
Week 1
DE
Week 2 HL
All pairs are acceptable
Week 3
2) In 8085, the numbers 45H and 7EH are added. The resul ng flag se ngs will 1 point
Week 4
be as follows.

Both CY and AC are set


Week 5
CY Set AC reset
Lecture 22: CY reset AC set
8085
Both CY and AC reset
Microprocessors
(Contd.) 3) In 8085, higher order address bus and lower order address bus contain 1 point
Lecture 23: address values for
8051
Microcontroller Three cycles each
Lecture 24:
Three cycles and one cycle respec vely
8051 One cycle and three cycles respec vely
Microcontroller(Contd.) One cycle each
Lecture 25:
4) In a 8085 processor, suppose the DE register pair contains value 2. In the 1 point
8051Microcontroller
(Contd.) following code, how many mes is the JNZ instruc on executed?
...
Lecture 26: ...
8051
Microcontroller(Contd.)
LOOP: DCX D
JNZ LOOP
Week 5
Lecture 1 or infinity
Material
2 or infinity
Quiz : Week Infinity
5 Assignment
Cannot be determined
Feedback for
week 5 5) Which of the following is NOT a valid 8085 instruc on? 1 point

PUSH PSW

https://onlinecourses.nptel.ac.in/noc18_ec03/unit?unit=9&assessment=95 1/4
2/23/2018 Microprocessors and Microcontrollers - - Unit 6 - Week 5

DOWNLOAD PUSH B
VIDEOS PUSH C
PUSH D

6) Suppose that the stack pointer (SP) of 8085 contains 2004H. If the instruc on 1 point
"PUSH PSW" is used, the value of SP will be

2002H
2000H
2006H
2008H
7) In 8085, ALE signal is ac vated during 1 point

Code access
Data access
Both code and data accesses
Idle cycles
8) In “INR M” instruc on which register pair act as memory pointer? 1 point

BC
DE
HL
Any of BC, DE or HL
9) If A register of 8085 contains 4EH, the parity flag is 1 point

Reset
Set
Not decidable
Don't care
10)In a 8085 processor, suppose the D register contains value 2. In the following 1 point
code, how many mes is the JNZ instruc on executed?
LOOP: DCR D
JNZ LOOP

1
2
Infinity
Cannot be determined

11)Which of the following is NOT a criterion in choosing a microcontroller? 1 point

Number of pins
On-chip debugging
Easy availability
None of the op ons men oned
12)In the bit-addressable RAM of 8051, among the byte addresses 99H and 89H 1 point

Both are bit-addressable


Only 99H is bit-addressable
Only 89H is bit-addressable
None is bit-addressable
13)If RS0 = 0 and RS1 = 1, the register bank address range is 1 point

https://onlinecourses.nptel.ac.in/noc18_ec03/unit?unit=9&assessment=95 2/4
2/23/2018 Microprocessors and Microcontrollers - - Unit 6 - Week 5

00H-07H
08H-0FH
10H-17H
18H-1FH
14)If RS0 = 1 and RS1 = 0, the register bank address range is 1 point

00H-07H
08H-0FH
10H-17H
18H-1FH
15)The number of mers in an 8051 microcontroller is 1 point

2
5
1
0

16)The size of On-Chip ROM in an 8051 microcontroller is 1 point

4k Bytes
8k Bytes
16k Bytes
32k Bytes

17)The width of the Program Counter in an 8051 microcontroller is 1 point

8 bits
16 bits
32 bits
None of the given op ons
18)In 8051, compared to on-chip RAM loca ons, register access is 1 point

Faster
Slower
Same speed
Not comparable

19)Which of the following pins is the external data memory write strobe in 1 point
8051?
P3.4
P3.5
P3.6
P3.7

20)For ge ng input from a port bit of 8051 if a '1' is not wri en to it, reading of 1 point
which value may create problem?

0
1
Both 1 and 0
None of 1 or 0

You may submit any number of times before the due date. The final submission will be
considered for grading.

https://onlinecourses.nptel.ac.in/noc18_ec03/unit?unit=9&assessment=95 3/4
2/23/2018 Microprocessors and Microcontrollers - - Unit 6 - Week 5

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