High Impedance Prot.7SJ644
High Impedance Prot.7SJ644
High Impedance Prot.7SJ644
com/protection
SIPROTEC 4 - Application:
SIP4-APN
Circulating Current High Impedance
Differential Protection
Using Multifunctional Relay 7SJ6
Edition 2014-10-17
Content
1 Introduction 4
2 Circulating Current High Impedance Protection 5
2.1 General Remarks regarding High Impedance Protection Schemes 5
2.2 High Impedance Protection Scheme Design 5
2.2.1 Relevant primary system data 5
2.2.2 Relevant current transformer data 6
2.2.3 Relevant protection device data and auxiliary component data 6
3 Procedure for High Impedance Protection Scheme Calculations 7
3.1 Relevant data required 7
3.1.1 Establish the relevant power system data 7
3.1.2 Establish the relevant current transformer data 7
3.1.3 Establish the relevant relay data and necessary auxiliary component elements 8
3.2 Calculation of the minimum required stabilizing voltage 10
3.3 Calculation of the required fault setting 10
3.4 Calculation of the required stabilizing resistor 11
3.5 Calculation of the required non-linear resistor (varistor) 11
3.6 Calculation of the required thermal ratings of the auxiliary components: stabilizing resistors and
varistors 12
3.6.1 Thermal rating of varistor 12
3.6.2 Thermal rating of stabilizing resistor 14
3.7 Final check of the scheme sensitivity 15
4 Working Example 16
4.1 Relevant data required 16
Single-phase restricted earth fault (REF) protection schemes may be used in principle to all the protected
object as listed above, but the most common application is to protect transformer windings which are
earthed via impedance, solidly earthed or even for transformer winding connected in delta (in this case the
scheme is sometimes called high impedance balanced earth fault).
The multifunctional relay 7SJ6 can be used within all the mentioned high impedance protection schemes,
both in phase-segregated circulating current high impedance protection applications, as well as in single
phase restricted earth fault protection applications.
This document provides description of the multifunctional relay 7SJ6 application in phase-segregated
circulating current high impedance protection scheme. Thereby the guideline for the calculations related to
the high impedance differential protection schemes is described together with the comments on the relay
setting parameters.
Description of the single-phase high impedance restricted earth fault protection applications is already
included within the relay manual; therefore it will be omitted in this guide.
Iset R stab
R var
Figure 1 Typical connection of elements within a high impedance differential protection scheme
Thereby, the stability of the differential scheme on CT saturation plays in all schemes an important role.
Low impedance protection schemes evaluate CT secondary currents which may be saturated by their high
burden and/or high secondary currents. Thereby, multiple CT currents are evaluated by relay (nowadays relay
software), whereas each CT saturates independently from the others, i.e. the CTs do not influence each other
in their performance. Therefore, in the low impedance differential protection devices several different
stabilizing measures and algorithms for better stability and selectivity are applied.
Within a high impedance scheme the CTs do influence each other, as all of them are connected in parallel
(Figure 1). The stabilization against CT saturation is realized by the placement of an extra element (hardware),
namely the stabilizing resistor so no further measures against CT saturation have to be implemented in the
relay. Therefore, the relay used within the high impedance protection scheme can be of over-current relay
type without involving any additional measures against CT saturation. All the other high impedance scheme
performance quantities: as required fault sensitivity, scheme stability are then dependent on the scheme
design involving adequately chosen CT parameters and auxiliary components (stabilizing resistor, varistor)
that suit given application.
Further chapters guide on relevant calculations and propose scheme design for using multifunctional relay
7SJ6 within high impedance differential protection schemes.
1 Definition as per IEC 61869-2 ; in practice the term ‘knee point voltage’ is widely used for this quantity. However, as per standard the
term knee point voltage describes rather the voltage that is applied to the secondary terminals of the CT during testing. For the sack of
the standard compatibility and correctness the term emf will be used through this application guide.
§ the maximum symmetrical short-circuit current for external (through) faults I '' sc,max,ext
§ the maximum symmetrical short-circuit current for internal faults I '' sc,max,int
Remark: In case of a busbar, the maximum short-time symmetrical short-circuit withstand current of the
''
switchgear I sc,max,swg may be considered for both of the above quantities.
2. From the scheme sensitivity and relay setting range point of view the following relevant power system
information shall be known:
§ the rating of the feeder /diameter circuit breakers or maximum prospective load on those feeders
I r,load
§ the minimum symmetrical short-circuit current for internal faults I '' sc,min,int
Remark: In power systems with solidly (effectively) earthed neutral-points, the double-phase fault is typically the
smallest one and it can be typically considered here. In power systems with earth-fault current limitation (neutral
point of power transformers is not directly earthed) the single-pole fault current shall be considered. However,
for busbar protection schemes in networks with strongly limited earth fault current (e.g. to several Amps in
medium voltage networks with presence of rotating machines) there is often not necessary to detect the earth-
fault using such scheme.
shall be known, and for each of these CTs their respective IEC class PX [1] parameters shall be collected :
I pr
§ CT Ratio, k r = where I pr and I sr are primary and secondary rated current, respectively
I sr
Remark: The values of knee-point emf and the respective exciting current can be obtained / read from the
magnetizing characteristic or testing protocols. Both values shall be rms-values, as per IEC class PX.
Remark: The wiring resistances are either given in the tender documentation or can be calculated from the layout
drawings of the switchgear. Typically, a maximum wiring resistance can be estimated and specified as a maximum
allowable for the worst case considerations.
3.1.3 Establish the relevant relay data and necessary auxiliary component
elements
At first the type of the relay input that will be used shall be known and its respective:
§ operating current setting range I set,range ,
Regarding the first one, it is proposed to activate the following device configuration function in the
multifunctional relay 7SJ6:
1218 I>>> Time Delay oo sec (OFF) Range: 0s …60s, stps. 0.01s
The stage I>> shall be activated for the main function (high impedance protection trip) with the following
settings (please note: trip setting shown below –address 1202 and 1203 – is exemplarily only):
1203 I>> Time Delay 0.0 sec (Trip) Range: 0s …60s, stps. 0.01s
Depending on application the I> stage can be then used for CT supervision purposes or switched OFF in case
when external supervision relay is used (this depends on customer practice)
1205 I> Time Delay 5.0 sec (e.g. superv.) Range: 0s …60s, stps. 0.01s
The actual burden of multifunctional digital relay 7SJ6 can be taken from the relay manual (chapter technical
data, 4.1.1):
Rrelay = 0.05 W.
Furthermore, the relay 7SJ6 requires always external equipment to build the high impedance protection
scheme. This equipment consist typically of stabilizing resistor (-s) for setting up the respective scheme
stabilization and non-linear resistor (-s) , i.e varistor (-s) to protect whole secondary equipment against
overvoltages (i.e. CTs secondaries, the differential branch and the wirings). Typically per phase (per one relay
input) one stabilizing resistor and one varistor is necessary.
The design and selection of these elements is subject of the scheme calculations (as shown in next chapters).
Remark: For busbar protection schemes which are equipped with CTs with high knee-point emfs, the presence of varistor
is mandatory to protect the secondary equipment and wiring against high voltages that may appear during internal faults
(see also calculations in item 3.5).
The presence of further relays e.g. for CT supervision, CT shorting, circuit breaker lock-out and/or test
switches depends on respective customer practice.
I max,ext
U stab = U diff,ext = (RCT + Rwire ) (1)
kr
Remark: It is recommended that the differential branch is installed at the electrical mid-point of the system, i.e. the
resistances RCT and Rwire of all branches should be equal or similar. Slight deviations of Rwire can be typically tolerated
but it must be kept in mind that these lead to an unbalance in the system during load conditions and in consequence may
lead to an unnecessary energy dissipation (heating) at auxiliary scheme elements like stabilizing resistors. Also slight
deviations of RCT values between CTs used in a scheme can be tolerated. For most practical cases ‘worst-case’ value
(highest RCT among all CTs in a scheme) can be used in Eq. (1).
Summarizing, the setting voltage of the scheme U set (in practice this voltage results from the multiplication
of the relay current setting and stabilizing resistor value) over the differential branch must be made equal or
greater than the required stability voltage (Eq. (1)).
Ek ³ 2 × U set (3)
U set £ Ek / 2 (4)
and comparing it to Eq (2):
Ad b): In order to reach the desired scheme sensitivity, i.e. to trip on internal fault, the current setting of the
relay in the differential branch shall be calculated.
To do that, the desired primary fault sensitivity I p,des of the scheme shall be chosen at first.
Having chosen the primary fault sensitivity I p,des of the scheme, the secondary setting of the relay I set can be
calculated bearing in mind that the elements connected together within a high impedance protection scheme
will decrease the sensitivity consuming a portion of current at the corresponding scheme setting voltage U set
(i.e. exciting currents I e of the CTs, varistor spill current I var at the setting voltage):
N CT
I p,des I p,des
åE
U set U set
I set = - I e.x - I var (U set ) » - N CT I e - I var (U set ) (6)
kr x =1 k,x kr Ek
Remark: A rough calculation as per right side of the Eq. (6) is enough for most practical cases. Thereby, often the ‘worst-
case’ CT data are considered, i.e. the lowest Ek , the highest I e . This has an influence on the calculated sensitivity, so the
real fault sensitivity can differ (is higher in this case). This fact shall be considered when choosing required primary fault
sensitivity.
The multifunctional relay 7SJ6 requires external stabilizing resistor Rstab to be connected in series to the relay
input in order to assure the necessary scheme setting voltage U set .
The value of the stabilizing resistor can be calculated in straightforward way using the scheme setting voltage
U set and the setting of the relay I set , as chosen in the previous steps:
U set U
Rstab = - Rrelay » set (7)
I set I set
Thereby, the relay input burden Rrelay can be typically neglected.
Considering CT saturation, the resulting maximum peak voltage across the differential branch Û max,tie can be
calculated [2]:
The protection level of the varistor can be estimated from its characteristic (for dc or instantaneous values)
b
Uˆ var = C × Iˆ , (11)
where the constants C and b shall be given by the varistor manufacturer.
The rms protection level is then:
4 I sc,max,int
Pvar = × Ek (13)
p kr
The absorbed thermal energy during internal short-circuit current flow is then
4 I sc,max,int
Pvar,mod = × U var , for Ek > U var (15)
p kr
b) Furthermore, the calculation of thermal rating of the varistor does not include the energy absorption
by the stabilizing resistor during an internal fault.
c) However, in case when varistor will be taken out of operation (damaged, etc.), the energy as per
Eq.(13) will appear and dissipate on the stabilizing resistor alone. This issue can be considered by
choosing (limiting) knee point emfs of the CTs.
d) the calculation as per Eq.(13) can be seen as being on the safe side, as long as the real (measured)
Ek of the CT is known. Care shall be taken to cases when nameplate data of Ek is used. As per IEC
standard [1] the Ek on the nameplate is the minimum value, which can be (even considerably)
smaller than the real (measured) knee-point emf.
In addition to the thermal rating of the varistor the following recommendation shall be fulfilled:
1. At setting voltage of the scheme U set the varistor rms current I var , calculated as per Eq.(16) shall
not exceed 30mA in high impedance schemes utilizing CTs with 1 A secondary rated current, and
100mA in high impedance schemes utilizing CTs with 5 A rated current (not recommended).
1/ b
æ U ö
I var = 0.52 × ç 2 × set ÷ (16)
è C ø
Summarizing the above, in most cases this practically leads to a choice between two main types of varistor
available from e.g. Metrosil for high impedance schemes utilizing CTs with 1 A secondary rated current, as
shown in Table 1.
Table 1 Proposed Metrosil varistor types for high impedance circuits with 1 A secondary (mostly used)
Remark: Also different types / different manufacturers of varistors can be used in high impedance protection applications.
Remark: In high impedance schemes utilizing CTs with 5 A rating (not recommended) different types of varistors may
apply.
U set 2
Pstab,cont ³ (17)
Rstab
Remark: It shall be noted that in order to keep the resistor healthy during commissioning tests the fault current from the
testing equipment should be immediately withdrawn after the device gives a protection trip.
In second step, Rstab must have a short time rating large enough to withstand the fault current before the
fault is cleared. Thereby, the rms voltage developed across the stabilizing resistor during maximal prospective
internal fault U rms,f is decisive for the thermal stress of the stabilizing resistor. It is calculated according to
mathematically derived formula:
I sc,max,int
U rms,f = 1.3 × 4 E k 3 × Rstab × (18)
kr
The time duration of 0.5 seconds can be typically considered for the stabilizing resistor ( Pstab,0.5s ).
Remark: Longer times as e.g. 1 s may lead to very huge resistors. The consideration of longer times is impracticable,
especially taking into consideration that within the scheme also a varistor is applied, which takes over a part of the
thermal energy. The considerations presented here are not taking the varistor into account. Therefore, the 0.5 s rating is
on a safe side.
Summarizing, the resulting short-time rating Pstab,0.5s shall be then chosen as per Eq. (19):
U rms,f 2
Pstab,0.5s ³ (19)
Rstab
Regarding thermal rating of the stabilizing resistor the following issues shall be considered:
a) One shall note that in high impedance schemes utilizing CTs with Ek > U var the Eq. (19) provides too
large values as they may appear in the real scheme with varistor applied (since the varistor becomes
low-ohmic at voltages below Ek , leading to the fact that CTs do not saturate, so the amount of
energy delivered to the scheme is then limited not by the knee-point emf but by the varistor
protection voltage U var ). In such cases it is proposed to estimate the thermal rating exchanging
U rms,f in Eq.(19) by U rms,f,mod calculated according to the empirically verified formula (20):
I sc,max,int
U rms,f,mod = 1.3 × 4 U var 3 × Rstab × , for Ek > U var (20)
kr
b) Furthermore, the calculation of thermal rating of the stabilizing resistor does not include the
considerable energy absorption by the varistor resistor during an internal fault.
c) The distribution of the dissipated energy during an internal fault between the stabilizing resistor and
varistor is not linear and depends on varistor protection voltage U var and CTs knee-point emf Ek
together with stability (setting) voltage of the scheme U set . Simplifying, the higher the ratio
U var / U set the more energy will be dissipated on the resistor.
d) However, in case when varistor will be taken out of operation (damaged, etc.), the energy as per
Eq. (13) will appear and dissipate on the stabilizing resistor alone. This issue can be considered by
choosing (limiting) knee point emfs of the CTs.
æ NCT U ö é ù
å
U
I p,des,final = k r × I set + kr × ç set
I e,x + I var (U set ) ÷ » kr × ê I set + N CT set I e + I var (U set )ú (21)
ç E ÷ ë Ek û
è x =1 k,x ø
§ the maximum symmetrical short-circuit current for external (through) faults I '' sc,max,ext = 63 kA
§ the maximum symmetrical short-circuit current for internal faults I '' sc,max,int = 63 kA
In case of a busbar, for both above quantities the maximum short-time symmetrical short-circuit
withstand current of the switchgear I '' sc,max,swg is considered. :
§ the rating of the circuit breakers / busbar rating equals to I r,load = 4000 A
§ the minimum symmetrical short-circuit current for internal faults is assumed at I '' sc,min,int = 15 kA
for phase-to-phase-fault current (as in typical solidly earthed transmission system the single-pole
fault current at the busbar is slightly higher or slightly lower than the three-pole)
Furthermore:
§ the CT secondary wiring resistance from the CT clamps to the paralleling point of the scheme (loop
resistance) equals to Rwire = 0.55 W (corresponds to approx. 100 m loop length of copper wire with
4 mm2 cross-section, resistance value is corrected to 75 OC e.g. for worst case calculation)
§ the data of the system components (resistor and varistor) will be calculated in further steps
I max,ext
U stab = (RCT + Rwire ) = 63kA (5 + 0.55) = 87.41 V (22)
kr 4000
The setting voltage U set of the scheme over the differential branch shall be made equal or greater than the
required stability voltage, as calculated in Eq.(22). Let’s take:
Having chosen the primary fault sensitivity I p,des of the scheme, the secondary setting of the relay I set can be
calculated as per Eq. (6). The varistor spill current will be at this stage neglected:
U set U 120 V
Rstab = - Rrelay » set = = 240 W (28)
I set I set 0.5 A
Thereby, the relay input burden Rrelay was neglected.
Furthermore, Rstab must have a short time rating large enough to withstand the fault current before the fault
is cleared. Thereby, the rms voltage developed across the stabilizing resistor during maximal prospective
internal fault U rms,f is decisive for the thermal stress of the stabilizing resistor. It is calculated according to
Eq.(18):
I sc,max,int 63000 A
U rms,f = 1.3 × 4 E k 3 × Rstab × = 1.3 × 4 (1000 V ) 3 × 240 W × = 1812.7 V (30)
kr 4000
The time duration of 0.5 seconds can be typically considered for the stabilizing resistor ( Pstab,0.5s ).
The resulting short-time rating Pstab,0.5s shall be then chosen as per Eq.(19) :
U rms,f 2 (1812.7 V ) 2
Pstab,0.5s ³ = = 13691 W (31)
Rstab 240 W
Therefore:
Resistor chosen (per relay input): Rstab = 240 W , Pstab,cont ³= 60 W , Pstab,0.5s ³ 13691 W (32)
Regarding short-time thermal rating remarks in chapter 0 shall be considered in case when size of resistor
shall be too large for the given protection cubicle.
U sc,max,int,rms =
I '' sc,max,int
kr
(Rrelay + Rstab =
4000
)
63 kA
( 0.05 W + 240 W ) = 3780 V (33)
Considering CT saturation, the resulting maximum peak voltage across the differential branch Û max,tie is
calculated:
Û max, tie > 2000 V Û 4716 V > 2000 V Þ varistor necessary (35)
Considering scheme setting voltage U set of 120 V (very close to the recommended limit of 125 V for the
smaller varistor) a Varisor of type 600A/S3/1/S1195 (three pole) or three varistor of type 600A/S1/S1088 can
be chosen (see Table 1).
Its rms spill current at the setting voltage of the scheme (Eq.(16):
1/ b
æ U ö
I var = 0.52 × çç 2 × set ÷÷ = 0.66 mA (38)
è C ø
The requirement that at the setting voltage the spill current shall be less than 30 mA (CTs with 1 A secondary)
is then fulfilled.
The necessary thermal rating of the varistor can be calculated using Eq.(13)
4 I sc,max,int 4 63000 A
Pvar = × Ek = × 1000 V = 20053.5 J/s (39)
p k r p 4000
This necessary thermal rating is smaller than the maximum thermal rating of 88000 J (see Table 1).This
maximum energy rating will not be even exceeded by the short-circuit flow of 4 s.
Therefore:
Varistor chosen: one of 600A/S3/1/S1195 (three pole) type
or three varistors of type 600A/S1/S1088 (40)
é U ù
I p,des,final » kr × ê I set + N CT set I e + I var (U set )ú =
ë Ek û
(41)
é 120 V ù
= 4000 × ê0.5 A + 8 0.025 A + 0.00066 A )ú = 4000 × 0.52466 A = 2098.6 A
ë 1000 V û
This corresponds to 52.4 % of the rating of the busbar (4000 A) and fulfills the requested fault setting for this
example.
1203 I>> Time Delay 0.0 sec (Trip) Range: 0s …60s, stps. 0.01s
Resistor chosen (pro relay input): Rstab = 240 W , Pstab,cont ³= 60 W , Pstab,0.5s ³ 13691 W
4.7.1 CT supervision
The CT circuit supervision can be incorporated within the relay, as well. It can be realized using I> stage of the
multifunctional relay 7SJ6:
Depending on the loading conditions, the CT supervision can be set to detect approx. 12 % of the full loading
of the busbar, i.e. 0,12 ∙ 4000 A = 480 A primary. The secondary setting that can be incorporated will be then
0.1 A (24 V setting of the scheme) correspondingly. This leads to the final supervision sensitivity as per
Eq (42):
é U ù
I superv » k r × ê I set + N CT set I e + I var (U set )ú =
ë Ek û
(42)
é 120 V ù
= 4000 × ê0.1 A + 8 0.025 A + 0.00066 A )ú = 4000 × 0.12466 A = 498.6 A
ë 1000 V û
This corresponds to 12.5 % of the rating of the busbar (4000 A) and fulfills the requested CT supervision
setting for this example.
The corresponding settings of the I> stage will be:
1221A I> measurement of Fundamental component
1204 I> Pickup 0.1 A (=. I superv ) Range: 0.1A …35A, stps. 0.01A
1205 I> Time Delay 5.0 sec (or different) Range: 0s …60s, stps. 0.01s
The types of further auxiliary components like CT shortening relay, CB lock-out and test switches can be
chosen as per respective customer practice.
Figure 2 Connection of the high impedance scheme for the working example
The high impedance protection scheme for busbar is shown exemplarily in Figure 3
In Figure 5 high impedance scheme of series reactors, shunt reactors, motors or generators is shown
Figure 5 Phase and earth-fault high impedance differential protection of series reactors, shunt reactors,
motors or generators
Siemens AG
Humboldtstr. 59
Siemens AG
Energy Automation
Humboldtstr. 59
www.siemens.com/protection