Ica Lab New

3/1 ECE- IC Applications Lab Manual Auroras Engineering College
AURORAS ENGINEERING COLLEGE

BHONGIR, NALGONDA DIST. 508116.
Lab manual of
IC APPLICATIONS LAB
3rd Year 1st Sem. ECE
2014-15
DEPARTMENT OF
ELECTRONICS AND COMMUNICATION ENGINEERING
1
PREFACE
Integrated circuits are the present state of art of IC Technology. It is one of the core area
of ECE and constitutes the largest applications in use today. IC Technology has entered
into every part of todays world.
This laboratory is intended to make students understand the use of different linear and
digital IC. This laboratory consists of linear IC trainer kits, digital IC trainer kits etc.
In this laboratory the student will become familiar with various linear ICs such as A741
and SE/NE 555. They will understand the applications of the A741 operations amplifier
like adder, subtractor and comparator etc. And also the various applications of SE/NE 555
like Monostable operations and Schmitt trigger. In addition to the above they will become
familiar with various voltage regulators and sample and hold circuit.
Today, a single chip can contain tens of millions of transistors and can be programmed to
create a system on-a-chip that, using technology of past, would have required hundreds
of discrete chip containing millions of individual gates & flip-flop.
Second part deals with verifying the functionality of the various 74 series TTL ICs such
as D Flip-flop (74LS74), Decade counter (74LS90), multiplexer ICs and RAM ICs.
2
LAB CODE
1. Students should report to the concerned labs as per the timetable schedule.
2. Students who turn up late to the labs will in no case be permitted to perform the
experiment scheduled for the day.
3. After completion of the experiment, certification of the concerned staff in-charge

in the observation book is necessary.
4. Students should bring a notebook of about 100 pages and should enter the
readings/observations into the notebook while performing the experiment.
5. The record of observations along with the detailed experimental procedure of the
experiment performed in the immediate last session should be submitted and
certified by the staff member in-charge.
6. Not more than three students in a group are permitted to perform the experiment
on a setup.
7. The group-wise division made in the beginning should be adhered to, and no mix
up of student among different groups will be permitted later.
8. The components required pertaining to the experiment should be collected from

stores in-charge after duly filling in the requisition form.
9. When the experiment is completed, students should disconnect the setup made by
them, and should return all the components/instruments taken for the purpose.
10. Any damage of the equipment or burnout of components will be viewed

seriously either by putting penalty or by dismissing the total group of
students from the lab for the semester/year.
11. Students should be present in the labs for the total scheduled duration.
12. Students are required to prepare thoroughly to perform the experiment before
coming to Laboratory.
13. Procedure sheets/data sheets provided to the students groups should be

maintained neatly and to be returned after the experiment.
3
INDEX
S.NO. Name of the Experiment Page No.
PART (A)- To Verify the Following Functions

INTRODUCTION 5-7
1 Adder, Subtrator, Comparator using IC 741 Op-Amp 8-18
2 Integrator and Differentiator using IC741 Op-Amp 19-25
3 Active Low Pass & High Pass Butterworth filter (Second Order) 26-35
4 RC Phase shift and Wien Bridge Oscillators using IC741 OP-Amp. 36-45
5 IC 555 Timer in Monostable operation 46-50
6 Schmitt Trigger circuits using IC 741 & IC 555 51-59
7 IC 565 PLL applications 60-65

Voltage regulator IC 723, three terminal voltage regulators 7805,
8 66-75
7809, 7912
PART (B)- To Verify the Functionality of the following 74 series TTL ICs
1 D Flip-Flop (74LS74) and JK Master-Slave Flip-Flop (74LS73) 82-83
2 Decade Counter (74LS90) and Up-Down Coutner (74LS192) 86-90
3 Universal Shift registers 74LS194/195 91-93
4 3-8 Decoder 74LS138 94-95
5 4 bit Magnitude Comparator 74LS85 96-97
6 8X1 Multiplexer 74151 and 1X4 Demultiplexer 98-101
7 RAM (16X4) 74189 (Read and Write Operations) 102-103
4
PART-1: IC APPLICATIONS LAB
Pin configuration, Parameters and Specifications of IC 741, IC 555, IC 565
IC A 741 OP-AMP
1. Supply voltage:
A 741A, A 741, A 741E ----------------- 22V
A 741C ------------------- 18 V
2. Internal power dissipation

DIP package ---------------------- 310 Mw.
3. Differential input voltage ---------------- 30 V.
4. Operating temperature range

Military (A 741A, A 741) -- ---------- -550 to +1250 C.
Commercial (A 741E, A 741C) ---------- 00 C to +700 C.
5. Input offset voltage ------------ 1.0 mV.
6. Input Bias current ------------ 80 nA.
7. PSSR -------------- 30 V/V.
8. Input resistance ------------- 2M.
9. CMMR -------------- 90.
10. Output resistance ---------- 75.
11. Bandwidth ----------- 1.0 MHz.
12. Slew rate ------------ 0.5 V/ sec.
5
NE / SE 555 / SE 555C
1. Supply voltage ------------ 4.5 V to 18 V
2. Supply current ------------- 3mA
3. Output voltage (low) --------------- 0.1 V
4. Output voltage (high) -------- 12.5 V (15 V Vcc) & 3.3 V (5V Vcc)
5. Maximum operating frequency ------------ 500 KHz
6. Timing from sec to hours
6
Phase Locked Loop NE / SE 565
1. Maximum supply voltage : 26 V
2. Input Voltage : 3 V(P-P)
3. Power dissipation : 300Mw
4. Operating temperature : NE 565- 00 C to 700C (SE 565-55 to +1250 C
5. Supply voltage : 12 V
6. Supply current : 8 mA
7. Output current- (sink) : 1 mA

(Source) : 10 mA
7
Experiment No. 01
ADDER, SUBTRATOR, COMPARATOR USING IC 741 OP-AMP
APPLICATION OF OP-AMP AS ADDER
I. AIM: To design adder using op-amp.
II . EQUIPMENTS AND COMPONENTS:
i. APPARATUS:
Name of the
S.No. Quantity
component/equipment
1. Op amp 741 IC 1
2. Resistance R =1K 4
3. Resistance RF=10K 1
4. Dual Regulated Power supply 2
5. Bread Board 1
6. Multimeter 1
ii. DESCRIPTION OF EQUIPMENT:
1. Dual channel power supply: this power supply unit is specially developed for
laboratory use, where low-ripple and noise and high voltage regulation is to be
maintained both the voltage or current is indicated by the panel meter. The outputs
are floating, current limited, self recovery on removal of fault this is a cv/cc type
power supply employing a well known series regulator technique. The unit
operates on a supply voltage of 230v,1 amp,50Hz,single phase AC.
2. Bread Board: Wire connections are usually carried out using a system called
Bread Board. It is a rectangular array of holes with internal connections divided
into a number of nodes. This component divided into a number of modes. This
component has a provision on which any circuit can be constructed by
interconnecting components such as registers, capacitors, diodes, transistors etc.,
for testing the circuit.
iii. COMPONENTS:
1. 10 k Resistor 1 No.
2. 1k Resistor 4 No.
3. IC741 - 1 No.
iv. DESCRIPTION OF COMPONENTS:

1. 10k Resistor.
Most circuits need contrast resistances. There are different types of resistors
available for different applications. Typical specifications of 10k resistor are
Rating: 10k to 12k
Wattage: W to 2 W
Tolerance: Normally 5% and above.
8
2. 1k Resistor.
Rating: 1k to 2k
Wattage: W to 2 W
3. IC741
The operational amplifier has five basic terminals that is two input terminals one
output terminal and two power supply terminals. The terminal with a (-) sign is
called inverting input terminal and the terminal with (+) sign is called non-
inverting input terminal.
741C (Commercial grade op-amp)
Operating temperature range is 0 to 75 degrees centigrade.
IV. THEORY:
Op-amp can be used to design a circuit whose output is the sum of several input
signals, such a circuit is called a summing amplifier or a adder. There are two
types of summers. First one is Inverting and second one is Non-inverting
summing amplifiers. In this experiment we used Non-inverting Summing
Amplifier.
V. CIRCUIT DIAGRAM
ADDER
VI. PROCEDURE:
1. Connect the circuit as shown in figure.

2. Apply +Vcc =+15V and Vcc = 15V to Pin 7 and 4 of 741IC
3. Apply the i/p voltage V1 and V2.
4. Measure the o/p voltage using Multi meter.
9
5. Verify with theoretical value.

6. Repeat the above for different values of V1 and V2.
VII. RESULT:
In the above circuit Op-Amp works as summing amplifier.
VIII. INFERENCE:
i. The working of summing amplifier is observed..

ii. The out put is calculated theoritically and practically.
IX. PRECAUTIONS:
i. Check the circuit connections before switching on the power supply.

ii. Check the variable resistor connection between pin no.2 and ground
iii. Check the continuity of the connecting wires.
10
APPLICATION OF OPAMP AS SUBTRACTOR
I. AIM: To design subtractor using 741opamp.
II. EQUIPMENTS AND COMPONENTS:
i. APPARATUS:
Name of the
S.No. Quantity
component/equipment
1. Op amp 741 IC 1
2. Resistance RF=10K 7
3. Dual Regulated Power supply 2
4. Bread Board 1
5. Multimeter 1
laboratory use, where low-ripple and noise and high voltage regulation is to be
maintained both the voltage or current is indicated by the panel meter. The outputs are
floating, current limited, self recovery on removal of fault this is a cv/cc type power
supply employing a well known series regulator technique. The unit operates on a
supply voltage of 230v,1 amp,50Hz,single phase AC.
Bread Board. It is a rectangular array of holes with internal connections divided into a
number of nodes. This component divided into a number of modes. This component
has a provision on which any circuit can be constructed by interconnecting
components such as registers, capacitors, diodes, transistors etc., for testing the
circuit.
iii. COMPONENTS:
2. IC741 - 1 No.
1. 10k Resistor.
Most circuits need contrast resistances. There are different types of resistors available
for different applications. Typical specifications of 10k resistor are
Rating: 10k to 12k
Wattage: W to 2 W
2. IC741
output terminal and two power supply terminals. The terminal with a (-) sign is called
11
inverting input terminal and the terminal with (+) sign is called non-inverting input
terminal.
Operating temperature range is 0 to 75 degrees centigrade.
IV. THEORY
A basic differential amplifier can be used as a subtractor. It can also be used to

perform addition and subtraction with single Op-amp. From the circuit given below
we will get output as Vo=(V3+V4 )(V1+V2)
V. CIRCUIT DIAGRAM
SUBTRACTOR
VI. PROCEDURE

2. Apply +Vcc =+15V and Vcc = 15V to Pin 7 and 4 of 741IC
3. Apply the i/p voltage V1 and V2.
4. Measure the o/p voltage using Multi meter.
5. Verify with theoretical value.
6. Repeat the above for different values of V1 and V2.
VII. RESULT.
In the above circuit Op amp works as subtractor.
12
VIII. INFERENCE:
i. The working of subtractor is verified and the output is obtained.

ii. Checked the output with different values of inputs.
IX. PRECAUTIONS:

ii. Check the variable resistor connection between pin no.2 and ground
X. APPLICATIONS:
Instrumentation amplifier.
XI. REVIEW QUESTIONS :
1. Draw an Op- amp circuit whose output Vo is V1+ V2 V3 V4.
2. Calculate VO for the above circuit for V1 = 5V, V2 = 2V.
Rf
3 Show that the o/p of Inverting adder is V0 = - (v a v b v c
R1
4. Draw the circuit of non-inverting adder with 3 inputs and find the o/p
Voltage V0
5. What is a mixed adder and how do you construct using Op-Amp IC 741.
6. Design a mixed adder for V0=V1+2V2-V3-5V4.
7. Design a subtractor for V0 =Va - 5Vb -2Vc
8. Mention the other mathematical operations obtained using Op-Amps.
13
APPLICATION OF OPAMP AS COMPARATOR
I. AIM: To Study the operation of comparator
(i).APPARATUS
1. DC power supply - 1 No.

2. CRO - 1 No.
3. Bread Board - 1 No.
4. Function Generator - 1 No.
(ii) DESCRIPTION OF EQUIPMENT:
laboratory use, where low ripple and noise and high voltage regulation is to be
2. CRO: The 20 MHz dual channel oscilloscope 201 is a compact, low line and
light weight instrument. It is a general purpose Dual Trace Oscilloscope having
both vertical amplifiers offering a bandwidth of DC-20 MHz and maximum
sensitivity of 2mv/cm. The 201 offers five separate add-on modules.
Frequency counter
Curve Tracer
Power Supply
Function Generator
Digital Voltmeter
The add-on modular enhance measuring capabilities of instrument at low cost.
3. Bread Board : Wire connections are usually carried out using a system called
4. Function Generator: This instrument is meant for giving three types of

periodic waveforms SINUSOIDAL, SQUARE and TRIANGULAR waveforms
whose frequency can be selected from 0.1 Hz to 1 MHz and (whose amplitude
also can be selected from 0.1 to 1 MHz and ) whose amplitude also can be
selected from 0 to 20 volts peak to peak independently.
14
The power on switch in pressed position will connect supply to the instrument.
The amplitude switch varies the amplitude of output waveforms from 20 mV to
20v (p-p). The function is a interlocked 3 station push button which switches to
select the desired waveform for output.
iii. COMPONENTS:
3. IC741 - 1 No.
1. 10k Resistor.
Rating: 10k to 12k
Wattage: W to 2 W
2. 1k Resistor.
Rating: 1k to 2k
Wattage: W to 2 W
3. IC741
Operating temperature range 0 to 75 degrees centigrade
III. THEORY:
A comparator is a circuit which compares a signal voltage applied at one input of

an OPAMP with a known inference voltage at the other input. It is basically an
open loop OPAMP with output Vsat . It may be seen that change in output state
takes place with an increment in input Vi of only 2mV. There are basically two
types of comparators, non-inverting comparator and inverting comparator.
15
IV. CIRCUIT DIAGRAM:
V. PROCEDURE:
1. Connect the circuit shown in Fig. And adjust the 10 k potentiometer so that
Vref = +0.5V
2. Adjust the signal generator so that vi = 2V pp sine wave at 1 kHz.
3. Using a CRO observe the input and output waveform simultaneously. Plot the
output waveform.
4. Adjust the 10 k potentiometer so that Vref = -0.5V. Repeat step 3
5. To make a zero crossing detector, set Vref = 0V and observe the output
waveforms.
VI. OBSERVATIONS:
Vout = _________
Vin = _________
VII. CALCULATIONS:
Vref = 0.5 V
VO = ________
Vref = -0.5V
VO = _______
Time period of output waveform = ___________
16
VIII. GRAPH:
IX. RESULT:
Vin = _______
VO = _______
Vref = ________
X. INFERENCE:
i. The working of comparator is observed and the output is plotted.

ii. The time period of the output waveform is calculated
iii. Frequency of the output wave form is calculated
XI. PRECAUTIONS:

ii. Check the connection between pin 2 and 6
iii. Check the variable resistor connection between pin no.2 and ground
iv. Check the continuity of the connecting wires.
XII. APPLICATIONS:
i. Zero crossing detector

ii. Window detector
iii. Time marker generator
iv. Phase meter.
17
XIII. EXTENSION:
i. Design the circuit so that it can act as zero crossing detector

ii. Check the output waveform at Pin no. 6
XIV. REVIEW QUESTIONS
i. Discuss the characteristics of an ideal comparator.

ii. List the different types of comparators.
iii. What is the meaning of Voltage limiting?
iv. What is window detector?
v. What is zero crossing detector?
vi. What is Schmitt trigger circuit?
vii. What is time maker generator?
viii. What are the differences between ideal and practical comparator?
ix. What are the applications of comparator?
x. In which mode the operational amplifier is connected in the comparator circuit.
18
Experiment No. 02
INTEGRATOR AND DIFFERENTIAOR USING IC741 OP-AMP
I. AIM:
Design and verify the functionality of Differentiator and Integrator using IC 741 Op-Amp
(i) APPARATUS
2. CRO - 1 No.

Frequency counter
Curve Tracer
Power Supply
Function Generator
Digital Voltmeter
4. Function Generator : This instrument is meant for giving three types of

19
(iii) COMPONENTS:
i. 100 k Resistor 1 No.

ii. 10k Resistor 1 No.
iii. 0.01 F Capacitor 1 No
iv. 10 nF Capacitor 1 No
v. IC741 - 1 No.
(iv) DESCRIPTION OF COMPONENTS:
1. 100 k Resistor.
Rating: 100k to 110k
Wattage: W to 2 W
2. 10k Resistor.
Rating: 10k to 12k
Wattage: W to 2 W
4. 0.01 F Capacitor 1No.

Capacitors are made by sandwiching an insulating material between two
conductors which from the electrodes. These are rated by their maximum working
voltage. The breakdown voltage depends upon temperature and hence upon the
losses in the dielectric.
The factors to be considered in the choice of capacitors are
1) Required Capacity
2) Working Voltage
3) Tolerances
The Specifications of 0.01F capacitor are
1) Capacity 0.01 F
2) Voltage range 16v to 3kv
3) Tolerance 10%
20
4. 10 nF Capacitor 1No.
2) Working Voltage
3) Tolerances
The Specifications of 10nF capacitor are
1) Capacity 10nF
3) Tolerance 10%
5. IC741
III. THEORY
Differentiator:
The operational amplifier can e used in many applications. It can be used as
differentiator and integrator. In differentiator the circuit performs the
mathematical operation of differentiation that is the output waveform is the
derivative of the input wave form for good differentiation, one must ensure that
the time period of the input signal is larger than or equal to RfC1. The Practical
Differentiator eliminates the problem of instability and high frequency noise.
Vout = RF C1 dVin
dt
Integrator:
The circuit provides an output voltage which is proportional to the time integral of
the input and R1CF is the time constant of the integrator. It may be noted that
there is a negative sign in the output voltage, and therefore, this integrator is also
known as an inverting integrator. The gain Av is infinite for an ideal op-amp, so
the effective time constant of the op-amp integrator becomes very large which
results in perfect integration.
21
V. PROCEDURE:
i. Connect the differentiator circuit as shown in fig 1.adjust the signal generator to
produce a 5 volt peak sine wave at 100 Hz.
ii. Observe input Vi and Vo simultaneously on the oscilloscope measure and record
the peak value of Vo and the phase angle of Vo with respect to Vi.
iii. Repeat step 2 while increasing the frequency of the input signal. Find the
maximum frequency at which circuit offers differentiation. Compare it with the
calculated value of fa Observe & sketch the input and output for square wave.
iv. Connect the integrator circuit shown in Fig2. Set the function generator to produce
a square wave of 1V peak-to-peak amplitude at 500 Hz. View simultaneously
output Vo and Vi.
v. Slowly adjust the input frequency until the output is good triangular waveform.
Measure the amplitude and frequency of the input and output waveforms.
vi. Verify the following relationship between R1Cf and input frequency for good
integration f>fa & T< R1C1, Where R1Cf is the time constant
vii Now set the function generator to a sine wave of 1 V peak-to-peak and frequency
500 Hz. Adjust the frequency of the input until the output is a negative going
cosine wave. Measure the frequency and amplitude of the input and output
waveforms.
VI. OBSERVATIONS:
i. The time period and amplitude of the output waveform of differentiator circuit
ii. The time period and amplitude of the integrator waveform
VII. CALCULATIONS:
Design a differentiator to differentiate an input signal that varies in
frequency from 10 Hz to 1 kHz.
1
fa
2R f C1
fa = 1 kHz, the highest frequency of the input signal
Let C1 = 0.01 F,
Then Rf = 15.9 k
22
Therefore choose Rf = 15.0 k

1
fa
2R1C1
Choose: fb= 20x fa = 20 KHz
Hence R1 = 795
Therefore choose R1 = 820
Since R1C1 = Rf Cf (compensated attenuator)
Cf = 0.54 nF
Therefore choose Cf = 0.5nF
Integrator: Design an integrator that integrates a signal whose frequencies

are between 1 KHz and 10 KHz
1
fb
2R1C f
the frequency at which the gain is 0 dB.
1
fa
2R f C f
fa: Gain limiting frequency,
The circuit acts as integrator for frequencies between fa and fb
Generally fa < fb [ Ref. Frequency response of the integrator]
Therefore choose fa = 1KHz
Fb = 10 KHz
Let Cf = 0.01 F
Therefore R1= 1.59k
Choose R1= 1.5 K
Rf = 15 K
VIII. GRAPH:
Differentiator
23
Integrator
24
IX: RESULT:
Differentiator
1
fb ______
2R1C f
T> Rf C1 = _______
Integrator
1
fa = _______
2R f C f
T = _________
X. INFERENCE:
i. The working of differentiator and integrator is observed and the output is plotted.
iii. The maximum frequency of differentiation and integration is observed
XI. PRECAUTIONS:

ii. Check the capacitor connection between pin 2 and pin 6
XII. APPLICATIONS:
i. In Electronic Analog computation

ii. In generation of step, ramp, square waveforms
iii. In ADCs
XIII. EXTENSION:
i. Design the circuit so that it can provide square wave form, ramp wave form
ii Design the circuit for the simulation of second order differential equation

i. Define differentiator
ii. Define integrator
iii. What are the limitations of an ordinary differentiator?
iv. Explain how the practical differentiator will overcome the limitations
v. What are the limitations of an ideal integrator?
vi. What are the initial conditions of a loss integrator?
vii. What are the differences between integrator and differentiator?
viii. State the applications of integrator
ix. State the applications of differentiator
x. Explain why integrators are preferred over differentiators in analog computer.
25
Experiment No. 03
ACTIVE LOW PASS & HIGH PASS BUTTERWORTH
(SECOND ORDER)
(i) LOWPASS FILTER
I. AIM:
To Design a Low pass, second order Butterworth Filter with a cut-off frequency of
fH=1.0 kHz and pass band gain of 1.5.
i. APPARATUS
1. CRO (Dual slope) - 1 No

2. Signal Generator - 1 No
4. Dual channel power supply - 1 No
1.CRO: The 20 MHz dual channel oscilloscope 201 is a compact, low line and
Frequency counter
Curve Tracer
Power Supply
Function Generator
Digital Voltmeter
2.Signal Generator: This instrument is meant for giving three types of periodic
waveforms SINUSOIDAL, SQUARE and TRIANGULAR waveforms whose
frequency can be selected from 0.1 Hz to 1 MHz and (whose amplitude also can
be selected from 0.1 to 1 MHz and ) whose amplitude also can be selected from 0
to 20 volts peak to peak independently.
3. Bread board Wire connections are usually carried out using a system called
26

power supply employing a well known series regulator technique.
The unit operates on a supply voltage of 230v,1 amp,50Hz,single phase AC.
iii. COMPONENTS:
1. 1.6k Resistor 2 No.
3. 5.86k Resistor 1 No
4. 0.1 F Capacitor 2 No.
5. Operational Amplifier -1 No

Rating: 1k to 10k
Wattage: W to 2 W

Rating: 10k to 10M
Wattage: W to 2 W

Rating: 10k to 10M
Wattage: W to 2 W

2) Working Voltage
3) Tolerances
The Specifications of 0.1 F capacitor are
27
1) Capacity 0.1 F
3) Tolerance 10%
5. Operational Amplifier
III. THEORY:
A frequency selective electric circuit that passes electric signals of specified band
of frequencies and attenuates the signals of frequencies outside the brand is called
an electric filter. The first order low pass filter consists of a single RC network
connected to the non-inverting input terminal of the operational amplifier.
Resisters R1 and RF determine the gain of the filter in the pass band. The low pass
filter as maximum gain at f = 0Hz. The frequency range from 0 to FH is called the
pass band the frequency range f > fh is called the stop band.
R1=10k
R2, R3=1.6k
RF=5.86k
C2, C3=0.1 F
28
V. PROCEDURE:
i. Construct the circuit as shown in circuit diagram.

ii. Apply an input sine wave and measure the amplitude of output waveform for
different values of input frequencies.
iii. Calculate the gain in dB.
iv. Plot the frequency response.
VI. OBSERVATIONS:
Sl.No Input frequency Output voltage Gain 20 log Vo/Vi
1. 100
2 200
3 500
4. 1kHz
5. 1.5KHz
6. 2.0kHz
7. 5kHz
VII. CALCULATIONS:
i. Choose a standard value of Capacitor C say 0.1 F.

1 1
Then R= =
2fC 2x1x10 x0.1x10 6
3
= 1.6k
RF
ii. Ao=1+ =1.58
R1
Rf=0.58R1
Choose a value of 10k for R1
Then Rf=5.8 k
VIII. GRAPH:
29
IX. RESULT:
i. The cut-off frequency of the low pass filter = kHz

ii. The pass band gain of low pass filter =
X. INFERENCE:
i. The working of active low pass filter is observed and the output is plotted.
ii. The frequency response of the low pass filter is plotted on a semi-log graph paper.
iii. It is observed that the gain rolls of at the rate of 40dB per decade at the cut of
frequency.
XI. PRECAUTIONS:

ii. Pin No.1 and Pin No.8 should be left free.
XII. APPLICATIONS:
i. To remove high frequency noise.

ii. To generate sweep.
iii. To generate saw-tooth waveform.
XIII. EXTENSION:
i. Design the circuit for higher order and observe that the flat pass band and flat stop
band characteristics are observed.
ii. For higher order the gain becomes nearly constant and should be observed.
iii. Check the condition when a low pass filter will act as a integrator.
i. Define an electric filter.

ii. Classify filters
iii. Discuss the disadvantages of passive filters
iv. Why are active filters preferred?
v. List the commonly used filters.
vi. Define pass band and stop band of a filter.
vii. What is roll-off rate of a second order filter?
viii. Why do we use higher order filters?
ix. On what does the damping coefficient of a filter depend?
x. What is Sallen key filter?
30
(ii) HIGH PASS FILTER

I. AIM:
To Design a Low pass, second order Butterworth Filter with a cut-off frequency of
fL=1.0 kHz and pass band gain of 1.5.
i. APPARATUS
1. CRO (Dual channel) - 1 No
2. Signal Generator - 1 No
4. Dual channel power supply 1 No
Frequency counter
Curve Tracer
Power Supply
Function Generator
Digital Voltmeter
2.Signal Generator: This instrument is meant for giving three types of periodic
waveforms SINUSOIDAL, SQUARE and TRIANGULAR waveforms whose
frequency can be selected from 0.1 Hz to 1 MHz and (whose amplitude also can
be selected from 0.1 to 1 MHz and ) whose amplitude also can be selected from 0
to 20 volts peak to peak independently.
The amplitude switch varies the amplitude of output waveforms from 20 mv to
3. Bread board Wire connections are usually carried out using a system called
31
operates on a supply voltage of 230v, 1 amp, 50Hz, single phase AC.
iii. COMPONENTS:
3. 5.86k Resistor 1 No
5. Operational Amplifier- 1No
1. 1.6k Resistor 2No.

Rating: 1k to 10k
Wattage: W to 2 W
2. 10k Resistor 1No.

Rating: 10k to 10M
Wattage: W to 2 W

Rating: 10k to 10M
Wattage: W to 2 W

2) Working Voltage
3) Tolerances
1) Capacity 0.1 F
3) Tolerance 10%
32
III. THEORY:
A frequency selective electric circuit that passes electric signals of specified band
of frequencies and attenuates the signals of frequencies outside the brand is called
an electric filter. The first order high pass filter consists of a single RC network
connected to the non-inverting input terminal of the operational amplifier.
Resisters R1 and RF determine the gain of the filter in the pass band. The high
pass filter has maximum gain at f = fl Hz. The frequency range from 0 to Fl is
called the stop band the frequency range f > fl is called the pass band.
R1=10k
R2, R3=1.6k
RF=5.86k
C2, C3=0.1 F
V. PROCEDURE:
i. Construct the circuit as shown in circuit diagram.

ii. Apply an input sine wave and measure the amplitude of output waveform for
different values of input frequencies.
iii. Calculate the gain in dB.
iv. Plot the frequency response.
33
VI. OBSERVATIONS:
Sl.No Input frequency Output voltage Gain 20 log Vo/Vi
1. 100
2 200
3 500
4. 1kHz
5. 1.5KHz
6. 2.0kHz
7. 5kHz
VII. CALCULATIONS:
i. Choose a standard value of Capacitor C say 0.1 F.

1 1
Then R= =
2fC 2x1x10 x0.1x10 6
3
= 1.6k
RF
ii. Ao=1+ =1.58
R1
Rf=0.58R1
Choose a value of 10k for R1
Then Rf = 5.8k
VIII. GRAPH:
34
IX. RESULT:
The lower cutoff frequency of the high-pass filter = ------- KHz.

The pass band gain = -------
X. INFERENCE:
i. The working of active high pass filter is observed and the output is plotted.
ii. The frequency response of the high pass filter is plotted on a semi-log graph
paper.
iii. It is observed that the gain increases at the rate of 40dB per decade at the cut of
frequency.
XI. PRECAUTIONS:

XII. APPLICATIONS:
i. To remove low ripple.

ii. To generate sweep.
iii. To generate spike waveform.
XIII. EXTENSION:
i. Design the circuit for higher order and observe that the flat pass band and flat stop
band characteristics are observed.
ii. For higher order the gain becomes nearly constant and should be observed.
iii. Check the condition when a high pass filter will act as a differentiator.
i. Define Bessel, Butterworth and Chebyshev filters, and compare their response.
ii. What are the important parameters of a band pass filter?
iii. Define Notch filter.
iv. How do we get a notch filter from a band pass filter?
v. Define state variable filter.
vi. What is switched capacitor?
vii. Discuss the importance of switched capacitors.
viii. Give the circuit of a switched capacitor low pass filter
ix. Discuss the advantages of active filters
x. What is the roll-off rate of second order filter?
35
Experiment No. 04
RC PHASE SHIFT AND WIEN BRIDGE OSCILLATORS USING

IC741 OP-AMP.
(i) RC PHASE SHIFT OSCILLATOR
I. AIM:
To Design a RC Phase Shift Oscillator for the output frequency is 200 Hz.
(i). APPARATUS

2. Bread Board 1 No
3. Dual Channel Power Supply 1 No
Frequency counter
Curve Tracer
Power Supply
Function Generator
Digital Voltmeter
2. Bread Board : Wire Connections are usually carried out using a system called
4. Dual channel power supply: this power supply unit is specially developed
for laboratory use, where low ripple and noise and high voltage regulation is to be
36
iii. COMPONENTS:

3. 1M Resistor 1 No.
5. Operational Amplifier 1 No.

available for different applications. Typical specifications of 3.3k resistor are
Rating: 3.3k to 10k
Wattage: W to 2 W
2. 33k Resistor 1No.

Rating: 33k to 10M
Wattage: W to 2 W
3. 1M Resistor 1No.
available for different applications. Typical specifications of 1M resistor are
Rating: 1M to 10M
Wattage: W to 2 W

2) Working Voltage
3) Tolerances
1) Capacity 0.1 F
3) Tolerance 10%
37

III. THEORY:
The Phase Shift Oscillator consist of an operational amplifier as the amplifying

stage and three RC cascaded networks as the feed back circuits the amplifier will
provide 180 degrees phase shift. The feed back network will provide another
phase shift of 180 degrees.
V. PROCEDURE:
i. Construct the circuit as shown in the circuit diagram.

ii. Adjust the potentiometer Rf such that an output wave form is obtained.
iii. Calculate the output wave form frequency and peak to peak voltage.
iv. Compare the theoretical and practical values of the output waveform frequency.
VI. OBSERVATIONS:
The frequency of oscillation = ______
VII. CALCULATIONS:
i. The frequency of oscillation fo is given by

1 0.065
fo= =
2 6 RC RC
38
ii. The gain Av at the above frequency must be at least 29

R
i.e. F 29
R1
iii. fo = 200Hz
Let C = 0.1F Then
0.065
R= 3.25k (choose 3.3k)
200 X 10 7
To prevent the loading of the amplifier because of RC networks it is necessary

that
R110R Therefore R1=10R=33 k
Then RF = 29 (33 k) = 957 k (choose RF=1M)
VIII. GRAPH:
IX. RESULT:
The frequency of oscillation of the RC phase shift oscillator = --------Hz
X. INFERENCE:
i. The working of RC phase shift oscillator is observed and the output is plotted.
ii. The frequency response of the RC phase shift oscillator is plotted
iii. It is observed that the gain doesnt sustain beyond 5 KHz
XI. PRECAUTIONS:

39
XII. APPLICATIONS:
These are used in sine wave oscillators for audio frequencies
XIII. EXTENSION:
i. Design the circuit for different frequencies of oscillations.

ii. For higher frequencies the gain does not sustain and should be observed.
XIV REVIEW QUESTIONS
i. State the two conditions of oscillations

ii. Classify the oscillators
iii. What is the phase shift in case of the rc phase shift oscillator?
iv. Explain how to measure the phase difference of two signals
v. In phase shift oscillator what phase shift does the opamp provide?
vi. In what mode the opamp is used in the phase shift oscillator?
vii. What phase shift is provided by the feedback network?
viii. What is the minimum gain that the inverting opamp should have?
ix. For high frequencies which kind of opamp should be used?
x. what is the condition for so that the oscillations will not die out?
40
(ii) WEIN BRIDGE OSCILLATOR
I. AIM: To Design Wein Bridge Oscillator so that the output frequency is 965 Hz.
(i) APPARATUS

2. Bread Board 1 No
3. Dual Channel Power Supply 1 No
1.CRO: The 20 MHz dual channel oscilloscope 201 is a compact, low line and
Frequency counter
Curve Tracer
Power Supply
Function Generator
Digital Voltmeter
2. Bread Board: Wire Connections are usually carried out using a system called
interconnecting components such as registers, capacitors, diodes, and transistors
etc., for testing the circuit.
iii. COMPONENTS:

4. 0.05F Capacitor 1 No.
5. Operational Amplifier 1 No.
41

Rating: 12k to 20k
Wattage: W to 2 W

Rating: 50k to 10M
Wattage: W to 2 W
3. 3.3 k Resistor 1 No.

available for different applications. Typical specifications of 3.3.k resistor are
Rating: 3.3k to 6k
Wattage: W to 2 W

2) Working Voltage
3) Tolerances
1) Capacity 0.5 F
3) Tolerance 10%
42
III. THEORY:
In this oscillator the Wein Bridge Circuit is connected between the amplifier input
terminals and the output terminal. The bridge has a series RC network in one arm
and parallel RC network in the adjoining arm. In the remaining two arms of the
bridge resistors R1 and RF are connected. The total phase-shift around the circuit
is 0o when the bridge is balanced.
V. PROCEDURE:
i. Construct the circuit as shown in the circuit diagram.

ii. Adjust the potentiometer Rf such that an output wave form is obtained.
iii. Calculate the output wave form frequency and peak to peak voltage.
iv. Compare the theoretical and practical values of the output waveform frequency.
VI. OBSERVATIONS:
The frequency of oscillation = ______
VII. CALCULATIONS:
The frequency of oscillation fo is exactly the resonant frequency of the balanced

Wein Bridge and is given by fo = 1/ (2RC)
= 0.159 / RC
The gain required for sustained oscillations is given by Av= 3. i.e., Rf = 2R1
43
Let C = 0.05 F
Then fo = 1/ (2RC)
R = 1/ (2foC)
= 3.3 k
Now let R1 = 12 k
Then Rf= 2R1 = 24 k
Use Rf = 50 k potential meter.
VIII. GRAPH:
IX. RESULT:
The frequency of oscillation of the Wein Bridge oscillator =----------
X. INFERENCE:
i. The working of Wein Bridge oscillator is observed and the output is plotted.
ii. The frequency response of the Wein Bridge oscillator is plotted
iii. It is observed that the gain doesnt sustain beyond 5 KHz
XI. PRECAUTIONS:

XII. APPLICATIONS:
These are used in sine wave oscillators for audio frequencies

Generally they are used in the application of function generators.
XIII. EXTENSION:
i. Design the circuit for different frequencies of oscillations.

ii. For higher frequencies the gain does not sustain and should be observed.
44
i. State the two conditions of oscillations

ii. Classify the oscillators
iii. What is the phase shift in case of the phase shift oscillator?
iv. Explain how to measure the phase difference of two signals
v. In WEIN BRIDGE oscillator what phase shift does the opamp provide?
vi. In what mode the opamp is used in the wein bridge oscillator?
vii. What phase shift is provided by the feedback network?
viii. What is the minimum gain that the inverting opamp should have?
ix. For high frequencies which kind of opamp should be used?
x. What is the condition for so that the oscillations will not die out?
45
Experiment No. 05
IC 555 TIMER IN MONOSTABLE OPERATION

I. AIM: To design and test Monostable multi-vibrator using IC555 Timer.
(i). APPARATUS

2. CRO - 1 No.
Frequency counter
Curve Tracer
Power Supply
Function Generator
Digital Voltmeter
3. Wire connections are usually carried out using a system called Bread Board. It
is a rectangular array of holes with internal connections divided into a number of
nodes. This component divided into a number of modes. This component has a
provision on which any circuit can be constructed by interconnecting components
such as registers, capacitors, diodes, transistors etc., for testing the circuit.

46
iii. COMPONENTS:

3. 0.1 F Capacitor 1 No
5. IC555 - 1 No.
6. 1N4148 Diode 1 No.
1. 11.8k Resistor No.

Rating: 11.8k to 13k
Wattage: W to 2 W
2. 1k Resistor No.
Rating: 1k to 2k
Wattage: W to 2 W
3. 0.1 F Capacitor No.

2) Working Voltage
3) Tolerances

1) Capacity 0.1 F
3) Tolerance 10%
4. 0.01 F Capacitor No.

47
2) Working Voltage
3) Tolerances
1) Capacity 0.01 F
3) Tolerance 10%
5. IC555
The 555 timer is a highly stable device for generating accurate time delay or
oscillations. Signet Corporation first introduced this device as the SE555 / NE555
and it is available in two package styles, 8-pin circular style, TO-99 can or 8-pin
mini DIP package or as a 14-pin DIP.
6.Diode1N4148:
This is a silicon Pnjunction diode . this is a point contact diode. The maximum
reverse voltage possible is 30v. the maximum current possible is 20 mA.
III. THEORY:
The 555 timer can be used with supply voltage in the range of +5 v to +18 v and
can drive upto 200 mAmps. It is compatible with both TTL and CMOS logic
circuits because of the wide range of supply voltage the 555 timer is versatile and
easy to use in monostable multivibrator we will provide external triggering in
order to make the timer to switch over to high state (unstable). This is also called
as one-short multivibrator.
48
V. PROCEDURE:
i. Connect the circuit using the component values as per the design
ii. Set the square wave 2.5V peak and 1KHz trigger input on function generator
iii. Apply the trigger input at pin-2 through capacitor C1. Observe both trigger input
and the output of the multivibrator on CRO simultaneously and sketch the
waveforms
iv. Repeat the step 3 for trigger input of 2KHz frequency
VI. OBSERVATIONS:
TP = 1.1 R.C. = 1.3 m/sec

T = 1/ f = 1m/sec
VII. CALCULATIONS:
i. To produce a pulse of 1.3 m/sec duration:
TP = 1.3mSec
TP = 1.1 R.C.
Let C = 0.1 F
R = 11.8K
ii. To provide negative edge triggering a circuit of fig.2 is to be connected between

pin 2 and 8.
Design of Differentiator:
Let the trigger input frequency is 1KHz
i.e., T = 1/f = 1mSec
Assume 1 = R1 C1 = 0.01mSec
Let C = 0.01 F
Therefore R1 = 1.0 K
VIII. GRAPH:
IX. RESULT:
Tp = 1.1R.C. =
49
X. INFERENCE:
i. The working of 555 timer monostable multivibrator is observed and the output is
plotted.
XI. PRECAUTIONS:

ii. Check the diode connection between pin 2 and 8
iii. Check the connections between pin no.1 and pin no.5
XII. APPLICATIONS:
i. To construct missing pulse detector circuit

ii. To construct linear ramp generator circuit
iii. To construct Frequency divider circuit
XIII. EXTENSION:
i. Design the circuit so that it can provide pulse width modulation

ii. Check the output waveform at Pin no. 3
i. Explain the functional block diagram of a 555 timer

ii. Explain the function of reset
iii. What are the modes of operation of timer?
iv. What is the expression of time delay of a monostable multivibrator?
v. Discuss some applications of timer in monostable mode.
vi. Define duty cycle
vii. Give methods of obtaining symmetrical waveform.
viii. How is an monostable multivibrator connected into a pulse position modulator
ix. How Schmitt trigger circuit is constructed using 555 timer
x. Draw the pin diagram of 555 timer.
50
Experiment No. 06
SCHMITT TRIGGER CIRCUITS USING IC 741 & IC 555

(i) SCHMITT TRIGGER CIRCUITS USING IC 741
I. AIM
To design and verify a Schmitt trigger for VUT = 0.5V and VLT= -0.5V.
(i). APPARATUS

2. CRO - 1 No.
Frequency counter
Curve Tracer
Power Supply
Function Generator
Digital Voltmeter
51

The power on switch in pressed position will connect supply to the
instrument. The amplitude switch varies the amplitude of output waveforms from
20 mv to 20v (p-p). The function is a interlocked 3 station push button which
switches to select the desired waveform for output.
iii. COMPONENTS:

2. 1000 Resistor 1 No
3. IC 741 - 1 No.
1. 27k Resistor.
Rating: 27k to 37k
Wattage: W to 2 W
2. 1000 Resistor.
available for different applications. Typical specifications of 1000 resistor are
Rating: 900 to 1100
Wattage: W to 2 W
Tolerance: Normally 5% and above
III. THEORY:
If positive feedback is added to the comparator circuit, gain can be increased

greatly. Regenerative Comparator is also known as Schmitt Trigger .The input
voltage is applied to the ve input terminal and feedback voltage to the +ve input
terminal .The input voltage Vi triggers the output Vo every tome it exceeds certain
voltage levels. These voltage levels are called upper threshold (VUT ) and Lower
threshold voltage(VLT).The hysteresis width is the difference between VUT and
VLT.
52
V. MODEL GRAPH:
53
VI. PROCEDURE:
i. Connect the circuit as shown in figure.

ii. Apply +Vcc =+15V and Vcc = 15V to Pin 7 and 4 of 741IC
iii. Connect the o/p of the oscillator to CRO and observe the waveform
iv. Calculate upper trigger potential and Lower trigger potential.
v. Verify with theoretical value Vut =+Vsat (R2/R1+R2 ) and Vlt = Vsat (R2/R1+R2 ).
VII. CALCULATIONS
R2
VUT Vsat
R1 R2
R2
VLT (Vsat )
R1 R2
For 741, with supply voltages = + 15V, the saturation voltage + Vsat=+ 14V.
R2
So, 0.5V (14V )
R1 R2
Or, R1=27R2
Choose, R2=1K
So, R1=27k (take a 50 k pot)
VII. RESULT.
Square wave has been observed using Schmitt trigger .
VIII. INFERENCE:
i. The working of Schmitt Trigger is observed and the output is plotted.

ii. The upper and lower Threshold voltages are measured.
IX. PRECAUTIONS:

X. APPLICATIONS:
This can be used as frequency divider, pulse width modulator, burglar alarm, FSK
generator, ramp generator, pulse position modulator, waveform generator, etc.
54
(ii) SCHMITT TRIGGER USING 555
I. AIM: To construct and study of the Schmitt Trigger using IC 555 timer.
(i). APPARATUS

2. CRO - 1 No.

operates on a supply voltage of 230v, 1 amp, 50 Hz, single phase AC.
Frequency counter
Curve Tracer
Power Supply
Function Generator
Digital Voltmeter

selected from 0 to 20 volts peak to peak independently.The power on switch in
pressed position will connect supply to the instrument. The amplitude switch
varies the amplitude of output waveforms from 20 mv to 20v (p-p). The function
is a interlocked 3 station push button which switches to select the desired
waveform for output.
55
iii. COMPONENTS:
3. 10 nF Capacitor 1 No
4. 1nF Capacitor 1 No
5. IC555 - 1 No.
1. 1 k Resistor.
Rating: 1k to 3k
Wattage: W to 2 W
2. 100 k Resistor.
available for different applications. Typical specifications of are100k resistor
Rating: 100k to 10M
Wattage: W to 2 W
3. 10 nF Capacitor
2) Working Voltage
3) Tolerances
The Specifications of 10 nF capacitor are
1) Capacity 10 nF
3) Tolerance 10%
III. THEORY:
In Schmitt Trigger two internal comparators are tied together and externally
biased at VCC/2 through R1 & R2. Since the upper comparator will trip at (2/3)
VCC and lower comparator at (2/3) VCC the bias provided by R1 & R2 is
centered within these two thresholds.
Thus a sine wave of sufficient amplitude (>VCC/6 = 2/3 VCC VCC/2) to

exceed the reference levels causes the internal flip flop to alternately set and
reset providing a square wave output.
56
Fig (1)
V. PROCEDURE:
i. Connect the circuit as shown in fig (1).

ii. Switch ON the power supply to the trainer.
iii. Apply the input sine wave 5V (P-P) using function generator at 1KHZ frequency.
iv. Observe the output waveform at Pin No: 3.
v. Calculate the duty cycle using formula.
D = [ R2 / R1+R2]
= [100K / 100K + 100K]
= 50%
57
VI. INPUT AND OUTPUT WAVEFORMS:
Fig (2)
VII. RESULT.
Square wave has been observed using Schmitt trigger .
VIII. INFERENCE:
i. The working of Schmitt Trigger is observed and the output is plotted.

ii. The upper and lower Threshold voltages are measured.
IX. PRECAUTIONS:

ii. Check the continuity of the connecting wires.
X. APPLICATIONS:
This can be used as Square wave converter
58
XI. REVIEW QUESTIONS
1. Explain how a square wave is obtained at the output of timer when sine wave
input is given.
2. What type of waveform is obtained when a triangular or ramp waveforms are

applied to Schmitt trigger circuit?
3. Explain how upper trigger and lower trigger levels are obtained in the Schmitt
trigger circuit.
4. Why do we short pin 2 and pin 6 of IC 555 timer for Schmitt trigger operation.
5. Why do we connect pin 4 of 555 timer to Vcc.
6. What is the function of pull up resistor RL in the Schmitt trigger circuit?
7. Why do we call Schmitt trigger as square wave generator.
8. How do you vary the duty cycle of the output waveform?
9. Draw and explain the functional diagram of a 555 timer.
10. Explain the function of reset.
11. What are the modes of operation of a timer?
59
Experiment No. 07
IC 565 PLL APPLICATIONS
I. AIM:
i. To study the operation of NE565 PLL

ii. To use NE565 as a multiplier
(i).APPARATUS

2. CRO - 1 No.
Frequency counter
Curve Tracer
Power Supply
Function Generator
Digital Voltmeter

60
iii. COMPONENTS:
1. 0.001 F Capacitor 2 Nos
2. IC565 - 1 No.
1. 6.8k Resistor.
Rating: 6.8k to 8k
Wattage: W to 2 W
2. 0.1 F Capacitor
2) Working Voltage
3) Tolerances
1) Capacity 0.1 F
3) Tolerance 10%
3. 0.001 F Capacitor
2) Working Voltage
3) Tolerances
1) Capacity 0.001 F
3) Tolerance 10%
61
4. IC565
The IC565 phase locked loop is an important building block of linear systems
It is used to measure the phase difference between the input and output
frequencies. It is available in a 14-pin DIP package. And as an 10-pin metal can
package. The main specifications of 565PLL are
i. Operating frequency range = 0.001Hz to 500 kHz
ii. Operating voltage range = 6V to 12V
iii. Input Level= 10mV rms min. to 3V pp max
iv. Triangle wave amplitude = 2.4 VPP at 6V supply voltage
v. Square wave amplitude = 5.4 Vpp at 6V supply voltage
vi. Bandwidth adjustment range = < 1 to 60%
III. THEORY:
The 565 is available as a 14-pin DIP package. It is produced by signatic

corporation. The output frequency of the VCO can be rewritten as
0.25
fo Hz
RT CT
where RT and CTare the external resistor and capacitor connected to pin 8 and pin
9. A value between 2 k and 20 k is recommended for RT. The VCO free
running frequency is adjusted with RT and CT to be at the centre fo the input
frequency range.
62
V. PROCEDURE:
i. Connect the circuit using the component values as shown in the figure
ii. Measure the free running frequency of VCO at pin 4 with the input signal Vin set
= zero. Compare it with the calculated value = 0.25/ RTCT
iii. Now apply the input signal of 1Vpp square wave at a 1kHz to pin 2
iv. Connect 1 channel of the scope to pin 2 and display this signal on the scope
v. Gradually increase the input frequency till the PLL is locked to the input
frequency. This frequency f1gives the lower ends of the capture range. Go on
increase the input frequency, till PLL tracks the input signal, say to a frequency f2.
This frequency f2 gives the upper end of the lock range. If the input frequency is
increased further the loop will get unlocked.
vi. Now gradually decrease the input frequency till the PLL is again locked. This is
the frequency f3, the upper end of the capture range. Keep on decreasing the input
frequency until the loop is unlocked. This frequency f4 gives the lower end of the
lock range
7.8 fo
vii. The lock range fL = (f2 f4) compare it with the calculated value of
12
Also the capture range is fc = (f3 f1). Compare it with the calculated value of
capture range.
1/ 2
f L
f c
(2 )(3.6)(10 ) xC)
3
viii. To use PLL as a multiplie5r, make connections as showin in fig. The circuit uses a
4-bit binary counter 7490 used as a divide-by-5 circuit.
ix. Set the input signal at 1Vpp square wave at 500Hz

x.. Vary the VCO frequency by adjusting the 20K potentiometer till the PLL is
locked. Measure the output frequency
xi. Repeat step 9 and 10 for input frequency of 1kHz and 1.5kHz.
63
VI. OBSERVATIONS:
fo = __________
fL = __________
fC = __________
VII. CALCULATIONS:
fL = (f2 f4) = 7.8 fo

12
1/ 2
f L
fc = (f3 f1) =
(2 )(3.6)(10 ) xC)
3
VIII. GRAPH:
IX. RESULT:
fo = __________
fL = __________
fC = __________
64
X. INFERENCE:
i. The working of 565 PLL is observed and the output is plotted.

iv. The Lock range and Capture range of the PLL are calculated.
XI. PRECAUTIONS:

ii. Check the connection between pin 7 and 8
iii. Check the connections at the input.
XII. APPLICATIONS:
i. To construct missing frequency multiplier circuit

ii. To construct AM demodulator circuit
iii. To construct FSK demodulator circuit
XIII. EXTENSION:
i. Design the circuit so that it can provide frequency shift keying.

ii. Design the circuit so that it can provide FM demodulation.
i. List the basic building blocks of a PLL.

ii. Define capture range
iii. Define lock range
iv. Define pull in time
v. Which is greater capture range or lock range?
vi. What is the major difference between digital and analog PLLs
vii. List the applications of PLL,
viii. Explain about phase detector
ix. Explain about PLL based AM detector
x. Explain the operation of multiplier circuit.
65
Experiment No. 08
VOLTAGE REGULATOR IC 723, THREE TEMRINAL

VOLTAGE REGULATORS 7805, 7809, 7912
(i) VOLTAGE REGULATOR IC 723

I. AIM:
To study the operation of Voltage regulator IC 723, three temrinal voltage

regulators 7805, 7809, 7912
(i). APPARATUS

2. Digital Multimeter - 1 No.
3. Ammeter - 1 No.
operates on a supply voltage of 230v, 1 amp, 50 Hz, single phase AC.
2. Digital multimeter: This DMM has a 31\2 digit Liquid crystal display. DMM
is accurate, sensitive instrument. It has high resistance as voltmeter and low
resistance as ammeter. It is superior to moving coil ammeters and voltmeters.
DMM can read AC, DC voltages and currents in many ranges it can check Diode
polarities, read capacitors, read resistances and many more.
3.Ammeter:moving coil systems are usually manufactured for a full scale

deflection for 10 microamperes to 50 milli amperes.the size of the coil should
not exceed certain measures. Secondly self heating of the coil due to its power
dissipation should be low to avoid temperature effects. Thirdly the leads which are
usually the spiral pose mechanical limitations. The ammeter is connected in series
the voltage drop across the instrument should be low.
4. Bread Board : Wire connections are usually carried out using a system called
66

iii. COMPONENTS:
2. 33 Resistor 1 No.
3. 10k Resistor 1 No
6. 100 pF Capacitor 1 No
7. IC723
1. 1k Resistor 1No.
Rating: 1k to 10k
Wattage: W to 2 W
2. 33 Resistor 1No.
Rating: 33 to 100
Wattage: W to 2 W

Rating: 10k to 100k
Wattage: W to 2 W

Rating: 680 to 1k
Wattage: W to 2 W

Rating: 2.2k to 10k
Wattage: W to 2 W
67
6. 100 pF Capacitor 1 No.

2) Working Voltage
3) Tolerances
The Specifications of 100 pF capacitor are
1) Capacity 100 pF
3) Tolerance 10%
6. IC723
The IC723 is a general purpose regulator which can be adjusted over a wide range
of both +ve or ve regulated voltage. This is an 14-pin DIP package. . This IC is
inherently low current device but can be boosted to provide 5 amps or more
current by connecting external components. The limitation of 723 is that it has no
in-built thermal protection. It also has no short-circuit current limits. The IC723
has two sections. The first section consists of Zener Diode constant current source
and a reference amplifier. The other section of the IC consists of an error amplifier
series pass transistor and a current limit transistor. This is a 14-pin DIP package.
The main features of 723 include an input voltage of 40v max, output voltage is
adjustable from 2V to 37V, 150mA output current without external pass resistor,
can be used as either a linear or a switching regulator.
III. THEORY:
The three-terminal regulators have the following limitations

No short-circuit protection
Output voltage (+ve or ve) is fixed
These limitations have been overcome in 723 general purpose regulator. This IC is
inherently low current device but can be boosted to provide 5 amps or more
current by connecting external components. The limitation of 723 is that it has no
in-built thermal protection. It also has no short-circuit current limits. The IC723
has two sections. The first section consists of Zener Diode constant current source
and a reference amplifier. The other section of the IC consists of an error amplifier
series pass transistor and a current limit transistor. This is a 14-pin DIP package.
The main features of 723 include an input voltage of 40v max, output voltage is
adjustable from 2V to 37V, 150 mA output current without external pass resistor,
can be used as either a linear or a switching regulator.
68
V. PROCEDURE:
i. Connect the 723 regulator as shown in the circuit diagram
ii. Set Dc power supply voltage Vin to +10V measure and record Vref with respect to
ground. With load RL(10k pot) removed from the circuit (output open). Measure
the minimum and maximum output voltage by rotating the 1k pot through its
full range.
iii. Now adjust the 1k pot so that Vo is +5V dc. Measure the voltage between the
wiper arm of the 1 k pot and ground.
iv. Adjust the load RL (10 k) pot until the load current IL = 1 mA. Record VL.
Repeat for different values of load currents 5mA, 10mA, 15mA, 18mA. Calculate
the load regulation and compare with manufacturers specifications
v. Gradually increase the load current above 18mA, you will see that the load
voltage suddenly decreases when the load current is about 18 to 20 mA. Now the
voltage across RSC is enough to begin current limiting. Measure and record a few
values of load current and load voltage below and above the current limiting point.
Plot a graph of VL vs IL from the data obtained in steps 4 and 5
VI. OBSERVATIONS:
The load regulation = _____ %

The line regulation = ______%
69
VII. CALCULATIONS:
i. The load regulation can be calculated by using the below formulae %load
regulation = ( (Vfl Vnl) / (Vfl)) * 100
ii. The line regulation can be calculated by using the below formulae %line
regulation = ( Vo / Vi )
VIII. GRAPH:
IX. RESULT:
i. The % load regulation =

ii. The % line regulation =
X. INFERENCE:
i. The working of 723 regulator is observed and the output is plotted.

ii. The load regulation is calculated
iii. The line regulation is calculated
XI. PRECAUTIONS:

ii. Check the connections between pin no.2 and ground.
XII. APPLICATIONS:
i. To construct the current boosted low voltage regulator

ii. To achieve variable voltage regulation
70
XIII. EXTENSION:
i. Design the circuit so that it can provide 140mA output current

ii. Check the current fold back characteristic curve
iii. To construct current limit protection circuit.
XIV REVIEW QUESTIONS
i. What is the maximum input voltage that we can give to 723 regulator?
ii. What output voltage range we can obtain from 723 regulator?
iii. What is the output current in case of 723 regulator?
iv. What are the applications of 723 regulator?
v. Define line regulation
vi. Define load regulation
vii. Define ripple rejection
viii. Define long term stability
ix. What is the current limit protection?
x. What are the ideal values of load and line regulations?
71
(ii) THREE TERMINAL VOLTAGE REGULATORS

USING 7805, 7809, 7912
I. AIM:
To calculate the percentage line and load regulation of voltage regulator using IC
7805, IC 7809, IC7912.
i. APPARATUS:
1. IC 7805
2. IC 7809
3. IC 7912
4. Resistors
5. Voltmeters
6. Power Supply
7. Bread Board
III. THEORY:
78xx series are three terminal positive fixed voltage regulators. Thee are seven
output voltage options such as 5, 6, 8, 12, 15, 18 and 24V. In 78XX the last two
numbers indicate the output voltage. Thus 7805 represents a 5V generator. These
are also available in 79XX series of fixed output, negative are also available in
79XX which are complement to the 78XX series device. There are four
characteristics of three terminal IC regulators.
V0: The regulated output voltage is fixed at a value as specified by manufacture.

eg. 78XX has output voltage at 5, 6, 8, .. etc.
Vin 1Volt 2Volts : The unregulated output voltage must be at least 2V more
than the regulated output voltage.
I0 (Max): The load current may vary from 0 to rated maximum output current.
The IC is usually provided with a heat sink.
Thermal Shut down: The IC has a temperature sensor which turns off the IC
when it becomes too hot. The output current will drop and remain there until the
IC has cooled significantly.
Line Input Regulation : It is defined as percentage change in the output voltage

for a change in the input voltage
V VL1
% Lineregulation L 2 X 100
Vin 2 Vin1
72
Load Regulation : It is defined as the change in the output voltage for a change in
the output voltage for a change in load current and is also expressed in millivolts
or as a percentage of Vo.
VNL VFL
%Load regulation X 100
VFL
IV. CIRCUIT DIAGRAM
VOLTAGE REGULATOR USING 7805
V. OBSERVATION TABLE
Load Regulation Line Regulation

Sl No. RL IL VL Sl. No. Vin IL VL
V. VOLTAGE REGULATOR USING 7809

73
VOLTAGE REGULATOR USING 7912

VI. PROCEDURE:
1. Connect the circuit as per the circuit diagram

2. By keeping input voltage constant vary the load resistance from 100 to 1K
3. Note down load current and load voltage from ammeter and voltmeter
4. Calculate percentage load regulation using formula.
5. Now keep the load resistance constant and vary the input voltage Vin
6. Note down the load current and load voltage from the ammeter and voltmeter
7. Calculate percentage line regulation using the formula.
8. Repeat the above procedure for IC 7809, 7812
VII. RESULT:
For IC 7805
% Line regulation =
% Load regulation =
For IC 7809
% Line regulation =
% Load regulation =
For IC 7812
% Line regulation =
% Load Regulation =
74
VIII. INFERENCE:
i. The working of 78XX regulator is observed and the output is plotted.

ii. The load regulation is calculated
iii. The line regulation is calculated
IX. PRECAUTIONS:

ii. Check the continuity of the connecting wires.
X. APPLICATIONS:
i. Used as an fixed voltage regulator

ii. Used as an current source
XIII. EXTENSION:
It is possible to boost the output current of a three terminal regulator simply by

connecting an external pass transistor in parallel with the regulator.
i. What is the function of a voltage regulator?

ii. What is a voltage reference? Why is it needed?
iii. What voltage options are available in 78XX voltage regulators?
iv. Explain the protections used in 78XX.
v. Explain the important parameters listed in the data sheet of 78XX.
vi. Discuss the limitations of linear voltage regulators.
vii. Give the important parts of a series regulated power supply using discrete
components.
vii. Define line and load regulation.
viii. Mention the application of voltage regulator.
ix. List the types of voltage regulator.
x. List the different types of 3- terminal voltage regulator ICs?
xi. Draw and explain the internal block diagram of 3- terminal regulator IC.
xii. Why do we use capacitors at input and output terminal of a regulator?
xiii. Define dropout voltage of a regulator.
xiv. What is the difference between a +ve and a ve voltage regulator.
xv. Compare three terminal voltage regulator with 723 voltage regulator.
xvi. List the features of IC voltage regulators.
75
Part-2:
To Verify the Funcationality of the following 74 series TTL
ICs.
INTRODUCTION
GATES
1. AND GATE: This is a logical AND operation which yields an output logic 1 if
and only if all inputs are logic 1 and 0 in all the other cases. Is is represented by
the symbol . .Commercially available ICs are IC 74x11,IC 74x08,IC 74x21.
2. OR GATE: This is a logical OR operation which yields an output logic 1 if any

of the input is at logic 1 and 0 if non of the input is at logic 1 . It is represented
by the symbol + .Commercially available ICs are IC 74x32.
3. NOT GATE: This is logical inversion operation in Boolean logic since there are
only two levels, the result of NOT operation on logic level yields the output as
the other logic level. It is represented by a prime or a bar symbol. Commercially
available as IC 74x04,IC 74x14.
4. NAND GATE: This is the AND operation followed by NOT operation. It is

denoted as Z = (X.Y).It is possible to implement any Boolean function using this
gate alone. Hence it comes under the category of universal gate. Most of the
practical implementations use the NAND gates only. Commercially available as
IC74x00, IC74x03, IC 74x10, IC 74x20, IC 74x30.
5. NOR GATE: This is OR operation followed by NOT operation. It is denoted as

Z=(X+Y).It is possible to implement any Bolen function using this gate ,it also
comes under the category of universal gate..It is commercially available as IC
74x02, IC 74x27.
6. EX-OR GATE: This operation produces a high output whenever no two inputs
are at the same logic level. Commercially available as IC 74x86,IC 74x266.
BOOLEAN EXPRESSIONs:
AND OPERATION: C=AB.
OR OPERATION : D=A + B.
NAND OPERATION: E= C.
NOR OPERATION: F= D
EXOR OPERATION: G= AB + AB.
NOT OPERATION: H= A.
76
77
TRUTH TABLE:
A B C=A AND B D=A OR B E= C F=D H=A G= A XOR
B
0 0 0 0 1 1 1 0
0 1 0 1 1 0 1 1
1 0 0 1 1 0 0 1
1 1 1 1 0 0 0 0
Hardware Implementation:
Theory:
All digital circuits consists of either fundamental gates or universal gates. The signal in a
digital circuit will have either a "0" logic level or a "I" logic level. In a Transistor
Transistor Logic (TTL) family of gate logic "0" is equal to 0 - 1.5V and logic " 1 " is
equal to + 3.5V to + 5V and this is called as positive logic. If the logic "0" is equal to +
3.5V to 5V and logic " 1 " is equal to 0 to 1.5 V, then it is called as negative logic.
These two levels i.e. 0 & 1 are used as binary levels in digital circuits. A binary digit (0 or
1) is referred as a bit. Since a digital signal can have only one of the two possible levels
i.e. either 1 or 0 the binary number system can be used for analysis and design of Digital
System.
The basic fundamental logic gates available are:
a) 7400 Quad - 2 - input NAND gate

b) 7402 Quad - 2 - input NOR gate
c) 7404 Hex Inverter
d) 7408 Quad - 2 - input AND gate
e) 7432 Quad - 2 - input OR gate
f) 7486 Quad - 2 - input Ex-OR gate
78
79
80
81
82
Experiment 1
D-flip-flop(74LS74) and JK Master-Slave Flip-Flop(74LS73)
I. AIM: To verify the functionality of D-flip-flop (74LS74) and JK Master-Slave
Flip-Flop (74LS73) with Hardware.
(i).APPARATUS
1. Digital IC Trainer kit

2. IC 74LS74, IC 74LS73
3. Regulated Power Supply
4. Multimeter / Volt Meter
5. Connecting wires.
III. THEORY:
IC 7474
This device contains two independent positive-edge-triggered D flip-flops
with complementary outputs. The information on the D input is accepted by the
flip-flops on the positive going edge of the clock pulse. The triggering occurs at a
voltage level and is not directly related to the transition time of the rising edge of
the clock. The data on the D input may be changed while the clock is low or high
without affecting the outputs as long as the data setup and hold times are not
violated. A low logic level on the preset or clear inputs will set or reset the outputs
regardless of the logic levels of the other inputs.
IC 7473
This device contains two independent positive pulse triggered J-K flip-
flops with complementary outputs. The J and K data is processed by the flip-flops
after a complete clock pulse. While the clock is LOW the slave is isolated from
the master. On the positive transition of the clock, the data from the J and K inputs
is transferred to the master. While the clock is HIGH the J and K inputs are
disabled. On the negative transition of the clock, the data from the master is
transferred to the slave. The logic states of the J and K inputs must not be allowed
to change while the clock is HIGH. Data transfers to the outputs on the falling
edge of the clock pulse. A LOW logic level on the clear input will reset the
outputs regardless of the logic states of the other inputs.
83
Pin diagram of IC 74LS74(D Flip-Flop):
Truth table of IC 74LS74(D Flip-Flop)::
Note 1: This configuration is nonstable ; that is, it will not persist when either the preset
and/or clear inputs return to their inactive (high) level. Q0 = The output logic level of Q
before the indicated input conditions were established.
84
Pin diagram of IC 7473(Master-Slave J-K Flip-Flop):
Truth Table:
H = HIGH Logic Level

L = LOW Logic Level
X = Either LOW or HIGH Logic Level
Q0 = The output logic level before the indicated input conditions were
established.
Toggle = Each output changes to the complement of its previous level on
each HIGH level clock pulse.
Procedure:
2. Apply the inputs and verify the truth table of D-flip-flop.
3. Repeat the same for the master-slave JK flip-flop.
85
Tutorial:
1. Realize the D-flip-flop using J-K flip-flop
2. Realize the T-flip-flop from D-flip-flop
Conclusion: The Functionality of D-FlipFlop and master-slave JK flip-flop is verified

using ICs.
86
Experiment No.2
Decade counter and Up-Down counter

I. AIM: To verify the functionality of Decade counter (74LS90) and Up-Down
coutner (74LS192) with hardware
(i).APPARATUS

2. IC 74LS90,IC74LS193
4. Connecting wires
II. THEORY:
IC 7490
The 7490 integrated circuit counts the number of pulses arriving at its input.
The number of pulses counted (up to 9) appears in binary form on four pins of the
IC. When the tenth pulse arrives at the input, the binary output is reset to zero
(0000) and a single pulse appears at another output pin So for ten pulses in there
is one pulse out of this pin. The 7490 therefore divides the frequency of the input
by ten.
The 7490 monolithic counter contains four masterslave flip-flops and

additional gating to provide a divide-by two counter and a three-stage binary
counter for which the count cycle length is divide-by-five. The counter has a gated
zero reset and also has gated set to-nine inputs for use in BCD nines complement
applications. To use as decade counter, the B input is connected to the QA output.
The input count pulses are applied to input A and the outputs are as described in
the appropriate Function Table.
IC 74193
The 74LS193 is an UP/DOWN MODULO-16 Binary Counter. Separate
Count Up and Count Down Clocks are used and in either counting mode the
circuits operate synchronously. The outputs change state synchronous with the
LOW-to-HIGH transitions on the clock inputs.
Separate Terminal Count Up and Terminal Count Down outputs are
provided which are used as the clocks for subsequent stages without extra logic,
thus simplifying multistage counter designs. Individual preset inputs allow the
circuits to be used as programmable counters. Both the Parallel Load (PL) and the
Master Reset (MR) inputs asynchronously override the clocks.
87
Pin diagram of IC 7490(Decade Counter):
Note: To use as decade counter the B input is connected to the QA output. The input
count pulses are applied to input A, and pins 2,3,6 and 7 should be grounded.
Logic diagram of IC 7490(Decade Counter):
88
The J and K inputs shown without connection are for reference only and are functionally
at a HIGH level.
Truth table of IC7490(Decade Counter):
Procedure of IC7490(Decade Counter):

1. Apply the Vcc to pin 5 and GND to pin 10
2. Pin 12 should be connected to the pin 1.
3. Pin 2,3,6 and 7 should be grounded.
4. Apply clock input to the pin 14 and observe the output at
11, 8, 9 and 12 pins.
89
Pin diagram of IC74193( mod 16 up-down counter):
Procedure if IC 74193( mod 16 up-down counter)::
1. Connect the circuit as per the pin diagram..

2. Apply the inputs as shown in the mode table and observe the outputs for upcount,
down count and parallel load.
90
OBSERVATIONs : Verify the Truth table
TUTORIALS :
1. Design divide by 8 counter using 7490.
2. What is the difference between Synchronous & Asynchronous counter.
Conclusion:
The Functionality of 4-Bit Decade Counter is verified using IC 7490
The Functionality of Mod 16 up-down counter is verified using IC 74193
91
Experiment No. 3
UNIVERSAL SHIFT REGISTERS (7495)
I. AIM: To verify the functionality of Universal Shift registers 74LS95 with

hardware.
(i).APPARATUS
1. Digital IC Trainer kit with IC 7495

3. Connecting wires
III. THEORY:
.
The LS95B is a 4-Bit Shift Register with serial and parallel synchronous operating
modes. It has a Serial (DS) and four Parallel (P0P3) Data inputs and four Parallel Data
outputs (Q0Q3). The serial or parallel mode of operation is controlled by a Mode
Control input (PE) and two Clock Inputs (CP1) and (CP2). The serial (right-shift) or
parallel data transfers occur synchronous with the HIGH to LOW transition of the
selected clock input.
When the Mode Control input (PE) is HIGH, CP2 is enabled. A HIGH to LOW
transition on enabled CP2 transfers parallel data from the P0P3 inputs to the Q0Q3
outputs. When the Mode Control input (PE) is LOW, CP1 is enabled. A HIGH to LOW
transition on enabled CP1 transfers the data from Serial input (DS) to Q0 and shifts the
data in Q0 to Q1, Q1 to Q2, and Q2 to Q3 respectively (right-shift). A left-shift is
accomplished by externally connecting Q3 to P2, Q2 to P1, and Q1 to P0, and operating
the LS95B in the parallel mode (PE = HIGH).
For normal operation, PE should only change states when both Clock inputs are
LOW. However, changing PE from LOW to HIGH while CP2 is HIGH, or changing PE
from HIGH to LOW while CP1 is HIGH and CP2 is LOW will not cause any changes on
the register outputs.
92
Block diagram & Pin Configuration of 7495(shift register):
93
Mode table:
PE Ds Cp1 Cp2 operation Q0 Q1 Q2 Q3

1 X X Parallel load P0 P1 P2 P0
0 SI X Right shift SI Q0 Q1 Q2
1 SI X Left shift Q1 Q2 Q3 SI
(with external
connections)
External connections for left shift:
A left-shift is accomplished by externally connecting Q3 to P2, Q2 to P1, Q1 to P0, and

Ds to P3 and operating the 7495 in the parallel mode (PE =HIGH) .
PROCEDURE:
1. Connect the circuit as per the pin diagram.

2. Make the external connections for left shift as given above.
3. Apply the inputs as shown in the mode table and observe the outputs for parallel
load ,right shift and left shift.
OBSERVATION: Verify the truth table:
Conclusion: The Functionality of Shift register is verified by using IC 7495.
94
Experiment No.4
3-8 Decoder -74LS138
I. AIM: To verify the functionality of 3-8 Decoder -74LS138 with hardware

(i).APPARATUS

2. IC 74LS138
4. Connecting wires
III. THEORY:
A decoder is a multiple-input, multiple-output logic circuit that converts
coded inputs into coded outputs, where the input and output codes are different.
The 74x138 is a commercially available MSI 3 to 8 decoder. It has an 3-bit binary
input code and a 1-out-of-23 output code. The input code word A, B, C represents
an integer in the range 0 7, the output code word Y0, Y1, Y2, Y3, Y4, Y5, Y6,
Y7 which are active low outputs has Yi equal to 1 if and only if the input code
word is the binary representation of i and G1 = 1 , G2 A_L = 0, G2 B_L = 0,
where G1, G2A_L, G2B_L are three enable inputs. An output is asserted if and
only if the decoder is enabled and the output is selected.
PIN configuration:
95
Truth table
PROCEDURE:

2. Apply the inputs as shown in the truth table and observe the outputs.
OBSERVATIONS : Verify the Truth table
Conclusion: The Functionality of 3-to-8 decoder is verified using IC74138.
96
Experiment No. 5
4-BIT Comparator 74LS85
I. AIM: To verify the functionality of 4 bit comparator 74LS85 with hardware
(i) APPARATUS
1. Digital IC Trainer kit with IC 74LS85

3. Connecting wires
III. THEORY:
A single bit comparator circuit has 2 data inputs, three control inputs and there
compare outputs. The 3 control inputs provide a mechanism for generation of
multi bit comparators by cascading several bit comparators.
A 4 bit comparator consists of two 4 bit data inputs 3 control inputs, and 3
compare outputs. The functionality of these circuits is similar to that of the bit
comparator. The a>b output is 1 when data on the a input, treated as 4-bit positive
number is greater than the 4-bit positive on b or when data on a and b are w\equal
and the greater than input is 1. this statement uses a for loop with index I changing
from 1 to 2. the outputs are named a_gt_b, a_eq_b, a_lt_b, which are same as
primary outputs of a nibble comparator.
97
Truth table:
INPUT A INPUT B ALTBOUT AGTBOUT AEQBOUT

A3 A2 A1 A0 B3 B2 B1 B0
PROCEDURE:

2. Apply the inputs to A and B inputs and observe the outputs.
3. Verify the output with theoretical outputs.
Conclusion: The Functionality of 4-Bit Comparator is verified by IC 74LS85.
98
Experiment No.6
8 x 1 Multiplexer-74151 and 1X4 Demultiplexer - 74155

I. AIM: To verify the functionality of 8 x 1 Multiplexer-74151 and
2X4 Demultiplexer 74155 with hardware
APPARATUS

2. IC 74LS151, IC 74LS155
4. Connecting wires
III. THEORY:
IC 74151(MULTIPLEXER)
Multiplexing means transmitting a large number of information units over
a smaller number of channels or lines. A digital multiplexer is a combinational
circuit that selects binary information from one of many inputs lines and directs it
toa single output line. Normally there are 2^n input lines and n selection lines
whose bit combinations determine which input is selected. The selection depends
onset of selection lines. Also called as selector.
In 8to1 multiplexer, there are 3 select lines and 23 minterms by connecting
the function variables directly to select inputs, a multiplexer can be made toa
select and AND gate that corresponds to the minterms in the function.
The figure shows an 8-1 multiplexer. It has eight inputs. It provides two
outputs, one is active high, and the other is active low.
IC 74155 (2-to-4 LINE DEMULTIPLEXER)

Demultiplexer is a combinational circuit that accepts single input and
distributes it several outputs (Selectively distributes it to 1 of N output channels)
& Exhastly reverse of the multiplexer
Pin configuration of IC 74151:
99
8-GND, 16-VCC
Truth Table of IC 74151

Select i/p Output
EN_L C B A Y
1 X X X 0
0 0 0 0 D0
0 0 0 1 D1
0 0 1 0 D2
0 0 1 1 D3
0 1 0 0 D4
0 1 0 1 D5
0 1 1 0 D6
0 1 1 1 D7
Pin Diagram of IC 74155:
100
Logic Diagram of IC 74155:
101
Truth Table of IC 74155:
PROCEDURE:

2. Apply the inputs as shown in the truth table and observe the outputs.
Conclusion: The functionality of 8x1 multiplexer and 1x4 line demultiplexer is verified
by using ICs.
102
Experiment No.7
RAM 16 x 8 (Read and Write Operation)
I. AIM: To verify the functionality of RAM 16 x 8 (Read and Write Operation)

with hardware
APPARATUS

3. Connecting wires.
III. THEORY
Block Diagram:
103
TRUTH TABLE:
ME WE Operation Condition Outputs
L L Write Complement of data inputs
L H Read Complement of selected
word
H L In bit storage Complement of data inputs
H H Do nothing High
OBSERVATIONS: Verify the truth Table.
EXERCISE:
1. Write a VHDL code for Generic ROM.
Conclusion: The Functionality of 16x8 RAM(Read & Write operation) is verified by

using software simulation and Hardware.
104
EQUIPMENT REQUIRED FOR LABORATORIES:
1. 20MHz / 40MHz / 60MHz Oscilloscope
2. 1 MHz Funciton Generator (Sine, Squire, Triangular and TTL)
3. Regulted Powe Supply
4. Multimeter / Volt Meter
105

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3/1 ECE- IC Applications Lab Manual Auroras Engineering College

AURORAS ENGINEERING COLLEGE

3. After completion of the experiment, certification of the concerned staff in-charge

8. The components required pertaining to the experiment should be collected from

10. Any damage of the equipment or burnout of components will be viewed

13. Procedure sheets/data sheets provided to the students groups should be

S.NO. Name of the Experiment Page No.

PART (A)- To Verify the Following Functions

1 Adder, Subtrator, Comparator using IC 741 Op-Amp 8-18

2 Integrator and Differentiator using IC741 Op-Amp 19-25

5 IC 555 Timer in Monostable operation 46-50

6 Schmitt Trigger circuits using IC 741 & IC 555 51-59

7 IC 565 PLL applications 60-65

1 D Flip-Flop (74LS74) and JK Master-Slave Flip-Flop (74LS73) 82-83

2 Decade Counter (74LS90) and Up-Down Coutner (74LS192) 86-90

3 Universal Shift registers 74LS194/195 91-93

4 3-8 Decoder 74LS138 94-95

5 4 bit Magnitude Comparator 74LS85 96-97

6 8X1 Multiplexer 74151 and 1X4 Demultiplexer 98-101

7 RAM (16X4) 74189 (Read and Write Operations) 102-103

PART-1: IC APPLICATIONS LAB

Pin configuration, Parameters and Specifications of IC 741, IC 555, IC 565

2. Internal power dissipation

3. Differential input voltage ---------------- 30 V.

4. Operating temperature range

5. Input offset voltage ------------ 1.0 mV.

6. Input Bias current ------------ 80 nA.

7. PSSR -------------- 30 V/V.

8. Input resistance ------------- 2M.

9. CMMR -------------- 90.

10. Output resistance ---------- 75.

11. Bandwidth ----------- 1.0 MHz.

12. Slew rate ------------ 0.5 V/ sec.

1. Supply voltage ------------ 4.5 V to 18 V

2. Supply current ------------- 3mA

3. Output voltage (low) --------------- 0.1 V

5. Maximum operating frequency ------------ 500 KHz

6. Timing from sec to hours

Phase Locked Loop NE / SE 565

1. Maximum supply voltage : 26 V

2. Input Voltage : 3 V(P-P)

3. Power dissipation : 300Mw

4. Operating temperature : NE 565- 00 C to 700C (SE 565-55 to +1250 C

7. Output current- (sink) : 1 mA

APPLICATION OF OP-AMP AS ADDER

I. AIM: To design adder using op-amp.

II . EQUIPMENTS AND COMPONENTS:

ii. DESCRIPTION OF EQUIPMENT:

iv. DESCRIPTION OF COMPONENTS:

1. Connect the circuit as shown in figure.

5. Verify with theoretical value.

In the above circuit Op-Amp works as summing amplifier.

i. The working of summing amplifier is observed..

i. Check the circuit connections before switching on the power supply.

APPLICATION OF OPAMP AS SUBTRACTOR

I. AIM: To design subtractor using 741opamp.

II. EQUIPMENTS AND COMPONENTS: