8
The table below gives a subset of the assembly language instructions for a computer with a single
general-purpose register, the Accumulator (ACC), and an index register (IX).
Instruction
Explanation
Opcode
(mnemonic)
Operand
LDD
<address>
0000 0100
Direct addressing. Load the contents of the given
address to ACC
LDV
<number>
0000 0101
Load the given number to ACC
STO
<address>
0001 0000
Store the contents of ACC at the given address
LDI
<address>
0000 0110
Indirect addressing. At the given address is the
address to be used. Load the contents of this second
address to ACC
LDX
<address>
0000 0111
Indexed addressing. Form the address as <address>
+ the contents of IX. Copy the contents of this address
to ACC
INC
<register>
0000 0011
Add 1 to the contents of the register (ACC or IX)
OUTCH
1000 0001
Output to the monitor the character corresponding to
the ASCII character code in ACC
IN
1001 0000
Input a denary number from the keyboard and store in
ACC
1100 1000
Unconditional jump to the given address
1111 1111
End the program and return to the operating system
JMP
END
UCLES 2014
<address>
Opcode
(binary)
9691/31/O/N/14
9
The diagram shows a program loaded in main memory starting at location 100.
Locations 200 onwards contain data which are used by the program.
(a) (i)
The instruction at address 102 is fetched.
100
101
102
103
104
105
106
107
ACC
IX
Show the contents of the registers after execution.
Write on the diagram to explain.
[2]
LDI
OUTCH
LDD
INC
STO
JP
END
150
203
ACC
150
100
150
200
200
201
202
203
204
205
65
76
65
77
32
32
(ii) The instruction at address 100 is fetched.
ACC
IX
Show the contents of the registers after execution.
Write on the diagram to explain.
[3]
(b) The given table of instructions shows the binary number used for each instructions opcode.
All instructions in machine code are stored as a 16-bit pattern, with the opcode as the first 8
bits and the operand as the second 8 bits.
(i)
What is the maximum number of different instructions this processor could have?
.......................................................................................................................................[1]
(ii)
Consider the instruction:
0
Describe what this instruction does.
...........................................................................................................................................
.......................................................................................................................................[2]
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10
(iii)
Programmers prefer to write machine code instructions in hexadecimal.
Explain why.
...........................................................................................................................................
.......................................................................................................................................[1]
(iv)
What is the hexadecimal number for the instruction shown in part (b)(ii)?
...................................................
[1]
Show the machine code for the following instructions:
(v)
LDI 150
[2]
(vi)
LDV 15
[2]
(vii)
A programmer makes the statement:
For this instruction set, some of the instructions do not require an operand
Circle if this statement is true or false and explain with reference to the instructions given.
True / False
...........................................................................................................................................
...........................................................................................................................................
...........................................................................................................................................
.......................................................................................................................................[2]
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(c) Use the ASCII code table to trace the first four iterations of the given program.
ASCII code table (part)
Character
Decimal
Character
Decimal
Character
Decimal
<Space>
32
73
82
65
74
83
66
75
84
67
76
85
68
77
86
69
78
87
70
79
88
71
80
89
72
81
90
ACC
Location
150
OUTPUT
100
101
102
103
104
105
106
107
LDI
OUTCH
LDD
INC
STO
JP
END
150
150
ACC
150
100
150
200
200
201
202
203
204
205
65
76
65
77
32
32
[5]
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12
5
Most modern computers are designed using Von Neumann architecture.
(a) Describe what is meant by Von Neumann architecture.
...................................................................................................................................................
...................................................................................................................................................
...................................................................................................................................................
...............................................................................................................................................[2]
(b) The sequence of operations below shows the fetch stage of the fetch-execute cycle in register
transfer notation.
1.
2.
3.
4.
MAR [PC]
PC [PC] + 1
MDR [[MAR]]
CIR [MDR]
Note: [register] denotes the contents of the specified register.
Explain what is happening at the fetch stage.
1 ................................................................................................................................................
...................................................................................................................................................
...................................................................................................................................................
2 ................................................................................................................................................
...................................................................................................................................................
...................................................................................................................................................
3 ................................................................................................................................................
...................................................................................................................................................
...................................................................................................................................................
4 ................................................................................................................................................
...................................................................................................................................................
...............................................................................................................................................[4]
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13
(c) The address bus and data bus are used during the fetch-execute cycle.
(i)
Name another bus used in a typical microprocessor.
............................................................
(ii)
[1]
Name one signal carried by this bus.
...........................................................................................................................................
.......................................................................................................................................[1]
(d) Consider two assembly language instructions which were given in Question 4.
Instruction
Opcode
(mnemonic)
Explanation
Operand
LDV
<number>
Load the given number to ACC
LDD
<address>
Direct addressing. Load the contents of the given address to ACC
Consider the following two cases.
Case 1:
Following step 4 of the fetch stage, the instruction is decoded. The instruction is then executed
without further use of the address bus.
Case 2:
Following step 4 of the fetch stage, the instruction is decoded. Once decoded, the address
bus must be used again before the execution of the instruction can be completed.
For each instruction below, circle either Case 1 or Case 2 and explain your choice.
(i)
LDV 35
Case 1 / Case 2
Explanation .......................................................................................................................
...........................................................................................................................................
.......................................................................................................................................[2]
(ii)
LDD 35
Case 1 / Case 2
Explanation .......................................................................................................................
...........................................................................................................................................
.......................................................................................................................................[2]
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(a) (i) ACC = 77
Show contents of 203 copied to ACC
(ii) ACC = 65
Show 150 used as a forwarding address
Contents of 200 copied to ACC
1
1
[2]
1
1
1
[3]
(b) (i) 256 different instructions
[1]
(ii) Store the ACC contents
at address 65 // 01000001
1
1
[2]
(iii) Fewer digits to write // less chance of an error in writing the code // easy conversion
to/from binary code
[1]
(iv) 1041 hex
[1]
(v) LDI 150
0 0 0 0 0 1 1 0 1 0 0 1 0 1 1 0
Opcode
Operand
1
1
[2]
1
1
[2]
(vi) LDV 15
0
Opcode
Operand
(vii) True
OUTCH / IN // END or using a good explanation (only) of either
Cambridge International Examinations 2014
[2]
(c)
ACC
Location 150
65
OUTPUT
A
200
201
201
76
201
202
202
65
202
203
203
77
203
204
204
Mark as shown
5
(a) a single processor
program consists of a sequence of stored instructions
instructions + data make up a program
are stored in a continuous block of main memory
instructions are executed in sequence
(b) 1.
2.
3.
4.
[5]
1
1
1
1
[max 2]
The (contents of) the program counter/PC are copied to the Memory Address Register
The contents of the Program Counter are incremented
Identify the address in the Memory Address Register. Go to this address and copy its
contents to the Memory Data Register
The (contents of) the Memory Data Register are copied to the Current Instruction
Register
[4]
(c) (i) Control bus
[1]
(ii) read/write
interrupt
reset
clock signal
bus request/bus grant
[max 1]
(d) (i) Case 1
The operand number is already held in the CIR
1
1
(ii) Case 2
The instruction is for directed addressing
The address bus is loaded with address 35
1
1
[2]
[2]
10
4
The table below gives a subset of the assembly language instructions for a computer with a single
general purpose register, the Accumulator (ACC), and an index register (IX).
Instruction
Opcode
(mnemonic)
Operand
LDD
<address>
LDV
STO
Explanation
Opcode
(binary)
0000 0100
Direct addressing. Load the contents of the given
address to ACC
<number>
0000 0101
Load the given number to ACC
<address>
0001 0000
Store the contents of ACC at the given address
0000 0110
Indirect addressing. At the given address is the
address to be used. Load the contents of this
second address to ACC
0000 0111
Indexed addressing. Form the address as
<address> + the contents of IX. Copy the contents
of this address to ACC
0000 0011
Add 1 to the contents of the register (ACC or IX)
1000 0001
Output the character corresponding to the ASCII
character code in ACC to the monitor
1001 0000
Input a denary number from the keyboard and store
in ACC
1100 1000
Unconditional jump to the given address
1100 1001
Compare the contents of ACC with the given
number
1110 0111
If the result of the previous compare instruction was
a match, jump to the given address
LDI
<address>
LDX
<address>
INC
<register>
OUTCH
IN
JMP
<address>
CMP
<number>
JPE
<address>
(a) The given table of instructions shows the binary number used for each instruction's opcode.
All instructions in machine code are stored as a 16-bit pattern, with the opcode as the first
8 bits and the operand as the second 8 bits.
(i)
What is the maximum number of memory locations which can be directly addressed?
.......................................................................................................................................[1]
(ii)
Consider the instruction:
0
Describe what this instruction does.
...........................................................................................................................................
.......................................................................................................................................[2]
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(iii)
Programmers prefer to write machine code instructions in hexadecimal.
Explain why.
...........................................................................................................................................
.......................................................................................................................................[1]
(iv)
What is the hexadecimal number for the machine code instruction shown in part (b)(ii)?
............................................................
(v)
[1]
Show the 16-bit machine code for the following instruction:
JPE 204
[2]
(vi)
A programmer makes the statement:
For this instruction set, some of the instructions do not require an operand
Circle if this statement is true or false. Explain your choice with reference to the table of
instructions given.
True / False
...........................................................................................................................................
...........................................................................................................................................
...........................................................................................................................................
.......................................................................................................................................[2]
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12
(b) Use the ASCII code table to trace execution of the given program.
ASCII code table (part)
Character
Decimal
Character
Decimal
Character
Decimal
<Space>
32
73
82
65
74
83
66
75
84
67
76
85
68
77
86
69
78
87
70
79
88
71
80
89
72
81
90
ACC
Location
450
OUTPUT
300
301
302
303
304
305
306
307
308
LDI
CMP
JPE
OUTCH
LDD
INC
STO
JMP
END
450
32
308
450
ACC
450
300
450
500
500
501
502
503
504
65
74
65
90
32
[5]
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Page 6
4
(a) (i)
(ii)
Mark Scheme
Cambridge International A Level October/November 2014
Syllabus
9691
Paper
32
256
[1]
Load into the ACC
(The number) 193 // 11000001
[2]
(iii)
Fewer digits to write // less chance of an error in writing the code //
easy conversion to/from a binary code
[1]
(iv)
05C1 hex
[1]
(v)
JPE 204
1
Op code
Operand
(vi)
1
1
[2]
True
OUTCH // IN // END // or using a good explanation (only) of either
(b)
ACC
65
Address
450
[2]
OUTPUT
A
500
501
501
74
501
502
502
65
502
503
503
90
503
504
504
32
[5]
Cambridge International Examinations 2014
