10 Real-Time Clock Using 8253

Objectives
The aim of this LAB experiments is to interface the 8253 Programmable Interval Timer
(PIT) chip to our microcomputer system and program it to implement a real-time clock. 

10.1 Background
The 8253 is programmable interval timer/counter ; specifically designed for use with the
Intel microcomputer systems. The 8253 solves one of the most common problems in any
microcomputer system ; the generation of accurate time delays under software control. Instead of setting up timing loops in systems software, the programmer configures the 8253 to
match his requirements, initializes one of the counters of the 8253 with the desired quantity,
then upon command the 8253 will count out the delay and interrupt the CPU when it has
completed its tasks. It is easy to see that the software overhead is minimal and that multiple
delays can easily be maintained by assignment of priority levels.

10.1.1 Pin Configuration of the 8253

The pin configuration of the 8253 are shown in Figure 10.1. These pins are briefly described
in the next few paragraphs.
Bidirectional Data Bus (D7-0)
Three-state 8-bit bidirectional data bus used when writing control words and count values,
and reading count values upon reception of WR and RD signals from CPU.

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Real-Time Clock Using 8253

Chip Select(CS)
Data transfer with the CPU is enabled when this pin is at low level. When at high level,
the data bus (D0 through D7) is switched to high impedance state where neither writing
nor reading can be executed. Internal registers, however, remain unchanged.
Clock Input(CLK0-2)
Supply of three clock signals to the three counters incorporated in 8253.
Gate Input(GATE0-2)
Control of starting, interruption, and restarting of counting in the three respective counters
in accordance with the set control word contents.
Counter Output(OUT0-2)
Output of counter output waveform in accordance with the set mode and count value.

Figure 10.1 The pin configuration of the 8253.

10.1.2 Block Diagram of the 8253

The block diagram of the 8253 is shown in Figure 10.2. The function blocks are briefly
described in the next few paragraphs.
Data Bus Buffer
The 3-state, bi-directional, 8-bit buffer is used to interface the 8253 to the system data
bus. Data is transmitted or received by the buffer upon execution of IN or OUT CPU
instructions. The Data Bus Buffer has three basic functions : (1) programming the modes
of the 8253, (2) loading the count registers, and (3) reading the count values.
Read/Write Logic
The Read/Write Logic accepts inputs from the system bus and in turn generates control
signals foroverall device operation. It is enabled or disabled by CS so that no operation can
occur to change the function unless the device has been selected by the system logic.

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10.1 Background

Control Word Register

The Control Word Register is selected when A0 A1 = 11. It then accepts information from
the data bus buffer and stores it in a register. The information stored in this register controls
the operation mode of each counter, selection of binary or BCD counting and the loading of
each count register. The Control Word Register can only be written into ; no read operation
of its contents is available.
Counter 0-2
These three functional blocks are identical in operation so only a single counter will be
described. Each Counter consists of a single, 16-bit, pre-settable, down counter. The counter
can operate in either binary or BCD and its input, gate and output are configured by the
selection of modes stored in the Control Word Register. The counters are fully independent
and each can have separate mode configuration and counting operation, binary or BCD.
Also, there are special features in the control word that handle the loading of the count
value so that software overhead can be minimized for these functions. The reading of the
contents of each counter is available to the programmer with simple read operations for
event counting applications and special commands and logic are included in the 8253 so
that the contents of each counter can be read "on the fly" without having to inhibit the
clock input.

Figure 10.2 The block diagram of the 8253.

10.1.3 System Interface of the 8253

The 8253 is a component of the Intel microcomputer systems and interfaces in the same
manner as all other peripherals of the family (See Figure 10.3). It is treated by the systems
software as an array of peripheral I/O ports ; three are counters and the fourth is a control
register for MODE programming. Basically, the select inputs A0 , A1 connect to the A1 , A2
address bus signals of the CPU. The CS can be derived directly from the address bus using
a linear select method. Or it can be connected to the output of a decoder.

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Real-Time Clock Using 8253

Figure 10.3 The system interface of the 8253.

10.1.4 Programming the 8253

The complete functional definition of the 8253 is programmed by the systems software. A
set of control words must be sent out by the CPU to initialize each counter of the 8253
with the desired mode and quantity information. Prior to initialization, the mode, count
and output of all counters is undefined. These control words program the mode, loading
sequence and selection of binary or BCD counting. Once programmed, the 8253 is ready to
perform whatever timing tasks it is assigned to accomplish.
All of the modes for each counter are programmed by the systems software by simple
I/O operations. Each counter of the 8253 is individually programmed by writing a control
word into the Control Word Register (A1 A0 = 11). A program intending to use the 8253
must provide the following sequence of actions : (1) setting the control word, and (2) setting
the count value.
The format of the Control Word is shown in Figure 10.4. The details of this format is
described below :
Select Counter (SC1-SC0) : Select the desired counter.
Read/Load(RL1-RL0) : Set the reading/loading format of the initial count value.
Modes (M2-M0 ) : Specify the operation mode of the 8253.
Count Mode (BCD) : Specify the operation count mode BCD/binary.

10.1.5 Interfacing the 8253 to the 8086 Microcomputer System

In this part of the experiment, we will interface an 8253 chip to the even byte (D7 -D0 ) of our
8086 microcomputer system designed in the previous experiments. Assuming that the 8253
will be interfaced to the 8086 system starting from address 08H, we derive the I/O address
mapping shown in Figure 10.5. Then, we interface the 8253 to the 8086 microcomputer
system as shown in Figure 10.6.

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10.1 Background

D7
D6
S C 1
S C 0
S e le c t C o u n te r
S C 1
0
0
1
1

S C 0
0
1
0
1

R L 1
0
0
1
1

R L 0
0
1
0
1

M 2
0
0
X
X
1
1

M 1
0
0
1
1
0
0

D5
D4
R L 1
R L 0
R e a d /L o a d

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F u n c tio n
B in a r y C o u n t (1 6 -b it B in a r y )
B C D ( 4 - d e c a d e B C D)

Figure 10.4 Programming the 8253.

Device

1 5

1 4

1 3

1 2

1 1

8 2 5 5 A

0
0

0
0

0
0

0
0

1
1

1
0

0
0

0
1

0
0

IC W
IC W

0 4 H

C o u n t er 1

0 A H

C o n tr o l

0 E H

C o u n t er 2

1
0

0 2 H
0 6 H

0 0 H

C o n tr o l

C o u n t er 0
0

P o r t
A d d r es s

0
1

0
0

0
0

0
0

0
1

1
0

0
0

0
0

0
0

0
0

0
0

0
0

0
0

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0

0
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P o r t
N a m e

1 0

8 2 5 3
8 2 5 9 A

A d d r es s L in es

0 8 H

0 C H

1 , O C W 2 -3
2 -4 , O C W

1 0 H
1 2 H

Figure 10.5 The I/O mapping of the 8255A, 8253 and 8259A peripherals.

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Real-Time Clock Using 8253

Figure 10.6 The 8253 interface.

10.1.6 Real Time Clock

In this experiment, we will interface and program the 8253 chip to implement a real-time
clock that display current time in hours, minutes and seconds on 7-segment displays. To
accomplish this task follow the procedure desbribed below :
1. Interface six BCD-to-seven-segment decoders (74LS248) and six 7-segment displays
to the ports of the 8255A to display current time in hours (Port A), minutes (Port B)
and seconds (Port C ) as shown in Figures 10.7 and 10.8.
2. Program the 8255A chip to operate in Mode 0 with three output ports (Port A, Port
B and Port C ). This can be done by outputting 80H to the Control Port at address
06H.
3. Connect the output of Counter 0 (OUT0) to the NMI input of the 8086 microprocessor
as shown in Figure 10.9. This will allow Counter 0 to interrupt the microprocessor on
regular intervals to update the time. The duration of these intervals depends on the
frequency applied to the CLK input of Counter 0 (a possible value is the frequency of
PCLK output of the 8284 clock generator which equals to 2.5M Hz).
4. Program Counter 0 of the 8253 needs to as a 16-bit binary counter in Mode 2 by
outputting 34H to the Control Port at address 0CH.
5. Write an interrupt service routine (ISR) that updates and displays the current time
whenever a NMI is triggered (i.e., whenever the value of Counter 0 reaches 0).

10.2 Required Components

1. Programmable Interval Timer (8253).
2. Quad 2-Input Positive-OR Gates (74LS32).
3. BCD-To-Seven-Segment Decoders/Drivers (74LS248).

10.2 Required Components

Figure 10.7 Modified 8255A interface.

Figure 10.8 Real-time clock interface.

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Real-Time Clock Using 8253

Figure 10.9 Interfacing the output of Counter 0 to the NMI input of the 8086
microprocessor.

4. Red 7-Segment Common Cathode (7SEG-COM-CATHODE).

5. Digital Clock Generator (DCLOCK).
6. Digital Edge Generator (DPULSE)
7. Power and Ground Terminals.

10.3 Schematic Entry

To interface a real-time clock to the 8086 miccrocomputer system, follow the procedure
described below :
1. Open the 8086 microcomputer project file created in LAB 5.
2. Get the required circuit components from the Library.
3. Create a new design sheet and name it "8253 PIT".
4. Create a new design sheet and name it "Real Time Clock".
5. Place the required circuit components on the "8253 PIT" and "Real Time Clock "
sheets.
6. Connect the circuit components of the 8253 according to Figure 10.6.
7. Set the properties of the DCLOCK connected to the CLK0 pin of the 8253 according
to Figure 10.10.
8. Set the properties of the DPULSE connected to the GATE0 pin of the 8253 according
to Figure 10.11.
9. Connect the circuit components of the 7-segment display according to Figure 10.8
10. Modify the 8255A schematic according to Figure 10.7.
11. Modify the 8086 schematic according to Figure 10.9.

10.3 Schematic Entry

Figure 10.10 Properties of the DCLOCK connected to the CLK0 pin of the
8253.

Figure 10.11 Properties of the DPULSE connected to the GATE0 pin of the
8253.

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Real-Time Clock Using 8253

10.4 Testing the Design

In this part of the experiment, we will test the 8253 interface using an assembly code that
displays the time (hours, minutes and seconds) on 7-segment displays. The testing procedure
involves the following steps :
1. Write an assembly code (see Program 10.1) to do the following :
(a) Program the 8255A to operate in Mode 0 with three output ports (A, B and C )
(b) Program Counter 0 of the 8253 as a 16-bit binary counter in Mode 2.
(c) Maintain an interrupt service routine (ISR) which is triggered by the NMI input
to update the current time whenever Counter 0 overflow.
2. Compile and link the assembly code to generate the executable file.
3. Load the executable file into the internal memory of the 8086 simulation model.
4. Run the simulation.
Program 10.1 Testing Real-Time Clock
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; Assembly code to do the following:

; (1) Program the 8255A to operate in Mode 0 with three output ports.
; (2) Program Counter 0 of the 8253 as a 16-bit binary counter in Mode2.
; (3) Maintain an ISR which is triggered by the NMI input to update the
;
current time whenever Counter 0 overflow.
.MODEL SMALL
.8086
.DATA
sec
DB
55h
min
DB
58h
hrs
DB
23h
cnt
DB
0
.STACK
200h
.CODE
.STARTUP
main PROC
; Set data segment
MOV AX, @DATA
MOV DS, AX
; Set the ISR (NMI) address table
MOV AX, 0
MOV ES, AX
MOV AX, nmisr
MOV ES:[8], AX
MOV BX, CS
MOV ES:[10], BX
; 8253A (Counter 0, Read/Load LSB-MSB, Mode 2, Binary)
MOV AL, 34h
OUT 0Eh, AL
; Load Counter 0 with value 50,000 (C350h)
; Assuming F(CLK0)=2.5MHz, the counter overflows every 1/50s
MOV AL, 50h
OUT 08h, al
MOV AL, 0C3h
OUT 08h, AL

10.4 Testing the Design

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; 8255A (Mode 0, 3 Output Ports)

MOV AL, 80h
OUT 06h, AL
; Display real time clock
MOV AL, hrs
OUT 00h, AL
MOV AL, min
OUT 02h, AL
MOV AL, sec
OUT 04h, AL
JMP next

next:
main ENDP
nmisr PROC FAR
CMP cnt, 49
JAE inc_sec
INC cnt
JMP done
inc_sec:
MOV cnt, 0
CMP sec, 59h
JAE inc_min
MOV AL, sec
ADD AL, 01h
DAA
MOV sec, AL
OUT 04h, AL
JMP done
inc_min:
MOV sec, 00h
MOV AL, 00h
OUT 04h, AL
CMP min, 59h
JAE inc_hrs
MOV AL, min
ADD AL, 01h
DAA
MOV min, AL
OUT 02h, AL
JMP done
inc_hrs:
MOV min, 00h
MOV AL, 00h
OTU 02h, AL
CMP hrs, 23h
JAE inc_dys
MOV AL, hrs
ADD AL, 01h
DAA
MOV hrs, AL
OUT 00h, AL
JMP done
inc_dys:
MOV hrs, 00h
OUT 00h, AL
done:
IRET
nmisr ENDP
.EXIT
END

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