PSO Algorithm With Self Tuned Parameter For Efficient Routing in VLSI Design
PSO Algorithm With Self Tuned Parameter For Efficient Routing in VLSI Design
PSO Algorithm With Self Tuned Parameter For Efficient Routing in VLSI Design
Subhrapratim Nath
I. INTRODUCTION
Advancement in IC process technology in nano-meter
regime leads to the fabrication of billions of transistors in a
single chip. The number of transistors per die will still grow
drastically in near future, which increases complexity and
thereby imposes enormous challenges in VLSI for physical
layer design, especially in routing. In order to handle this
complexity, global routing followed by detailed routing is
adopted. The primary objectives of global routing in wire
length reduction, is becoming very crucial in modern chip
design. The only way to minimize the length of interconnects
in VLSI physical layer design technology is to address the
problem of Rectilinear Steiner Minimal Tree [1]. To solve this
NP complete problem, meta-heuristic algorithms [2] like
particle swarm optimization is adopted. It is a robust
optimization technique, introduced in 1995 by Eberhert and
Kenedy [3]. The PSO approach in VLSI routing is first
implemented by the authors Dong et al. at 2009. Various
improvements over original PSO algorithm have been made to
make this algorithm more efficient. The introduction of linearly
Preprocess Block
The search space for the problem is defined for a
fixed dimension.
Within the search space the user defined terminal
node in form of coordinates are represented as 1 to
form the required matrix.
The weight of the path between the nodes, including
the Steiner nodes, is calculated to form the objective
functions for n-particles.
Cost of each objective function is calculated by
Prims algorithm.
Minimal cost along with the corresponding objective
function is identified amongst these results.
PSO Block
Initialization for First Iteration
Minimum gbest
Value
Mean gbest
Value
EXPERIMENT NO. 1
308
319.81
295
307.5
EXPERIMENT NO. 2
248
264.67
224
253.2
10
COORDINATE SET 1
X
09
17
31
20
40
49
56
72
88
93
53
01
38
89
67
95
70
29
63
100
COORDINATE SET 2
X
84
93
60
76
64
17
95
54
21
29
15
67
48
89
79
62
38
35
57
81
EXPERIMENT NO. 3
PSO with c1=c2=2
219
223.31
205
218.7
The comparison of the performances of existing PSO and selftuned PSO algorithm are shown in the bar charts. As our
proposed algorithm generates lower global best value as shown
in figure 1, it implies that the cost of the Rectilinear Steiner
Minimal Tree (RSMT), constructed by interconnecting the
terminal nodes, has been reduced. The mean value of the
global best parameter i.e. average of the minimum cost has also
been improved as shown in figure 2. So this algorithm can
effectively handle the RSMT problem of graphs and thereby
reduce the interconnect length to a great extent.
COORDINATE SET 3
44
42
97
61
89
91
80
69
31
56
350
63
99
36
25
68
51
28
58
82
94
300
308
295
248
250
224
219
205
200
150
Exp. No. 1
PSO with c1 = c2 = 2
Exp. No. 2
Exp. No. 3
350
330
310
REFERENCES
319.81
307.5
290
264.67
270
253.2
250
223.31 218.7
230
210
190
170
150
Exp. No. 1
PSO with c1 = c2 = 2
Exp. No. 2
Exp. No. 3
V. CONCLUSION
Wire length minimization in VLSI technology can be
achieved through global routing optimization using PSO
algorithm. In our proposed algorithm a modification is
incorporated to the existing PSO algorithm. The technique used
here is to modify the acceleration coefficients in such a way
that it can tune itself over the iteration process throughout the
experiment. The experimental results exhibits a clear difference
in the performance of the modified version from the existing
one. It is seen that the convergence rate is high and also it can
be applied for a large search space and having still good result
which clearly establish the robustness and stability of the
optimization algorithm. Therefore this algorithm can
effectively be used in global routing optimization in VLSI
physical layer design. The further scope of the work can be
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