[go: up one dir, main page]

100% found this document useful (1 vote)
8K views4 pages

Full Subtractor

This document describes building a 4-bit ripple-borrow subtractor using 1-bit full subtractors. It begins by explaining binary subtraction with an example. It then introduces the 1-bit full subtractor circuit, providing its truth table. The document describes how full subtractors can be connected to implement an n-bit ripple-borrow subtractor. The lab procedure has students derive the full subtractor logic, implement and test a 4-bit ripple-borrow subtractor in Verilog, and map it to a FPGA board. Skeletal code is provided to help get started.

Uploaded by

dallabrag
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
100% found this document useful (1 vote)
8K views4 pages

Full Subtractor

This document describes building a 4-bit ripple-borrow subtractor using 1-bit full subtractors. It begins by explaining binary subtraction with an example. It then introduces the 1-bit full subtractor circuit, providing its truth table. The document describes how full subtractors can be connected to implement an n-bit ripple-borrow subtractor. The lab procedure has students derive the full subtractor logic, implement and test a 4-bit ripple-borrow subtractor in Verilog, and map it to a FPGA board. Skeletal code is provided to help get started.

Uploaded by

dallabrag
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 4

Lab 2: Subtractors

Consider subtracting two 4-bit binary numbers, A - B or 1010 – 0111, as shown in Figure 1(a). We first
start by considering the right-most column (first column). A is less than B (0 < 1), thus we must borrow
from the second column resulting in 10 – 1 = 1 (in base 10, two minus one equals one). In the second
column, A = 0 because of the aforementioned borrow. Thus we must borrow from the third column, which
intern must borrow from the fourth column. Again, once we have borrowed, the second column results in
10 – 1 = 1. In the third column, A = 01, resulting from the borrow operation generated by the second
column. The third column results in 01 – 1 = 0. Lastly in the fourth column, A = 0 resulting in 0 – 0 = 0.

Figure 1: An example of (a) 4-bit binary subtraction, a (b) 1-bit full subtractor that can implement n-
bit subtraction and the (c) corresponding partial truth table for the full subtractor.

First Column Second Column


0 0 01 10 Win A B Diff Wout

1 0 1 10 1 10 1 0 0 0 0
A B
- 0 1 1 1 - 0 1 1 1 0 0 1 1 1
1 1 1 0 1 0
Wout FS Win 0 1 1
Third Column Fourth Column 1 0 0
0 01 0 1 0 1 0 1
Diff 1 1 0 0 0
1 0 1 0 1 0 1 0
- 0 1 1 1 - 0 1 1 1 1 1 1 1 1
0 1 1 0 0 1 1

(a) (b) (c)

As with adders, N-bit subtractors implemented in two-level logic yield exponential growth. Thus to
implement a 4-bit subtractor we can break the operation down considering each column as a 1-bit
subtraction operation, mimicking how we perform subtraction by hand. In this lab, you will build a special
type of circuit called a full subtractor, as shown in Figure 1(b). The subtractor has 3 inputs: A, B, Win, and 2
outputs: Diff and Wout. A and B are the binary inputs we intend to subtract, Diff is the resulting binary
output. In the case where B > A, we are required to borrow from previous columns, thus Wout= 1 indicating
the borrow operation. In case when latter columns requires a borrow operation, Win is set to 1.

Figure 1(c) provides a partial truth table, describing the behavior of the full subtractor circuit. Similar to
addition, where a full adder can be connected together to create a ripple-carry adder, full subtractors can be
connected together to implement a ripple-borrow subtractor. A 4-bit ripple-borrow subtractor is illustrated
in Figure 2.

X3 Y3 X2 Y2 X1 Y1 X0 Y0

Wo FS FS FS FS Wi

D3 D2 D1 D0

Figure 2: 4-bit Ripple-borrow subtractor using 1-bit full subtractors.


Lab Procedure:
1. Fill in the rest of the truth table describing the behavior of a full subtractor.
2. Using K-maps, derive optimized functions for Diff and Wout.
3. Implement the full subtractor behaviorally, following the specifications provided in Figure 1.
4. Test your design exhaustively, using a testbench to simulate all possible input combinations.

5. Using the full subtractors, implement a 4-bit ripple-borrow subtractor structurally.


6. Test your design thoroughly, using a testbench, to simulate various input combinations. You do not
need to exhaustively test your design, however you should ensure enough cases have been considered
to be confident that your design works properly.
7. Download your ripple-borrow subtractor to the Spartan-3E Starter board. Test your design.

Demo:
You must demo the following aspects to the TA:
1. Verilog code and simulation waveforms for the full subtractor.
2. Verilog code and simulation waveforms for the ripple-borrow subtractor.
3. Synthesis of the ripple-borrow subtractor to Spartan 3E Starter Board demonstrating correct
functionality for various input combinations.

Lab Report
In addition to the standard lab report format, you must submit the following information:
1. Truth table and K-map for the full subtractor circuit.
2. Verilog code, testbench, and simulation waveforms for the full subtractor.
3. Verilog code, testbench, and simulation waveforms for the ripple-borrow subtractor

Mapping your decoder to the Spartan 3E Starter Board


In order to download your decoder to the Spartan board we must map the input and output signals of our
ripple-borrow subtractor to components found on the Spartan 3E Starter Board. For this project we will
map our input signal X3…0 to the slide switches, Y3…0 to the push-buttons, and Win to the rotary push-button.
The output signal D3..0 and Wout to the LEDs. You will need to specify your .ucf file as follows:

NET "D[3]" LOC = "F9";


NET "D[2]" LOC = "E9";
NET "D[1]" LOC = "D11";
NET "D[0]" LOC = "C11";

NET "Wo" LOC = "F12";


NET "Wi" LOC = "V16" | PULLDOWN ;

NET "X[3]" LOC = "N17";


NET "X[2]" LOC = "H18";
NET "X[1]" LOC = "L14";
NET "X[0]" LOC = "L13";

NET "Y[3]" LOC = "V4" | PULLDOWN ;


NET "Y[2]" LOC = "D18" | PULLDOWN ;
NET "Y[1]" LOC = "K17" | PULLDOWN ;
NET "Y[0]" LOC = "H13" | PULLDOWN ;
This .ucf file will map your inputs and output to the board as follows:
Y[3] Wi

Y[2] Y[0]

Y[1]

A push-button pressed indicates an input value of 1, a push-button not pressed indicates a input value of 0.
In addition to the four smaller push buttons (labeled Y[3] to Y[0]), the central knob (labeled Wi) is a
rotary push-button and can also be pressed/not pressed to indicate a 1 or 0 input value.

D[3] D[1]
D[2] D[0] Wo

X[3] X[2] X[1] X[0]


The slide switch in the high position indicates an input value of 1, the slide switch in the low position
indicates an input value of 0.

An illuminated LED indicates the output is 1, where a LED that is not illuminated indicates an output of 0.
Skeletal Code
Provided below is skeletal code to help you get started in designing your full subtractor and ripple-carry
subtractor. The .ucf file requires certain naming conventions to map inputs/output to the proper board
controls. You can change the module names, but the port names and declarations should remain the same.

// subtractor.v
// Sample interfaces for 1-bit full subtractor and 4-bit
// ripple-borrow subtractor

`timescale 1ns / 1ps

// -----------------------------------------------------
// 1-bit full subtractor
// -----------------------------------------------------
module fs(Win, A, B, Diff, Wout);
input Win, A, B;
output Diff, Wout;
reg Diff, Wout;

// define behavior of full subtractor

endmodule

// -----------------------------------------------------
// 4-bit ripple-borrow using full subtractors
// -----------------------------------------------------
module ripple_borrow4(Wi, X, Y, D, Wo);
input [3:0] X, Y;
input Wi;
output [3:0] D;
output Wo;

// instantiate full subtractors and


// specify interconnections

endmodule

You might also like