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Digital Systems - 1: Pere Pal' A - Alexis L Opez

Priority rules: Highest priority first Traffic light controller I Define a bus: one-hot encoding (red, yellow, green) alternative 7 segment decoder I Less typing: with. Select.

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52 views6 pages

Digital Systems - 1: Pere Pal' A - Alexis L Opez

Priority rules: Highest priority first Traffic light controller I Define a bus: one-hot encoding (red, yellow, green) alternative 7 segment decoder I Less typing: with. Select.

Uploaded by

ingjojeda
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Digital Systems - 1

Pere Pal`a - Alexis L


opez
iTIC http://itic.cat

January 2015

Boolean functions
I

f (A, B, C ) = A B + A C

library ieee ;
use ieee . std_log ic_1164 . all ;
entity b o o l e a n _f u n c t i o n is
port ( A , B , C : in std_logic ;
f
: out std_logic );
end b o ol e a n _ f u n c t i o n ;
architecture my_arch of b o o l e a n _ f u n c t i on is
begin
f <= ( A and B ) or (( not A ) and ( not C ));
end ;
I
not
and
or
nand
nor
xor
xnor

Precedence rules: Highest priority first

Traffic light controller


I

Define a bus: one-hot encoding (red, yellow, green)

entity l i g h t _ c on t r o l l e r is
port ( lights_in : in s t d _ l o g ic _ v e c t o r (3 downto 1);
enable
: in std_logic ;
lights_out : out s t d _ l o g i c _ v e ct o r (3 downto 1));
end entity l i g h t _ c o n t r o l l e r ;
architecture and_enable of l i g ht _ c o n t r o l l e r is
begin
lights_out (1) <= lights_in (1) and enable ;
lights_out (2) <= lights_in (2) and enable ;
lights_out (3) <= lights_in (3) and enable ;
end architecture and_enable ;
I

Alternative

architecture c o n d i t i o n a l _ e n a b l e of l i g h t _ c o n t r o l l e r is
begin
lights_out <= lights_in when enable = 1 else
" 000 " ;
end architecture c o n d i t i o n a l _ e n a b l e ;

7 segment decoder
I
I

Input: BCD coded

Output: 7 segment

A
G
D

B
C
DP

entity BCDdecoder is
port ( BCD_in
: in s t d _ l og i c _ v e c t o r (3 downto 0);
segments_out : out s t d _ l o g i c _v e c t o r (6 downto 0));
end entity BCDdecoder ;
architecture my_arch of BCDdecoder is
begin
segments_out <= " 1111110 " when BCD_in
" 0110000 " when BCD_in
" 1101101 " when BCD_in
" 1111001 " when BCD_in
" 0110011 " when BCD_in
" 1011011 " when BCD_in
" 1011111 " when BCD_in
" 1110000 " when BCD_in
" 1111111 " when BCD_in
" 1110011 " when BCD_in
" -- ----- " ;
end architecture my_arch ;

=
=
=
=
=
=
=
=
=
=

" 0000 "


" 0001 "
" 0010 "
" 0011 "
" 0100 "
" 0101 "
" 0110 "
" 0111 "
" 1000 "
" 1001 "

else
else
else
else
else
else
else
else
else
else

7 segment decoder /2
I

Less typing: with ... select ...

entity BCDdecoder is
port ( BCD_in
: in s t d _ l og i c _ v e c t o r (3 downto 0);
segments_out : out s t d _ l o g i c _v e c t o r (6 downto 0));
end entity BCDdecoder ;
architecture my_arch of BCDdecoder is
begin
with BCD_in select
segments_out <= " 1111110 " when " 0000 " ,
" 0110000 " when " 0001 " ,
" 1101101 " when " 0010 " ,
" 1111001 " when " 0011 " ,
" 0110011 " when " 0100 " ,
" 1011011 " when " 0101 " ,
" 1011111 " when " 0110 " ,
" 1110000 " when " 0111 " ,
" 1111111 " when " 1000 " ,
" 1110011 " when " 1001 " ,
" -- ----- " when others ;
end architecture my_arch ;

7 segment decoder /3
I

Adding a blanking input

entity BCDdecoder is
port ( BCD_in
: in s t d _ l og i c _ v e c t o r (3 downto 0);
blank
: in s t d _ l o g i c_ v e c t o r ;
segments_out : out s t d _ l o g i c _v e c t o r (6 downto 0));
end entity BCDdecoder ;
architecture my_arch of BCDdecoder is
signal temp_segs : s t d _ l o g i c _v e c t o r (6 downto 0);
begin
with BCD_in select
-- T e m p o r a r y signal
temp_segs <= " 1111110 " when " 0000 " ,
" 0110000 " when " 0001 " ,
" 1101101 " when " 0010 " ,
" 1111001 " when " 0011 " ,
...
" 1111111 " when " 1000 " ,
" 1110011 " when " 1001 " ,
" --- ---- " when others ;
segments_out <= " 0000000 " when blank = 1 else
temp_segs ;
end architecture my_arch ;

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