Mr. A. B.
Shinde
Assistant Professor,
Electronics Engineering,
PVPIT, Budhgaon
shindesir.pvp@gmail.com
System-on-a-chip or system on chip (SoC or SOC) refers to
integrating all components of a computer or other electronic
system into a single integrated circuit (chip).
It may contain digital, analog, mixed-signal, and often radiofrequency functions all on one.
Microcontrollers typically have under 100K of RAM are singlechip-systems;
whereas the term SoC is typically used with more powerful
processors, capable of running software such as Windows or
Linux, which need external memory chips (flash, RAM) to be
useful, and which are used with various external peripherals.
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Many interesting systems are too complex to fit on just one chip
built with a process optimized for just one of the system's tasks.
When it is not feasible to construct an SoC for a particular
application, an alternative is a system in package (SiP)
comprising a number of chips in a single package.
In large volumes, SoC is believed to be more cost effective
than SiP, because its packaging is simpler.
The SoC chip includes processors and numerous digital
peripherals, and comes in a ball grid package with lower and
upper connections.
One microcontroller, microprocessor or DSP core(s). Some
SoCs called multiprocessor System-on-Chip (MPSoC)
include more than one processor core.
1.
Memory blocks including a selection of ROM, RAM, EEPROM
and Flash.
2.
Timing sources including oscillators and phase-locked loops.
3.
Peripherals including counter-timers, real-time
power-on reset generators.
4.
External interfaces including industry standards such as USB,
FireWire, Ethernet, USART, SPI.
timers and
Analog interfaces including ADCs and DACs.
Voltage regulators and power management circuits.
These blocks are connected by either a proprietary or industrystandard bus such as the AMBA bus from ARM.
DMA controllers
route
data
directly
between external
interfaces and memory, by-passing the processor core and
thereby increasing the data 6 throughput of the SoC
Ethernet
MAC
Audio
Codec
Interrupt
Controller
GP I/O
Address
Decode
Unit
CLK
SRAM
Power Supply
CLK
CLK
CPU
(uP / DSP)
Memory
Controller
SRAM
SRAM
SDRAM
Timer
UART
CoProc.
SDRAM
custom
IF-logic
L
C
Display
Controller
Traditional Embedded System
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Ethernet
MAC
Audio
FPGA Codec
Interrupt
Controller
GP I/O
Address
Decode
Unit
CLK
SRAM
Power Supply
CLK
CLK
CPU
Memory
Controller
SRAM
SRAM
(uP / DSP)
SDRAM
Timer
UART
CoProc.
SDRAM
custom
IF-logic
L
C
Display
Controller
Audio
Codec
EPROM
Power Supply
L
C
SRAM
SRAM
SRAM
SDRAM
SDRAM
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A SoC consists of both the hardware described above, and the
software controlling the microcontroller, microprocessor or DSP
cores, peripherals and interfaces.
The design flow for a SoC aims to develop this hardware and
software in parallel.
Most SoCs are developed from pre-qualified hardware blocks,
together with the software drivers that control their operation.
The hardware blocks are put together using CAD tools; the
software modules are integrated using a software-development
environment.
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A key step in the design flow is: The hardware is mapped onto
an FPGA that mimics the behavior of the SoC, and the software
modules are loaded into the memory.
Once programmed, the emulation platform enables the hardware
and software of the SoC to be tested and debugged at close to
its full operational speed.
After emulation the hardware of the SoC follows the place and
route phase of the design of an integrated circuit before it is
fabricated.
Chips are verified for logical correctness before being sent to
foundry. This process is called functional verification.
Verilog and VHDL are typical hardware description languages
used for verification.
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Microcontroller:
A microcontroller is a processor that has its program and data
memory built in.
These chips are intended for small embedded control
applications, so leaving the pins for I/O and not requiring a
external memory bus.
Some microcontrollers have as little as 6 pins, and can do
useful things.
In contrast, general purpose computing processor (GPP) is
intended for a large computations, such can have 100s of pins
in a array and require extensive external circuitry.
In general a microcontroller is taken as being an embedded
device which is internally programmed to perform a specific
task.
There is minimal user interaction and little or no flexibility.
A microcontroller is typically fairly low powered with only small
amounts of memory and ROM (flash).
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SoC:
Conversely a System-on-Chip is the other end of the spectrum.
It is more geared towards complete flexibility and user
interaction.
It often includes things like IO drivers for bigger hardware, and
even sometimes a graphics adapter.
A System-on-Chip is more like a complete computer system, on
a single chip.
System on Chip, is a less well defined term.
Cyprus calls some of their parts PSOC (Programmable System
on Chip).
These are basically a microcontroller with small FPGA on the
same chip.
Instead of having built in peripherals, you can make whatever
you want within the available resources of the FPGA.
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An embedded system is a
special-purpose
computer
system designed to perform one
or a few dedicated functions,
often with real- time computing
constraints.
It is usually embedded as part
of a complete device including
hardware
and
mechanical
parts. In contrast, a generalpurpose computer, such as a
personal computer, can do
many different tasks depending
on programming.
Embedded systems control
many of the common devices in
use today.
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Physically, embedded systems range from portable devices
such as digital watches and MP4 players, to large stationary
installations like traffic lights, factory controllers, or the systems
controlling nuclear power plants.
Complexity
varies
from
low,
with
a
single
microcontroller chip, to very high with multiple units, peripherals
and networks mounted inside a large chassis or enclosure.
In general, "embedded system" is not an exactly defined term, as
many systems have some element of programmability.
For example, Handheld computers share some elements with
embedded systems such as the operating systems and
microprocessors which power them but are not truly
embedded systems, because they allow different applications
to be loaded and peripherals to be connected.
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INTRO TO
EMBEDDED SYSTEM DESIGN
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A Microcontroller is essentially a small and self sufficient
computer on a chip, used to control devices
It has all the memory and I/O it needs on board
Is not expandable no external bus interface
Characteristics of a Microcontroller
Low cost
Low speed, on the order of 10 KHz 20 MHz
Low Power, extremely low power in sleep mode
Small architecture, usually an 8-bit architecture
Small memory size, but usually enough for the type of
application it is intended for. Onboard Flash.
Limited I/O, but again, enough for the type of application
intended for.
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A Microprocessor is fundamentally a collection of on/off switches
laid out over silicon in order to perform computations
Characteristics of a Microprocessor
High cost
High speed, on the order of 100 MHz 4 GHz
High Power consumption, lots of heat
Large architecture, 32-bit, and recently 64-bit architecture
Large memory size, onboard flash and cache, with an external
bus interface for greater memory usage
Lots of I/O and peripherals, though Microprocessors tend to be
short on General purpose I/O
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Harvard Architecture refers to a memory structure where the
processor is connected to two different memory banks via two
sets of buses
This is to provide the processor with two distinct data paths, one
for instruction and one for data
Through this scheme, the CPU can read both an instruction
and data from the respective memory banks at the same time
This inherent independence increases the throughput of the
machine by enabling it to always pre-fetch the next instruction
The cost of such a system is complexity in hardware commonly
used in DSPs
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A Von-Neumann Machine, in contrast to the Harvard Architecture
provides one data path (bus) for both instruction and data
As a result, the CPU can either be fetching an instruction
from memory, or read/writing data to it
Other than less complexity of hardware, it allows for using a
single, sequential memory.
Todays processing speeds vastly outpace memory access
times, and we employ a very fast but small amount of memory
(cache) local to the processor
Modern processors employ a Harvard Architecture to read from
two instruction and data caches, when at the same time using a
Von-Neumann Architecture to access external memory
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Although numbers are always displayed in the same way,
they are not stored in the same way in memory
Big-Endian machines store the most significant byte of data in
the lowest memory address
Little-Endian machines on the other hand, store the least
significant byte of data in the lowest memory address
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The Intel family of Microprocessors and processors from Digital
Equipment Corporation use Little- Endian mode
Whereas Architectures
Big-Endian
Architectures such as PowerPC, MIPS, and Intels IA- 64 are
Big-Endian, supporting either mode
Unfortunately both methods are in prevalent use today, and
neither method is superior to the other
from
Sun,
IBM,
and Motorola are
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The Program Counter is a 16 or 32 bit register which contains
the address of the next instruction to be executed
The PC automatically increments to the next sequential memory
location every time an instruction is fetched
Branch, jump, and interrupt operations load the Program
Counter with an address other than the next sequential location
During reset, the PC is loaded from a pre-defined memory
location to signify the starting address of the code
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The significance of the reset vector is that it points the processor
to the memory address which contains the firmwares first
instruction
Without the Reset Vector, the processor would not know where to
begin execution
Upon reset, the processor loads the Program Counter (PC) with
the reset vector value from a pre-defined memory location
On
CPU08
$FFFE:$FFFF
architecture,
this
is
at
location
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The Stack Pointer (SP), much like the reset vector, is required at
boot time for many processors
Some processors, in particular the 8-bit microcontrollers
automatically provide the stack pointer by resetting it to a
predefined value
On a higher end processor, the stack pointer is usually read from
a non-volatile memory location, much like the reset vector
For example on a Cold-Fire microprocessor, the first sixteen
bytes of memory location must be programmed as follows:
0x00000000: Reset Vector
0x00000008: Stack Pointer
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The Computer Operating Properly (COP) module is a component
of modern processors which provides a mechanism to help
software recover from runaway code
The COP, also known as the Watchdog Timer, is a free running
counter that generates a reset if it runs up to a pre-defined value
and overflows
In order to prevent a watchdog reset, the user code must clear
the COP counter periodically.
COP can be disabled through register settings, and even
though this is not good practice for final firmware release, it is a
prudent strategy through the course of debug
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Embedded Systems, unlike a PC, never exit an application
They idle through an Infinite Loop waiting for an event to happen
in the form of an interrupt, or a pre-scheduled task
In order to save power, some processors enter special sleep
or wait modes instead of idling through an Infinite Loop, but
they will come out of this mode upon either a timer or an
External Interrupt
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Interrupts are mostly hardware
program an event has occurred
mechanisms which tell the
They happen at any time, and are therefore asynchronous to
program flow
They require special handling by the processor, and are
ultimately handled by a corresponding Interrupt Service Routine
(ISR)
Need to be handled quickly.
It takes too much time for servicing an interrupt, and you may
miss another interrupt.
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Proposal
Definition
Technology Selection
Budgeting (Time, Human, Financial)
Material and Development tool purchase
Schematic Capture & PCB board design
Firmware Development & Debug
Hardware Manufacturing
Testing
Certification
Firmware Release
Documentation
Ongoing Support
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The purpose of the design cycle is to remind and guide the
developer to step within a framework proven to keep you on
track and on budget.
There are numerous design cycle methodologies, of which the
following are most popular
The Waterfall Model
Top-down versus Bottom-up
Spiral Model
GANTT charts
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THE WATERFALL MODEL
Waterfall is a software development model in which development
is seen flowing steadily through the phases of
Requirement Analysis
Design
Implementation
Testing
Integration
Maintenance
Advantages are good progress tracking due to clear milestones
Disadvantages are its inflexibility, by making it difficult to
respond to changing customer needs / market conditions
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TOP-DOWN VERSUS BOTTOM-UP
The Top-Down Model analyses the overall functionality of a
system, without going into details
Each successive iteration of this process then designs
individual pieces of the system in greater detail
The Bottom-Up Model in contrast defines the individual pieces
of the system in great detail
These individual components are then interfaced together to
form a larger system
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THE SPIRAL MODEL
Modern software design practices such as the Spiral Model
employ both top-down and bottom- up techniques
Widely used in the industry today
For a GUI application, for example, the Spiral Model would
contend that
You first start off with a rough-sketch of user interface
(simple buttons & icons)
Make the underlying application work
Only then start adding features and in a final stage neat up the
buttons & icons
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GANTT CHART
GANTT Chart is simply a type of bar chart which shows the
interrelationships of how projects and schedules progress over
time
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Metrics to consider in designing an Embedded System
Unit
Cost: Can be a combination of cost
manufacture hardware + licensing fees
to
NRE Costs: Non Recurring Engineering costs
Size: The physical dimensions of the system
Power Consumption: Battery, power supply, wattage, current
consumption, etc.
Performance: The throughput of the system, its response
time, and computation power
Safety, fault-tolerance, field-upgradeability, ruggedness,
maintenance, ease of use, ease of installation, etc. etc.
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Problem Statement
allowing a chamber temperature set-point to be entered,
displaying both set-point and actual temperatures, and
tracking step changes in set-point temperature with acceptable
rise time, steady-state error, and overshoot.
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Temperature controller specifications
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Temperature controller hardware block diagram
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Temperature controller hardware
The microcontroller, a Motorola MC68HC705B16 (6805 for
short), is the heart of the system.
It accepts inputs from a simple four-key keypad e.g. set-point
temperature, and it displays both set-point and measured
chamber temperatures using two-digit seven-segment LED
displays controlled by a display driver.
All these inputs and outputs are accommodated by parallel
ports on the 6805.
Chamber temperature is sensed using a pre-calibrated
thermistor and input via one of the 6805s analog-to-digital
inputs.
Finally, a pulse-width modulation (PWM) output on the 6805 is
used to drive a relay which switches line power to the resistive
heater off and on.
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Schematic
of
microcontroller
board
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Figure shows a schematic of the electronics and their interfacing
to the 6805.
The keypad, a Storm 3K041103, has four keys which are
interfaced to pins PAO- PA3 of Port A, configured as inputs.
One key functions as a mode switch.
Two modes are supported: set mode and run mode.
In set mode two of the other keys are used to specify the setpoint temperature: one increments it and one decrements.
The fourth key is unused at present.
The LED displays are driven by a Harris Semiconductor ICM7212
display driver interfaced to pins PB0-PB6 of Port B, configured as
outputs.
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The temperature-sensing thermistor drives, through a voltage
divider, pin AN0 (one of eight analog inputs). Finally, pin PLMA
(one of two PWM outputs) drives the heater relay.
Software on the 6805 implements the temperature control
algorithm, maintains the temperature displays, and alters the setpoint in response to keypad inputs.
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The design of a SoC has similar goals as an embedded design.
The designed system will be used in a
environment, and has to fulfill strict requirements.
Some requirements are clearly defined by the application like the
functional requirements of an algorithm, e.g. the decoding of an
MPEG 1 Layer 3 data stream, which covers certain quality
restrictions.
The environment poses other requirements: e.g. minimizing the
cost, footprint, or power consumption. However due to the
flexibility of a SoC design, achieving the set goals, involves
analyzing a multi dimensional design space.
well-specified
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The degrees of freedom stem from the process element types
and characteristics,
their
allocation,
the
mapping
of
functional elements to the process elements, their interconnection
with busses and their scheduling.
A SoC design has to deal with a wide range: it starts with a
functional description on system level, where major function
blocks are defined and no timing information is given.
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The goal of SoC design paradigm is to manage the immense size
of design decisions in the hardware software co-design.
This is only possible by above well-defined flow of design steps
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Any
s
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