LTC3588-1

1
35881fa
TYPICAL APPLICATION
DESCRIPTION
Piezoelectric Energy
Harvesting Power Supply
The LTC

3588-1 integrates a low-loss full-wave bridge

rectier with a high efciency buck converter to form a
complete energy harvesting solution optimized for high
output impedance energy sources such as piezoelectric
transducers. An ultralow quiescent current undervoltage
lockout (UVLO) mode with a wide hysteresis window allows
charge to accumulate on an input capacitor until the buck
converter can efciently transfer a portion of the stored
charge to the output. In regulation, the LTC3588-1 enters
a sleep state in which both input and output quiescent
currents are minimal. The buck converter turns on and
off as needed to maintain regulation.
Four output voltages, 1.8V, 2.5V, 3.3V and 3.6V, are pin
selectable with up to 100mA of continuous output current;
however, the output capacitor may be sized to service a
higher output current burst. An input protective shunt set
at 20V enables greater energy storage for a given amount
of input capacitance.
L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
100mA Piezoelectric Energy Harvesting Power Supply
FEATURES
APPLICATIONS
n
950nA Input Quiescent Current (Output in
Regulation No Load)
n
450nA Input Quiescent Current in UVLO
n
2.7V to 20V Input Operating Range
n
Integrated Low-Loss Full-Wave Bridge Rectier
n
Up to 100mA of Output Current
n
Selectable Output Voltages of 1.8V, 2.5V, 3.3V, 3.6V
n
High Efciency Integrated Hysteretic Buck DC/DC
n
Input Protective Shunt Up to 25mA Pull-Down at
V
IN
20V
n
Wide Input Undervoltage Lockout (UVLO) Range
n
Available in 10-Lead MSE and 3mm 3mm DFN
Packages
n
Piezoelectric Energy Harvesting
n
Electro-Mechanical Energy Harvesting
n
Wireless HVAC Sensors
n
Mobile Asset Tracking
n
Tire Pressure Sensors
n
Battery Replacement for Industrial Sensors
n
Remote Light Switches
n
Standalone Nanopower Buck Regulator
35881 TA01
PZ1
V
IN
CAP
V
IN2
PZ2
SW
V
OUT
PGOOD
D0, D1
LTC3588-1
MIDE V21BL
GND
1F
6V
4.7F
6V
C
STORAGE
25V
47F
6V
OUTPUT
VOLTAGE
SELECT
V
OUT
10H
2
LTC3588-1 3.3V Regulator Start-Up Prole
TIME (s)
0
V
O
L
T
A
G
E

(
V
)
22
20
18
8
4
10
12
14
16
6
2
0
200
35881 TA01b
600 400
V
IN
V
OUT
PGOOD = LOGIC 1
C
STORAGE
= 22F, C
OUT
= 47F
NO LOAD, I
VIN
= 2A
LTC3588-1
2
35881fa
ABSOLUTE MAXIMUM RATINGS
V
IN
Low Impedance Source ....................... 0.3V to 18V*
Current Fed, I
SW
= 0A ...................................... 25mA

PZ1, PZ2 ...........................................................0V to V

IN
D0, D1 .............. 0.3V to [Lesser of (V
IN2
+ 0.3V) or 6V]
CAP ......................[Higher of 0.3V or (V
IN
6V)] to V
IN
V
IN2
....................0.3V to [Lesser of (V
IN
+ 0.3V) or 6V]
(Note 1)
TOP VIEW
11
GND
DD PACKAGE
10-LEAD (3mm 3mm) PLASTIC DFN
10
9
6
7
8
4
5
3
2
1 PGOOD
D0
D1
V
IN2
V
OUT
PZ1
PZ2
CAP
V
IN
SW
T
JMAX
= 125C,
JA
= 43C/W,
JC
= 7.5C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
1
2
3
4
5
PZ1
PZ2
CAP
V
IN
SW
10
9
8
7
6
PGOOD
D0
D1
V
IN2
V
OUT
TOP VIEW
MSE PACKAGE
10-LEAD PLASTIC eMSOP
11
GND
T
JMAX
= 125C,
JA
= 45C/W,
JC
= 10C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
PIN CONFIGURATION
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3588EDD-1#PBF LTC3588EDD-1#TRPBF LFKY 10-Lead (3mm 3mm) Plastic DFN 40C to 125C
LTC3588IDD-1#PBF LTC3588IDD-1#TRPBF LFKY 10-Lead (3mm 3mm) Plastic DFN 40C to 125C
LTC3588EMSE-1#PBF LTC3588EMSE-1#TRPBF LTFKX 10-Lead Plastic eMSOP 40C to 125C
LTC3588IMSE-1#PBF LTC3588IMSE-1#TRPBF LTFKX 10-Lead Plastic eMSOP 40C to 125C
Consult LTC Marketing for parts specied with wider operating temperature ranges. *The temperature grade is identied by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
V
OUT
....................0.3V to Lesser of (V
IN2
+ 0.3V) or 6V
PGOOD ...............0.3V to Lesser of (V
OUT
+ 0.3V) or 6V
I
PZ1
, I
PZ2
..............................................................50mA
I
SW
.......................................................................350mA
Operating Junction Temperature Range
(Notes 2, 3) ................................................40 to 125C
Storage Temperature Range .......................65 to 150C
Lead Temperature (Soldering, 10 sec)
MSE Only .......................................................... 300C
* V
IN
has an internal 20V clamp

For t < 1ms and Duty Cycle < 1%,
Absolute Maximum Continuous Current = 5mA
LTC3588-1
3
35881fa
ELECTRICAL CHARACTERISTICS The l denotes the specications which apply over the full operating
junction temperature range, otherwise specications are for T
A
= 25C. (Note 2) V
IN
= 5.5V unless otherwise specied.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IN
Input Voltage Range Low Impedance Source on V
IN
l 18.0 V
I
VIN
V
IN
Quiescent Current
UVLO
Buck Enabled, Sleeping
Buck Enabled, Sleeping
Buck Enabled, Not Sleeping
V
IN
= 2.5V, Not PGOOD
V
IN
= 4.5V
V
IN
= 18V
I
SW
= 0A (Note 4)
450
950
1.7
150
700
1500
2.5
250
nA
nA
A
A
V
UVLO
V
IN
Undervoltage Lockout Threshold V
IN
Rising
1.8V Output Selected; D1 = 0, D0 = 0
2.5V Output Selected; D1 = 0, D0 = 1
3.3V Output Selected; D1 = 1, D0 = 0
3.6V Output Selected; D1 = 1, D0 = 1
l
l
l
l
3.77
3.77
4.73
4.73
4.04
4.04
5.05
5.05
4.30
4.30
5.37
5.37
V
V
V
V
V
IN
Falling
1.8V Output Selected; D1 = 0, D0 = 0
2.5V Output Selected; D1 = 0, D0 = 1
3.3V Output Selected; D1 = 1, D0 = 0
3.6V Output Selected; D1 = 1, D0 = 1
l
l
l
l
2.66
2.66
3.42
3.75
2.87
2.87
3.67
4.02
3.08
3.08
3.91
4.28
V
V
V
V
V
SHUNT
V
IN
Shunt Regulator Voltage I
VIN
= 1mA 19.0 20.0 21.0 V
I
SHUNT
Maximum Protective Shunt Current 1ms Duration 25 mA
Internal Bridge Rectier Loss
(|V
PZ1
V
PZ2
| V
IN
)
I
BRIDGE
= 10A 350 400 450 mV
Internal Bridge Rectier Reverse
Leakage Current
V
REVERSE
= 18V 20 nA
Internal Bridge Rectier Reverse
Breakdown Voltage
I
REVERSE
= 1A V
SHUNT
30 V
V
OUT
Regulated Output Voltage 1.8V Output Selected
Sleep Threshold
Wake-Up Threshold
2.5V Output Selected
Sleep Threshold
Wake-Up Threshold
3.3V Output Selected
Sleep Threshold
Wake-Up Threshold
3.6V Output Selected
Sleep Threshold
Wake-Up Threshold
l
l
l
l
l
l
l
l
1.710
2.425
3.201
3.492
1.812
1.788
2.512
2.488
3.312
3.288
3.612
3.588
1.890
2.575
3.399
3.708
V
V
V
V
V
V
V
V
PGOOD Falling Threshold As a Percentage of the Selected V
OUT
83 92 %
I
VOUT
Output Quiescent Current V
OUT
= 3.6V 89 150 nA
I
PEAK
Buck Peak Switch Current 200 260 350 mA
I
BUCK
Available Buck Output Current 100 mA
R
P
Buck PMOS Switch On-Resistance 1.1
R
N
Buck NMOS Switch On-Resistance 1.3
Max Buck Duty Cycle l 100 %
V
IH(D0, D1)
D0/D1 Input High Voltage l 1.2 V
V
IL(D0, D1)
D0/D1 Input Low Voltage l 0.4 V
I
IH(D0, D1)
D0/D1 Input High Current 10 nA
I
IL(D0, D1)
D0/D1 Input Low Current 10 nA
LTC3588-1
4
35881fa
TYPICAL PERFORMANCE CHARACTERISTICS
I
VIN
in UVLO vs V
IN
I
VIN
in Sleep vs V
IN
UVLO Rising vs Temperature
UVLO Falling vs Temperature V
SHUNT
vs Temperature
Total Bridge Rectier Drop
vs Bridge Current
TEMPERATURE (C)
55
U
V
L
O

R
I
S
I
N
G

(
V
)
5.2
5.0
4.6
4.2
4.8
4.4
4.0
3.8
25 105 15 65
35881 G03
125 5 85 35 45
D1 = D0 = 1
D1 = D0 = 0
TEMPERATURE (C)
55
U
V
L
O

F
A
L
L
I
N
G

(
V
)
4.2
4.0
3.6
3.2
3.8
3.4
3.0
2.8
25 105 15 65
35881 G04
125 5 85 35 45
D1 = D0 = 1
D1 = D0 = 0
D1 = 1, D0 = 0
BRIDGE CURRENT (A)
V
B
R
I
D
G
E

(
m
V
)
35881 G06
1800
1600
1400
1200
1000
800
600
400
200
0
1 10 10m 1m 100
85C
25C
40C
|V
PZ1
V
PZ2
| V
IN
V
IN
(V)
0
I
V
I
N

(
n
A
)
1000
900
700
500
800
600
400
300
200
100
0
4 5 2
35881 G01
6 3 1
D1 = D0 = 1
85C
25C
40C
V
IN
(V)
2
I
V
I
N

(
n
A
)
2400
2200
1800
1400
2000
1600
1200
1000
800
600
400
14 8 10 16
35881 G02
18 12 6 4
D1 = D0 = 0
85C
25C
40C
TEMPERATURE (C)
55
V
S
H
U
N
T

(
V
)
21.0
20.8
20.4
20.0
20.6
20.2
19.6
19.8
19.4
19.2
19.0
65 5 25 85 105
35881 G05
125 45 15 35
I
SHUNT
= 25mA
I
SHUNT
= 1mA
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3588-1 is tested under pulsed load conditions such
that T
J
T
A
. The LTC3588E-1 is guaranteed to meet specications
from 0C to 85C junction temperature. Specications over the 40C
to 125C operating junction temperature range are assured by design,
characterization, and correlation with statistical process controls.
The LTC3588I-1 is guaranteed over the full 40C to 125C operating
junction temperature range. Note that the maximum ambient temperature
consistent with these specications is determined by specic operating
conditions in conjunction with board layout, the rated package thermal
impedance and other environmental factors.
Note 3: The junction temperature (T
J
, in C) is calculated from the ambient
temperature (T
A
, in C) and power dissipation (P
D
, in Watts) according
to the formula: T
J
= T
A
+ (P
D

JA
), where
JA
(in C/W) is the package
thermal impedance.
Note 4: Dynamic supply current is higher due to gate charge being
delivered at the switching frequency.
LTC3588-1
5
35881fa
TYPICAL PERFORMANCE CHARACTERISTICS
3.6V Output vs Temperature
V
OUT
Load Regulation V
OUT
Line Regulation
1.8V Output vs Temperature
2.5V Output vs Temperature 3.3V Output vs Temperature
TEMPERATURE (C)
55
V
O
U
T

(
V
)
1.85
1.80
1.70
1.75
1.65
1.60
25 105 15 65
35881 G09
125 5 85 35 45
SLEEP THRESHOLD
WAKE-UP THRESHOLD
PGOOD FALLING
TEMPERATURE (C)
55
V
O
U
T

(
V
)
2.55
2.50
2.35
2.45
2.30
2.40
2.25
25 105 15 65
35881 G10
125 5 85 35 45
SLEEP THRESHOLD
WAKE-UP THRESHOLD
PGOOD FALLING
TEMPERATURE (C)
55
V
O
U
T

(
V
)
3.35
3.30
3.15
3.05
3.25
3.10
3.20
3.00
25 105 15 65
35881 G11
125 5 85 35 45
SLEEP THRESHOLD
WAKE-UP THRESHOLD
PGOOD FALLING
TEMPERATURE (C)
55
V
O
U
T

(
V
)
3.65
3.55
3.40
3.30
3.50
3.60
3.35
3.45
3.25
25 105 15 65
35881 G12
125 5 85 35 45
SLEEP THRESHOLD
WAKE-UP THRESHOLD
PGOOD FALLING
LOAD CURRENT (A)
V
O
U
T

(
V
)
35881 G13
2.56
2.54
2.46
2.48
2.50
2.52
2.44
1 10 10m 100m 1m 100
V
IN
= 5V, L = 10H, D1 = 0, D0 = 1
V
IN
(V)
V
O
U
T

(
V
)
35881 G14
2.56
2.54
2.46
2.48
2.50
2.52
2.44
4 6 16 18 14 8 10 12
L = 10H, I
LOAD
= 100mA, D1 = 0, D0 = 1
I
VOUT
vs Temperature
TEMPERATURE (C)
55
I
V
O
U
T

(
n
A
)
120
100
70
60
50
30
90
110
40
80
20
25 105 15 65
35881 G15
125 5 85 35 45
V
OUT
= 3.6V
V
OUT
= 3.3V
V
OUT
= 2.5V
V
OUT
= 1.8V
TEMPERATURE (C)
55
B
R
I
D
G
E

L
E
A
K
A
G
E

(
n
A
)
20
18
14
10
16
12
6
8
4
2
0
80 35 125
35881 G07
170 10
V
IN
= 18V, LEAKAGE AT PZ1 OR PZ2
Bridge Leakage vs Temperature Bridge Frequency Response
FREQUENCY (Hz)
V
I
N

(
V
)
35881 G08
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
10 100 100M 10M 1M 10k 1k 100k
4V
P-P
APPLIED TO PZ1/PZ2 INPUT
MEASURED IN UVLO
LTC3588-1
6
35881fa
TYPICAL PERFORMANCE CHARACTERISTICS
Efciency vs V
IN
for
I
LOAD
= 100mA, L = 100H
Efciency vs V
IN
for
V
OUT
= 3.3V, L = 100H
Efciency vs V
IN
for
I
LOAD
= 100mA, L = 10H
Efciency vs V
IN
for
V
OUT
= 3.3V, L = 10H
V
IN
(V)
E
F
F
I
C
I
E
N
C
Y

(
%
)
35881 G20
100
90
50
60
70
80
40
2 10 8 6 4 16 18 14 12
V
OUT
= 1.8V
V
OUT
= 2.5V
V
OUT
= 3.3V
V
OUT
= 3.6V
V
IN
(V)
E
F
F
I
C
I
E
N
C
Y

(
%
)
35881 G21
95
85
45
55
65
75
35
4 10 8 6 16 18 14 12
I
LOAD
= 10A
I
LOAD
= 30A
I
LOAD
= 50A
I
LOAD
= 100A
I
LOAD
= 100mA
Efciency vs I
LOAD
, L = 100H
LOAD CURRENT (A)
E
F
F
I
C
I
E
N
C
Y

(
%
)
35881 G22
100
90
10
20
30
80
70
60
50
40
0
V
IN
= 5V
V
OUT
= 1.8V
V
OUT
= 2.5V
V
OUT
= 3.3V
V
OUT
= 3.6V
1 10 10m 100m 1m 100
V
IN
(V)
E
F
F
I
C
I
E
N
C
Y

(
%
)
35881 G23
100
90
80
70
60
50
40
2 8 6 4 18 10 12 14 16
V
OUT
= 1.8V
V
OUT
= 2.5V
V
OUT
= 3.3V
V
OUT
= 3.6V
V
IN
(V)
E
F
F
I
C
I
E
N
C
Y

(
%
)
35881 G24
95
85
45
55
65
75
35
4 10 8 6 16 18 14 12
I
LOAD
= 10A
I
LOAD
= 30A
I
LOAD
= 50A
I
LOAD
= 100A
I
LOAD
= 100mA
Efciency vs I
LOAD
, L = 10H
LOAD CURRENT (A)
E
F
F
I
C
I
E
N
C
Y

(
%
)
35881 G19
100
90
30
40
50
60
70
80
20
10
0
1 10 10m 100m 1m 100
V
IN
= 5V
V
OUT
= 1.8V
V
OUT
= 2.5V
V
OUT
= 3.3V
V
OUT
= 3.6V
I
PEAK
vs Temperature
R
DS(ON)
of PMOS/NMOS
vs Temperature
TEMPERATURE (C)
55
I
P
E
A
K

(
m
A
)
300
280
250
240
230
210
270
290
220
260
200
25 105 15 65
35881 G16
125 5 85 35 45
TEMPERATURE (C)
55
R
D
S
(
O
N
)

(

)
2.0
1.6
1.0
1.4
1.8
1.2
0.8
25 105 15 65
35881 G17
125 5 85 35 45
PMOS
NMOS
Operating Waveforms
5s/DIV
OUTPUT
VOLTAGE
50mV/DIV
AC-COUPLED
INDUCTOR
CURRENT
200mA/DIV
V
IN
= 5V, V
OUT
= 3.3V
I
LOAD
= 1mA
L = 10H, C
OUT
= 47F
SWITCH
VOLTAGE
2V/DIV
0mA
0V
35881 G18
LTC3588-1
7
35881fa
PIN FUNCTIONS
PZ1 (Pin 1): Input connection for piezoelectric element or
other AC source (used in conjunction with PZ2).
PZ2 (Pin 2): Input connection for piezoelectric element or
other AC source (used in conjunction with PZ1).
CAP (Pin 3): Internal rail referenced to V
IN
to serve as gate
drive for buck PMOS switch. A 1F capacitor should be
connected between CAP and V
IN
. This pin is not intended
for use as an external system rail.
V
IN
(Pin 4): Rectied Input Voltage. A capacitor on this
pin serves as an energy reservoir and input supply for the
buck regulator. The V
IN
voltage is internally clamped to a
maximum of 20V (typical).
SW (Pin 5): Switch Pin for the Buck Switching Regulator.
A 10H or larger inductor should be connected from SW
to V
OUT
.
V
OUT
(Pin 6): Sense pin used to monitor the output volt-
age and adjust it through internal feedback.
V
IN2
(Pin 7): Internal low voltage rail to serve as gate drive
for buck NMOS switch. Also serves as a logic high rail for
output voltage select bits D0 and D1. A 4.7F capacitor
should be connected from V
IN2
to GND. This pin is not
intended for use as an external system rail.
D1 (Pin 8): Output Voltage Select Bit. D1 should be tied
high to V
IN2
or low to GND to select desired V
OUT
(see
Table 1).
D0 (Pin 9): Output Voltage Select Bit. D0 should be tied
high to V
IN2
or low to GND to select desired V
OUT
(see
Table 1).
PGOOD (Pin 10): Power good output is logic high when
V
OUT
is above 92% of the target value. The logic high is
referenced to the V
OUT
rail.
GND (Exposed Pad Pin 11): Ground. The Exposed Pad
should be connected to a continuous ground plane on the
second layer of the printed circuit board by several vias
directly under the LTC3588-1.
BLOCK DIAGRAM
35881 BD
D1, D0
PZ2
PZ1
V
IN
UVLO
BUCK
CONTROL
INTERNAL RAIL
GENERATION
2
BANDGAP
REFERENCE
SLEEP
PGOOD
COMPARATOR
CAP
SW
GND
PGOOD
V
IN2
V
OUT
20V
5
3
7
11
10
6
8, 9
2
1
4
LTC3588-1
8
35881fa
The LTC3588-1 is an ultralow quiescent current power
supply designed specically for energy harvesting and/or
low current step-down applications. The part is designed to
interface directly to a piezoelectric or alternative A/C power
source, rectify a voltage waveform and store harvested
energy on an external capacitor, bleed off any excess power
via an internal shunt regulator, and maintain a regulated
output voltage by means of a nanopower high efciency
synchronous buck regulator.
Internal Bridge Rectier
The LTC3588-1 has an internal full-wave bridge rectier
accessible via the differential PZ1 and PZ2 inputs that
recties AC inputs such as those from a piezoelectric
element. The rectied output is stored on a capacitor at
the V
IN
pin and can be used as an energy reservoir for the
buck converter. The low-loss bridge rectier has a total
drop of about 400mV with typical piezo generated currents
(~10A). The bridge is capable of carrying up to 50mA.
One side of the bridge can be operated as a single-ended
DC input. PZ1 and PZ2 should never be shorted together
when the bridge is in use.
Undervoltage Lockout (UVLO)
When the voltage on V
IN
rises above the UVLO rising
threshold the buck converter is enabled and charge is
transferred from the input capacitor to the output capacitor.
A wide (~1V) UVLO hysteresis window is employed
with a lower threshold approximately 300mV above the
selected regulated output voltage to prevent short cycling
during buck power-up. When the input capacitor voltage
is depleted below the UVLO falling threshold the buck
converter is disabled. Extremely low quiescent current
(450nA typical) in UVLO allows energy to accumulate on
the input capacitor in situations where energy must be
harvested from low power sources.
Internal Rail Generation
Two internal rails, CAP and V
IN2
, are generated from V
IN
and
are used to drive the high side PMOS and low side NMOS
of the buck converter, respectively. Additionally the V
IN2

rail serves as logic high for output voltage select bits D0
and D1. The V
IN2
rail is regulated at 4.8V above GND while
the CAP rail is regulated at 4.8V below V
IN
. These are not
intended to be used as external rails. Bypass capacitors
are connected to the CAP and V
IN2
pins to serve as energy
reservoirs for driving the buck switches. When V
IN
is below
4.8V, V
IN2
is equal to V
IN
and CAP is held at GND. Figure 1
shows the ideal V
IN
, V
IN2
and CAP relationship.
Figure 1. Ideal V
IN
, V
IN2
and CAP Relationship
V
IN
(V)
0
V
O
L
T
A
G
E

(
V
)
18
12
14
16
10
2
4
8
6
0
10 5
35881 F01
15
V
IN
V
IN2
CAP
OPERATION
Buck Operation
The buck regulator uses a hysteretic voltage algorithm
to control the output through internal feedback from the
V
OUT
sense pin. The buck converter charges an output
capacitor through an inductor to a value slightly higher than
the regulation point. It does this by ramping the inductor
current up to 260mA through an internal PMOS switch
and then ramping it down to 0mA through an internal
NMOS switch. This efciently delivers energy to the output
capacitor. The ramp rate is determined by V
IN
, V
OUT
, and
the inductor value. If the input voltage falls below the
LTC3588-1
9
35881fa
OPERATION
UVLO falling threshold before the output voltage reaches
regulation, the buck converter will shut off and will not
be turned on until the input voltage again rises above the
UVLO rising threshold. During this time the output voltage
will be loaded by less than 100nA. When the buck brings
the output voltage into regulation the converter enters a
low quiescent current sleep state that monitors the output
voltage with a sleep comparator. During this operating mode
load current is provided by the buck output capacitor. When
the output voltage falls below the regulation point the buck
regulator wakes up and the cycle repeats. This hysteretic
method of providing a regulated output reduces losses
associated with FET switching and maintains an output
at light loads. The buck delivers a minimum of 100mA of
average load current when it is switching.
When the sleep comparator signals that the output has
reached the sleep threshold the buck converter may be
in the middle of a cycle with current still owing through
the inductor. Normally both synchronous switches would
turn off and the current in the inductor would freewheel
to zero through the NMOS body diode. The LTC3588-1
keeps the NMOS switch on during this time to prevent the
conduction loss that would occur in the diode if the NMOS
were off. If the PMOS is on when the sleep comparator
trips the NMOS will turn on immediately in order to ramp
down the current. If the NMOS is on it will be kept on until
the current reaches zero.
Though the quiescent current when the buck is switching
is much greater than the sleep quiescent current, it is still
a small percentage of the average inductor current which
results in high efciency over most load conditions. The
buck operates only when sufcient energy has been ac-
cumulated in the input capacitor and the length of time the
converter needs to transfer energy to the output is much
less than the time it takes to accumulate energy. Thus, the
buck operating quiescent current is averaged over a long
period of time so that the total average quiescent current
is low. This feature accommodates sources that harvest
small amounts of ambient energy.
Four selectable voltages are available by tying the output
select bits, D0 and D1, to GND or V
IN2
. Table 1 shows
the four D0/D1 codes and their corresponding output
voltages.
Table 1. Output Voltage Selection
D1 D0 V
OUT
V
OUT
QUIESCENT CURRENT (I
VOUT
)
0 0 1.8V 44nA
0 1 2.5V 62nA
1 0 3.3V 81nA
1 1 3.6V 89nA
The internal feedback network draws a small amount of
current from V
OUT
as listed in Table 1.
Power Good Comparator
A power good comparator produces a logic high referenced
to V
OUT
on the PGOOD pin the rst time the converter
reaches the sleep threshold of the programmed V
OUT
,
signaling that the output is in regulation. The PGOOD pin
will remain high until V
OUT
falls to 92% of the desired
regulation voltage. Several sleep cycles may occur during
this time. Additionally, if PGOOD is high and V
IN
falls below
the UVLO falling threshold, PGOOD will remain high until
V
OUT
falls to 92% of the desired regulation point. This
allows output energy to be used even if the input is lost.
Figure 2 shows the behavior for V
OUT
= 3.6V and no load.
At t = 75s V
IN
becomes high impedance and is discharged
by the quiescent current of the LTC3588-1 and through
servicing V
OUT
which is discharged by its own leakage
current. V
IN
crosses UVLO falling but PGOOD remains high
until V
OUT
decreases to 92% of the desired regulation point.
The PGOOD pin is designed to drive a microprocessor or
other chip I/O and is not intended to drive higher current
loads such as an LED.
TIME (s)
0
V
O
L
T
A
G
E

(
V
)
6
3
4
5
2
1
0
200 100
35881 F02
300
V
IN
V
IN
= UVLO FALLING
V
OUT
PGOOD
C
VIN
= C
VOUT
= 100F
Figure 2. PGOOD Operation During Transition to UVLO
LTC3588-1
10
35881fa
OPERATION
The D0/D1 inputs can be switched while in regulation as
shown in Figure 3. If V
OUT
is programmed to a voltage with
a PGOOD falling threshold above the old V
OUT
, PGOOD will
transition low until the new regulation point is reached.
When V
OUT
is programmed to a lower voltage, PGOOD
will remain high through the transition.
Energy Storage
Harvested energy can be stored on the input capacitor or
the output capacitor. The wide input range takes advantage
of the fact that energy storage on a capacitor is proportional
to the square of the capacitor voltage. After the output
voltage is brought into regulation any excess energy is
stored on the input capacitor and its voltage increases.
When a load exists at the output the buck can efciently
transfer energy stored at a high voltage to the regulated
output. While energy storage at the input utilizes the high
voltage at the input, the load current is limited to what
the buck converter can supply. If larger loads need to be
serviced the output capacitor can be sized to support a
larger current for some duration. For example, a current
burst could begin when PGOOD goes high and would
continuously deplete the output capacitor until PGOOD
went low.
Figure 3. PGOOD Operation During D0/D1 Transition
TIME (ms)
0
V
O
U
T

V
O
L
T
A
G
E

(
V
)
5
4
3
2
1
0
18 16 14 12 10 8 6 4 2
35881 F03
20
C
OUT
= 100F, I
LOAD
= 100mA
V
OUT
D1=D0=0
PGOOD = LOGIC1
D1=D0=1 D1=D0=0
LTC3588-1
11
35881fa
Introduction
The LTC3588-1 harvests ambient vibrational energy
through a piezoelectric element in its primary application.
Common piezoelectric elements are PZT (lead zirconate
titanate) ceramics, PVDF (polyvinylidene uoride) poly-
mers, or other composites. Ceramic piezoelectric elements
exhibit a piezoelectric effect when the crystal structure
of the ceramic is compressed and internal dipole move-
ment produces a voltage. Polymer elements comprised
of long-chain molecules produce a voltage when exed
as molecules repel each other. Ceramics are often used
under direct pressure while a polymer can be exed more
readily. A wide range of piezoelectric elements are avail-
able and produce a variety of open-circuit voltages and
short-circuit currents. Typically the open-circuit voltage
and short-circuit currents increase with available vibrational
energy as shown in Figure 4. Piezoelectric elements can
be placed in series or in parallel to achieve desired open-
circuit voltages.
APPLICATIONS INFORMATION
The LTC3588-1 is well-suited to a piezoelectric energy
harvesting application. The 20V input protective shunt
can accommodate a variety of piezoelectric elements. The
low quiescent current of the LTC3588-1 enables efcient
energy accumulation from piezoelectric elements which
can have short-circuit currents on the order of tens of
microamps. Piezoelectric elements can be obtained from
manufacturers listed in Table 2.
Table 2. Piezoelectric Element Manufacturers
Advanced Cerametrics www.advancedcerametrics.com
Piezo Systems www.piezo.com
Measurement Specialties www.meas-spec.com
PI (Physik Instrumente) www.pi-usa.us
MIDE Technology Corporation www.mide.com
Morgan Technical Ceramics www.morganelectroceramics.com
The LTC3588-1 will gather energy and convert it to a use-
able output voltage to power microprocessors, wireless
sensors, and wireless transmission components. Such a
wireless sensor application may require much more peak
power than a piezoelectric element can produce. However,
the LTC3588-1 accumulates energy over a long period of
time to enable efcient use for short power bursts. For
continuous operation, these bursts must occur with a low
duty cycle such that the total output energy during the burst
does not exceed the average source power integrated over
an energy accumulation cycle. For piezoelectric inputs the
time between cycles could be minutes, hours, or longer
depending on the selected capacitor values and the nature
of the vibration source.
Figure 4. Typical Piezoelectric Load Lines
for Piezo Systems T220-A4-503X
PIEZO CURRENT (A)
0
P
I
E
Z
O

V
O
L
T
A
G
E

(
V
)
12
9
6
3
0
20 10
35881 F04
30
INCREASING
VIBRATION ENERGY
LTC3588-1
12
35881fa
APPLICATIONS INFORMATION
PGOOD Signal
The PGOOD signal can be used to enable a sleeping
microprocessor or other circuitry when V
OUT
reaches
regulation, as shown in Figure 5. Typically V
IN
will be
somewhere between the UVLO thresholds at this time and
a load could only be supported by the output capacitor.
Alternatively, waiting a period of time after PGOOD goes
high would let the input capacitor accumulate more energy
allowing load current to be maintained longer as the buck
efciently transfers that energy to the output. While active,
a microprocessor may draw a small load when operating
sensors, and then draw a large load to transmit data.
Figure 5 shows the LTC3588-1 responding smoothly to
such a load step.
Input and Output Capacitor Selection
The input and output capacitors should be selected
based on the energy needs and load requirements of the
application. In every case the V
IN
capacitor should be
rated to withstand the highest voltage ever present at V
IN
.
For 100mA or smaller loads, storing energy at the input
takes advantage of the high voltage input since the buck
can deliver 100mA average load current efciently to the
output. The input capacitor should then be sized to store
enough energy to provide output power for the length of
time required. This may involve using a large capacitor,
letting V
IN
charge to a high voltage, or both. Enough energy
should be stored on the input so that the buck does not
reach the UVLO falling threshold which would halt energy
transfer to the output. In general:


P
LOAD
t
LOAD
=
1
2
C
IN
V
IN
2
V
UVLOFALLING
2
( )
V
UVLOFALLING
V
IN
V
SHUNT
The above equation can be used to size the input capaci-
tor to meet the power requirements of the output for the
desired duration. Here is the average efciency of the
buck converter over the input range and V
IN
is the input
voltage when the buck begins to switch. This equation
may overestimate the input capacitor necessary since load
current can deplete the output capacitor all the way to the
lower PGOOD threshold. It also assumes that the input
source charging has a negligible effect during this time.
The duration for which the regulator sleeps depends on
the load current and the size of the output capacitor. The
sleep time decreases as the load current increases and/or
as the output capacitor decreases. The DC sleep hysteresis
window is 12mV around the programmed output volt-
age. Ideally this means that the sleep time is determined
by the following equation:


t
SLEEP
=C
OUT
24mV
I
LOAD
35881 F05a 35881 F05b
PZ1
V
IN
CAP
V
IN2
D1
D0
PZ2
PGOOD
SW
V
OUT
LTC3588-1
MICROPROCESSOR
GND
1F
6V
4.7F
6V
10F
25V
47F
6V
10H
3.3V
EN
CORE
GND
T
X
250s/DIV
V
IN
= 5V
L = 10H, C
OUT
= 47F
LOAD STEP BETWEEN 5mA and 55mA
OUTPUT
VOLTAGE
20mV/DIV
AC-COUPLED
LOAD
CURRENT
25mA/DIV
5mA
MIDE V21BL
Figure 5. 3.3V Piezoelectric Energy Harvester Powering a Microprocessor
with a Wireless Transmitter and 50mA Load Step Response
LTC3588-1
13
35881fa
APPLICATIONS INFORMATION
This is true for output capacitors on the order of 100F
or larger, but as the output capacitor decreases towards
10F delays in the internal sleep comparator along with
the load current may result in the V
OUT
voltage slewing
past the 12mV thresholds. This will lengthen the sleep
time and increase V
OUT
ripple. A capacitor less than 10F
is not recommended as V
OUT
ripple could increase to an
undesirable level.
If transient load currents above 100mA are required then a
larger capacitor can be used at the output. This capacitor
will be continuously discharged during a load condition
and the capacitor can be sized for an acceptable drop in
V
OUT
:

C
OUT
= V
OUT+
V
OUT
( )
I
LOAD
I
BUCK
t
LOAD
Here V
OUT+
is the value of V
OUT
when PGOOD goes high
and V
OUT
is the desired lower limit of V
OUT
. I
BUCK
is the
average current being delivered from the buck converter,
typically I
PEAK
/2.
A standard surface mount ceramic capacitor can be used
for C
OUT
, though some applications may be better suited
to a low leakage aluminum electrolytic capacitor or a
supercapacitor. These capacitors can be obtained from
manufacturers such as Vishay, Illinois Capacitor, AVX,
or CAP-XX.
Inductor
The buck is optimized to work with an inductor in the range
of 10H to 22H, although inductor values outside this
range may yield benets in some applications. For typical
applications, a value of 10H is recommended. A larger
inductor will benet high voltage applications by increasing
the on-time of the PMOS switch and improving efciency
by reducing gate charge loss. Choose an inductor with a
DC current rating greater than 350mA. The DCR of the
inductor can have an impact on efciency as it is a source
of loss. Tradeoffs between price, size, and DCR should be
evaluated. Table 3 lists several inductors that work well
with the LTC3588-1.
Table 3. Recommended Inductors for LTC3588-1
INDUCTOR
TYPE
L
(H)
MAX
I
DC
(mA)
MAX
DCR
()
SIZE in mm
(L W H)
MANU-
FACTURER
CDRH2D18/LDNP 10 430 0.180 3 3 2 Sumida
107AS-100M 10 650 0.145 2.8 3 1.8 Toko
EPL3015-103ML 10 350 0.301 2.8 3 1.5 Coilcraft
MLP3225s100L 10 1000 0.130 3.2 2.5 1.0 TDK
XLP2010-163ML 10 490 0.611 2.0 1.9 1.0 Coilcraft
SLF7045T 100 500 0.250 7.0 7.0 4.5 TDK
V
IN2
and CAP Capacitors
A 1F capacitor should be connected between V
IN
and
CAP and a 4.7F capacitor should be connected between
V
IN2
and GND. These capacitors hold up the internal rails
during buck switching and compensate the internal rail
generation circuits. In applications where the input source
is limited to less than 6V, the CAP pin can be tied to GND
and the V
IN2
pin can be tied to V
IN
as shown in Figure 6.
An optional 5.6V Zener diode can be connected to V
IN
to
clamp V
IN
in this scenario. The leakage of the Zener diode
below its Zener voltage should be considered as it may
be comparable to the quiescent current of the LTC3588-1.
This circuit does not require the capacitors on V
IN2
and
CAP, saving components and allowing a lower voltage
rating for the single V
IN
capacitor.
Figure 6. Smallest Solution Size 1.8V Low Voltage Input
Piezoelectric Power Supply
35881 F06
PZ1
V
IN
V
IN2
CAP
D1
D0
PZ2
PGOOD
SW
V
OUT
LTC3588-1
GND
10F
6V
10H
V
OUT
1.8V
PGOOD
10F
6V 5.6V
(OPTIONAL)
MIDE V21BL
LTC3588-1
14
35881fa
APPLICATIONS INFORMATION
Figure 8. Piezo Energy Harvester with Battery Backup
Additional Applications with Piezo Inputs
The versatile LTC3588-1 can be used in a variety of con-
gurations. Figure 7 shows a single piezo source powering
two LTC3588-1s simultaneously, providing capability for
multiple rail systems. This setup features automatic sup-
ply sequencing as the LTC3588-1 with the lower voltage
output (i.e. lower UVLO rising threshold) will come up rst.
As the piezo provides input power both V
IN
rails will
initially come up together, but when one output starts
drawing power, only its corresponding V
IN
will fall as the
bridges of each LTC3588-1 provide isolation. Input piezo
energy will then be directed to this lower voltage capacitor
until both V
IN
rails are again equal. This conguration is
expandable to any number of LTC3588-1s powered by a
single piezo as long as the piezo can support the sum total
of the quiescent currents from each LTC3588-1.
A piezo powered LTC3588-1 can also be used in concert
with a battery connected to V
IN
to supplement the system
if ambient vibrational energy ceases as shown in Figure 8.
A blocking diode placed in series with the battery to
V
IN
prevents reverse current in the battery if the piezo
source charges V
IN
past the battery voltage. A 9V battery
is shown, but any stack of batteries of a given chemistry
can be used as long as the battery stack voltage does not
exceed 18V. In this setup the presence of the piezo energy
harvester can greatly increase the life of the battery. If
the piezo source is removed the LTC3588-1 can serve as
a standalone nanopower buck converter. In this case the
bridge is unused and the blocking diode is unnecessary.
35881 F08
PZ1
V
IN
CAP
V
IN2
D1
D0
PZ2
PGOOD
SW
V
OUT
PZ1
PZ2
LTC3588-1
PIEZO SYSTEMS T220-A4-503X
IR05H40CSPTR
GND
47F
6V
10H
V
OUT
3.3V
PGOOD
100F
16V 9V
BATTERY
1F
6V
4.7F
6V
Figure 7. Dual Rail Power Supply with Single Piezo and
Automatic Supply Sequencing
35881 F07
PZ1
V
IN
CAP
V
IN2
D1
D0
PZ2
PGOOD
SW
V
OUT
LTC3588-1
GND
10F
6V
10F
6V
10H 10H
1.8V 3.6V
PGOOD2 PGOOD1
1F
6V
PZ2
V
IN
CAP
V
IN2
D1
D0
PZ1
PGOOD
SW
V
OUT
LTC3588-1
GND
4.7F
6V
1F
6V
4.7F
6V
10F
25V
10F
25V
MIDE V25W
LTC3588-1
15
35881fa
Figure 9. AC Line Powered 3.6V Buck Regulator with
Large Output Capacitor to Support Heavy Loads
35881 F09
PZ1
V
IN
CAP
V
IN2
D1
D0
PZ2
PGOOD
SW
V
OUT
LTC3588-1
DANGER! HIGH VOLTAGE!
GND
150k
100F
6V
10H
V
OUT
3.6V
PGOOD
10F
25V
120VAC
60Hz
1F
6V
4.7F
6V
150k
150k
150k
DANGEROUS AND LETHAL POTENTIALS ARE PRESENT IN OFFLINE CIRCUITS!
BEFORE PROCEEDING ANY FURTHER, THE READER IS WARNED THAT
CAUTION MUST BE USED IN THE CONSTRUCTION, TESTING AND USE OF
OFFLINE CIRCUITS. EXTREME CAUTION MUST BE USED IN WORKING WITH
AND MAKING CONNECTIONS TO THESE CIRCUITS. REPEAT: OFFLINE
CIRCUITS CONTAIN DANGEROUS, AC LINE-CONNECTED HIGH VOLTAGE
POTENTIALS. USE CAUTION. ALL TESTING PERFORMED ON AN OFFLINE
CIRCUIT MUST BE DONE WITH AN ISOLATION TRANSFORMER CONNECTED
BETWEEN THE OFFLINE CIRCUITS INPUT AND THE AC LINE. USERS AND
CONSTRUCTORS OF OFFLINE CIRCUITS MUST OBSERVE THIS PRECAUTION
WHEN CONNECTING TEST EQUIPMENT TO THE CIRCUIT TO AVOID ELECTRIC
SHOCK. REPEAT: AN ISOLATION TRANSFORMER MUST BE CONNECTED
BETWEEN THE CIRCUIT INPUT AND THE AC LINE IF ANY TEST EQUIPMENT IS
TO BE CONNECTED.
APPLICATIONS INFORMATION
Alternate Power Sources
The LTC3588-1 is not limited to use with piezoelectric ele-
ments but can accommodate a wide variety of input sources
depending on the type of ambient energy available. Figure 9
shows the LTC3588-1 internal bridge rectier connected
to the AC line in series with four 150k current limiting
resistors. This is a high voltage application and minimum
spacing between the line, neutral, and any high voltage
components should be maintained per the applicable UL
specication. For general off-line applications refer to UL
regulation 1012.
Figure 10 shows an application where copper panels are
placed near a standard uorescent room light to capacitively
Figure 10. Electric Field Energy Harvester
35881 F10
PZ1
V
IN
CAP
V
IN2
D1
D0
PZ2
PGOOD
SW
V
OUT
LTC3588-1
GND
10F
6V
10H
3.3V
PGOOD
10F
25V
1F
6V
4.7F
6V
COPPER PANEL
(12" 24")
COPPER PANEL
(12" 24")
PANELS ARE PLACED 6"
FROM 2' 4' FLUORESCENT
LIGHT FIXTURES
harvest energy from the electric eld around the light.
The frequency of the emission will be 120Hz for magnetic
ballasts but could be higher if the light uses electronic
ballast. The LTC3588-1 bridge rectier can handle a wide
range of input frequencies.
The LTC3588-1 can also be congured for use with DC
sources such as a solar panel or thermal couple as shown
in Figures 11 and 12 by connecting them to one of the
PZ1/PZ2 inputs. Connecting the two sources in this way
prevents reverse current from owing in each element.
Current limiting resistors should be used to protect the
PZ1 or PZ2 pins. This can be combined with a battery
backup connected to V
IN
with a blocking diode.
LTC3588-1
16
35881fa
APPLICATIONS INFORMATION
Figure 11. 5V to 16V Solar-Powered 2.5V Supply with Supercapacitor for
Increased Output Energy Storage and Battery Backup
35881 F11
PZ1
V
IN
CAP
V
IN2
D0
D1
PZ2
PGOOD
SW
V
OUT
LTC3588-1
GND
300
IR05H4OCSPTR
3F
2.7V
10F
6V
NESS SUPER CAPACITOR
ESHSR-0003CO-002R7
10H
V
OUT
2.5V
PGOOD
100F
25V
9V
BATTERY
1F
6V
4.7F
6V
5V TO 16V
SOLAR PANEL
+

+
35881 F12
PZ1
V
IN
CAP
V
IN2
D0
D1
PZ2
PGOOD
SW
V
OUT
LTC3588-1
GND
47F
6V
10H
V
OUT
2.5V
PGOOD
1F
16V
1F
6V
4.7F
6V
R
S
, 5.2 100
5.4V
PG-1 THERMAL
GENERATOR
P/N G1-1.0-127-1.27
(TELLUREX)
T = 100C
Figure 12. Thermoelectric Energy Harvester
33881 TA03
PZ1
V
IN
CAP
V
IN2
D1
D0
PZ2
PGOOD
SW
V
OUT
LTC3588-1
GND
10F
25V 47F
6V
22H
1F
6V
4.7F
6V
2.2F
10V
1F
6V
4.7F
6V
V
IN
CAP
V
IN2
EN
D1
D0
PGOOD
SW
V
OUT
STBY
LTC3388-3
*
GND
47F
6V
3.3V
3.3V
22H
* EXPOSED PAD MUST BE ELECTRICALLY ISOLATED FROM
SYSTEM GROUND AND CONNECTED TO THE 3.3V RAIL.
Figure 13. Piezoelectric Energy Harvester with 3.3V Outputs
LTC3588-1
17
35881fa
PACKAGE DESCRIPTION
3.00 0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.40 0.10
BOTTOM VIEWEXPOSED PAD
1.65 0.10
(2 SIDES)
0.75 0.05
R = 0.125
TYP
2.38 0.10
(2 SIDES)
1 5
10 6
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 0.05
(DD) DFN REV C 0310
0.25 0.05
2.38 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.65 0.05
(2 SIDES) 2.15 0.05
0.50
BSC
0.70 0.05
3.55 0.05
PACKAGE
OUTLINE
0.25 0.05
0.50 BSC
PIN 1 NOTCH
R = 0.20 OR
0.35 45
CHAMFER
DD Package
10-Lead Plastic DFN (3mm 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
LTC3588-1
18
35881fa
PACKAGE DESCRIPTION
eMSOP (MSE) 0510 REV E
0.53 0.152
(.021 .006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 0.27
(.007 .011)
TYP
0.86
(.034)
REF
0.50
(.0197)
BSC
1 2 3 4 5
4.90 0.152
(.193 .006)
0.497 0.076
(.0196 .003)
REF
8 9 10
10
1
7 6
3.00 0.102
(.118 .004)
(NOTE 3)
3.00 0.102
(.118 .004)
(NOTE 4)
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.
0.254
(.010)
0 6 TYP
DETAIL A
DETAIL A
GAUGE PLANE
5.23
(.206)
MIN
3.20 3.45
(.126 .136)
0.889 0.127
(.035 .005)
RECOMMENDED SOLDER PAD LAYOUT
0.305 0.038
(.0120 .0015)
TYP
1.68 0.102
(.066 .004)
1.88 0.102
(.074 .004)
0.50
(.0197)
BSC
BOTTOM VIEW OF
EXPOSED PAD OPTION
1.68
(.066)
1.88
(.074)
0.1016 0.0508
(.004 .002)
DETAIL B
DETAIL B
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
0.05 REF
0.29
REF
MSE Package
10-Lead Plastic eMSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1664 Rev E)
LTC3588-1
19
35881fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
A 9/10 Updated/added part number on the Piezoelectric Transducer on the front and back page applications, and Figures 5,
6 and 7
1, 12, 13,
14, 20
Updated Temperature Range in Order Information 2
Changed T
J
= 25C to T
A
= 25C and I
LOAD
to I
BUCK
in Electrical Characteristics 3
Updated Notes 2, 3 and 4 4
Updated G21 in Typical Performance Characteristics 6
Added Figure 13 16
Updated Related Parts 20
LTC3588-1
20
35881fa
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900

FAX: (408) 434-0507

www.linear.com LINEAR TECHNOLOGY CORPORATION 2010
LT 0910 REV A PRINTED IN USA
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35881 TA02a
PZ1
V
IN
CAP
V
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D1
D0
PZ2
PGOOD
SW
V
OUT
LTC3588-1
LT3009-3.3
GND
1F
6V
4.7F
6V
47F
25V
C
OUT1
10F
6V
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1F
6V
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V
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SHDN
IN OUT
GND
V
OUT2
3.3V
20mA
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OUT1
C
OUT1
(F)
C
OUT2
= 1F
V
O
U
T

R
I
P
P
L
E

P
E
A
K
-
T
O
-
P
E
A
K

(
m
V
)
35881 TA02b
120
60
0
40
20
80
100
10 100
V
OUT1
(LTC3588-1)
V
OUT2
(LT3009-3.3)