Analog Integrated Circuit Design
A video course under the NPTEL Nagendra Krishnapura
Department of Electrical Engineering Indian Institute of Technology, Madras Chennai, 600036, India
National Programme on Technology Enhanced Learning
Nagendra Krishnapura
Analog Integrated Circuit Design
Nagendra Krishnapura: Introduction
www: http://www.ee.iitm.ac.in/nagendra e-mail: nagendra@iitm.ac.in
Website has reference material, problem sets from other analog courses, and other resources
Nagendra Krishnapura
Analog Integrated Circuit Design
Modern signal processing systems
Sensor(s)
Digital Processing
Actuator(s) ...
...0100011011...
DSP
...
Continuous-time Continuous-amplitude
...
Discrete -time Discrete -amplitude
Continuous-time Continuous-amplitude
Interface Electronics (Signal Conditioning) (A-D and D-A Conversion)
Picture source: Prof. Shanthi Pavan
Nagendra Krishnapura
Analog Integrated Circuit Design
Analog circuits in modern systems on VLSI chips
Analog to digital conversion Digital to analog conversion Amplication Signal processing circuits at high frequencies Power management-voltage references, voltage regulators Oscillators, Phase locked loops The last two are found even on many digital ICs
Nagendra Krishnapura
Analog Integrated Circuit Design
Analog circuits in modern systems on VLSI chips
Analog to digital conversion Digital to analog conversion Amplication Signal processing circuits at high frequencies Power management-voltage references, voltage regulators Oscillators, Phase locked loops The last two are found even on many digital ICs
Nagendra Krishnapura
Analog Integrated Circuit Design
Image sensor
Chip Micrograph
Voltage Regulator Column CDS circuits
703 x 499 pixels (VGA format)
Timing Generator I/O circuit Chip size: 4.74mm x 6.34mm
10b pipelined ADC
H. Takahashi et al., A 3.9 m pixel pitch VGA format 10b digital image sensor with 1.5-transistor/pixel, IEEE International Solid-State Circuits Conference, vol. XVII, pp. 108 - 109, February 2004.
Nagendra Krishnapura
Analog Integrated Circuit Design
Wireless LAN transceiver
M. Zargari et al., A single-chip dual-band tri-mode CMOS transceiver for IEEE 802.11a/b/g WLAN, IEEE International Solid-State Circuits Conference, vol. XVII, pp. 96 - 97, February 2004.
Nagendra Krishnapura
Analog Integrated Circuit Design
DRAM
64 I/Os ADDRESSES AND CONTROL 64 I/Os
BANK 3 ROW DECODERS BANK 2 COLUMN DECODERS
DATA LINES
BANK 1
1088 SENSE AMPS 512K ARRAY
BANK 0
VPP PUMP
K. Hardee et al. A 0.6V 205MHz 19.5ns tRC 16Mb embedded DRAM, IEEE International Solid-State Circuits Conference, vol. XVII, pp. 200 - 201, February 2004.
Nagendra Krishnapura
Analog Integrated Circuit Design
Analog IC design in India
Many companies starting analog centers Multinationals and Indian start ups Big demand for skilled designers Interesting and protable activity
Nagendra Krishnapura
Analog Integrated Circuit Design
Course goals
Learn to design negative feedback circuits on CMOS ICs Negative feedback for controlling the output Ampliers, voltage references, voltage regulators, biasing Phase locked loops Filters
Nagendra Krishnapura
Analog Integrated Circuit Design
Course prerequisites
Circuit analysis-small and large signal Laplace transforms, frequency response, Bode plots, Differential equations Ideal opamp circuits; Opamp nonidealities Single transistor ampliers, differential pairs
Nagendra Krishnapura
Analog Integrated Circuit Design
Course contents
Nagendra Krishnapura
Analog Integrated Circuit Design
Course contents-Negative feedback ampliers
Ampliers using negative feedback Stability, Frequency compensation Negative feedback circuits using opamps Opamp models
Nagendra Krishnapura
Analog Integrated Circuit Design
Course contents-Opamps on CMOS ICs
Components available on a CMOS integrated circuit Device models-dc small signal, dc large signal, ac small signal, mismatch, noise Single stage opamp Cascode opamps Two stage opamp with miller compensation
Nagendra Krishnapura
Analog Integrated Circuit Design
Course contents-Fully differential circuits
Differential and common mode half circuits, common mode feedback Fully differential miller compensated opamp Fully differential feedforward compensated opamp
Nagendra Krishnapura
Analog Integrated Circuit Design
Course contents-Phase locked loop
Frequency multiplication using negative feedback Type I, type II loops Oscillators Phase noise basics PLL noise transfer functions
Nagendra Krishnapura
Analog Integrated Circuit Design
Course contents-Design of opamps
Single stage opamp Folded, telescopic cascode opamps Two stage opamp Fully differential opamps and common mode feedback Applications: Bandgap reference, constant gm bias generation
Nagendra Krishnapura
Analog Integrated Circuit Design
Course contents-Applications
Bandgap reference Constant current and constant gm bias generators Continuous-time lters Switched capacitor lters
Nagendra Krishnapura
Analog Integrated Circuit Design
What is design and how do I learn it?
Nagendra Krishnapura
Analog Integrated Circuit Design
Design versus Analysis
Design: Create something that doesnt yet exist Analysis: Analyze something that exists
Nagendra Krishnapura
Analog Integrated Circuit Design
To be able to design
Knowing analysis is necessary, not sufcient Multiple ways of looking at building blocks Trial and error approaches Approximations Intuitive thinking/understanding Curiosity Open mind Thoroughness
Nagendra Krishnapura
Analog Integrated Circuit Design
Intuition
Intuitive thinking is not sloppy thinking! Relate problems to other problems already solved Use boundary conditions, dimension checks etc. Build your intuition
Solve many problems Think about why the answer is what it is Come up with the form of the solution before applying full blown analysis
Nagendra Krishnapura
Analog Integrated Circuit Design
Using these lectures
Nagendra Krishnapura
Analog Integrated Circuit Design
Using these lectures
Take notes as you watch Work out all the steps in solving a problemDont just watch it being solved Expect to spend about three hours to understand an hour long lecture
Nagendra Krishnapura
Analog Integrated Circuit Design
Brief overview of prerequisites
Nagendra Krishnapura
Analog Integrated Circuit Design
Circuit analysis
Nodal analysis-Kirchoffs Current Law (KCL) at each node Solve N simultaneous equations for an N node circuit Mesh analysis-Kirchoffs Voltage Law (KVL) around each loop Solve M simultaneous equations for a circuit with M independent loops
Nagendra Krishnapura
Analog Integrated Circuit Design
Nodal analysis
i11 (v ) + i12 (v ) + . . . + i1N (v ) = i1 i21 (v ) + i22 (v ) + . . . + i2N (v ) = i2 . . . iN 1 (v ) + iN 2 (v ) + . . . + iNN (v ) = iN
ikl : Current in the branch between nodes k and l ikk : Current in the branch between node k and ground vk : Voltage at node k ; v = [v1 v2 . . . vN ]T ik : Current source into node k ikl can be a nonlinear function of v
Nagendra Krishnapura Analog Integrated Circuit Design
Nodal analysisLinear circuits
g11 v1 + g12 v2 + . . . + g1N vN g21 v1 + g22 v2 + . . . + g2N vN gN 1 v1 + gN 2 v2 + . . . + gNN vN
= i1 = i2 . . . = iN
gkl : Conductance between nodes k and l gkk : Conductance between node k and ground vk : Voltage at node k ik : Current source into node k
Nagendra Krishnapura Analog Integrated Circuit Design
Nodal analysisIndependent voltage source
. . . gk 1 v1 + gk 2 v2 + . . . + gkN vN vk = ik . . . = Vo node k
node k
Ideal voltage source Vo connected to node k
Nagendra Krishnapura
Analog Integrated Circuit Design
Nodal analysisVoltage controlled voltage source
. . . gk 1 v1 + gk 2 v2 + . . . + gkN vN vk kvl = ik . . . = 0 node k
node k
Voltage controlled voltage source vk = kvl driving node k
Nagendra Krishnapura
Analog Integrated Circuit Design
Nodal analysisControlled voltage source
gk 1 v1 + gk 2 v2 + . . . + gkl vl + . . . + gkN vN vk gk 1 v1 + gk 2 v2 + . . . + + . . . + gkN vN Rm gl 1 v1 + gl 2 v2 + . . . + glk vk + . . . + glN vN v gl 1 v1 + gl 2 v2 + . . . k + . . . + glN vN Rm
= ik = ik = il = il
node k node k node l node l
Current controlled voltage source vk = Rm ikl driving node k
Nagendra Krishnapura
Analog Integrated Circuit Design
Nodal analysisControlled current source
gk 1 v1 + gk 2 v2 + . . . + gkl vl + . . . + gkN vN gk 1 v1 + gk 2 v2 + . . . + gkl vl gm vl + . . . + gkN vN
= ik + gm vl = ik
Voltage controlled current source i0 = gm vl driving node k
Nagendra Krishnapura
Analog Integrated Circuit Design
Nodal analysisIdeal opamp
. . . gm1 v1 + gm2 v2 + . . . + gmN vN vk vl = im . . . = 0 node m
node m
Ideal opamp with input terminals at nodes k , l and output at node m
Nagendra Krishnapura
Analog Integrated Circuit Design
Nodal analysissolution
g11 g12 . . . g1N g21 g22 . . . g2N . . . i1 v1 i2 v2 = . . . . . . iN vN gN 1 gN 2 . . . gNN Gv v = i = G 1 i
gkl : Conductance between nodes k and l gkk : Conductance between node k and ground vk : Voltage at node k ik : Current source into node k Modied terms for voltage sources or controlled sources Matrix inversion yields the solution
Nagendra Krishnapura Analog Integrated Circuit Design
Nodal analysissolution
g11 g12 . . . i1 . . . g1N g21 g22 . . . i2 . . . g2N . . . vk = gN 1 gN 2 . . . iN . . . gNN g11 g12 . . . g1k . . . g1N g21 g22 . . . g2k . . . g2N . . . gN 1 gN 2 . . . gNk . . . gNN Cramers rule can be used for matrix inversion
Nagendra Krishnapura
Analog Integrated Circuit Design
Circuits with capacitors and inductors
I1 (s) V1 (s) Y11 (s)Y12 (s) . . . Y1N (s) I2 (s) Y21 (s)Y22 (s) . . . Y2N (s) V2 (s) = . . . . . . . . . IN (s) VN (s) YN 1 (s)YN 2 (s) . . . YNN (s) Y(s)V (s) = I (s) V (s) = Y1 I (s)
Conductances gkl replaced by admittances Ykl (s) Roots of the determinant of Y(s) are system poles
Nagendra Krishnapura
Analog Integrated Circuit Design
Laplace transform analysis for linear systems
Input X (s) e e
st
Output H (s)X (s) H (s)est H (j )X (j ) H (j )ej t |H (j )| cos ( t + H (j )) (Steady state solution)
X (j )
j t
cos( t )
Linear time invariant system described by its transfer function H (s) H (s) is the laplace transform of the impulse response s = j implies a sinusoid of frequency
Nagendra Krishnapura Analog Integrated Circuit Design
Laplace transform analysis for linear systems
Transfer function H (s) (no poles at the origin) H (s) = Adc = Adc Single pole at the origin H (s) = u s
M k =1 1 + s /zk N k =2 1 + s /pk
1 + b1 s + b2 s 2 + . . . + b M s M 1 + b1 s + b2 s 2 + . . . + b N s N
M k =1 1 + s /zk N k =1 1 + s /pk
All poles pk must be in the left half plane for stability
Nagendra Krishnapura
Analog Integrated Circuit Design
Frequency and time domain analyses
Frequency domain Algebraic equations-easier solutions Only for linear systems Time domain Differential equations-more difcult to solve Can be used for nonlinear systems as well Piecewise linear systems occur quite frequently (e.g. saturation)
Nagendra Krishnapura
Analog Integrated Circuit Design
Bode plots
Sinusoidal steady state response characterized by |H (j )|, H (j ) Bode plot: Plot of 20 log |H (j )|, H (j ) versus log approximated by straight line segments Good approximation for real poles and zeros
Nagendra Krishnapura
Analog Integrated Circuit Design
Simulators
Very powerful tools, indispensable for complex calculations, but GIGO! Matlab/Octave: System level analysis (Frequency response, pole-zero, transfer functions) Spice: Circuit analysis Maxima: Symbolic analysis
Nagendra Krishnapura
Analog Integrated Circuit Design
References
Recorded lectures: http://www.ee.iitm.ac.in/nagendra/videolectures Behzad Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, August 2000. Hayt and Kemmerly, Engineering Circuit Analysis, McGraw Hill, 6/e. B. P. Lathi, Linear Systems and Signals, Oxford University Press, 2 edition, 2004. Sergio Franco, Design with operational ampliers and analog ICs, Tata McGraw Hill.
Nagendra Krishnapura
Analog Integrated Circuit Design
