DC TO AC CONVERSION: INVERSION

22.5. DC TO AC CONVERSION: INVERSION

Dc to ac converters constitute a signicant portion of power electronic converters. These converters, also called inverters , are used in applications such as electric motor drives, uninterruptible power supplies (UPS), and utility applications such as grid connection of renewable energy sources. Inverters for single phase ac and three-phase three-wire ac systems are described in this section.

22.5.1. Single-Phase AC Synthesis

In an ac system both the voltage and the current should be able to reverse in polarity. Further, the voltage and current polarities may or may not be the same at a given time. Thus, a dc to ac converter implementation should be able to output a voltage independent of current polarity. In the full bridge dc to dc converter shown in Fig. 22-19a the primary circuit consisting of four controlled switches, also called H-bridge , has two bi-positional switch implementations. Each bi-positional switch has bidirectional current capability but only positive output voltage (AN >, BN > 0). However, based on the duty cycles, the dierence of the outputs, V AB = AN BN , can reverse in polarity. Thus the H-bridge is used for synthesizing single phase ac voltage from a dc voltage.

Figure 22.19. Single-phase inverter: (a) circuit, (b) quasi-square wave synthesis.

22.5.1.1. Quasi-Square Wave Inverter. The simplest form of dc to ac conversion, albeit with poor quality, is synthesis of quasi-square wave ac instead of a pure sine wave. Diagonally opposite switches in the H-bridge are turned on simultaneously. The pulse width of each pair is controlled to adjust the magnitude of the fundamental component, while the switching frequency is equal to the required output frequency. The synthesized voltage waveform is shown in Fig. 22-19b . The peak value of fundamental and harmonic components are

(22-31) where d is the duty ratio and n the harmonic number. This converter is widely used for low cost low power UPS applications where the voltage waveform quality is not important. Incandescent lighting, universal input motors, and loads with a diode bridge or power factor corrected front end (discussed in Sec. 22.8) are not aected by the voltage waveform quality. The load current, i AB , has harmonics based on the load characteristics. Sometimes an LC lter is added at the output to reduce the harmonic content. Low power low cost inverters such as those used to generate ac from 14 V dc in automobiles usually have quasi square wave voltage output. 22.5.1.2. Single Phase Sinusoidal Voltage Synthesis.

For applications requiring low voltage and current distortion high-frequency PWM is utilized to generate a sinusoidally varying average voltage. The power converter used is the H-bridge shown in Fig. 22-19a . The duty ratio for each bipositional switch, also called one leg of the inverter, is varied sinusoidally. The switching signals are generated by comparison of a sinusoidally varying control voltage with a triangle wave as shown in Fig. 2220. Equations relating the control voltages, duty ratios, and the averaged output voltages are as follows:

Figure 22.20. Single-phase sinusoidal ac synthesis waveforms.

(22-32)

(22-33)

(22-34)

(22-35)

(22-36)

(22-37)

(22-38

(22-39) Here and are peak values of control voltage and the triangle wave is the modulation index, m = 2 f
m

respectively,

is the

angular frequency of the sinusoid to be synthesized, while d A (t ) and d B (t ) are duty ratios of switches S1 and S3, respectively. In Eq. (22-39) k PWM may be regarded as the gain of the power converter that amplies the control signal c (t ) to the average output voltage . The maximum peak value of the output voltage, obtained for m = 1, is V in . This is signicantly lower than that obtainable with the quasi square wave inverter (4V in /). However, harmonics in the output voltage are signicantly reduced and are at much higher frequencies: k f
s

l f

m,

where k and l are integers such that k +

l is odd. 4 The switching frequency is much higher than the output frequency f
m,

which has a maximum value of about 50/60 Hz for standard applications

or 400 Hz for aerospace applications.

If the load is inductive, such as a motor, the current harmonics are much lower than the voltage harmonics. For several applications maximum harmonic content for the voltage and current output from the inverter is specied. In these cases an L-C lter similar to the buck converter is used. Depending upon the application a two-stage L-C lter or a two-stage notch lter (to suppress the dominant switching frequency harmonics) may be used. Further, it has to be ensured that when connected to the load, the lter is adequately damped by a combination of passive selection and the control loop. This aspect is particularly important for line connected applications where the inverter is supplying power to the utility grid. Equation (22-37) can be rewritten as

(22-40) This clearly shows that on an average basis the "neutral point" for the output of one inverter leg is V in /2 above "N," i.e., at the mid-point of the input dc bus. Thus using the same H-bridge a split-phase ac (two ac voltages 180 out of phase with a common return) can be generated if the center point of the dc bus is available as the neutral connection for the output. This type of conguration is commonly used in generating 120/240 from the same inverter. Furthermore, using three legs instead of two the converter can generate three phase voltages with a neutral connection, with the exibility that the three phases may be loaded independently. Common applications are inverters for interfacing photovoltaic systems to the utility grid and exporting power from vehicles.

22.5.2. Three-Phase AC Synthesis

The last observation in the previous section leads us to three-phase inverters without a neutral connection. The circuit consists of three legs, one for each output with a common dc link as shown in Fig. 22-21a . Using sine triangle PWM with control voltages oset by 120 (instead of 180 as in the singlephase case) we obtain:

(22-41)

(22-42)

k = A, B, C
(22-43)

Figure 22.21. Three-phase ac synthesis: (a) converter, (b) output voltage vectors, (c) instantaneous waveforms.
The zero sequence component of the output voltages, z = (AN + BN + CN )/3 = V in /2, does not appear in the line-to-line voltages, and since there is no neutral connection to the inverter, zero sequence currents do not ow. The maximum peak value of the output line-to-line voltages is obtain higher magnitude for the fundamental component of the output voltages at the cost of adding harmonics. However, if, instead of all the harmonics, only the fundamental and those harmonics of the square wave .

Using square wave inversion, similar to that for the single-phase case, we can

that contribute zero sequence component (triplen harmonics) are retained, the output voltage amplitude increases without adding harmonics to the lineto-line voltages and the line currents. Usually, addition of the third harmonic component is sucient. 35, 36 As described in Refs. 37 and 38 the most eective method is to add the following zero sequence component to the control voltages for each phase:

(22-44) In terms of output voltage generation, this is equivalent to space vector modulation (SVM).

22.5.3. Space Vector Modulation

This method has become extremely popular for three-phase inverters in the low to medium power range. A very brief description will be presented here and details can be found in Refs. 31, 35, and 37. For three-phase systems with no zero sequence component, i.e., z = (AN + BN + CN )/3 = 0, the three-phase quantities are linearly dependent and can be transformed to a two-phase orthogonal system commonly called the system. Quantities in the system can be represented by complex numbers and as two-dimensional vectors in a plane, called space vectors . The transformation from the abc to quantities is given by

(22-45) With negative sequence components absent, and components of steady state sinusoidal abc quantities are also sinusoids with constant amplitude and a 90 phase dierence between them. Under transient conditions they are arbitrary time varying quantities. Thus, for balanced sinusoidal conditions, the space vector circle of radius(3/2) rotates in counter clockwise direction with angular frequency equal to frequency of the abc voltages, and describes a being the peak of the phase voltage.

The instantaneous output voltages of the three-phase inverter shown in Fig. 22-21a can assume eight dierent combinations based on which of the six

MOSFETs are on. The space vectors for these eight combinations are shown in Fig. 22-21b . For example, vector V 4 denoted by (100) corresponds to switch states AN = V in , BN = 0, and CN = 0. The vectors V 0(000) and

V 7(111) have zero magnitude and are called zero vectors .

Synthesis utilizing the idea of space vectors is done by dividing one switching time period into several time intervals, for each of which a particular voltage vector is output by the inverter. These time intervals and the vectors applied are chosen so that the average over one switching time period is equal to the desired output voltage vector. For the reference voltage vector , shown in Fig. 22-21b , the nonzero vectors adjacent to it (V 1 and V 3), and the zero vectors (V 0 and V 7) are utilized as shown in Fig. 22-21c . Relative values of time intervals t 1 and t 3 determine the direction, while ratio of t 0 to the switching time period determines the magnitude of the output vector synthesized. The formulae for time intervals are as follows:

(22-46)

(22-47)

t 0/2 = T sw /2-(t 1 + t 3)
(22-48) where is the angle of the vector measured from the axis. The

maximum obtainable average vector lies along the hexagon connecting the six nonzero vectors. As stated earlier, balanced three-phase sinusoidal quantities describe a circle in the plane. Thus, to synthesize distortion free and balanced three-phase sinusoidal voltages, the circle must be contained within the hexagon, i.e., with a maximum radius of . This gives the maximum peak value of line-to-line voltage obtained with SVM as . This is signicantly higher than that obtained using sine triangle PWM: .

Further, the sequence and choice of vectors applied can be optimized to minimize number of switchings and ripple in the resulting currents. 39 There are several variations of SVM, each suited to a dierent application. SVM can be easily implemented digitally using microcontrollers or DSPs, and is advantageous in control of three-phase ac machines using vector control and direct torque control (DTC). 40-44 Experimental waveforms for an SVM inverter are shown in Fig. 22-22.

Figure 22.22. Experimentally measured PWM signal and line current for one phase of a three-phase SVM inverter: (a) 60 Hz synthesis; (b) 20 Hz synthesis.

22.5.4. Multilevel Converters

The converter topologies described so far are based on a two-level converter leg (bi-positional switch), where the output voltage of each leg (AN ) can be either zero or V in . The converters are therefore called two-level converters.

In two-level converters, all the switches have to block the full dc bus voltage (V in ). For high-power applications IGBTs and GTOs are used as the semiconductor switches. These have higher voltage and current ratings and lower on-state voltage drop compared to power MOSFETs, but cannot switch as fast. In some applications like some motor drives and utility applications, even the voltage ratings of available IGBTs and GTOs is not suciently high. Simple series connection, to achieve a higher blocking voltage, has problems of steady-state and dynamic voltage sharing. Moreover, due to the low switching frequency of high-power switches, the output voltage and current quality deteriorates. These issues are addressed by multilevel converters. In a multilevel converter,45,46 the output of each phase leg can attain more than two levels leading to improved quality of the output voltage and current. The circuit comprising each leg and its proper operation ensure that voltage blocked by the switches reduces as the number of levels is increased. In addition, multilevel converters are modular to some extent, thereby making it easy to scale voltage ratings by increasing the number of "cells." 22.5.4.1. Multilevel PWM. For two-level PWM, comparison of the control voltage with a triangle wave generates the switching signal for the top switch, while the bottom switch is controlled in complement to the top switch. Each of these two states corresponds to the two levels of the output voltage. For multilevel converters, there are more than two eective switch states, each of which corresponds to an output voltage level. For example, in a three-level converter there are three eective states q (t ) = 0, 1, 2, corresponding to output voltage levels AN (t ) = 0, V in /2, V in . The control voltage c (t ) is compared with two triangle waves to obtain two switching signals q 1(t ) and

q 2(t ), and the eective switching signal can be obtained as q (t ) = q 1(t ) + q 2(t ) as shown in Fig. 22-23. The output voltage is then given by AN = q (t )
(V in /2). Switching signals for the individual switches are derived using q (t ) and the circuit topology. For the waveforms in Fig. 22-23, f
s

= 60 Hz and V in

= 2 kV. Since the v AN waveform is closer to desired sinusoid in the three level case, the output voltage has lower THD even if the switching frequency is low. For three-phase converters, space-vector-based PWM can be used for generating the switching signals,47 the advantage in the multilevel case compared to the two-level case being the signicantly higher number of output voltage vectors.

Figure 22.23. Multilevel triangle comparison.

22.5.4.2. Multilevel Converter Topologies. The chief multilevel converter topologies are diode clamped, ying capacitor, and cascaded full bridge. 22.5.4.2.1. DIODE CLAMPED CONVERTER. Figure 22-24a shows one phase leg of a three-level diode-clamped converter. 48 The input dc bus is split by means of capacitors. Pairs of switches are turned on to obtain three dierent voltage levels for the output voltage AN = 0, V in /2, V in as shown in Fig. 22-24c . It is evident that this circuit acts like a tri-positional switch connecting the output to one of three positions of the input dc bus. The minimum voltage at point "b 1," and the maximum voltage at point "b 2," is clamped to V in /2 by the blocking diodes

D b 1 and D b 2, respectively. Thus, all the switches have to block V in /2 during

their o state. This topology can be extended to more number of levels.

However, it is eventually limited by the voltage rating of blocking diodes, which have to block increasing voltages as the number of levels is increased. One-phase leg of a ve-level version is shown in Fig. 22-24b .

Figure 22.24. Diode clamped converters: (a) one phase of a threelevel converter, (b) one phase of velevel converter, (c) switching states in a three-level converter.

22.5.4.2.2. FLYING CAPACITOR CONVERTER. Figure 22-25 shows the topology of a three-level ying capacitor converter.

The basic idea here is that the capacitor C is charged to half the input dc voltage by appropriate control of the switches. The capacitor can then be inserted in series with the output voltage, either adding or subtracting V in /2, and thereby giving three output voltage levels.

Figure 22.25. Three-level ying capacitor converter.

22.5.4.2.3. CASCADED FULL BRIDGE CONVERTERS. In this scheme,49 single-phase H-bridges shown in Fig. 22-19a are connected in series at the output to form one single-phase circuit as shown in Fig. 2226a . Three separate circuits are required for a three-phase implementation. A delta connection of cascaded converters is shown in Fig. 22-26b . Since all the H-bridges are same, the circuit is modular and can be scaled by adding more H-bridges. However, dc sources at the input of all H-bridges have to be isolated from each other. It is also possible to combine dierent types of HbridgesIGBT-based fast switching type and GTO-based slower switching typeor have dierent dc bus voltage magnitudes in dierent bridges to optimize losses or increase eective number of levels. 50 One example of the cascaded approach is the multilevel drive oering from Robicon, now a part of Siemens. 51 In some solar inverters the dc input (PV panel) is common and the isolation is carried out by transformers at the output of the H-bridges;

the transformer secondaries are then connected in series to obtain the stepped waveform construction of the AC voltage.

Figure 22.26. Cascaded converters: (a) one phase; (b) three-phase connection in delta.

22.5.4.2.4. O THER MULTILEVEL CONVERTERS. The recently proposed modular multilevel converter 52 uses series connected cells that together generate the required voltage for each phase. The dc voltages to each cell have to be isolated similar to the case of cascaded converters. The major advantage of this approach is scalability and redundancy. Other types of multilevel converters proposed recently are the interconnected multilevel converter53 and the Hexagram converter. 54
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H. Wayne Beaty; Donald G. Fink: Standard Handbook for Electrical Engineers, Sixteenth Edition. DC TO AC CONVERSION: INVERSION, Chapter (McGraw-Hill Professional, 2013), AccessEngineering

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