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35 pages, 1652 KiB  
Review
Traditional and Hybrid Topologies for Single-/Three-Phase Transformerless Multilevel Inverters
by Ayesha Wajiha Aslam, Jamil Hassan, Víctor Minambres-Marcos, Ali Gaeed Seger Al-salloomee and Carlos Roncero-Clemente
Electronics 2024, 13(20), 4058; https://doi.org/10.3390/electronics13204058 (registering DOI) - 15 Oct 2024
Viewed by 221
Abstract
With increasing interest in integrating solar power into the utility grid, multilevel inverters are gaining much more attention for medium- and high-power applications due to their high-quality waveform, low voltage stress across active components, and low total harmonic distortion in output voltage. However, [...] Read more.
With increasing interest in integrating solar power into the utility grid, multilevel inverters are gaining much more attention for medium- and high-power applications due to their high-quality waveform, low voltage stress across active components, and low total harmonic distortion in output voltage. However, to achieve these benefits, a large number of active and passive components are required. A transformer is also required to provide galvanic isolation, which increases its size and weight and reduces its power density and efficiency. In order to overcome the disadvantages posed by transformer-based inverters, research is being conducted on the transformerless topology of multilevel inverters. The first aim of this review article is to summarize traditional transformerless multilevel inverters (TMLIs) considering both single- and three-phase topologies. Secondly, the main aim of this article is to provide a detailed overview of the hybrid topologies of TMLIs that employ fewer components for photovoltaic applications. In addition, this study compares traditional and hybrid single-/three-phase topologies in terms of component count and performance factors, which will be useful to researchers. Full article
18 pages, 11335 KiB  
Article
Self-Balanced Switched-Capacitor Common-Grounding Boost Multilevel Inverter
by Kaibalya Prasad Panda, Sumant Kumar Dalai, Gayadhar Panda, Ramasamy T. Naayagi and Sze Sing Lee
Electronics 2024, 13(13), 2608; https://doi.org/10.3390/electronics13132608 - 3 Jul 2024
Viewed by 757
Abstract
Transformerless inverters have been extensively deployed in photovoltaic (PV) applications, owing to features such as high efficiency, high power quality, and low cost. However, the leakage current in such inverters due to the absence of galvanic isolation has resulted in several topological modifications. [...] Read more.
Transformerless inverters have been extensively deployed in photovoltaic (PV) applications, owing to features such as high efficiency, high power quality, and low cost. However, the leakage current in such inverters due to the absence of galvanic isolation has resulted in several topological modifications. This paper introduces a single-input switched-capacitor (SC)-based multilevel inverter (MLI) that is capable of eliminating the leakage current due to its common-ground structure. Also, the proposed inverter has the capability of single-stage voltage boosting, which is essential in PV systems. The series–parallel switching facilitates the self-balancing of SCs, which, in turn, assists in voltage boosting. Moreover, the proposed MLI synthesizes a seven-level output using only eight switches. Following an in-depth analysis of the circuit operation, modulation scheme, and power losses, a detailed comparison among recently developed seven-level MLIs is carried out, which verifies the design's superiority. Extensive simulation and experimental results are presented to validate the prominent features of the seven-level MLI under dynamic operating conditions. Full article
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Figure 1

Figure 1
<p>General layout of transformerless MLI with <span class="html-italic">L</span>-filter.</p>
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<p>Recently developed CGMLIs: (<b>a</b>) MLI in [<a href="#B33-electronics-13-02608" class="html-bibr">33</a>], (<b>b</b>) MLI in [<a href="#B34-electronics-13-02608" class="html-bibr">34</a>], (<b>c</b>) MLI in [<a href="#B24-electronics-13-02608" class="html-bibr">24</a>], (<b>d</b>) MLI in [<a href="#B36-electronics-13-02608" class="html-bibr">36</a>], (<b>e</b>) MLI in [<a href="#B35-electronics-13-02608" class="html-bibr">35</a>], and (<b>f</b>) MLI in [<a href="#B37-electronics-13-02608" class="html-bibr">37</a>].</p>
Full article ">Figure 3
<p>Evolution of the CGMLI circuit: (<b>a</b>) existing SCMLI [<a href="#B39-electronics-13-02608" class="html-bibr">39</a>], (<b>b</b>) existing SCMLI [<a href="#B40-electronics-13-02608" class="html-bibr">40</a>], (<b>c</b>) proposed seven-level CGMLI topology.</p>
Full article ">Figure 4
<p>Operational states of the proposed seven-level CGMLI considering inductive loading.</p>
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<p>Multi-carrier PWM control and switching pattern for synthesizing seven-level output.</p>
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<p>Equivalent circuit for conduction loss analysis.</p>
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<p>Power loss and efficiency comparison for 7-level structures.</p>
Full article ">Figure 8
<p>Simulation analysis of open-loop operation, (<b>a</b>) with changes in <span class="html-italic">M<sub>i</sub></span>, (<b>b</b>) with changes in load, (<b>c</b>) with dc input variation, and (<b>d</b>) voltage stress across all the switches.</p>
Full article ">Figure 9
<p>Closed-loop control circuit of the grid-tied system with the proposed CGMLI.</p>
Full article ">Figure 10
<p>Simulation analysis of closed-loop operation, (<b>a</b>) waveforms under dynamic change in PV irradiation, (<b>b</b>) results under change in lagging to leading power factor, and (<b>c</b>) input current and capacitor currents.</p>
Full article ">Figure 11
<p>Experimental test bench of the proposed CGMLI.</p>
Full article ">Figure 12
<p>Experimental waveforms under changes in the modulation index (<b>a</b>) from 0.95 to 0.6, (<b>b</b>) and from 0.6 to 0.95.</p>
Full article ">Figure 12 Cont.
<p>Experimental waveforms under changes in the modulation index (<b>a</b>) from 0.95 to 0.6, (<b>b</b>) and from 0.6 to 0.95.</p>
Full article ">Figure 13
<p>Experimental waveforms (<b>a</b>) under changes in load from no-load to <span class="html-italic">RL</span>-load, (<b>b</b>) under changes in load from <span class="html-italic">R</span>-load to <span class="html-italic">RL</span>-load, and (<b>c</b>) sudden decrease in the dc input from 100 V to 80 V.</p>
Full article ">Figure 14
<p>(<b>a</b>) Voltage stress across all the switches, input current, and capacitor currents, (<b>b</b>) without input choke, (<b>c</b>) with input choke, and (<b>d</b>) efficiency and power loss evaluation under different loadings.</p>
Full article ">Figure 15
<p>Experimental analysis of closed-loop operation, (<b>a</b>) under unity power factor, (<b>b</b>) 0.707 lagging power factor (−45°), (<b>c</b>) 0.707 leading power factor (+45°), and (<b>d</b>) leakage current.</p>
Full article ">
23 pages, 5616 KiB  
Review
Advancing Electric Vehicle Infrastructure: A Review and Exploration of Battery-Assisted DC Fast Charging Stations
by Ahmet Aksoz, Burçak Asal, Emre Biçer, Saadin Oyucu, Merve Gençtürk and Saeed Golestan
Energies 2024, 17(13), 3117; https://doi.org/10.3390/en17133117 - 25 Jun 2024
Viewed by 1075
Abstract
Concerns over fossil fuel depletion, fluctuating fuel prices, and CO2 emissions have accelerated the development of electric vehicle (EV) technologies. This article reviews advancements in EV fast charging technology and explores the development of battery-assisted DC fast charging stations to address the [...] Read more.
Concerns over fossil fuel depletion, fluctuating fuel prices, and CO2 emissions have accelerated the development of electric vehicle (EV) technologies. This article reviews advancements in EV fast charging technology and explores the development of battery-assisted DC fast charging stations to address the limitations of traditional chargers. Our proposed approach integrates battery storage, allowing chargers to operate independently of the electric grid by storing electrical energy during off-peak hours and releasing it during peak times. This reduces dependence on grid power and enhances grid stability. Moreover, the transformer-less, modular design of the proposed solution offers greater flexibility, scalability, and reduced installation costs. Additionally, the use of smart energy management systems, incorporating artificial intelligence and machine learning techniques to dynamically adjust charging rates, will be discussed to optimize efficiency and cost-effectiveness. Full article
(This article belongs to the Topic Advanced Electric Vehicle Technology, 2nd Volume)
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Figure 1
<p>EV Charging Structures [<a href="#B2-energies-17-03117" class="html-bibr">2</a>,<a href="#B3-energies-17-03117" class="html-bibr">3</a>].</p>
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<p>AC Source-Isolated Charging Circuit Topology [<a href="#B7-energies-17-03117" class="html-bibr">7</a>].</p>
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<p>Low-power charging topology powered by single-phase AC [<a href="#B8-energies-17-03117" class="html-bibr">8</a>].</p>
Full article ">Figure 4
<p>7.5–11.5 kW AC charging topology developed by Tesla, Inc. (Austin, Texas, USA). [<a href="#B9-energies-17-03117" class="html-bibr">9</a>].</p>
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<p>Circuit topology providing bidirectional power transfer [<a href="#B10-energies-17-03117" class="html-bibr">10</a>].</p>
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<p>Three-phase AC/AC converter topology [<a href="#B11-energies-17-03117" class="html-bibr">11</a>].</p>
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<p>Software protocols between charging station connectors [<a href="#B26-energies-17-03117" class="html-bibr">26</a>].</p>
Full article ">Figure 8
<p>Regulator circuit [<a href="#B27-energies-17-03117" class="html-bibr">27</a>].</p>
Full article ">Figure 9
<p>CP signal and PWM signal comparison circuit [<a href="#B31-energies-17-03117" class="html-bibr">31</a>].</p>
Full article ">Figure 10
<p>A preliminary design image of Slave BMS [<a href="#B34-energies-17-03117" class="html-bibr">34</a>].</p>
Full article ">Figure 11
<p>Schematic representation of charge and discharge process of Li-ion battery.</p>
Full article ">Figure 12
<p>Transformerless DC Fast Charging station modeling block diagram.</p>
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<p>Simulation results.</p>
Full article ">Figure 14
<p>Battery terminal voltage and Battery charging current (up) DC output current and Grid A-phase voltage and current (below).</p>
Full article ">
19 pages, 8066 KiB  
Article
Transformer-Less Seven-Level Inverter with Triple Boosting Capability and Common Ground
by Naser Vosoughi Kurdkandi, Kazem Varesi, Jaber Fallah Ardashir, Wei Gao, Zhi Cao and Chunting (Chris) Mi
Energies 2024, 17(13), 3115; https://doi.org/10.3390/en17133115 - 25 Jun 2024
Viewed by 547
Abstract
This paper proposes a single-phase, transformer-less, seven-level inverter that utilizes eight switches, three capacitors, and two diodes to produce seven voltage levels with triple boosting ability. The availability of the common-ground point eliminates the leakage current in PV applications. The proposed Transformer-Less Triple-Boosting [...] Read more.
This paper proposes a single-phase, transformer-less, seven-level inverter that utilizes eight switches, three capacitors, and two diodes to produce seven voltage levels with triple boosting ability. The availability of the common-ground point eliminates the leakage current in PV applications. The proposed Transformer-Less Triple-Boosting Seven-Level Inverter (TLTB7LI) has the ability to feed different types of loads from non-unity to unity power factors. The voltage balancing of capacitors takes place naturally without the need for auxiliary circuits and complicated control strategies. This paper investigates the appropriateness of the proposed TLTB7LI for grid-connected application. The Peak Current Controller (PCC) is employed to generate the switching pulses and regulate the active/reactive power transfer between the converter and the output, which guarantees the high quality of injected current to the output. Moreover, the operational principles, its control technique, as well as the design procedure of the key components of the proposed inverter have been presented. The superiority of the proposed inverter over existing counterparts has been verified through comparative analysis. The simulation and experimental analysis validated the proper operation of the proposed TLTB7LI. Full article
(This article belongs to the Topic Power Electronics Converters)
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Figure 1

Figure 1
<p>(<b>a</b>) The proposed TLTB7LI configuration, the equivalent circuit of proposed seven-level inverter during the following states: (<b>b</b>) 1, (<b>c</b>) 2, (<b>d</b>) 3, (<b>e</b>) 4, (<b>f</b>) 5, (<b>g</b>) 6, (<b>h</b>) 7.</p>
Full article ">Figure 2
<p>The closed-loop control system of suggested inverter based on PCC method.</p>
Full article ">Figure 3
<p>Grid current and reference waveforms with division of zones.</p>
Full article ">Figure 4
<p>Comparison results, a = Proposed, b = [<a href="#B28-energies-17-03115" class="html-bibr">28</a>], c = [<a href="#B29-energies-17-03115" class="html-bibr">29</a>], d = [<a href="#B30-energies-17-03115" class="html-bibr">30</a>], e = [<a href="#B31-energies-17-03115" class="html-bibr">31</a>], f = [<a href="#B32-energies-17-03115" class="html-bibr">32</a>], g = [<a href="#B33-energies-17-03115" class="html-bibr">33</a>], h = [<a href="#B34-energies-17-03115" class="html-bibr">34</a>], i = [<a href="#B35-energies-17-03115" class="html-bibr">35</a>], j = [<a href="#B36-energies-17-03115" class="html-bibr">36</a>], k = [<a href="#B37-energies-17-03115" class="html-bibr">37</a>], l = [<a href="#B38-energies-17-03115" class="html-bibr">38</a>], m = [<a href="#B39-energies-17-03115" class="html-bibr">39</a>], n = [<a href="#B40-energies-17-03115" class="html-bibr">40</a>], o = [<a href="#B41-energies-17-03115" class="html-bibr">41</a>], p = [<a href="#B42-energies-17-03115" class="html-bibr">42</a>] (<b>a</b>) <span class="html-italic">BF</span>, (<b>b</b>) <span class="html-italic">N<sub>IGBT</sub></span>, (<b>c</b>) <span class="html-italic">N<sub>S</sub></span>, (<b>d</b>) <span class="html-italic">N<sub>C</sub></span>, (<b>e</b>) <span class="html-italic">N<sub>D</sub></span>, (<b>f</b>) <span class="html-italic">CF</span> (<span class="html-italic">α</span> = 0.5), (<b>g</b>) <span class="html-italic">CF</span> (<span class="html-italic">α</span> = 1.5).</p>
Full article ">Figure 5
<p>Seven-level output voltage of the proposed inverter and grid voltage.</p>
Full article ">Figure 6
<p>Experimental setup of proposed seven-level inverter: (<b>1</b>) <span class="html-italic">C</span><sub>1</sub>; (<b>2</b>) <span class="html-italic">C</span><sub>2</sub>; (<b>3</b>) <span class="html-italic">C</span><sub>3</sub>; (<b>4</b>) <span class="html-italic">L<sub>f</sub></span>; (<b>5</b>) power board, gate-driver cards, and heatsink; (<b>6</b>) TMS320F28069 microcontroller and interfacing board; (<b>7</b>) current prob; (<b>8</b>) chroma power supply; (<b>9</b>) power supply for gat-driver cards and interfacing board; (<b>10</b>) oscilloscope; (<b>11</b>) CCS12.3.0 software.</p>
Full article ">Figure 7
<p>Experimental results in 0.77kW output power: (<b>a</b>) seven-level inverter voltage and load current, (<b>b</b>) seven-level inverter voltage and load voltage, (<b>c</b>) load voltage and load current, and (<b>d</b>) voltage of capacitors <span class="html-italic">C</span><sub>1</sub> and <span class="html-italic">C</span><sub>2</sub>.</p>
Full article ">Figure 8
<p>Dynamic response: (<b>a</b>) inverter voltage with output load current in step change conditions in output power from 0.38 kw to 0.77 kW; (<b>b</b>) output load voltage with output load current in step change conditions in output power from 0.38 KW 0.77 KW; (<b>c</b>) seven-level inverter voltage with output load current in startup of the inverter; (<b>d</b>) seven-level inverter output voltage with output load current during inverter shutdown.</p>
Full article ">Figure 9
<p>Voltage of inverter capacitors with output load current in step change conditions in output power from 0.38 kW to 0.77 kW: (<b>a</b>) voltage of capacitor <span class="html-italic">C</span><sub>1</sub>, (<b>b</b>) voltage of capacitor <span class="html-italic">C</span><sub>2</sub>, (<b>c</b>) voltage of capacitor <span class="html-italic">C</span><sub>3</sub>, and (<b>d</b>) voltage stress of <span class="html-italic">S</span><sub>1</sub> and <span class="html-italic">S</span><sub>2</sub> switches.</p>
Full article ">Figure 10
<p>(<b>a</b>) Voltage of capacitor <span class="html-italic">C</span><sub>3</sub> with voltage stress of diode <span class="html-italic">D</span><sub>2</sub>, (<b>b</b>) voltage stress of switches <span class="html-italic">S</span><sub>3</sub> and S<sub>4</sub>, (<b>c</b>) voltage stress of switches <span class="html-italic">S</span><sub>5</sub> and <span class="html-italic">S</span><sub>6</sub>, and (<b>d</b>) voltage stress of switches <span class="html-italic">S</span><sub>7</sub> and <span class="html-italic">S</span><sub>8</sub>.</p>
Full article ">Figure 11
<p>Dynamic response and transient condition: (<b>a</b>) seven-level inverter voltage with output load current when connecting to inverter at <span class="html-italic">ωt</span> = 0, (<b>b</b>) seven-level inverter voltage with output load current when disconnecting from the inverter at <span class="html-italic">ωt</span> = π/2, (<b>c</b>) seven-level inverter voltage with output load current when connecting to inverter at <span class="html-italic">ωt</span> = π/2.</p>
Full article ">Figure 12
<p>Efficiencies of the proposed converter (<b>a</b>) with the input voltage of 133 V, (<b>b</b>) with the input voltage of 200 V, (<b>c</b>) with the input voltage of 400 V, (<b>d</b>) loss breakdown.</p>
Full article ">Figure 13
<p>FFT analysis of grid current at 0.77 kW output power.</p>
Full article ">Figure 14
<p>FFT analysis of inverter output voltage before <span class="html-italic">L<sub>f</sub></span> filter.</p>
Full article ">
15 pages, 7261 KiB  
Article
Transformerless Partial Power AC-Link Step-Down Converter
by Rodrigo A. Bugueño, Hugues Renaudineau, Ana M. Llor and Christian A. Rojas
Mathematics 2024, 12(13), 1939; https://doi.org/10.3390/math12131939 - 22 Jun 2024
Viewed by 1040
Abstract
DC–DC power converters are essential for various applications, including photovoltaic systems, green hydrogen production, battery charging, and DC microgrids. Partial Power Converters (PPC) are notable for their efficiency, processing only a fraction of total power and reducing conversion losses, but this performance is [...] Read more.
DC–DC power converters are essential for various applications, including photovoltaic systems, green hydrogen production, battery charging, and DC microgrids. Partial Power Converters (PPC) are notable for their efficiency, processing only a fraction of total power and reducing conversion losses, but this performance is overshadowed by the high cost of its construction, associated with high-frequency transformers (HFT). This paper introduces a transformerless partial power AC-link step-down converter, eliminating the need for an HFT and reducing costs while improving power density. An experimental validation using a reduced-scale prototype demonstrates the converter’s operation with a peak efficiency of 93.2% and overall efficiency above 92%, demonstrating the experimental viability of the converter. The proposed AC-link seen as a two-port network is shown to be very attractive for DC–DC step-down operations, and as a possible replacement of traditional PPC. Full article
(This article belongs to the Special Issue Mathematical Modeling and Optimization of Energy Systems)
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Figure 1

Figure 1
<p>PPC concept illustration—(<b>a</b>) traditional full-power converter, (<b>b</b>) IPOS step-up PPC (Type I), (<b>c</b>) ISOP step-down PPC (Type II).</p>
Full article ">Figure 2
<p>Proposed transformerless partial power step-down converter topology: (<b>a</b>) Proposed transformerless partial power step-down converter topology. (<b>b</b>) Traditional full bridge partial power step-down converter topology.</p>
Full article ">Figure 3
<p>Simulation waveforms of the state variables of the converter: (<b>a</b>) <math display="inline"><semantics> <mrow> <mi>α</mi> <mo>=</mo> <mn>0.4</mn> </mrow> </semantics></math>; (<b>b</b>) <math display="inline"><semantics> <mrow> <mi>α</mi> <mo>=</mo> <mn>0.2</mn> </mrow> </semantics></math>. (i) Switching signals <math display="inline"><semantics> <msub> <mi>s</mi> <mi>a</mi> </msub> </semantics></math> and <math display="inline"><semantics> <msub> <mi>s</mi> <mi>c</mi> </msub> </semantics></math>; (ii) AC-link inductor current <math display="inline"><semantics> <msub> <mi>i</mi> <mn>1</mn> </msub> </semantics></math>; (iii) Output inductor current <math display="inline"><semantics> <msub> <mi>i</mi> <mn>2</mn> </msub> </semantics></math>; (iv) AC-link capacitors voltages <math display="inline"><semantics> <msub> <mi>v</mi> <mn>1</mn> </msub> </semantics></math> and <math display="inline"><semantics> <msub> <mi>v</mi> <mn>2</mn> </msub> </semantics></math>; (v) Output capacitor voltage <math display="inline"><semantics> <msub> <mi>v</mi> <mi>o</mi> </msub> </semantics></math>.</p>
Full article ">Figure 4
<p>Experimental prototype of the partial power AC-link converter.</p>
Full article ">Figure 5
<p>Experimental results of the system for different values of <math display="inline"><semantics> <mi>α</mi> </semantics></math>: (<b>a</b>) <math display="inline"><semantics> <msub> <mi>s</mi> <mi>a</mi> </msub> </semantics></math> and <math display="inline"><semantics> <msub> <mi>s</mi> <mi>c</mi> </msub> </semantics></math> gate-source voltages, AC-link inductor current <math display="inline"><semantics> <msub> <mi>i</mi> <mn>1</mn> </msub> </semantics></math> and output inductor current <math display="inline"><semantics> <msub> <mi>i</mi> <mn>2</mn> </msub> </semantics></math> with <math display="inline"><semantics> <mrow> <mi>α</mi> <mo>=</mo> <mn>0.4</mn> </mrow> </semantics></math>; (<b>b</b>) <math display="inline"><semantics> <msub> <mi>s</mi> <mi>a</mi> </msub> </semantics></math> and <math display="inline"><semantics> <msub> <mi>s</mi> <mi>c</mi> </msub> </semantics></math> gate-source voltages, AC-link inductor current <math display="inline"><semantics> <msub> <mi>i</mi> <mn>1</mn> </msub> </semantics></math> and output inductor current <math display="inline"><semantics> <msub> <mi>i</mi> <mn>2</mn> </msub> </semantics></math> with <math display="inline"><semantics> <mrow> <mi>α</mi> <mo>=</mo> <mn>0.2</mn> </mrow> </semantics></math>; (<b>c</b>) <math display="inline"><semantics> <msub> <mi>s</mi> <mi>a</mi> </msub> </semantics></math> gate-source voltage, AC-link capacitor voltages <math display="inline"><semantics> <msub> <mi>v</mi> <mn>1</mn> </msub> </semantics></math> and <math display="inline"><semantics> <msub> <mi>v</mi> <mn>2</mn> </msub> </semantics></math>, and output capacitor voltage <math display="inline"><semantics> <msub> <mi>v</mi> <mi>o</mi> </msub> </semantics></math> with <math display="inline"><semantics> <mrow> <mi>α</mi> <mo>=</mo> <mn>0.4</mn> </mrow> </semantics></math>; (<b>d</b>) <math display="inline"><semantics> <msub> <mi>s</mi> <mi>a</mi> </msub> </semantics></math> gate-source voltage, AC-link capacitor voltages <math display="inline"><semantics> <msub> <mi>v</mi> <mn>1</mn> </msub> </semantics></math> and <math display="inline"><semantics> <msub> <mi>v</mi> <mn>2</mn> </msub> </semantics></math>, and output capacitor voltage <math display="inline"><semantics> <msub> <mi>v</mi> <mi>o</mi> </msub> </semantics></math> with <math display="inline"><semantics> <mrow> <mi>α</mi> <mo>=</mo> <mn>0.2</mn> </mrow> </semantics></math>.</p>
Full article ">Figure 6
<p>Experimental results and their expected results from simulation: Left hand-side: waveforms for <math display="inline"><semantics> <mrow> <mi>α</mi> <mo>=</mo> <mn>0.4</mn> </mrow> </semantics></math>; Right hand-side: waveforms for <math display="inline"><semantics> <mrow> <mi>α</mi> <mo>=</mo> <mn>0.2</mn> </mrow> </semantics></math>. (i) AC-link inductor current <math display="inline"><semantics> <msub> <mi>i</mi> <mn>1</mn> </msub> </semantics></math>; (ii) Output inductor current <math display="inline"><semantics> <msub> <mi>i</mi> <mn>2</mn> </msub> </semantics></math>; (iii) AC-link capacitor voltage <math display="inline"><semantics> <msub> <mi>v</mi> <mn>1</mn> </msub> </semantics></math>; (iv) AC-link capacitor voltage <math display="inline"><semantics> <msub> <mi>v</mi> <mn>2</mn> </msub> </semantics></math>; (v) Output capacitor voltage <math display="inline"><semantics> <msub> <mi>v</mi> <mi>o</mi> </msub> </semantics></math>.</p>
Full article ">Figure 7
<p>Dynamic response of the converter: (<b>a</b>) Output inductor current <math display="inline"><semantics> <msub> <mi>i</mi> <mn>2</mn> </msub> </semantics></math> and output capacitor voltage <math display="inline"><semantics> <msub> <mi>v</mi> <mi>o</mi> </msub> </semantics></math> for <math display="inline"><semantics> <mi>α</mi> </semantics></math> step from <math display="inline"><semantics> <mrow> <mn>0.3</mn> </mrow> </semantics></math> to <math display="inline"><semantics> <mrow> <mn>0.4</mn> </mrow> </semantics></math> with <math display="inline"><semantics> <mrow> <msub> <mi>R</mi> <mi>o</mi> </msub> <mo>=</mo> <mn>10</mn> <mspace width="3.33333pt"/> <mi mathvariant="sans-serif">Ω</mi> </mrow> </semantics></math>; (<b>b</b>) Output inductor current <math display="inline"><semantics> <msub> <mi>i</mi> <mn>2</mn> </msub> </semantics></math> and output capacitor voltage <math display="inline"><semantics> <msub> <mi>v</mi> <mi>o</mi> </msub> </semantics></math> for load step from <math display="inline"><semantics> <mrow> <msub> <mi>R</mi> <mi>o</mi> </msub> <mo>=</mo> <mn>10</mn> <mspace width="3.33333pt"/> <mi mathvariant="sans-serif">Ω</mi> </mrow> </semantics></math> to <math display="inline"><semantics> <mrow> <mn>5</mn> <mspace width="3.33333pt"/> <mi mathvariant="sans-serif">Ω</mi> </mrow> </semantics></math> with <math display="inline"><semantics> <mrow> <mi>α</mi> <mo>=</mo> <mn>0.4</mn> </mrow> </semantics></math>.</p>
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<p>Experimental dynamics and their expected results from simulation and theoretical model: Left hand-side: <math display="inline"><semantics> <mi>α</mi> </semantics></math> step from <math display="inline"><semantics> <mrow> <mn>0.3</mn> </mrow> </semantics></math> to <math display="inline"><semantics> <mrow> <mn>0.4</mn> </mrow> </semantics></math> with <math display="inline"><semantics> <mrow> <msub> <mi>R</mi> <mi>o</mi> </msub> <mo>=</mo> <mn>10</mn> <mspace width="3.33333pt"/> <mi mathvariant="sans-serif">Ω</mi> </mrow> </semantics></math>; Right hand-side: load step form <math display="inline"><semantics> <mrow> <msub> <mi>R</mi> <mi>o</mi> </msub> <mo>=</mo> <mn>10</mn> <mspace width="3.33333pt"/> <mi mathvariant="sans-serif">Ω</mi> </mrow> </semantics></math> to <math display="inline"><semantics> <mrow> <mn>5</mn> <mspace width="3.33333pt"/> <mi mathvariant="sans-serif">Ω</mi> </mrow> </semantics></math> with <math display="inline"><semantics> <mrow> <mi>α</mi> <mo>=</mo> <mn>0.4</mn> </mrow> </semantics></math>. (<b>a</b>) Output inductor current <math display="inline"><semantics> <msub> <mi>i</mi> <mn>2</mn> </msub> </semantics></math>; (<b>b</b>) Output capacitor voltage <math display="inline"><semantics> <msub> <mi>v</mi> <mi>o</mi> </msub> </semantics></math>.</p>
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<p>Voltage gain error and efficiency of the proposed converter: (<b>a</b>) Theoretical and experimental output voltage correlation and experimental error; (<b>b</b>) Input and output power correlation and efficiency.</p>
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<p>Efficiency comparison between proposed transformerless AC-link converter and FB-PPC step-down converters for different voltage gain: (<b>a</b>) <math display="inline"><semantics> <mrow> <msub> <mi>G</mi> <mi>v</mi> </msub> <mo>=</mo> <mn>10</mn> <mo>/</mo> <mn>20</mn> </mrow> </semantics></math>; (<b>b</b>) <math display="inline"><semantics> <mrow> <msub> <mi>G</mi> <mi>v</mi> </msub> <mo>=</mo> <mn>9</mn> <mo>/</mo> <mn>19</mn> </mrow> </semantics></math>; (<b>c</b>) <math display="inline"><semantics> <mrow> <msub> <mi>G</mi> <mi>v</mi> </msub> <mo>=</mo> <mn>8</mn> <mo>/</mo> <mn>18</mn> </mrow> </semantics></math>; (<b>d</b>) <math display="inline"><semantics> <mrow> <msub> <mi>G</mi> <mi>v</mi> </msub> <mo>=</mo> <mn>7</mn> <mo>/</mo> <mn>17</mn> </mrow> </semantics></math>.</p>
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<p>Dynamic simulation response of the proposed AC-link and conventional PPC converter: Left hand-side: <math display="inline"><semantics> <mi>α</mi> </semantics></math> step from <math display="inline"><semantics> <mrow> <mn>0.3</mn> </mrow> </semantics></math> to <math display="inline"><semantics> <mrow> <mn>0.4</mn> </mrow> </semantics></math> with <math display="inline"><semantics> <mrow> <msub> <mi>R</mi> <mi>o</mi> </msub> <mo>=</mo> <mn>10</mn> <mspace width="3.33333pt"/> <mi mathvariant="sans-serif">Ω</mi> </mrow> </semantics></math>; Right hand-side: load step form <math display="inline"><semantics> <mrow> <msub> <mi>R</mi> <mi>o</mi> </msub> <mo>=</mo> <mn>10</mn> <mspace width="3.33333pt"/> <mi mathvariant="sans-serif">Ω</mi> </mrow> </semantics></math> to <math display="inline"><semantics> <mrow> <mn>5</mn> <mspace width="3.33333pt"/> <mi mathvariant="sans-serif">Ω</mi> </mrow> </semantics></math> with <math display="inline"><semantics> <mrow> <mi>α</mi> <mo>=</mo> <mn>0.4</mn> </mrow> </semantics></math>. (<b>a</b>) Output inductor current <math display="inline"><semantics> <msub> <mi>i</mi> <mn>2</mn> </msub> </semantics></math>; (<b>b</b>) Output capacitor voltage <math display="inline"><semantics> <msub> <mi>v</mi> <mi>o</mi> </msub> </semantics></math>.</p>
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15 pages, 2625 KiB  
Article
A Novel Single-Phase Five-Level Current-Source Inverter Topology
by Mayas Fakher Aldin and Kfir Jack Dagan
Electronics 2024, 13(7), 1213; https://doi.org/10.3390/electronics13071213 - 26 Mar 2024
Viewed by 1601
Abstract
Recent technological advances have renewed the research interest in current-source inverters (CSIs). Nonetheless, CSI research still falls behind its voltage-source counterpart with regards to topologies, modulation, and control. Acknowledging the above, this paper presents a novel single-phase five-level CSI topology. The proposed circuit [...] Read more.
Recent technological advances have renewed the research interest in current-source inverters (CSIs). Nonetheless, CSI research still falls behind its voltage-source counterpart with regards to topologies, modulation, and control. Acknowledging the above, this paper presents a novel single-phase five-level CSI topology. The proposed circuit utilises eight switches and two inductors for the generation of five distinct output levels while maintaining low output voltage THD and dv/dt. Furthermore, by offsetting the inductor currents from a binary 1:2 to a trinary 1:3 ratio, the proposed inverter can generate seven current levels at its output. The inverter offers built-in short-circuit protection and can boost a low input DC voltage to a higher peak AC output voltage. These merits, alongside an electrolytic-capacitor-free design, simple current balancing mechanism, and fault-tolerant characteristics, make it a promising candidate for PV module-integrated inverter (MII) systems. The current topology utilises two inductors but is fully functional with single-inductor operation. The paper provides a functional analysis of the inverter topology alongside the inverter switching states and corresponding conduction paths. A detailed analysis of the inductor current dynamics as well as a current-balancing algorithm for dual- and single-inductor operations are given. The theoretical analysis of the proposed circuit and its functional operation are verified using simulations and experimental results carried out on a laboratory prototype. Full article
(This article belongs to the Special Issue New Trends in Power Electronics for Microgrids)
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Figure 1
<p>Schematic of the proposed single-phase five-level current-source inverter.</p>
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<p>Conduction paths for the various output current levels.</p>
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<p>Simulated results for inverter current <math display="inline"><semantics> <msub> <mi>i</mi> <mrow> <mi>I</mi> <mi>N</mi> <mi>V</mi> </mrow> </msub> </semantics></math> and inductor currents <math display="inline"><semantics> <msub> <mi>i</mi> <mrow> <mi>L</mi> <mn>1</mn> </mrow> </msub> </semantics></math> and <math display="inline"><semantics> <msub> <mi>i</mi> <mrow> <mi>L</mi> <mn>2</mn> </mrow> </msub> </semantics></math>.</p>
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<p>Simulated results for the load voltage <math display="inline"><semantics> <msub> <mi>v</mi> <mi>o</mi> </msub> </semantics></math> in the (<b>a</b>) time domain, (<b>b</b>) frequency domain—100 lower harmonics, and (<b>c</b>) frequency domain—40 lower harmonics.</p>
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<p>Single-phase five-level CSI laboratory setup depicting (<b>a</b>) converter laboratory prototype and (<b>b</b>) schematic of the controller and sensor configuration.</p>
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<p>Experimental results for (<b>a</b>) inverter current <math display="inline"><semantics> <msub> <mi>i</mi> <mrow> <mi>I</mi> <mi>N</mi> <mi>V</mi> </mrow> </msub> </semantics></math> and (<b>b</b>) inductor currents <math display="inline"><semantics> <msub> <mi>i</mi> <mrow> <mi>L</mi> <mn>1</mn> </mrow> </msub> </semantics></math> (black) and <math display="inline"><semantics> <msub> <mi>i</mi> <mrow> <mi>L</mi> <mn>2</mn> </mrow> </msub> </semantics></math> (grey).</p>
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<p>Experimental results for load voltage <math display="inline"><semantics> <msub> <mi>v</mi> <mi>o</mi> </msub> </semantics></math> in the (<b>a</b>) time domain, (<b>b</b>) frequency domain—100 lower harmonics, and (<b>c</b>) frequency domain—40 lower harmonics.</p>
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<p>Controller board gating signals for switches (<b>a</b>) <math display="inline"><semantics> <msub> <mi>S</mi> <mn>11</mn> </msub> </semantics></math>, (<b>b</b>) <math display="inline"><semantics> <msub> <mi>S</mi> <mn>12</mn> </msub> </semantics></math>, (<b>c</b>) <math display="inline"><semantics> <msub> <mi>S</mi> <mn>21</mn> </msub> </semantics></math>, and (<b>d</b>) <math display="inline"><semantics> <msub> <mi>S</mi> <mn>22</mn> </msub> </semantics></math>.</p>
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17 pages, 22640 KiB  
Article
A Transformerless Converter with Common-Mode Decoupling in Low-Voltage Hybrid Grids
by Lei Wang, Xinfang Zhang, Xiaoqing Han, Yu Ren, Baifu Zhang and Peng Wang
Processes 2024, 12(3), 507; https://doi.org/10.3390/pr12030507 - 29 Feb 2024
Viewed by 850
Abstract
Compared with isolated converters, transformerless converters are a preferred choice in low-voltage grids due to their efficiency and lower cost. However, leakage current and common mode (CM) voltage appear through the converter and ground in hybrid grids, which consist of AC and DC [...] Read more.
Compared with isolated converters, transformerless converters are a preferred choice in low-voltage grids due to their efficiency and lower cost. However, leakage current and common mode (CM) voltage appear through the converter and ground in hybrid grids, which consist of AC and DC subgrids. The leakage current and CM voltage seriously influence operation and power quality in low-voltage distribution systems. This paper proposes a common-ground-type (CGT) converter equipped with a CM decoupling control strategy to eliminate the leakage current and CM voltage. A CM model is derived, and the leakage current and CM voltage are analyzed in detail. A CGT four-leg converter is constructed to eliminate the high frequency CM voltage. A dual DQ current control loop is developed to suppress the DC double-frequency ripple. Additionally, an active damping method is proposed, based on the neutral current feed-forward plus inductor current feedback, to attenuate the low frequency CM voltage. The proposed converter and control strategy guarantees excellent performance in suppressing leakage current and CM voltage. The DC voltage of the converter connected to the DC grid maintains stability and symmetry. The leakage current is significantly reduced, and the leakage current suppression performance is improved by 83%. The high frequency CM voltage is attenuated from 50%udc to 2%udc, and the low frequency CM voltage is suppressed from approximately 32%udc to 3%udc, which is a significant improvement compared with the traditional method. In addition, the proposed control strategy has good transient performance when the load changes abruptly. Finally, an experimental platform is established to validate the feasibility and performance. The experiment results showed that the proposed control strategy improves the system performance and power quality. Full article
(This article belongs to the Section Energy Systems)
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Figure 1
<p>Low-voltage hybrid distribution systems.</p>
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<p>Leakage current between AC and DC systems.</p>
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<p>Three-phase four-leg converter.</p>
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<p>CM equivalent circuit of three-phase four-leg converter.</p>
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<p>CM circuit of CGT topology: (<b>a</b>) DC-side leakage current reduction; (<b>b</b>) AC-side leakage current reduction.</p>
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<p>CGT four-leg converter and control scheme.</p>
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<p>Equivalent circuit of the neutral leg.</p>
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<p>Voltage control loop of neutral leg.</p>
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<p>Bode plot of <span class="html-italic">G<sub>v</sub></span> (<span class="html-italic">s</span>), <span class="html-italic">G<sub>d</sub></span>(<span class="html-italic">s</span>), and <span class="html-italic">G<sub>lc</sub></span>(<span class="html-italic">s</span>).</p>
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<p>Neutral leg control with ICF: (<b>a</b>) The active damping method based on ICF; (<b>b</b>) equivalent diagram of control strategy with ICF.</p>
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<p>Bode plots of <span class="html-italic">T<sub>v</sub></span> (<span class="html-italic">s</span>) under different loop gain.</p>
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<p>Neutral leg control by ICF + NCF.</p>
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<p>Neutral leg equivalent transformation diagram by ICF.</p>
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<p>Neutral leg equivalent circuit by ICF.</p>
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<p>Amplitude-frequency curves of virtual impedance <math display="inline"><semantics> <mrow> <msub> <mrow> <mi>Z</mi> </mrow> <mrow> <mi mathvariant="italic">LN</mi> </mrow> </msub> </mrow> </semantics></math>(<span class="html-italic">s</span>), <math display="inline"><semantics> <mrow> <msub> <mrow> <mi>Z</mi> </mrow> <mrow> <mi>N</mi> </mrow> </msub> </mrow> </semantics></math>(<span class="html-italic">s</span>), <math display="inline"><semantics> <mrow> <msub> <mrow> <mi>Z</mi> </mrow> <mrow> <mi mathvariant="italic">ICF</mi> </mrow> </msub> </mrow> </semantics></math>(<span class="html-italic">s</span>).</p>
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<p>Neutral leg equivalent diagram: (<b>a</b>) equivalent diagram based on capacitor current feedback; (<b>b</b>) equivalent diagram based on ICF + NCF.</p>
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<p>Neutral leg equivalent circuit diagram by ICF + NCF.</p>
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<p>Amplitude-frequency curves of virtual impedance <math display="inline"><semantics> <mrow> <msub> <mrow> <mi>Z</mi> </mrow> <mrow> <mi mathvariant="italic">LN</mi> </mrow> </msub> </mrow> </semantics></math>(<span class="html-italic">s</span>), <math display="inline"><semantics> <mrow> <msub> <mrow> <mi>Z</mi> </mrow> <mrow> <mi mathvariant="italic">ICF</mi> </mrow> </msub> </mrow> </semantics></math>(<span class="html-italic">s</span>), <math display="inline"><semantics> <mrow> <msub> <mrow> <mi>Z</mi> </mrow> <mrow> <mi mathvariant="italic">ICF</mi> <mo>+</mo> <mi mathvariant="italic">NCF</mi> </mrow> </msub> </mrow> </semantics></math>(<span class="html-italic">s</span>).</p>
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<p>Experimental platform.</p>
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<p>Experimental results of voltage from PCC to DC midpoint and DC to ground voltage: (<b>a</b>) conventional four-leg topology; (<b>b</b>) CGT four-leg topology.</p>
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<p>Leakage current waveform: (<b>a</b>) conventional four-leg topology; (<b>b</b>) CGT four-leg topology with proposed control strategy.</p>
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<p>Waveform of the converter with conventional control: (<b>a</b>) waveform of the <span class="html-italic">u<sub>dc</sub></span>; (<b>b</b>) waveforms of the <span class="html-italic">u<sub>dc_P</sub></span> and <span class="html-italic">u<sub>dc_N</sub></span>.</p>
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<p>Waveform of the converter with proposed control strategy: (<b>a</b>) waveform of the <span class="html-italic">u<sub>dc</sub></span>; (<b>b</b>) waveforms of the <span class="html-italic">u<sub>dc_P</sub></span> and <span class="html-italic">u<sub>dc_N</sub></span> with ICF + NCF.</p>
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<p>Waveform of suppressing the low frequency CM voltage: (<b>a</b>) without ICF + NCF; (<b>b</b>) with ICF + NCF.</p>
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<p>Transient waveform of the converter. (<b>a</b>) The conventional control; (<b>b</b>) the proposed control.</p>
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33 pages, 8053 KiB  
Review
A Comprehensive Review on Space Vector Based-PWM Techniques for Common Mode Voltage Mitigation in Photovoltaic Multi-Level Inverters
by Zouhaira Ben Mahmoud and Adel Khedher
Energies 2024, 17(4), 916; https://doi.org/10.3390/en17040916 - 15 Feb 2024
Viewed by 1297
Abstract
Nowadays, transformer-less photovoltaic (PV) multi-level inverters (MLIs) are commonly employed in both industrial and residential settings. This structure has attracted increased attention due to its unique advantages, such as higher efficiency, lower cost and size, better waveform quality, and inherent fault tolerance. However, [...] Read more.
Nowadays, transformer-less photovoltaic (PV) multi-level inverters (MLIs) are commonly employed in both industrial and residential settings. This structure has attracted increased attention due to its unique advantages, such as higher efficiency, lower cost and size, better waveform quality, and inherent fault tolerance. However, due to the removal of the transformer, the common mode voltage (CMV) becomes one of the crucial issues in transformer-less PV MLIs. The high-frequency variation in CMV results in a leakage current that deteriorates the line current quality, increases the PV power system losses, leads to severe electromagnetic emissions (EMI), reduces the PV array lifespan, and causes personal safety problems. In this regard, this paper presents a review of the existing and recent research on modulation techniques based on space vector pulse width modulation (SVPWMs) that overcome this issue in transformer-less three-level NPC-MLIs (3L-NPC-MLIs). The reduced CMV-SVPWM (RCMV-SVPWM) can be mainly categorized as an RCMV-SVPWM based on the vector type, based on virtual vectors, and based on the two-level SVPWM (2L-SVPWM). Their features and their limitations in terms of several main criteria are discussed. In the final section of this paper, some challenges and future trends for this research area are projected. Full article
(This article belongs to the Special Issue Experimental and Numerical Analysis of Photovoltaic Inverters)
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Figure 1
<p>Synoptic diagram of PV conversion system.</p>
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<p>Classification of MLIs.</p>
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<p>General classification of CMV reduction methods in transformer-less inverters.</p>
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<p>Schematic circuit of 3L-NPC inverter.</p>
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<p>Schematic circuit of phase “a” for the following switching states: (<b>a</b>) P state, (<b>b</b>) O state, and (<b>c</b>) N state.</p>
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<p>(<b>a</b>) Path of the leakage current. (<b>b</b>) Equivalent common mode circuit.</p>
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<p>(<b>a</b>) 2L space vector diagram and (<b>b</b>) switching sequence distribution for sector 1.</p>
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<p>Obtained results of 2L SVPWM method for m = 1 and V<sub>dc</sub> = 300 V.</p>
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<p>The variation of RMS values of CMV and I<sub>L</sub> versus m variation.</p>
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<p>(<b>a</b>) 3L space vector diagram and (<b>b</b>) sector division.</p>
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<p>Switching sequence distribution for sector 1 and triangle 4.</p>
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<p>Obtained results of 3L NTV-SVPWM method for m = 1.15 and V<sub>dc</sub> = 300 V.</p>
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<p>The variation of RMS values of CMV and I<sub>L</sub> versus m variation.</p>
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<p>(<b>a</b>)Transformation of the 3L-SVD into six 2L-SVD; (<b>b</b>) Translation of <math display="inline"><semantics> <mrow> <msub> <mrow> <mover accent="true"> <mi>V</mi> <mo stretchy="true">¯</mo> </mover> </mrow> <mi>r</mi> </msub> </mrow> </semantics></math> to the center of the small hexagon.</p>
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<p>Switching.sequence distribution when <math display="inline"><semantics> <mrow> <msub> <mrow> <mover accent="true"> <mrow> <mi>U</mi> </mrow> <mo>¯</mo> </mover> </mrow> <mrow> <mi>k</mi> </mrow> </msub> </mrow> </semantics></math> is situated in subsector 1 of the first small hexagon.</p>
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<p>Obtained results of 3L hexagon SVPWM method for m = 0.8 and V<sub>dc</sub> = 300 V.</p>
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<p>The variation of RMS values of CMV and I<sub>L</sub> versus m variation.</p>
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<p>(<b>a</b>) 3L SVD using LMZ method; (<b>b</b>) Switching se quence distribution for sector 1.</p>
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<p>(<b>a</b>) 3L SVD using 2M1Z method; (<b>b</b>) Switching sequence distribution for sector 1.</p>
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<p>(<b>a</b>) 3L SVD using 3M method; (<b>b</b>) Switching sequence distribution for sector 1.</p>
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<p>(<b>a</b>) 3L SVD using 3M120 method; (<b>b</b>) Switching sequence distribution for sector 1.</p>
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<p>(<b>a</b>) 3L SVD using PCMV method; (<b>b</b>) 3L SVD using NCMV method; (<b>c</b>) Switching sequence distribution for PCMV method; (<b>d</b>) Switching sequence distribution for NCMV method.</p>
Full article ">Figure 22 Cont.
<p>(<b>a</b>) 3L SVD using PCMV method; (<b>b</b>) 3L SVD using NCMV method; (<b>c</b>) Switching sequence distribution for PCMV method; (<b>d</b>) Switching sequence distribution for NCMV method.</p>
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<p>(<b>a</b>) 3L SVD using VSVPWM1; (<b>b</b>) Sector division; (<b>c</b>)and (<b>d</b>) Possible Switching sequences distribution for region 3 of the first sector.</p>
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<p>(<b>a</b>,<b>b</b>) Sector division and virtual vectors localization using VSVPWM2; (<b>c</b>) Switching sequence distribution for the region <math display="inline"><semantics> <mrow> <msub> <mrow> <mi>A</mi> </mrow> <mrow> <mn>1</mn> </mrow> </msub> </mrow> </semantics></math>; (<b>d</b>) Switching sequence distribution for the region <math display="inline"><semantics> <mrow> <msubsup> <mrow> <mi>A</mi> </mrow> <mrow> <mn>1</mn> </mrow> <mrow> <mo>′</mo> </mrow> </msubsup> </mrow> </semantics></math>.</p>
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<p>(<b>a</b>,<b>b</b>) Sector division and virtual vectors localization using VSVPWM2; (<b>c</b>) Switching sequence distribution for the region <math display="inline"><semantics> <mrow> <msub> <mrow> <mi>A</mi> </mrow> <mrow> <mn>1</mn> </mrow> </msub> </mrow> </semantics></math>; (<b>d</b>) Switching sequence distribution for the region <math display="inline"><semantics> <mrow> <msubsup> <mrow> <mi>A</mi> </mrow> <mrow> <mn>1</mn> </mrow> <mrow> <mo>′</mo> </mrow> </msubsup> </mrow> </semantics></math>.</p>
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<p>(<b>a</b>) 3L-SVD using VSVPWM3; (<b>b</b>) Sector division; (<b>c</b>) Switching sequence distribution for the region <math display="inline"><semantics> <mrow> <msub> <mrow> <mi>R</mi> </mrow> <mrow> <mn>1</mn> </mrow> </msub> </mrow> </semantics></math> of sector 1.</p>
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<p>(<b>a</b>) 2L-SVPWM based on AZSPWM1; (<b>b</b>) 3L-SVPWM based on AZSPWM; (<b>c</b>) Switching sequence distribution for the 3L-SVPWM based on AZSPWM1.</p>
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32 pages, 13657 KiB  
Article
A Comprehensive Performance Analysis of a 48-Watt Transformerless DC-DC Boost Converter Using a Proportional–Integral–Derivative Controller with Special Attention to Inductor Design and Components Reliability
by Kuldeep Jayaswal, D. K. Palwalia and Josep M. Guerrero
Technologies 2024, 12(2), 18; https://doi.org/10.3390/technologies12020018 - 30 Jan 2024
Cited by 1 | Viewed by 2091
Abstract
In this research paper, a comprehensive performance analysis was carried out for a 48-watt transformerless DC-DC boost converter using a Proportional–Integral–Derivative (PID) controller through dynamic modeling. In a boost converter, the optimal design of the magnetic element plays an important role in efficient [...] Read more.
In this research paper, a comprehensive performance analysis was carried out for a 48-watt transformerless DC-DC boost converter using a Proportional–Integral–Derivative (PID) controller through dynamic modeling. In a boost converter, the optimal design of the magnetic element plays an important role in efficient energy transfer. This research paper emphasizes the design of an inductor using the Area Product Technique (APT) to analyze factors such as area product, window area, number of turns, and wire size. Observations were made by examining its response to changes in load current, supply voltage, and load resistance at frequency levels of 100 and 500 kHz. Moreover, this paper extended its investigation by analyzing the failure rates and reliability of active and passive components in a 48-watt boost converter, providing valuable insights about failure behavior and reliability. Frequency domain analysis was conducted to assess the controller’s stability and robustness. The results conclusively underscore the benefits of incorporating the designed PID controller in terms of achieving the desired regulation and rapid response to disturbances at 100 and 500 kHz. The findings emphasize the outstanding reliability of the inductor, evident from the significantly low failure rates in comparison to other circuit components. Conversely, the research also reveals the inherent vulnerability of the switching device (MOSFET), characterized by a higher failure rate and lower reliability. The MATLAB® Simulink platform was utilized to investigate the results. Full article
(This article belongs to the Collection Electrical Technologies)
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<p>The basic structure of power electronic converter.</p>
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<p>Structure of transformerless DC–DC converter topologies: (<b>a</b>) buck converter; (<b>b</b>) boost converter; (<b>c</b>) buck–boost converter. (<b>d</b>) Design configuration of inductor, “<span class="html-italic">L</span>” (toroidal).</p>
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<p>Dynamic switching states for modeling of transformerless DC–DC boost converter. (<b>a</b>) State I: switch turned “ON”. (<b>b</b>) State II: switch turned “OFF”.</p>
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<p>The closed–loop control scheme of transformerless DC–DC boost converter.</p>
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<p>Control scheme. (<b>a</b>) Proportional–Integral–Derivative (PID) controller; (<b>b</b>) linearized feedback control system for transformerless DC–DC boost converter.</p>
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<p>Perspectives of inductor saturation and its structure: (<b>a</b>) inductor with DC excitation with core saturation process; (<b>b</b>) BH curve for different materials (1: sheet steel, 2: silicon steel, 3: cast steel, 4: tungsten steel, 5: magnetic steel, 6: cast iron, 7: nickel, 8: cobalt, 9: magnetite); (<b>c</b>) the schematic of inductor “<span class="html-italic">L</span>” structure (toroidal).</p>
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<p>MATLAB<sup>®</sup> Simulink results for uncompensated transformerless DC-DC boost converter. (<b>a</b>) Output current response at 100 and 500 kHz (desired <span class="html-italic">I<sub>o</sub></span> = 2 A); (<b>b</b>) output voltage response at 100 and 500 kHz (desired <span class="html-italic">V<sub>o</sub></span> = 24 V).</p>
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<p>Step response of transformerless DC–DC boost converter (<b>a</b>) for uncompensated and compensated boost converter at 100 kHz (<b>b</b>) for uncompensated and compensated boost converter at 500 kHz.</p>
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<p>Bode response of transformerless DC–DC boost converter: (<b>a</b>) for uncompensated and compensated boost converters at 100 kHz; (<b>b</b>) for uncompensated and compensated boost converters at 500 kHz.</p>
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<p>MATLAB<sup>®</sup> Simulink results for uncompensated and compensated transformerless DC–DC boost converters. (<b>a</b>) Output current response at 100 kHz (desired <span class="html-italic">I<sub>o</sub></span> = 2 A). (<b>b</b>) Output voltage response at 100 kHz (desired <span class="html-italic">V<sub>o</sub></span> = 24 V). (<b>c</b>) Output current response at 500 kHz (desired <span class="html-italic">I<sub>o</sub></span> = 2 A). (<b>d</b>) Output voltage response at 500 kHz (desired <span class="html-italic">V<sub>o</sub></span> = 24 V).</p>
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<p>MATLAB<sup>®</sup> Simulink results: (<b>a</b>) voltage and current across MOSFET at 100 kHz; (<b>b</b>) voltage and current across the diode at 100 kHz; (<b>c</b>) voltage and current across inductor at 100 kHz; (<b>d</b>) voltage and current across the capacitor at 100 kHz.</p>
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<p>MATLAB<sup>®</sup> Simulink results: (<b>a</b>) voltage and current across MOSFET at 100 kHz; (<b>b</b>) voltage and current across the diode at 100 kHz; (<b>c</b>) voltage and current across inductor at 100 kHz; (<b>d</b>) voltage and current across the capacitor at 100 kHz.</p>
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<p>MATLAB<sup>®</sup> Simulink results: (<b>a</b>) voltage and current across MOSFET at 500 kHz; (<b>b</b>) voltage and current across the diode at 500 kHz; (<b>c</b>) voltage and current across inductor at 500 kHz; (<b>d</b>) voltage and current across the capacitor at 500 kHz.</p>
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<p>Design outcomes of inductor “<span class="html-italic">L</span>” in 48-watt transformerless boost converter for <span class="html-italic">V<sub>i</sub></span> = 12 V: (<b>a</b>) design of inductor at a frequency of 100 kHz; (<b>b</b>) design of inductor at a frequency of 500 kHz; (<b>c</b>) core cross-sectional area “Acs” vs. output current at 100 kHz; (<b>d</b>) window area vs. output current at 100 and 500 kHz; (<b>e</b>) number of turns “<span class="html-italic">N</span>” vs. output current at 100 and 500 kHz; (<b>f</b>) wire size (SWG) vs. output current at 100 and 500 kHz.</p>
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<p>Performance evaluation of inductor “<span class="html-italic">L</span>” at 100 and 500 kHz. (<b>a</b>) Response as a function of output current at <math display="inline"><semantics> <mrow> <msub> <mrow> <mi>V</mi> </mrow> <mrow> <mi>i</mi> </mrow> </msub> </mrow> </semantics></math> = 8 V, 12 V, and 16 V. (<b>b</b>) Response as a function of input voltage at <math display="inline"><semantics> <mrow> <msub> <mrow> <mi>R</mi> </mrow> <mrow> <mi>L</mi> </mrow> </msub> </mrow> </semantics></math> = 2.4 Ω, 4.8 Ω, and 24 Ω. (<b>c</b>) Response as a function of load resistance at <math display="inline"><semantics> <mrow> <msub> <mrow> <mi>V</mi> </mrow> <mrow> <mi>i</mi> </mrow> </msub> </mrow> </semantics></math> = 8 V, 12 V, and 16 V.</p>
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<p>Performance evaluation of inductor “<span class="html-italic">L</span>” through power loss assessment at 100 and 500 kHz frequencies. (<b>a</b>) Losses versus output current at <math display="inline"><semantics> <mrow> <msub> <mrow> <mi>V</mi> </mrow> <mrow> <mi>i</mi> </mrow> </msub> </mrow> </semantics></math> = 8 V, 12 V, and 16 V. (<b>b</b>) Losses versus input voltage at <math display="inline"><semantics> <mrow> <msub> <mrow> <mi>R</mi> </mrow> <mrow> <mi>L</mi> </mrow> </msub> </mrow> </semantics></math> = 2.4 Ω, 4.8 Ω, and 24 Ω. (<b>c</b>) Losses versus load resistance at <math display="inline"><semantics> <mrow> <msub> <mrow> <mi>V</mi> </mrow> <mrow> <mi>i</mi> </mrow> </msub> </mrow> </semantics></math> = 8 V, 12 V, and 16 V.</p>
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<p>Failure rates and reliability assessment outcomes of components in 48-Watt (12–24 V, 2 A, 100 kHz) transformerless DC–DC boost converter. (<b>a</b>) Failure rate response of inductor “<span class="html-italic">L</span>” as a function of duty cycle at 100 kHz. (<b>b</b>) Failure rate response of switch (MOSFET) as a function of duty cycle at 100 kHz. (<b>c</b>) Failure rate response of diode as a function of duty cycle at 100 kHz. (<b>d</b>) Failure rate response of capacitor as a function of duty cycle at 100 kHz. (<b>e</b>) Failure rate response of resistor as a function of duty cycle at 100 kHz. (<b>f</b>) Comparison of failure rates of all components as a function of duty cycle at 100 kHz. (<b>g</b>) Comparison of reliability for all components as a function of time.</p>
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20 pages, 2208 KiB  
Article
Analysis and Improved Behavior of a Single-Phase Transformerless PV Inverter
by Panfilo R. Martinez-Rodriguez, Gerardo Vazquez-Guzman, Gerardo O. Perez-Bustos, Jose M. Sosa-Zuñiga, Dalyndha Aztatzi-Pluma, Adolfo R. Lopez-Nuñez and Christopher J. Rodriguez-Cortes
Machines 2023, 11(12), 1091; https://doi.org/10.3390/machines11121091 - 16 Dec 2023
Viewed by 1651
Abstract
Transformerless inverters have an important role in the electrical energy market. The high-efficiency and reliable inverter concept is one of the most widely used inverters in single-phase photovoltaic systems because of its high efficiency, low cost, and reduced leakage ground current. However, the [...] Read more.
Transformerless inverters have an important role in the electrical energy market. The high-efficiency and reliable inverter concept is one of the most widely used inverters in single-phase photovoltaic systems because of its high efficiency, low cost, and reduced leakage ground current. However, the leakage ground current behavior depends on the power and weather conditions, which can increase the parasitic capacitance value, thus producing an increase in the leakage ground current magnitude. In this paper, it is proposed to add a passive inductive–capacitive output filter to the inverter structure in order to reduce the dependency of the leakage ground current on the system power and weather conditions. The inductive–capacitive output filter is designed in such a way that it can provide a low impedance path for the leakage ground current, different from the ground path. The proposed system was evaluated both through simulations and experimentally in a 1 kW laboratory prototype. Full article
(This article belongs to the Section Electrical Machines and Drives)
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<p>Simplified circuit of the topology under study and its simplified PWM circuit.</p>
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<p>Modulation signals for the HERIC inverter.</p>
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<p>The HERIC inverter with the proposed output filter modification.</p>
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<p>(<b>a</b>) Differential mode model, (<b>b</b>) common mode model.</p>
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<p>Bode diagram for <math display="inline"><semantics> <mrow> <msub> <mi>G</mi> <mrow> <mi>c</mi> <mi>m</mi> </mrow> </msub> <mrow> <mo>(</mo> <mi>s</mi> <mo>)</mo> </mrow> </mrow> </semantics></math> transfer function.</p>
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<p>Differential voltage and output current, (<b>a</b>) without and (<b>b</b>) with filter.</p>
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<p>Output current FFT without the proposed filter.</p>
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<p>Output current FFT with the proposed filter.</p>
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<p>Common mode voltage and common mode current plots without the proposed filter.</p>
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<p>Common mode voltage and common mode current plots with the proposed filter.</p>
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<p>Dynamic response of the system increasing output power from 347 W to 1014 W.</p>
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<p>System response to an increment in the parasitic capacitance from 20 nF to 840 nF.</p>
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<p>LGC behavior under different switching frequency scenarios.</p>
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<p>Laboratory experimental prototype.</p>
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<p>PWM signals to control the HERIC converter.</p>
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<p>Experimental output voltage <math display="inline"><semantics> <msub> <mi>v</mi> <mrow> <mi>d</mi> <mi>m</mi> </mrow> </msub> </semantics></math> (<b>top</b>) and current <math display="inline"><semantics> <msub> <mi>i</mi> <mrow> <mi>o</mi> <mi>u</mi> <mi>t</mi> <mn>1</mn> </mrow> </msub> </semantics></math> (<b>bottom</b>) without the proposed filter.</p>
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<p>Experimental output voltage <math display="inline"><semantics> <msub> <mi>v</mi> <mrow> <mi>d</mi> <mi>m</mi> </mrow> </msub> </semantics></math> (<b>top</b>) and current <math display="inline"><semantics> <msub> <mi>i</mi> <mrow> <mi>o</mi> <mi>u</mi> <mi>t</mi> <mn>1</mn> </mrow> </msub> </semantics></math> (<b>bottom</b>) with the proposed filter.</p>
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<p>Output current FFT without the proposed filter.</p>
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<p>Output current FFT with the proposed filter.</p>
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<p>Common mode voltage and leakage ground current without the proposed filter.</p>
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<p>Common mode voltage and common mode current with the proposed filter.</p>
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<p>Power output step of the HERIC inverter without the proposed filter.</p>
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<p>Power output step of the HERIC inverter with the proposed filter.</p>
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<p>Parasitic capacitance step of the HERIC inverter without the proposed filter.</p>
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<p>Parasitic capacitance step of the HERIC inverter with the proposed filter.</p>
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<p>From top to bottom, current through <math display="inline"><semantics> <msub> <mi>C</mi> <mrow> <mi>f</mi> <mn>1</mn> </mrow> </msub> </semantics></math>, <math display="inline"><semantics> <msub> <mi>C</mi> <mrow> <mi>f</mi> <mn>2</mn> </mrow> </msub> </semantics></math> and common mode current <math display="inline"><semantics> <msub> <mi>i</mi> <mrow> <mi>L</mi> <mi>G</mi> <mi>C</mi> </mrow> </msub> </semantics></math>.</p>
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30 pages, 1662 KiB  
Review
Current Source Inverter (CSI) Power Converters in Photovoltaic Systems: A Comprehensive Review of Performance, Control, and Integration
by Fabrizio Marignetti, Roberto Luigi Di Stefano, Guido Rubino and Roberto Giacomobono
Energies 2023, 16(21), 7319; https://doi.org/10.3390/en16217319 - 28 Oct 2023
Cited by 2 | Viewed by 4613
Abstract
Grid converters play a central role in renewable energy conversion. Among all inverter topologies, the current source inverter (CSI) provides many advantages and is, therefore, the focus of ongoing research. This review demonstrates how CSIs can play a pivotal role in ensuring the [...] Read more.
Grid converters play a central role in renewable energy conversion. Among all inverter topologies, the current source inverter (CSI) provides many advantages and is, therefore, the focus of ongoing research. This review demonstrates how CSIs can play a pivotal role in ensuring the seamless conversion of solar-generated energy with the electricity grid, thereby facilitating stable and reliable integration. This study extensively investigates various categories of single-stage CSI photovoltaic inverters, categorizing them into two-level, three-level, and multi-level architectures. Furthermore, these inverters are classified based on construction attributes, power factor, and total harmonic distortion values to assess their compliance with the standards, such as IEEE 1547 and IEC 61727. This review also delves into diverse control strategies for seamless grid integration. This comprehensive assessment serves as a resource for researchers in the field, enabling them to effectively choose the most suitable CSI for their specific applications. Additionally, it offers a quick reference point to steer research endeavors toward refining the integration of CSIs within photovoltaic systems. Full article
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<p>Types of PV inverters: (<b>a</b>) single stage, (<b>b</b>) multi stage.</p>
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<p>DC-link current waveform in one switching period.</p>
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<p>Two-level CSI (single-phase).</p>
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<p>A transformerless CSI5 for a grid-connected SPV system.</p>
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<p>Two-level CSI (three-phase).</p>
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<p>CSI5 single-phase system with additional zero state.</p>
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<p>Three-level CSI with neutral point.</p>
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<p>Three-phase tri-state inverter buck-boost CSI.</p>
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<p>Three-phase current inverter with additional leg and backwards diodes.</p>
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<p>Block diagram of SVM using MPPT as input.</p>
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<p>Grid-connected four-leg CSI with integrated <math display="inline"><semantics> <msub> <mi>i</mi> <mrow> <mi>C</mi> <mi>M</mi> </mrow> </msub> </semantics></math> return path.</p>
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<p>Four-leg CSI with integrated <math display="inline"><semantics> <msub> <mi>i</mi> <mrow> <mi>C</mi> <mi>M</mi> </mrow> </msub> </semantics></math> return path connected to transformer.</p>
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<p>Two-cell boost single-phase MCSI.</p>
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<p>Five-level paralleled H-Bridge single-phase CSI topology.</p>
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<p>Five-level buck-boost three-phase topology.</p>
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<p>Multicell CSI.</p>
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<p>Buck-boost single stage CSI.</p>
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<p>Single-phase CSI with reduced-size DC link.</p>
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<p>Flyback CSI.</p>
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<p>Flyback microinverter.</p>
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<p>Microinverter based on LLC topology.</p>
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<p>Reactive power control of grid-connected photovoltaic microinverter based on third-harmonic injection.</p>
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<p>Control PLL based on third-harmonic injection.</p>
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<p>Three-phase current source shunt active power filter with solar photovoltaic grid interface.</p>
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<p>Block diagram single inverter.</p>
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<p>Dual-loop control system: current and voltage.</p>
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<p>Control system of MPPT with single inverter.</p>
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<p>Block diagram of the FLC-based MPPT.</p>
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44 pages, 14993 KiB  
Review
A Review of Multilevel Inverter Topologies for Grid-Connected Sustainable Solar Photovoltaic Systems
by Shaik Nyamathulla and Dhanamjayulu Chittathuru
Sustainability 2023, 15(18), 13376; https://doi.org/10.3390/su151813376 - 6 Sep 2023
Cited by 8 | Viewed by 3807
Abstract
Solar energy is one of the most suggested sustainable energy sources due to its availability in nature, developments in power electronics, and global environmental concerns. A solar photovoltaic system is one example of a grid-connected application using multilevel inverters (MLIs). In grid-connected PV [...] Read more.
Solar energy is one of the most suggested sustainable energy sources due to its availability in nature, developments in power electronics, and global environmental concerns. A solar photovoltaic system is one example of a grid-connected application using multilevel inverters (MLIs). In grid-connected PV systems, the inverter’s design must be carefully considered to improve efficiency. The switched capacitor (SC) MLI is an appealing inverter over its alternatives for a variety of applications due to its inductor-less or transformer-less operation, enhanced voltage output, improved voltage regulation inside the capacitor itself, low cost, reduced circuit components, small size, and less electromagnetic interference. The reduced component counts are required to enhance efficiency, to increase power density, and to minimize device stress. This review presents a thorough analysis of MLIs and a classification of the existing MLI topologies, along with their merits and demerits. It also provides a detailed survey of reduced switch count multilevel inverter (RSC-MLI) topologies, including their designs, typical features, limitations, and criteria for selection. This paper also covers the survey of SC-MLI topologies with a qualitative assessment to aid in the direction of future research. Finally, this review will help engineers and researchers by providing a detailed look at the total number of power semiconductor switches, DC sources, passive elements, total standing voltage, reliability analysis, applications, challenges, and recommendations. Full article
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<p>(<b>a</b>) Worldwide renewable power generation in 2020–2021; (<b>b</b>) net renewable capacity additions, by renewable energy market update 2021—IEA; (<b>c</b>) an outlook on the development of various MLI topologies.</p>
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<p>(<b>a</b>) Worldwide renewable power generation in 2020–2021; (<b>b</b>) net renewable capacity additions, by renewable energy market update 2021—IEA; (<b>c</b>) an outlook on the development of various MLI topologies.</p>
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<p>Grid-connected multilevel inverter for solar PV application [<a href="#B103-sustainability-15-13376" class="html-bibr">103</a>].</p>
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<p>Multilevel inverters have a wide variety of uses in the emerging field of renewable energy.</p>
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<p>MLI-based system integration of various renewable energy sources [<a href="#B103-sustainability-15-13376" class="html-bibr">103</a>].</p>
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<p>Factors contributing to the motivation for an RSC-MLI.</p>
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<p>Classification of RSC-MLI topologies.</p>
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<p>MLI evaluation criteria [<a href="#B103-sustainability-15-13376" class="html-bibr">103</a>].</p>
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<p>Characteristics of MLIs.</p>
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<p>Simplified classification of multilevel inverters.</p>
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<p>Categorization of reduced switch count MLI topologies.</p>
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<p>Separate level and polarity generator topologies: (<b>a</b>) MLDCL; (<b>b</b>) SSPS; (<b>c</b>) SCSS; (<b>d</b>) RV; (<b>e</b>) MLM.</p>
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<p>Separate level and polarity generator topologies: (<b>a</b>) MLDCL; (<b>b</b>) SSPS; (<b>c</b>) SCSS; (<b>d</b>) RV; (<b>e</b>) MLM.</p>
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<p>Topologies with T-type structures: (<b>a</b>) H-bridge T-type; (<b>b</b>) cascaded T-type; (<b>c</b>) T-type three-phase half-bridge.</p>
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<p>Topologies with T-type structures: (<b>a</b>) H-bridge T-type; (<b>b</b>) cascaded T-type; (<b>c</b>) T-type three-phase half-bridge.</p>
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<p>Hybrid T-type topologies and extended HSC structures: (<b>a</b>) Hybrid T-type MLI with a bidirectional switch on one side of the HSC; (<b>b</b>) hybrid T-type MLI with a bidirectional switch on both sides of the HSC.</p>
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<p>Basic unit RSC-MLI topology.</p>
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<p>Symmetrical unit-based topologies: (<b>a</b>) Five-level; (<b>b</b>) nine-level.</p>
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<p>An asymmetrical 17-level RSC MLI.</p>
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<p>An asymmetrical 19-level RSC MLI.</p>
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<p>Parametric comparisons of recently developed 17-level MLI topologies [<a href="#B3-sustainability-15-13376" class="html-bibr">3</a>,<a href="#B5-sustainability-15-13376" class="html-bibr">5</a>,<a href="#B134-sustainability-15-13376" class="html-bibr">134</a>,<a href="#B138-sustainability-15-13376" class="html-bibr">138</a>,<a href="#B139-sustainability-15-13376" class="html-bibr">139</a>,<a href="#B140-sustainability-15-13376" class="html-bibr">140</a>,<a href="#B141-sustainability-15-13376" class="html-bibr">141</a>,<a href="#B142-sustainability-15-13376" class="html-bibr">142</a>,<a href="#B143-sustainability-15-13376" class="html-bibr">143</a>,<a href="#B144-sustainability-15-13376" class="html-bibr">144</a>].</p>
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<p>Parametric comparisons of recently developed 17-level MLI topologies [<a href="#B3-sustainability-15-13376" class="html-bibr">3</a>,<a href="#B5-sustainability-15-13376" class="html-bibr">5</a>,<a href="#B134-sustainability-15-13376" class="html-bibr">134</a>,<a href="#B138-sustainability-15-13376" class="html-bibr">138</a>,<a href="#B139-sustainability-15-13376" class="html-bibr">139</a>,<a href="#B140-sustainability-15-13376" class="html-bibr">140</a>,<a href="#B141-sustainability-15-13376" class="html-bibr">141</a>,<a href="#B142-sustainability-15-13376" class="html-bibr">142</a>,<a href="#B143-sustainability-15-13376" class="html-bibr">143</a>,<a href="#B144-sustainability-15-13376" class="html-bibr">144</a>].</p>
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<p>Parametric comparisons of recently developed 17-level MLI topologies [<a href="#B3-sustainability-15-13376" class="html-bibr">3</a>,<a href="#B5-sustainability-15-13376" class="html-bibr">5</a>,<a href="#B134-sustainability-15-13376" class="html-bibr">134</a>,<a href="#B138-sustainability-15-13376" class="html-bibr">138</a>,<a href="#B139-sustainability-15-13376" class="html-bibr">139</a>,<a href="#B140-sustainability-15-13376" class="html-bibr">140</a>,<a href="#B141-sustainability-15-13376" class="html-bibr">141</a>,<a href="#B142-sustainability-15-13376" class="html-bibr">142</a>,<a href="#B143-sustainability-15-13376" class="html-bibr">143</a>,<a href="#B144-sustainability-15-13376" class="html-bibr">144</a>].</p>
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<p>Parametric comparisons of recently developed 19-Level MLI topologies [<a href="#B135-sustainability-15-13376" class="html-bibr">135</a>,<a href="#B136-sustainability-15-13376" class="html-bibr">136</a>,<a href="#B145-sustainability-15-13376" class="html-bibr">145</a>,<a href="#B146-sustainability-15-13376" class="html-bibr">146</a>,<a href="#B147-sustainability-15-13376" class="html-bibr">147</a>,<a href="#B148-sustainability-15-13376" class="html-bibr">148</a>,<a href="#B149-sustainability-15-13376" class="html-bibr">149</a>,<a href="#B150-sustainability-15-13376" class="html-bibr">150</a>].</p>
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<p>Parametric comparisons of recently developed 19-Level MLI topologies [<a href="#B135-sustainability-15-13376" class="html-bibr">135</a>,<a href="#B136-sustainability-15-13376" class="html-bibr">136</a>,<a href="#B145-sustainability-15-13376" class="html-bibr">145</a>,<a href="#B146-sustainability-15-13376" class="html-bibr">146</a>,<a href="#B147-sustainability-15-13376" class="html-bibr">147</a>,<a href="#B148-sustainability-15-13376" class="html-bibr">148</a>,<a href="#B149-sustainability-15-13376" class="html-bibr">149</a>,<a href="#B150-sustainability-15-13376" class="html-bibr">150</a>].</p>
Full article ">Figure 19 Cont.
<p>Parametric comparisons of recently developed 19-Level MLI topologies [<a href="#B135-sustainability-15-13376" class="html-bibr">135</a>,<a href="#B136-sustainability-15-13376" class="html-bibr">136</a>,<a href="#B145-sustainability-15-13376" class="html-bibr">145</a>,<a href="#B146-sustainability-15-13376" class="html-bibr">146</a>,<a href="#B147-sustainability-15-13376" class="html-bibr">147</a>,<a href="#B148-sustainability-15-13376" class="html-bibr">148</a>,<a href="#B149-sustainability-15-13376" class="html-bibr">149</a>,<a href="#B150-sustainability-15-13376" class="html-bibr">150</a>].</p>
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<p>Categorization of different SC-based basic units.</p>
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<p>Mid-point-clamped SC-based inverters: (<b>a</b>) 5-Level inverter, (<b>b</b>) 7-Level inverter.</p>
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<p>Comparison of the efficiency of SC-MLI with multi-source MLIs [<a href="#B61-sustainability-15-13376" class="html-bibr">61</a>,<a href="#B68-sustainability-15-13376" class="html-bibr">68</a>,<a href="#B72-sustainability-15-13376" class="html-bibr">72</a>,<a href="#B73-sustainability-15-13376" class="html-bibr">73</a>,<a href="#B74-sustainability-15-13376" class="html-bibr">74</a>,<a href="#B151-sustainability-15-13376" class="html-bibr">151</a>,<a href="#B172-sustainability-15-13376" class="html-bibr">172</a>,<a href="#B198-sustainability-15-13376" class="html-bibr">198</a>].</p>
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<p>Measured efficiency of the 19-level SC-MLI at different frequency ranges.</p>
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<p>CGSC-based inverters: (<b>a</b>–<b>c</b>) Three-level inverters; (<b>d</b>,<b>e</b>) five-level inverters; (<b>f</b>) seven-level inverter; (<b>g</b>) nine-level inverter.</p>
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<p>Various applications of SC-based multilevel converters/inverters.</p>
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<p>Qualitative comparison analysis of different SC-MLIs in various characteristics.</p>
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<p>Multilevel inverter modulation control techniques.</p>
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<p>Reliability classifications.</p>
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<p>Reliability influence factors.</p>
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<p>List of comparisons among three basic MLI topologies [<a href="#B103-sustainability-15-13376" class="html-bibr">103</a>].</p>
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<p>Perception evaluation and future development of SC-MLIs.</p>
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<p>Monte Carlo-based reliability study of PV inverters [<a href="#B103-sustainability-15-13376" class="html-bibr">103</a>].</p>
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<p>PV system mission profile translation diagram by PV array size ratio Rs consideration [<a href="#B103-sustainability-15-13376" class="html-bibr">103</a>].</p>
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19 pages, 9349 KiB  
Article
Small-Signal Model of the NPC + GCC Multilevel Transformerless Inverter in Single-Phase Photovoltaic Power Systems
by Iván Patrao, Marian Liberos, Raúl González-Medina, Enric Torán, Emilio Figueres and Gabriel Garcerá
Electronics 2023, 12(17), 3545; https://doi.org/10.3390/electronics12173545 - 22 Aug 2023
Cited by 1 | Viewed by 916
Abstract
Photovoltaic transformerless inverters are very efficient and economical options for solar-power generation. The absence of the isolation transformer improves the converters’ efficiency, but high-frequency voltage to ground can appear in the photovoltaic string poles. The high capacitance to ground of the photovoltaic generator [...] Read more.
Photovoltaic transformerless inverters are very efficient and economical options for solar-power generation. The absence of the isolation transformer improves the converters’ efficiency, but high-frequency voltage to ground can appear in the photovoltaic string poles. The high capacitance to ground of the photovoltaic generator leads to undesirable high-leakage currents. Using half-bridge topologies dramatically reduces the leakage to ground, and using a multilevel half-bridge inverters improves the output quality compared with classical inverters. The neutral point clamped + generation control circuit (NPC + GCC) topology is a multilevel single-phase transformerless inverter capable of tracking the maximum power point of two photovoltaic sources at the same time. This paper presents the control structure and the dynamic modeling of the NPC + GCC inverter. The pulse-width modulated (PWM) switch model in continuous conduction mode (CCM) was used to obtain the small-signal model of the two switching converters that make up the inverter. The resulting dynamic model was used to quantify the stability margins of both converters’ current and voltage loops. Full article
(This article belongs to the Section Power Electronics)
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<p>Parasitic capacitances and leakage current to ground in a PV transformerless inverter.</p>
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<p>The NPC + GCC topology.</p>
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<p>NPC + GCC topology control structure.</p>
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<p>Double P&amp;O MPPT algorithm.</p>
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<p>IPD multilevel modulator: three output voltage levels.</p>
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<p>Current path in the positive period of the grid voltage; (<b>a</b>) V<sub>AB</sub> = +V<sub>PV1</sub>; (<b>b</b>) V<sub>AB</sub> = 0.</p>
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<p>Switching cell during positive half-cycle of the output voltage (Act: active, Pas: passive, Com: common).</p>
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<p>NPC (<b>a</b>) operating point circuit (OP); (<b>b</b>) small signal circuit (AC).</p>
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<p>NPC (<b>a</b>) operating point circuit (OP); (<b>b</b>) small signal circuit (AC).</p>
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<p>Bode diagram of the transfer function <math display="inline"><semantics> <mrow> <msub> <mover accent="true"> <mi>i</mi> <mo>^</mo> </mover> <mi>C</mi> </msub> <mo>/</mo> <mover accent="true"> <mi>d</mi> <mo>^</mo> </mover> </mrow> </semantics></math>. P<sub>OUT</sub> = 5 kW, L<sub>GRID</sub> = 337 µH. Grid phase value (<span class="html-italic">θ</span>) as a running parameter. Note: pi = 3.14159.</p>
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<p>Bode diagram of the transfer function <math display="inline"><semantics> <mrow> <msub> <mover accent="true"> <mi>v</mi> <mo>^</mo> </mover> <mrow> <mi>P</mi> <mi>V</mi> </mrow> </msub> <mo>/</mo> <msub> <mover accent="true"> <mi>i</mi> <mo>^</mo> </mover> <mi>C</mi> </msub> </mrow> </semantics></math>. P<sub>OUT</sub> = 5 kW, L<sub>GRID</sub> = 337 µH. Grid phase value (<span class="html-italic">θ</span>) as a running parameter. Note: pi = 3.14159.</p>
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<p>GCC modulator.</p>
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<p>Current path for positive current in L<sub>GCC</sub>; (<b>a</b>) V<sub>L-GCC</sub> = +V<sub>PV1</sub>; (<b>b</b>) V<sub>L-GCC</sub> = −V<sub>PV2</sub>.</p>
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<p>Switching cell for positive current in L<sub>GCC</sub>.</p>
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<p>GCC (<b>a</b>) operating point circuit (OP); (<b>b</b>) small-signal circuit (AC).</p>
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<p>Bode diagram of the transfer function <math display="inline"><semantics> <mrow> <msub> <mover accent="true"> <mi>i</mi> <mo>^</mo> </mover> <mi>C</mi> </msub> <mo>/</mo> <mover accent="true"> <mi>d</mi> <mo>^</mo> </mover> </mrow> </semantics></math>. Dynamic resistance of the PV string (r<sub>PV</sub>) as a running parameter.</p>
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<p>Bode diagram of the transfer function <math display="inline"><semantics> <mrow> <msub> <mover accent="true"> <mi>v</mi> <mo>^</mo> </mover> <mrow> <mi>P</mi> <mi>V</mi> </mrow> </msub> <mo>/</mo> <msub> <mover accent="true"> <mi>i</mi> <mo>^</mo> </mover> <mi>C</mi> </msub> </mrow> </semantics></math>. Dynamic resistance of the PV string (r<sub>PV</sub>) as a running parameter (the traces are overlapped).</p>
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<p>Voltage and current loops for the NPC inverter.</p>
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<p>NPC control: Bode diagram of T<sub>i</sub>(s). P<sub>OUT</sub> = 5 kW, L<sub>GRID</sub> = 337 µH. Grid phase value (ω·t) in the legend. Note: pi = 3.14159.</p>
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<p>NPC control: Bode diagram of T<sub>V</sub>(s). P<sub>OUT</sub> = 5 kW, L<sub>GRID</sub> = 337 µH. Grid phase value (ω·t) as a running parameter. Note: pi = 3.14159.</p>
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<p>Voltage and current loops for the GCC converter.</p>
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<p>GCC control: Bode diagram of T<sub>i</sub>(s). DC link voltage as a running parameter.</p>
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<p>GCC control: Bode diagram of T<sub>V</sub>(s). DC input voltage in the legend.</p>
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15 pages, 5899 KiB  
Article
Modified Extended Complex Kalman Filter for DC Offset and Distortion Rejection in Grid-Tie Transformerless Converters
by Mohammed El-Nagar, Khaled Ahmed, Eman Hamdan, Ayman S. Abdel-Khalik, Mostafa S. Hamad and Shehab Ahmed
Appl. Sci. 2023, 13(15), 9023; https://doi.org/10.3390/app13159023 - 7 Aug 2023
Cited by 1 | Viewed by 1418
Abstract
Proper operation of the grid-tie transformerless converters under unbalanced and distorted conditions entails a precise detection of the frequency and fundamental component of the grid voltage. One of the main problems that could arise during the estimation of grid parameters is the existence [...] Read more.
Proper operation of the grid-tie transformerless converters under unbalanced and distorted conditions entails a precise detection of the frequency and fundamental component of the grid voltage. One of the main problems that could arise during the estimation of grid parameters is the existence of a DC offset generated from measurement and A/D conversion. This undesirable induced DC offset could appear as a part of the reference sinusoidal current of grid-tie converters. Although literature has proposed the use of an extended complex Kalman filter (ECKF) for the estimation of positive and negative sequence voltage components as a promising competitor to phase locked loops, mitigating the effect of possible DC offsets when a Kalman filter is employed remains scarce. This paper proposes a new extended complex Kalman filter to improve the filter stability for estimating the frequency and the fundamental positive and negative symmetrical components of the grid voltages, where DC offset, scaling error, and noise can successfully be rejected. The theoretical findings are experimentally validated. Full article
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<p>The modified extended complex Kalman filter.</p>
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<p>Block diagram of grid-tie PV converter with FCS-MPC current control structure.</p>
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<p>The <math display="inline"><semantics><mrow><mi>a</mi><mi>b</mi><mi>c</mi></mrow></semantics></math> grid voltages, positive and negative fundamental <math display="inline"><semantics><mrow><mi>α</mi><mi>β</mi></mrow></semantics></math> components in case of (<b>a</b>) conventional ECKF, and (<b>b</b>) modified ECKF.</p>
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<p>The reference and the estimated values of positive and negative components of grid phases <math display="inline"><semantics><mrow><mi>a</mi><mo>,</mo><mo> </mo><mi>b</mi></mrow></semantics></math>, and <span class="html-italic">c</span> grid voltages in case of (<b>a</b>) conventional ECKF, and (<b>b</b>) modified ECKF.</p>
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<p>The reference and the estimated grid fundamental frequency in case of conventional and modified ECKF.</p>
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<p>Experimental test setup.</p>
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<p>Three-phase grid voltages (unbalanced distorted conditions).</p>
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<p>The estimated positive fundamental <math display="inline"><semantics><mrow><mi>α</mi><mi>β</mi></mrow></semantics></math> components in case of conventional and modified ECKF.</p>
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<p>The estimated negative fundamental <math display="inline"><semantics><mrow><mi>α</mi><mi>β</mi></mrow></semantics></math> components in case of conventional and modified ECKF.</p>
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<p>Zoomed view for the reference currents in case of conventional and modified ECKF.</p>
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<p>The frequency response of the reference currents in case of (<b>a</b>) conventional ECKF and (<b>b</b>) modified ECKF.</p>
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<p>Three-phase grid currents in case of conventional ECKF. Phase <span class="html-italic">a</span> is in green colour, <span class="html-italic">b</span> is violet, and <span class="html-italic">c</span> is blue.</p>
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<p>Three-phase grid currents in case of modified ECKF.</p>
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<p>The estimated grid frequency in case of conventional and modified ECKF.</p>
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28 pages, 8681 KiB  
Article
A New Single-Cell Hybrid Inductor-Capacitor DC-DC Converter for Ultra-High Voltage Gain in Renewable Energy Applications
by Ammar Falah Algamluoli and Xiaohua Wu
Electronics 2023, 12(14), 3101; https://doi.org/10.3390/electronics12143101 - 17 Jul 2023
Cited by 6 | Viewed by 1568
Abstract
In this paper, a new single-cell hybrid switched inductor DC-DC converter is proposed to demonstrate the verification of ultra-high voltage gain in renewable energy applications (REA). The modification involves adding a single cell of an inductor with a diode and double capacitor to [...] Read more.
In this paper, a new single-cell hybrid switched inductor DC-DC converter is proposed to demonstrate the verification of ultra-high voltage gain in renewable energy applications (REA). The modification involves adding a single cell of an inductor with a diode and double capacitor to increase voltage transfer gain. Additionally, this modification helps prevent the input current from becoming zero, pulsating at very low duty cycles. The single cell of the hybrid inductor is interleaved with the main switch to reduce current stress when the capacitor of the single-cell inductor charge becomes zero. Moreover, the addition of a modified hybrid switch inductor with a capacitor, operating in dual boosting mode with a single switch, allows the converter to achieve ultra-high voltage gain. The proposed converter offers several advantages, including ultra-high voltage gain, high efficiency, low voltage stress on power MOSFETs, diodes, inductors, and capacitors, as well as low switching and conduction losses. Furthermore, the proposed converter utilizes transformerless and non-coupled inductors. Mathematical equations have been derived for the discontinuous conduction mode (DCM) and continuous conduction mode (CCM) and implemented using Matlab Simulink software to validate the results. In addition, a dual PI controller is designed for the proposed converter to verify the fixed output voltage. Experimental results have also been obtained for a 200 W prototype, with the input voltage varying between 20 V and 40 V, and an output voltage of 200 V at an efficiency of 96.5%. Full article
(This article belongs to the Topic Power Converters)
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<p>(<b>a</b>) Basis circuit of the switched inductor (<b>b</b>) Hybrid switched inductor-capacitor connection (<b>c</b>) Schematic Diagram: Connection of the proposed converter with PV panels and battery for energy saving mode applications (<b>d</b>) The Proposed DC-DC Converter with single-cell switched inductor capacitor interleaved with modified switched inductor.</p>
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<p>(<b>a</b>) Proposed Converter waveforms at DCMC1, (<b>b</b>) Proposed Converter waveforms at DCMC2, (<b>c</b>) Proposed Converter waveforms at CCM.</p>
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<p>(<b>a</b>) proposed DC-DC converter (<b>b</b>) state 1 mode DCMC1, state 1 mode DCMC2, state 1 mode CCM (<b>c</b>) state 2 mode DCMC1 (<b>d</b>) state 3 DCMC1, state 3 DCMC2, state 3 CCM (<b>e</b>) state 4 DCMC1 state 4 DCMC2 (<b>f</b>) state 2 mode DCMC2, state 2 mode CCM.</p>
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<p>Dynamic performance of the proposed converter (<b>a</b>) Loading factor K and Kcrit Vs duty cycle, (<b>b</b>) Kcrit Vs K.</p>
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<p>Voltage gain vs. Duty cycle [<a href="#B9-electronics-12-03101" class="html-bibr">9</a>,<a href="#B13-electronics-12-03101" class="html-bibr">13</a>,<a href="#B15-electronics-12-03101" class="html-bibr">15</a>,<a href="#B19-electronics-12-03101" class="html-bibr">19</a>,<a href="#B21-electronics-12-03101" class="html-bibr">21</a>,<a href="#B31-electronics-12-03101" class="html-bibr">31</a>,<a href="#B36-electronics-12-03101" class="html-bibr">36</a>].</p>
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<p>(<b>a</b>) Voltage stress across Power MOSFETs Vs. voltage gain, (<b>b</b>) Voltage stress across Diode Vs. Voltage Gain [<a href="#B9-electronics-12-03101" class="html-bibr">9</a>,<a href="#B13-electronics-12-03101" class="html-bibr">13</a>,<a href="#B15-electronics-12-03101" class="html-bibr">15</a>,<a href="#B19-electronics-12-03101" class="html-bibr">19</a>,<a href="#B36-electronics-12-03101" class="html-bibr">36</a>].</p>
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<p>The suggested Controller strategy of the proposed Converter.</p>
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<p>(<b>a</b>) output voltage of the proposed converter at variable input voltage, (<b>b</b>) variable output voltage at fixed input voltage.</p>
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<p>(<b>a</b>) PCB prototype of the proposed converter (<b>b</b>) experimental test of the proposed converter.</p>
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<p>(<b>a</b>) Vs, Vo, Io, (<b>b</b>) Vc<sub>1</sub>, Vc<sub>2</sub>, Vc<sub>3</sub>, (<b>c</b>) Isw<sub>1</sub>, Isw<sub>2</sub>, Vsw<sub>1</sub>, Vsw<sub>2</sub>, (<b>d</b>) ID<sub>1</sub>, ID<sub>2</sub>, ID<sub>3</sub>, (<b>e</b>) VD<sub>1</sub>, VD<sub>2</sub>, VD<sub>3</sub>, (<b>f</b>) VL<sub>1</sub>, VL<sub>2</sub>, VL<sub>3</sub>, VL<sub>4</sub>.</p>
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<p>(<b>a</b>) iL<sub>1</sub>, iL<sub>2</sub>, iL<sub>3</sub>, iL<sub>4</sub> at low duty cycle, (<b>b</b>) iL<sub>1</sub>, iL<sub>2</sub>, iL<sub>3</sub>, iL<sub>4</sub> at CCM, (<b>c</b>) Vs, Vo, Io, (<b>d</b>) Vs, Vo, Io, iL<sub>1</sub>, iL<sub>3</sub>, iL<sub>4</sub>, (<b>e</b>) VD<sub>1</sub>, VD<sub>2</sub>, (<b>f</b>) Isw<sub>1</sub> and IC<sub>1</sub> at different D.</p>
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<p>(<b>a</b>) iL<sub>1</sub>, iL<sub>2</sub>, (<b>b</b>) iL<sub>1</sub>, iL<sub>2</sub>, (<b>c</b>) iL<sub>3</sub>, iL<sub>4</sub>, (<b>d</b>) Vo = 200 V, (<b>e</b>) Load Current 1 A, (<b>f</b>) Isw<sub>1</sub>, Isw<sub>2</sub>.</p>
Full article ">Figure 12 Cont.
<p>(<b>a</b>) iL<sub>1</sub>, iL<sub>2</sub>, (<b>b</b>) iL<sub>1</sub>, iL<sub>2</sub>, (<b>c</b>) iL<sub>3</sub>, iL<sub>4</sub>, (<b>d</b>) Vo = 200 V, (<b>e</b>) Load Current 1 A, (<b>f</b>) Isw<sub>1</sub>, Isw<sub>2</sub>.</p>
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<p>(<b>a</b>), Vsw<sub>1</sub>, (<b>b</b>) Vsw<sub>2</sub>, (<b>c</b>), VD<sub>3</sub>, (<b>d</b>) VD<sub>1</sub> at ZCS, (<b>e</b>) VC<sub>2</sub>, (<b>f</b>) Variable output voltage 250 V.</p>
Full article ">Figure 13 Cont.
<p>(<b>a</b>), Vsw<sub>1</sub>, (<b>b</b>) Vsw<sub>2</sub>, (<b>c</b>), VD<sub>3</sub>, (<b>d</b>) VD<sub>1</sub> at ZCS, (<b>e</b>) VC<sub>2</sub>, (<b>f</b>) Variable output voltage 250 V.</p>
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<p>The proposed converter with parasitic components.</p>
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<p>(<b>a</b>) Output voltage of the proposed converter at different switching frequency at D = 45% (<b>b</b>) percentage losses of components of proposed converter.</p>
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<p>Conduction losses of power switches at variable input voltage proposed converter (<b>a</b>) power Mosfet 1 (Sw<sub>1</sub>) (<b>b</b>) power Mosfet 2 (Sw<sub>2</sub>).</p>
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<p>(<b>a</b>) Efficiency of the proposed converter with duty ratio at variable input voltage (<b>b</b>) Efficiency of the proposed converter with load current at variable input voltage.</p>
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