WO2024183584A1 - 功率模块及车辆 - Google Patents
功率模块及车辆 Download PDFInfo
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- WO2024183584A1 WO2024183584A1 PCT/CN2024/079080 CN2024079080W WO2024183584A1 WO 2024183584 A1 WO2024183584 A1 WO 2024183584A1 CN 2024079080 W CN2024079080 W CN 2024079080W WO 2024183584 A1 WO2024183584 A1 WO 2024183584A1
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- conductive plate
- power module
- plate
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- heat dissipation
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- 230000017525 heat dissipation Effects 0.000 claims abstract description 44
- 239000000919 ceramic Substances 0.000 claims description 14
- 238000003466 welding Methods 0.000 claims description 11
- 239000004065 semiconductor Substances 0.000 abstract description 17
- 230000000694 effects Effects 0.000 abstract description 6
- 238000010586 diagram Methods 0.000 description 6
- 101100233916 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) KAR5 gene Proteins 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 238000004806 packaging method and process Methods 0.000 description 3
- 101001121408 Homo sapiens L-amino-acid oxidase Proteins 0.000 description 2
- 102100026388 L-amino-acid oxidase Human genes 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 101000827703 Homo sapiens Polyphosphoinositide phosphatase Proteins 0.000 description 1
- 102100023591 Polyphosphoinositide phosphatase Human genes 0.000 description 1
- 101100012902 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) FIG2 gene Proteins 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 239000000498 cooling water Substances 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
Definitions
- the present application relates to the technical field of power semiconductors, and to a power module and a vehicle.
- Power semiconductor devices are a commonly used device in integrated circuits. They generate a lot of heat during operation. Therefore, the power semiconductor devices need to be cooled.
- Traditional power semiconductor modules have many packaging layers, and the chip sub-modules inside are stacked. Thermal interface materials are usually coated between the chip sub-modules and the heat sink for heat dissipation.
- the layout of the chip sub-modules of the power semiconductor module makes it easy for the heat generated by the chip sub-modules to accumulate, resulting in poor overall heat dissipation of the power semiconductor module, affecting the performance of the power semiconductor module. Therefore, a new power semiconductor module is urgently needed to solve at least one of the above problems.
- the present application aims to solve one of the technical problems in the related art at least to some extent.
- a power module which comprises: an upper heat sink, a lower heat sink and a plurality of sub-power modules; the plurality of sub-power modules are horizontally spaced between the upper heat sink and the lower heat sink; each sub-power module comprises: an upper conductive plate, a lower conductive plate, an upper bridge chipset and a lower bridge chipset, the upper bridge chipset and the lower bridge chipset are arranged between the upper conductive plate and the lower conductive plate, and the upper bridge chipset and the lower bridge chipset are conductively connected to the upper conductive plate and the lower conductive plate, the upper conductive plate is bonded and fixedly connected to the upper heat sink, and the lower conductive plate is bonded and fixedly connected to the lower heat sink.
- a vehicle comprising the above-mentioned power module.
- the power module provided by the present application has multiple sub-power modules arranged horizontally and spaced apart between the upper heat sink and the lower heat sink, which is convenient for heat dissipation and makes the layout of the sub-power modules more flexible and convenient, which is conducive to the functional division of the sub-power modules.
- the present application also provides a vehicle.
- the power module and vehicle provided by the present application solve the problem of poor heat dissipation effect of the power semiconductor module caused by the stacking layout of the chip sub-modules in the power semiconductor module in the prior art, and improve the heat dissipation effect of the power module.
- FIG1 is a schematic diagram of the structure of a power module provided in one embodiment of the present application.
- FIG2 is a view taken along the line A of FIG1 ;
- FIG3 is a cross-sectional view of a power module provided in one embodiment of the present application.
- FIG4 is a schematic diagram of the layout of a neutron power module of the power module provided in the present application.
- FIG5 is a schematic diagram of the layout of the upper bridge chipset in the power module provided by the present application.
- FIG6 is a schematic diagram of the layout of the lower bridge chipset in the power module provided by the present application.
- FIG7 is a schematic diagram of a packaging structure of another housing in a power module provided in the present application.
- FIG. 8 is a schematic structural diagram of an unpackaged shell in the power module of FIG. 7 .
- the terms “installed”, “connected”, “connected”, “fixed” and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements.
- installed can be a fixed connection, a detachable connection, or an integral connection
- it can be a mechanical connection or an electrical connection
- it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements.
- the present application provides a power module, which includes: an upper heat sink 1, a lower heat sink 2 and a plurality of sub-power modules 5; the plurality of sub-power modules 5 are horizontally spaced between the upper heat sink 1 and the lower heat sink 2; each sub-power module 5 includes: an upper conductive plate 3, a lower conductive plate 4, an upper bridge chipset 51 and a lower bridge chipset 52, the upper bridge chipset 51 and the lower bridge chipset (52) are arranged between the upper conductive plate 3 and the lower conductive plate 4, and the upper bridge chipset 51 and the lower bridge chipset 52 are both conductively connected to the upper conductive plate 3 and the lower conductive plate 4, the upper conductive plate 3 is bonded and fixed to the upper heat sink 1, and the lower conductive plate 4 is bonded and fixed to the upper heat sink 1, and the lower conductive plate 4 is bonded and fixed to the upper heat sink 1.
- the plate 4 is attached and fixed to the lower heat dissipation plate 2 .
- the power module provided by the present application is shown in FIG3 , wherein a plurality of sub-power modules 5 are horizontally spaced apart between an upper heat sink 1 and a lower heat sink 2 , and an upper bridge chipset 51 and a lower bridge chipset 52 of each sub-power module 5 are arranged between an upper conductive plate 3 and a lower conductive plate 4 and are fixedly connected to the upper conductive plate 3 and the lower conductive plate 4 , as shown in FIG3 , the upper heat sink 1 and the lower heat sink 2 are parallel, the upper conductive plate 3 is fixedly connected to the upper heat sink 1 , the area of the upper heat sink 1 is larger than the area of the upper conductive plate 3 , and the lower conductive plate 4 is fixedly connected to the lower heat sink 2 Next, the area of the lower heat sink 2 is larger than the area of the lower conductive plate 4, as shown in FIG3 , and the spacing between the multiple sub-power modules 5 is set as required, which not only makes the layout of the sub-power modules 5 more flexible, but also facilitates
- each sub-power module 5 will not accumulate between the sub-power modules 5, which facilitates the heat dissipation of the sub-power modules 5, thereby solving the problem of poor heat dissipation of the power semiconductor module caused by the stacking layout of the chip sub-modules in the power semiconductor module in the prior art, and improving the heat dissipation effect of the power module.
- a shell 6 is set, and the sub-power module 5 can be wrapped in a sealed environment through the shell 6.
- the number of shells 6 is the same as the number of sub-power modules 5, and each sub-power module 5 is individually packaged between the upper heat sink 1 and the lower heat sink 2 through each shell 6.
- Another way to package the sub-power module 5 is that the shell 6 is larger in size, and all the sub-power modules 5 are sealed at the same time through the shell 6, thereby providing a good working environment for the sub-power module 5.
- the specific way of sealing the sub-power module 5 is adjusted according to the actual application.
- the upper bridge chipset 51 includes: an upper bridge chip 511 and an upper bridge buffer plate 512; the upper bridge chip 511 is adhered to the lower conductive plate 4 for conductive connection; the upper bridge buffer plate 512 is located between the upper conductive plate 3 and the lower conductive plate 4, and one side of the upper bridge buffer plate 512 is fixedly connected to the upper bridge chip 511, and the other side is fixedly connected to the upper conductive plate 3.
- the lower bridge chipset 52 comprises: a lower bridge chip 521 and a lower bridge buffer plate 522; the lower bridge chip 521 is conductively connected to the upper conductive plate 3; the lower bridge buffer plate 522 is located between the upper conductive plate 3 and the lower conductive plate 4, and one side of the lower bridge buffer plate 522 is fixedly connected to the lower bridge chip 521, and the other side is fixedly connected to the lower conductive plate 4.
- the upper bridge chipset 51 and the lower bridge chipset 52 are arranged between the upper conductive plate 3 and the lower conductive plate 4 according to actual needs.
- the upper bridge chip 511 of the upper bridge chipset 51 of the sub-power module 5 is conductively connected to the lower conductive plate 4, the upper bridge chip 511 is bonded and conductively connected to the upper conductive plate 3 through the upper bridge buffer plate 512, the lower bridge chip 521 of the lower bridge chipset 52 is bonded and conductively connected to the upper conductive plate 3, and the lower bridge chip 521 is bonded and conductively connected to the lower conductive plate 4 through the lower bridge buffer plate 522.
- the upper bridge buffer plate 512 and the lower bridge buffer plate 522 have a first given thickness and a second given thickness in the direction perpendicular to the upper conductive plate 3 and the lower conductive plate 4, thereby facilitating low-voltage wire bonding.
- the upper bridge buffer plate 512 is fixedly connected to the upper bridge chip 511 and the upper conductive plate 3 by welding; the lower bridge buffer plate 522 is fixedly connected to the lower bridge chip 521 and the lower conductive plate 4 by welding.
- the upper bridge buffer plate 512 forms a welding layer during the welding process with the upper bridge chip 511 and the upper conductive plate 3, and the lower bridge buffer plate 522 also forms a welding layer during the welding process with the lower bridge chip 521 and the lower conductive plate 4.
- the upper bridge buffer plate 512 and the lower bridge buffer plate 522 can reduce the welding stress of the upper conductive plate 3 and the lower conductive plate 4, and reduce the thermal deformation of the material module.
- the upper conductive plate 3 includes: a first metal-clad layer 31, an upper ceramic layer 32 and a second metal-clad layer 33 corresponding to the number of sub-power modules 5; the first metal-clad layer 31 is arranged in contact with the upper heat dissipation plate 1, the upper ceramic layer 32 is arranged in contact with the first metal-clad layer 31, and one side of the second metal-clad layer 33 is fixedly connected to the upper ceramic layer 32, and the other side is fixedly connected to the lower bridge chip 521 of the lower bridge chip group 52 of the sub-power module 5.
- the lower conductive plate 4 includes: a third metal-clad layer 41, a lower ceramic layer 42 and a fourth metal-clad layer 43 corresponding to the number of sub-power modules 5; the third metal-clad layer 41 is arranged in contact with the lower heat dissipation plate 2, the lower ceramic layer 42 is arranged in contact with the third metal-clad layer 41, and the fourth metal-clad layer 43 is adhered to the lower ceramic layer 42 on one side and adhered and fixedly connected to the upper bridge chip 511 of the upper bridge chip group 51 of the corresponding sub-power module 5 on the other side.
- the first metal-clad layer 31 and the upper ceramic layer 32 are both an integral plate
- the second metal-clad layers 33 correspond to the number of sub-power modules 5, and each second metal-clad layer 33 is fixedly connected to the lower bridge chip 521 of the corresponding sub-power module 5 by welding.
- the third metal-clad layer 41 and the lower ceramic layer 42 are both an integral plate
- the fourth metal-clad layers 43 correspond to the number of sub-power modules 5, and each fourth metal-clad layer 43 is fixedly connected to the upper bridge chip 511 of the corresponding sub-power module 5 by welding.
- the power module 5 also includes: heat dissipation pins 7; a plurality of heat dissipation pins 7 are arranged on the side of the upper heat sink 1 away from the upper conductive plate 3; a plurality of heat dissipation pins 7 are arranged on the side of the lower heat sink 2 away from the lower conductive plate 4.
- the upper heat sink 1 and the lower heat sink 2 are both installed in the water channel, so that the heat dissipation pins 7 installed on the upper heat sink 1 and the lower heat sink 2 are also in the water channel, and the heat generated by the sub-power module 5 when working is conducted to the upper heat sink 1, the lower heat sink 2 and the heat dissipation pins 7.
- the heat dissipation pins 7 are arranged to increase the heat dissipation area and are more conducive to heat dissipation.
- the cooling water flows through the water channel to exchange heat with the heat dissipation pins 7 and takes away the heat on the heat dissipation pins 7, thereby achieving the purpose of cooling the sub-power module 5.
- the sub-power module 5 also includes: a DC terminal 8, the DC terminal includes a positive terminal 81 and a negative terminal 82, the lower conductive plate 4 includes a first area and a second area, the first area and the second area are insulated, the upper bridge chip is arranged in the first area, the positive terminal 81 is in conduction with the first area, and the negative terminal 82 is in conduction with the second area.
- the DC terminal 8 is arranged on the lower conductive plate 4, the drain of the upper bridge chip 511 of the sub-power module 5 is in conduction with the positive or negative electrode in the corresponding DC terminal 8 through the corresponding second metal layer 33, and the drain of the lower bridge chip 521 is in conduction with the positive or negative electrode in the corresponding DC terminal 8 through the corresponding fourth metal layer 43.
- the sub-power module 5 further includes an AC terminal 9 , which is disposed on the upper conductive plate 3 . Each AC terminal 9 is connected to a three-phase line respectively.
- the drain of the upper bridge chip 511 of each sub-power module 5 is connected to the corresponding AC terminal 9 through the second metal layer 33 , while the drain of the lower bridge chip 521 is connected to the corresponding AC terminal 9 through the fourth metal layer 43 .
- the present application also provides a vehicle, comprising the above-mentioned power module.
- a plurality of sub-power modules are horizontally spaced apart between an upper heat sink and a lower heat sink; an upper conductive plate of the sub-power module is adhered and fixedly connected to the upper heat sink, and a lower conductive plate is adhered and fixedly connected to the lower heat sink; by horizontally spaced apart between the upper heat sink and the lower heat sink, heat generated by each sub-power module can be directly transferred to the upper heat sink and the lower heat sink for heat dissipation, thus facilitating heat dissipation and avoiding heat accumulation between the sub-power modules; and the sub-power modules are smaller in size, making their layout more convenient and flexible, which is conducive to the division of functions of the sub-power modules.
- the power module and vehicle provided in the present application solve the problem of poor heat dissipation of the power semiconductor module due to the stacking layout of the chip sub-modules in the power semiconductor module in the prior art, and improve the heat dissipation effect of the power module.
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- Condensed Matter Physics & Semiconductors (AREA)
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Abstract
一种功率模块及车辆,涉及功率半导体技术领域,功率模块包括:上散热板、下散热板及多个子功率模块;多个子功率模块水平间隔设置在上散热板及下散热板之间;每一子功率模块包括:上层导通板、下层导通板、上桥芯片组及下桥芯片组,上桥芯片组和下桥芯片组设置在上层导通板和下层导通板之间,且上桥芯片组和下桥芯片组均与上层导通板和下层导通板导通连接,上层导通板与上散热板贴合固接,下层导通板与下散热板贴合固接。解决了功率半导体模块中的芯片子模块因堆叠布局造成的功率半导体模块散热效果差的问题,改善功率模块的散热效果。
Description
相关申请的交叉引用
本申请要求比亚迪股份有限公司于2023年03月03日提交的、名称为“功率模块及车辆”的、中国专利申请号“202320498813.2”的优先权。
本申请涉及功率半导体技术领域,涉及一种功率模块和一种车辆。
功率半导体器件是集成电路中一种常用器件,其在工作过程中会产生大量的热,因此,需要对功率半导体器件进行降温,传统的功率半导体模块封装层数多,其内部的芯片子模块堆叠设置,通常在芯片子模块和散热器之间涂覆热界面材料以进行散热,但功率半导体模块的芯片子模块的布局方式,使得芯片子模块产生的热量容易堆积,造成功率半导体模块整体散热效果差,影响功率半导体模块的使用性能,因此,亟需一种新的功率半导体模块以解决上述至少一种问题。
申请内容
本申请旨在至少在一定程度上解决相关技术中的技术问题之一。
根据本申请第一方面,提供一种功率模块,所述功率模块包括:上散热板、下散热板及多个子功率模块;多个子功率模块水平间隔设置在所述上散热板及所述下散热板之间;每一子功率模块包括:上层导通板、下层导通板、上桥芯片组及下桥芯片组,所述上桥芯片组和所述下桥芯片组设置在所述上层导通板和所述下层导通板之间,且所述上桥芯片组和所述下桥芯片组均与所述上层导通板和所述下层导通板导通连接,所述上层导通板与所述上散热板贴合固接,所述下层导通板与所述下散热板贴合固接。
根据本申请的第二方面,提供一种车辆。该车辆包括上述的功率模块。
本申请提供的功率模块,在上散热板和下散热板之间水平间隔设置多个子功率模块,方便散热,同时使得子功率模块布局更为灵活、方便,利于子功率模块的功能划分。本申请还提供一种车辆。本申请提供的功率模块和车辆,解决了现有技术中的功率半导体模块中的芯片子模块因堆叠布局造成的功率半导体模块散热效果差的问题,改善了功率模块的散热效果。
本申请的附加方面和优点将在下面的描述中部分给出,部分将从下面的描述中变得明
显,或通过本申请的实践了解到。
图1是本申请一种实施方式提供的功率模块的结构示意图;
图2是图1的A向视图;
图3是本申请一种实施方式提供的功率模块的剖视图;
图4是本申请提供的功率模块中子功率模块的布局示意图;
图5是本申请提供的功率模块中上桥芯片组的布局示意图;
图6是本申请提供的功率模块中下桥芯片组的布局示意图;
图7是本申请提供的功率模块中另一壳体的封装结构示意图;
图8是图7的功率模块中未封装壳体的结构示意图。
下面详细描述本申请的实施例,所述实施例的示例在附图中示出,其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。下面通过参考附图描述的实施例是示例性的,旨在用于解释本申请,而不能理解为对本申请的限制。
在本申请的描述中,需要理解的是,术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”“内”、“外”、“周向”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本申请和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本申请的限制。
在本申请中,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”、“固定”等术语应做广义理解,例如,可以是固定连接,也可以是可拆卸连接,或成一体;可以是机械连接,也可以是电连接;可以是直接相连,也可以通过中间媒介间接相连,可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言,可以根据具体情况理解上述术语在本申请中的具体含义。
如图1-图8所示,本申请提供一种功率模块,所述功率模块包括:上散热板1、下散热板2及多个子功率模块5;多个子功率模块5水平间隔设置在所述上散热板1及所述下散热板2之间;每一子功率模块5包括:上层导通板3、下层导通板4、上桥芯片组51及下桥芯片组52,所述上桥芯片组51和所述下桥芯片组(52)设置在所述上层导通板3和所述下层导通板4之间,且所述上桥芯片组51和所述下桥芯片组52均与所述上层导通板3和所述下层导通板4导通连接,所述上层导通板3与所述上散热板1贴合固接,所述下层导通
板4与所述下散热板2贴合固接。
本申请提供的功率模块,如图3所示,在上散热板1和下散热板2之间水平间隔设置多个子功率模块5,每一子功率模块5的上桥芯片组51和下桥芯片组52设置在上层导通板3和下层导通板4之间并且与上层导通板3和下层导通板4固接,如图3所示,上散热板1和下散热板2平行,上层导通板3与上散热板1贴合固接,上散热板1的面积大于上层导通板3的面积,下层导通板4与下散热板2贴合固接,下散热板2的面积大于下层导通板4的面积,如图3所示,多个子功率模块5之间的间距按照需求设置,这样不仅使得子功率模块5的布局更为灵活,且方便功能划分,同时每一子功率模块5产生的热量也不会堆积在子功率模块5之间,方便子功率模块5散热,从而解决了现有技术中的功率半导体模块中的芯片子模块因堆叠布局造成的功率半导体模块散热效果差的问题,改善了功率模块的散热效果。
在功率模块封装的过程中,设置壳体6,通过壳体6能够将子功率模块5包裹在密封的环境中,如图4所示,壳体6的数量与子功率模块5数量相同,通过每一壳体6单独将每一子功率模块5封装在上散热板1和下散热板2之间,另一种封装子功率模块5的方式是,壳体6尺寸较大,通过壳体6同时将所有的子功率模块5密封起来,从而为子功率模块5提供一个良好的工作环境,具体密封子功率模块5的方式根据实际应用进行调整。
在一个实施例中,如图3所示,所述上桥芯片组51包括:上桥芯片511和上桥缓冲板512;所述上桥芯片511贴合所述下层导通板4导通连接;所述上桥缓冲板512位于所述上层导通板3与所述下层导通板4之间,所述上桥缓冲板512一面与上桥芯片511固接,另一面与所述上层导通板3固接。
所述下桥芯片组52包括:下桥芯片521和下桥缓冲板522;所述下桥芯片521与所述上层导通板3导通连接;所述下桥缓冲板522位于所述上层导通板3与所述下层导通板4之间,下桥缓冲板522一面与下桥芯片521固接,另一面与下层导通板4固接。
每一子功率模块5在封装时,对上桥芯片组51和下桥芯片组52的数量不作限制,根据实际需要在上层导通板3和下层导通板4之间设置上桥芯片组51和下桥芯片组52,子功率模块5的上桥芯片组51的上桥芯片511与下层导通板4导通连接,上桥芯片511通过上桥缓冲板512与上层导通3贴合导通,下桥芯片组52的下桥芯片521与上层导通板3贴合导通,下桥芯片521通过下桥缓冲板522与下层导通板4贴合导通,这样的设计,使得子功率模块的电路结构更为简单,可实现性更高,为了给低压引线10留出键合空间,上桥缓冲板512和下桥缓冲板522在垂直上层导通板3和下层导通板4的方向具有第一给定厚度和第二给定厚度,从而方便低压线键合。
为了使得上桥缓冲板512和下桥缓冲板522能够与上层导通板3和下层导通板4固接,
所述上桥缓冲板512通过焊接方式分别与所述上桥芯片511和所述上层导通板3固接;所述下桥缓冲板522通过焊接方式分别与所述下桥芯片521和所述下层导通板4固接。上桥缓冲板512在与上桥芯片511和上层导通板3焊接过程中形成焊层,下桥缓冲板522同样在与下桥芯片521和下层导通板4焊接的过程中形成焊层,设置上桥缓冲板512和下桥缓冲板522能够减少上层导通板3和下层导通板4的焊接应力,减少材料模块热变形。
在一个实施例中,所述上层导通板3包括:第一覆金属层31、上陶瓷层32和与子功率模块5数量对应的第二覆金属层33;所述第一覆金属层31贴合所述上散热板1设置,所述上陶瓷层32贴合所述第一覆金属层31设置,第二覆金属层33一面与所述上陶瓷层32固接,另一面与子功率模块5的下桥芯片组52的下桥芯片521贴合固接。
所述下层导通板4包括:第三覆金属层41、下陶瓷层42和与子功率模块5数量对应的第四覆金属层43;所述第三覆金属层41贴合所述下散热板2设置,所述下陶瓷层42贴合所述第三覆金属层41设置,第四覆金属层43一面与所述下陶瓷层42贴合,另一面与对应的子功率模块5的上桥芯片组51的上桥芯片511贴合固接。
第一覆金属层31和上陶瓷层32均为一块整体板件,第二覆金属层33则与子功率模块5数量对应,每一第二覆金属层33与对应的子功率模块5的下桥芯片521通过焊接贴合固接,第三覆金属层41和下陶瓷层42均为一块整体板件,第四覆金属层43与子功率模块5数量对应,每一第四覆金属层43与对应的子功率模块5的上桥芯片511通过焊接贴合。
为了使得上散热板1和下散热板2具有良好的散热性能,所述功率模块5还包括:散热针7;所述上散热板1背离所述上层导通板3的一面上布置有多根散热针7;所述下散热板2背离所述下层导通板4的一面上布置有多根散热针7。在实际使用中,将上散热板1和下散热板2均安装在水道中,这样,使得安装在上散热板1和下散热板2上的散热针7同样处于水道中,子功率模块5工作时产生的热量传导至上散热板1、下散热板2以及散热针7,设置散热针7加大了散热面积,更利于散热,散热针7处于水道中时,冷却水流经水道与散热针7发生热交换带走散热针7上的热量,从而达到为子功率模块5降温的目的。
为了方便每一子功率模块5与外界连通,所述子功率模块5还包括:直流端子8,所述直流端子包括正极端子81和负极端子82,所述下层导通板4包括第一区域及第二区域,所述第一区域与所述第二区域绝缘设置,所述上桥芯片设置在所述第一区域,所述正极端子81与所述第一区域导通,所述负极端子82与所述第二区域导通。直流端子8设置在下层导通板4上,子功率模块5的上桥芯片511的漏极通过对应的第二覆金属层33与对应的直流端子8中的正极或负极导通,下桥芯片521的漏极通过对应的第四覆金属层43与对应的直流端子8中的正极或负极导通。
所述子功率模块5还包括:交流端子9,所述交流端子9设置在所述上层导通板3上。
每一交流端子9分别与三相线连接,每一子功率模块5的上桥芯片511的漏极通过第二覆金属层33与对应的交流端子9导通,而下桥芯片521的漏极通过第四覆金属层43与对应的交流端子9导通。
本申请还提供一种车辆,所述车辆包括上述的功率模块。
本申请提供的功率模块,在上散热板和下散热板之间水平间隔设置多个子功率模块,子功率模块的上层导通板与上散热板贴合固接,下层导通板与下散热板贴合固接,通过将子功率模块水平间隔设置在上散热板和下散热板之间,使得每一子功率模块产生的热量能够直接传递给上散热板和下散热板进行散热,方便散热,避免热量堆积在子功率模块之间,且子功率模块尺寸较小布局更为方便、灵活,利于子功率模块功能的划分。
本申请提供的功率模块和车辆,解决了现有技术中的功率半导体模块中的芯片子模块因堆叠布局造成的功率半导体模块散热效果差的问题,改善了功率模块的散热效果。
在本说明书的描述中,参考术语“一个实施例”、“一些实施例”、“示例”、“具体示例”、或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本申请的至少一个实施例或示例中。在本说明书中,对上述术语的示意性表述不必须针对的是相同的实施例或示例。而且,描述的具体特征、结构、材料或者特点可以在任一个或多个实施例或示例中以合适的方式结合。此外,在不相互矛盾的情况下,本领域的技术人员可以将本说明书中描述的不同实施例或示例以及不同实施例或示例的特征进行结合和组合。
尽管上面已经示出和描述了本申请的实施例,可以理解的是,上述实施例是示例性的,不能理解为对本申请的限制,本领域的普通技术人员在本申请的范围内可以对上述实施例进行变化、修改、替换和变型。
Claims (10)
- 一种功率模块,包括:上散热板(1)、下散热板(2)及多个子功率模块(5);多个子功率模块(5)水平间隔设置在所述上散热板(1)及所述下散热板(2)之间;每一子功率模块(5)包括:上层导通板(3)、下层导通板(4)、上桥芯片组(51)及下桥芯片组(52),所述上桥芯片组(51)和所述下桥芯片组(52)设置在所述上层导通板(3)和所述下层导通板(4)之间,且所述上桥芯片组(51)和所述下桥芯片组(52)均与所述上层导通板(3)和所述下层导通板(4)导通连接,所述上层导通板(3)与所述上散热板(1)贴合固接,所述下层导通板(4)与所述下散热板(2)贴合固接。
- 根据权利要求1所述的功率模块,其中,所述上桥芯片组(51)包括上桥芯片(511)和上桥缓冲板(512);所述上桥芯片(511)与所述下层导通板(4)导通连接;所述上桥缓冲板(512)位于所述上层导通板(3)与所述下层导通板(4)之间,所述上桥缓冲板(512)一面与上桥芯片(511)固接,另一面与上层导通板(3)固接。
- 根据权利要求2所述的功率模块,其中,所述下桥芯片组(52)包括:下桥芯片(521)和下桥缓冲板(522);所述下桥芯片(521)与所述上层导通板(3)导通连接;所述下桥缓冲板(522)位于所述上层导通板(3)与所述下层导通板(4)之间,所述下桥缓冲板(522)一面与下桥芯片(521)固接,另一面与下层导通板(4)固接。
- 根据权利要求3所述的功率模块,其中,所述上桥缓冲板(512)通过焊接方式分别与上桥芯片(511)和上层导通板(3)固接;所述下桥缓冲板(522)通过焊接方式分别与下桥芯片(521)和下层导通板(4)固接。
- 根据权利要求1-4中任一项所述的功率模块,其中,所述上层导通板(3)包括:第一覆金属层(31)、上陶瓷层(32)和与子功率模块(5)数量对应的第二覆金属层(33);所述第一覆金属层(31)贴合上散热板(1)设置,所述上陶瓷层(32)贴合第一覆金属层(31)设置,第二覆金属层(33)一面与上陶瓷层(32)贴合固接,另一面与所述下桥芯片(521)贴合固接。
- 根据权利要求1-5中任一项所述的功率模块,其中,所述下层导通板(4)包括:第三覆金属层(41)、下陶瓷层(42)和与子功率模块(5)数量对应的第四覆金属层(43);所述第三覆金属层(41)贴合下散热板(2)设置,所述下陶瓷层(42)贴合第三覆金属层(41)设置,第四覆金属层(43)一面与下陶瓷层(42)贴合,另一面与所述上桥芯 片(511)贴合固接。
- 根据权利要求1-6中一项所述的功率模块,其中,所述子功率模块(5)还包括:散热针(7);所述上散热板(1)背离上层导通板(3)的一面布置有多根散热针(7);所述下散热板(2)背离下层导通板(4)的一面布置有多根散热针(7)。
- 根据权利要求1-7中任一项所述的功率模块,其中,所述子功率模块(5)还包括:直流端子(8),所述直流端子包括正极端子(81)和负极端子(82),所述下层导通板(4)包括第一区域及第二区域,所述第一区域与所述第二区域绝缘设置,所述上桥芯片(511)设置在所述第一区域,所述正极端子(81)与所述第一区域导通,所述负极端子(82)与所述第二区域导通。
- 根据权利要求1-8中任一项所述的功率模块,其中,所述子功率模块(5)还包括:交流端子(9),所述交流端子(9)设置在所述上层导通板(3)上。
- 一种车辆,包括权利要求1-9中任一项所述的功率模块。
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