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WO2024120109A1 - 智能功率模块及功率转换设备 - Google Patents

智能功率模块及功率转换设备 Download PDF

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Publication number
WO2024120109A1
WO2024120109A1 PCT/CN2023/130480 CN2023130480W WO2024120109A1 WO 2024120109 A1 WO2024120109 A1 WO 2024120109A1 CN 2023130480 W CN2023130480 W CN 2023130480W WO 2024120109 A1 WO2024120109 A1 WO 2024120109A1
Authority
WO
WIPO (PCT)
Prior art keywords
power
chip
electrically connected
unit
signal processing
Prior art date
Application number
PCT/CN2023/130480
Other languages
English (en)
French (fr)
Inventor
廖小景
彭浩
姚伟伟
Original Assignee
华为数字能源技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华为数字能源技术有限公司 filed Critical 华为数字能源技术有限公司
Priority to EP23899689.6A priority Critical patent/EP4579747A1/en
Publication of WO2024120109A1 publication Critical patent/WO2024120109A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/16—Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of types provided for in two or more different subclasses of H10B, H10D, H10F, H10H, H10K or H10N, e.g. forming hybrid circuits
    • H01L25/165—Containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes)
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes) consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components

Definitions

  • the present application relates to the technical field of electronic equipment, and in particular to an intelligent power module and a power conversion device.
  • Intelligent power module is a relatively advanced power switching device, which has the advantages of high current density, low saturation voltage and high voltage resistance of high-power transistors, and the advantages of high input impedance, high switching frequency and low driving power of metal-oxide-semiconductor field-effect transistor (MOSFET).
  • MOSFET metal-oxide-semiconductor field-effect transistor
  • the intelligent power module integrates logic, control, detection and protection circuits, which is easy to use. It not only reduces the size and development time of the system, but also enhances the reliability of the system. It adapts to the modularization and compounding of power devices and the development direction of power integrated circuits (PIC) today, and has been more and more widely used in the field of power electronics.
  • the driver chip and the power chip are laid out in a flat pattern, and the driver chip is carried by an additional frame or circuit board.
  • the driver chip and the power chip are far apart, and the driver chip and the power chip are interconnected by wire bonding.
  • Intelligent power modules using this packaging are large in size, have high plastic packaging stress, and are at high risk of chip damage, and are prone to problems such as chip warping and cracking.
  • the wire bonding interconnection method has large parasitic inductance and resistance, which results in high voltage stress on the chip, slow module switching response speed, low switching frequency, and low module efficiency.
  • the present application provides an intelligent power module and a power conversion device to reduce the module size and reduce the risk of chip damage.
  • the present application provides an intelligent power module, which may include a power unit and a signal unit, and the power unit and the signal unit may be stacked in a first direction.
  • the power unit may include a power chip and a first insulating layer, and the power chip is buried in the first insulating layer.
  • the signal unit may include a signal processing chip, and the signal processing chip and the power chip may be overlapped in the first direction, so that the power chip and the signal processing chip can be stacked in a three-dimensional space.
  • the signal processing chip and the power chip may be electrically connected.
  • the technical solution provided by the present application is that the power unit and the signal unit are stacked in the first direction, so that the power chip and the signal processing chip are layered in the first direction, and the power chip and the signal processing chip are overlapped in the first direction, so that the power chip and the signal processing chip are stacked in three-dimensional space, so that the overall size of the module can be small, the module plastic packaging stress is small, the risk of chip damage can be reduced, and the chip is not prone to warping, cracking and other problems.
  • the power chip and the signal processing chip are close, so that the conductive part connecting the power chip and the signal processing chip can be shorter, the parasitic inductance and resistance can be controlled within a small range, so that the voltage stress on the chip is small, the switch response speed of the module is fast, and the switching frequency is high, thereby, the efficiency of the module is high.
  • the intelligent power module provided by the embodiment of the present application can achieve miniaturization and low parasitic parameters, and can meet the use requirements of more application scenarios.
  • the power chip is buried in the first insulating layer, so that the position of the power chip is relatively stable, which can improve the stability of the module.
  • the signal processing chip When the signal processing chip and the power chip are specifically connected, the signal processing chip can be electrically connected to the power chip through the first via.
  • the first via can be shorter, the parasitic inductance and resistance can be controlled within a smaller range, the voltage stress on the chip can be reduced, and the switching response speed and switching frequency of the module can be improved.
  • the power unit may further include a first wiring layer, which may be arranged on a side of the power chip close to the signal unit, and the power chip may be electrically connected to the first wiring layer, so as to facilitate the connection between the power chip and the signal processing chip.
  • the first routing layer can be electrically connected to the first via, so that the power chip can be electrically connected to the first via, and then the power chip can be electrically connected to the signal processing chip, that is, the power chip can be electrically connected to the signal processing chip through the first routing layer and the first via.
  • the power unit may further include a second wiring layer, which may be arranged on a side of the power chip away from the signal unit, and the power chip may be electrically connected to the second wiring layer, so as to facilitate the arrangement of the power chip.
  • the second wiring layer can be electrically connected to the first wiring layer through a second via, which facilitates the connection between the second wiring layer and the first wiring layer.
  • the connection between the second wiring layer and the first wiring layer also provides more possibilities for the internal and external connection of the power chip, and can adapt to various layout requirements.
  • the signal unit may further include a third routing layer, and the third routing layer may be arranged on a side of the signal processing chip close to the power unit, the signal processing chip may be electrically connected to the third routing layer, and the power chip may be electrically connected to the third routing layer.
  • the arrangement of the third routing layer facilitates the connection between the signal processing chip and the power chip, and also facilitates the external connection of the signal processing chip and the power chip.
  • the power chip may be electrically connected to the third routing layer through the first routing layer and the first via.
  • the third routing layer can be electrically connected to the first routing layer through the first via, so that the signal processing chip can be electrically connected to the power chip through the third routing layer, the first via and the first routing layer.
  • the third wiring layer may be electrically connected to passive components, which may be resistors, capacitors, inductors, sensors, etc., to enrich the module functions.
  • a plurality of pins may be electrically connected to the third wiring layer, the first ends of the pins may be electrically connected to the third wiring layer, and the second ends of the pins may extend out of the signal portion.
  • the arrangement of the pins facilitates the connection of the module with an external printed circuit board or the like.
  • the signal unit may further include a second insulating layer, and the signal processing chip is buried in the second insulating layer.
  • the second insulating layer can play an insulating and protective role, and can also play a positioning role, so that the position of the signal processing chip is relatively stable.
  • the intelligent power module may further include a heat dissipation unit, the heat dissipation unit and the power unit may be stacked, and the power unit may be located between the heat dissipation unit and the signal unit, so as to improve the heat dissipation capacity of the module.
  • the heat dissipation unit may include an insulating heat-conducting layer and a heat dissipation element, and the heat dissipation element may be fixedly connected to the power unit through the insulating heat-conducting layer, so as to accelerate the heat dissipation of the power unit and thus accelerate the heat dissipation speed of the module.
  • a heat dissipation fin may be provided on a side of the heat dissipation element away from the power unit, so as to improve the heat dissipation efficiency of the module.
  • the present application provides a power conversion device, which may include a circuit board and a power conversion circuit composed of at least one intelligent power module as in any of the embodiments of the first aspect, wherein the intelligent power module may be arranged on the circuit board, the intelligent power module may be electrically connected to the circuit board, and the power conversion circuit may be used for AC/DC conversion.
  • the intelligent power module is small in size, relatively stable in performance, and relatively efficient, so that the size of the power conversion device may be correspondingly small and the performance may be relatively superior.
  • FIG1 is a schematic diagram of the structure of an intelligent power module provided in an embodiment of the present application.
  • FIG2 is a schematic diagram of the structure of an intelligent power module provided in another embodiment of the present application.
  • FIG3 is a schematic diagram of the structure of an intelligent power module provided in another embodiment of the present application.
  • FIG4 is a schematic diagram of the structure of an intelligent power module provided in another embodiment of the present application.
  • FIG5 is a schematic diagram of the structure of an intelligent power module provided in another embodiment of the present application.
  • FIG6 is a schematic diagram of the structure of an intelligent power module provided in another embodiment of the present application.
  • the intelligent power module provided in the embodiment of this application can be adapted to a power conversion device.
  • the intelligent power module provided in the embodiment of this application can be applied to a power supply system, such as a system-level power conversion function module, for realizing functions such as step-up and step-down, and AC-DC conversion.
  • the intelligent power module provided in the embodiment of this application can be set on a circuit board and electrically connected to the circuit board.
  • Intelligent power modules usually include driver chips, power chips and other electronic components.
  • the driver chips and power chips are arranged flat, and the driver chips are usually supported by an additional frame or printed circuit board (PCB), so that the distance between the driver chips and the power chips is relatively far.
  • the driver chips and the power chips are usually interconnected by wire bonding.
  • Intelligent power modules using this packaging solution are large in size, high in cost, and have high plastic packaging stress, high risk of chip damage, and are prone to chip warping, cracking, etc.
  • the parasitic inductance and resistance of the wire bonding interconnection method are large, resulting in high voltage stress on the chip, which results in slow switching response speed of the module, low switching frequency, and low overall module efficiency.
  • an embodiment of the present application provides an intelligent power module to reduce the module size and reduce the risk of chip damage.
  • the intelligent power module provided in an embodiment of the present application may include a power unit 100 and a signal unit 200.
  • the power unit 100 and the signal unit 200 may be stacked in a first direction.
  • the power unit 100 may include a power chip 101.
  • the signal unit 200 may drive and control the power chip 101, and may also perform related intelligent control, and the signal unit 200 may include a signal processing chip 201.
  • the signal processing chip 201 and the power chip 101 may be overlapped in the first direction, and the signal processing chip 201 is electrically connected to the power chip 101.
  • the overlap in the embodiment of the present application refers to the overlap of the signal processing chip 201 and the power chip 101 in the first direction, that is, the projection of one device on the placement surface of the other device along the first direction overlaps at least partially with the projection of the other device on its own placement surface along the first direction.
  • the two may be of the same size or different sizes, and the two may overlap partially or completely.
  • the power unit 100 and the signal unit 200 are stacked in the first direction, so that the power chip 101 and the signal processing chip 201 are layered in the first direction, and the power chip 101 and the signal processing chip 201 are overlapped in the first direction, so that the power chip 101 and the signal processing chip 201 are stacked in three-dimensional space, so that the overall size of the module can be small, the module plastic packaging stress is small, the risk of chip damage can be reduced, and the chip is not prone to warping, cracking and other problems.
  • the power chip 101 and the signal processing chip 201 are close, so that the conductive part connecting the power chip 101 and the signal processing chip 201 can be shorter, and the parasitic inductance and resistance can be controlled within a small range, so that the voltage stress on the chip is small, the switch response speed of the module is fast, and the switching frequency is high, thereby, the efficiency of the module is high.
  • the power chip 101 may use relatively high power devices such as insulated gate bipolar transistors (IGBT), field effect transistors (MOSFET), and diodes.
  • the signal processing chip 201 may use relatively low power devices such as driver ICs and controller ICs.
  • the intelligent power module provided in the embodiment of the present application can be used as a power conversion function module of a power supply system.
  • the power chip 101 can use MOSFET, and the signal processing chip 201 can use a driver chip to achieve functions such as step-up and step-down and AC/DC conversion.
  • the entire module can be interconnected with a printed circuit board outside the module.
  • the signal part 200 of the module can include components such as resistors, capacitors, and inductors in addition to the driver chip.
  • the signal processing chip 201 can be electrically connected to the power chip 101 through the first via 102.
  • the first via 102 can be formed in the signal part 200 and the power part 100.
  • a through hole can be formed in the signal part 200 and the power part 100, and the through hole can be plated with copper or other conductive metals to form the first via 102, that is, the first via 102 can be a metal through hole structure.
  • a metal wiring arranged in the signal part 200 and the power part 100 can also be used to realize the electrical connection between the signal processing chip 201 and the power chip 101, such as using a copper wiring.
  • the power unit 100 may further include a first routing layer 103, which may be disposed on a side of the power chip 101 close to the signal unit 200, and the power chip 101 may be electrically connected to the first routing layer 103.
  • the first routing layer 103 may be a sheet structure made of copper, and the power chip 101 and the first routing layer 103 may be welded to achieve electrical connection.
  • the first routing layer 103 may also be made of other conductive metals and may also be in other shapes. The embodiment of the present application does not limit the material and shape of the first routing layer 103.
  • the first via 102 may also be electrically connected to the first routing layer 103.
  • the first via 102 and the first routing layer 103 may be welded to achieve electrical connection, or the first via 102 and the first routing layer 103 may be integrally formed.
  • the first via 102 is electrically connected to the first routing layer 103, so that the first via 102 and the power chip 101 may be electrically connected, and then the signal processing chip 201 and the power chip 101 may be electrically connected.
  • the signal processing chip 201 may be electrically connected to the power chip 101 through the first via 102 and the first routing layer 103.
  • the power unit 100 may include one or more first routing layers 103 to set other components.
  • Multiple first routing layers 103 may be fully electrically connected, partially electrically connected, or not electrically connected to each other. Multiple first routing layers 103 may be arranged flat or stacked. When multiple first wiring layers 103 are stacked, adjacent first wiring layers 103 can be electrically connected through metal via structures or metal wiring, wherein part of the first wiring layers 103 can be arranged on one side or both sides of the power chip 101 in the first direction vertically, that is, can be arranged on the left side and/or right side of the power chip 101 in Figure 1. When the power unit 100 includes multiple first wiring layers 103, the power chip 101 can be electrically connected to a first wiring layer 103 closest to itself.
  • the power unit 100 may further include a second wiring layer 104.
  • the second wiring layer 104 may be arranged in the power unit 100.
  • the chip 101 is on a side away from the signal unit 200.
  • the second wiring layer 104 can play the role of carrying the power chip 101.
  • the power chip 101 can be electrically connected to the second wiring layer 104.
  • the second wiring layer 104 can be a sheet structure made of copper.
  • the second wiring layer 104 can also be made of other conductive metals and can also be in other shapes. The embodiment of the present application does not limit the material and shape of the second wiring layer 104.
  • the power chip 101 and the second wiring layer 104 can be directly connected by metallization to achieve electrical connection.
  • the metallization in the embodiment of the present application refers to physically vapor-depositing a metal layer on the second wiring layer 104, and then etching different patterns to match and connect with the pins of the power chip 101.
  • Fig. 2 shows a schematic diagram of the structure of an intelligent power module provided by another embodiment of the present application.
  • the power chip 101 and the second wiring layer 104 can be electrically connected through a third via 106.
  • the third via 106 can be a metal through-hole structure.
  • the second routing layer 104 may protrude from the surface of the power unit 100, or the second routing layer 104 may be flush with the surface of the power unit 100, thereby, the second routing layer 104 may play a role in accelerating heat dissipation, which is conducive to the rapid dissipation of heat from the power chip 101.
  • the power unit 100 may include one or more second routing layers 104 to set other components, and the plurality of second routing layers 104 may be fully electrically connected, or partially electrically connected, or not electrically connected to each other, and the plurality of second routing layers 104 may be arranged flat or stacked.
  • the adjacent second routing layers 104 may be electrically connected through a metal through hole structure or a metal routing, wherein part of the second routing layers 104 may also be arranged on one side or both sides of the power chip 101 in the first direction vertically, that is, they may be arranged on the left side and/or right side of the power chip 101 in FIG. 1 .
  • the power unit 100 includes multiple second wiring layers 104
  • the power chip 101 can be electrically connected to the second wiring layer 104 closest to itself, and the second wiring layer 104 farthest from the power chip 101 can protrude from the surface of the power unit 100 or be flush with the surface of the power unit 100 .
  • the second wiring layer 104 can be electrically connected to the first wiring layer 103 through the second via 105.
  • the second via 105 can be formed in the power unit 100.
  • a through hole can be formed in the power unit 100, and the through hole is plated with copper or other conductive metals to form the second via 105, that is, the second via 105 can also be a metal through hole structure.
  • a copper column or a columnar structure made of other conductive metals can also be used to realize the electrical connection between the second wiring layer 104 and the first wiring layer 103.
  • the power unit 100 may further include a first insulating layer 107, and the power chip 101 may be embedded in the first insulating layer 107.
  • the power chip 101 and other components that may be actually required may be embedded in the first insulating layer 107 to form the power unit 100, that is, the power chip 101 may be embedded and packaged in the first insulating layer 107.
  • the first insulating layer 107 may be formed by a glue potting process.
  • the first wiring layer 103 may be disposed in the first insulating layer 107, that is, the first wiring layer 103 may be encapsulated in the first insulating layer 107 by embedding.
  • the second wiring layer 104 may protrude from the first insulating layer 107, or the second wiring layer 104 may be flush with the surface of the first insulating layer 107.
  • the relative positions of the power chip 101, the first wiring layer 103, and the second wiring layer 104 may be fixed by the first insulating layer 107.
  • the signal unit 200 may further include a third routing layer 202, and the third routing layer 202 may be arranged on a side of the signal processing chip 201 close to the power unit 100.
  • the third routing layer 202 may play the role of carrying the signal processing chip 201.
  • the signal processing chip 201 may be electrically connected to the third routing layer 202.
  • the third routing layer 202 may be a sheet structure made of copper, and the signal processing chip 201 and the third routing layer 202 may be welded to achieve electrical connection.
  • the power chip 101 may also be electrically connected to the third routing layer 202.
  • the third routing layer 202 may also be made of other conductive metals and may also be in other shapes.
  • the signal unit 200 may include one or more third routing layers 202 to set other components, and multiple third routing layers 202 may be electrically connected to each other, or partially electrically connected, or not electrically connected to each other, and multiple third routing layers 202 may be arranged flat or stacked.
  • multiple third routing layers 202 are stacked, adjacent third routing layers 202 may be electrically connected through a metal through-hole structure.
  • the signal processing chip 201 may be electrically connected to a third routing layer 202 closest to itself.
  • the third routing layer 202 can be set inside the signal part 200 or on the surface of the signal part 200, or can be set inside the power part 100 or on the surface of the power part 100, or can be set at the junction area between the signal part 200 and the power part 100, that is, a part of the third routing layer 202 can be located in the signal part 200, and the other part can be located in the power part 100.
  • the first via hole 102 may be electrically connected to the third wiring layer 202.
  • the first via hole 102 and the third wiring layer 202 may be welded to achieve electrical connection, or the first via hole 102 and the third wiring layer 202 may be integrally formed.
  • the three wiring layers 202 are electrically connected, so that the first via 102 can be electrically connected to the signal processing chip 201, and then the power chip 101 can be electrically connected to the signal processing chip 201, that is, the power chip 101 can be electrically connected to the signal processing chip 201 through the first via 102 and the third wiring layer 202.
  • the power chip 101 can be electrically connected to the third wiring layer 202 through the second wiring layer 104, the second via 105, the first wiring layer 103 and the first via 102, so as to be electrically connected to the signal processing chip 201.
  • the first via 102 can be welded to the first routing layer 103 and the third routing layer 202 at the same time, that is, the third routing layer 202 can be electrically connected to the first routing layer 103 through the first via 102.
  • the first via 102 can be integrally formed with the first routing layer 103 and the third routing layer 202.
  • the power chip 101 can be electrically connected to the signal processing chip 201 through the first routing layer 103, the first via 102 and the third routing layer 202.
  • the third routing layer 202 may be provided with passive components 203.
  • the third routing layer 202 may play the role of carrying the passive components 203.
  • the passive components 203 may be resistors, capacitors, inductors, sensors, etc., which may be selected according to actual needs.
  • One or more passive components 203 may be provided on the third routing layer 202.
  • the passive components 203 are electrically connected to the third routing layer 202. Specifically, the passive components 203 may be welded to the third routing layer 202 to achieve electrical connection.
  • the provision of the third routing layer 202 may realize the addition of passive components 203 to fully utilize the internal space of the signal part 200, enrich the module functions, and may also concentrate multiple passive components 203, or may concentrate the signal processing chip 201 and the passive components 203, thereby reducing the overall size of the module.
  • the third wiring layer 202 may be provided with pins, and the pins are electrically connected to the third wiring layer 202. Specifically, the pins and the third wiring layer 202 may be welded to achieve electrical connection. In actual setting, the first end of the pin may be electrically connected to the third wiring layer 202, and the second end of the pin may extend out of the signal portion 200 to be electrically connected to a printed circuit board outside the module, thereby interconnecting the module with an external printed circuit board. According to actual needs, the third wiring layer 202 may be provided with a plurality of pins, and the pins may be distributed at any position on the side of the module. The embodiment of the present application does not limit the number and distribution position of the pins.
  • a part of the plurality of pins may be used as a power pin, and another part may be used as a signal pin.
  • the power pin 204 can be electrically connected to the power chip 101. Specifically, the power pin 204 can be electrically connected to the power chip 101 through the third wiring layer 202, the first via 102, the first wiring layer 103, the second via 105 and the second wiring layer 104, or the power pin 204 can be electrically connected to the power chip 101 through the third wiring layer 202, the first via 102 and the first wiring layer 103.
  • the signal pin 205 can be electrically connected to the signal processing chip 201. Specifically, the signal pin 205 can be electrically connected to the signal processing chip 201 through the third wiring layer 202.
  • the pins can be made of copper or other conductive metal materials.
  • the pins can be bent into various shapes to be suitable for various assembly methods, such as plug-in or surface mounting on a printed circuit board outside the module.
  • the second end of the pin may be a straight line arranged along the first direction to facilitate plugging into an external printed circuit board.
  • Fig. 3 shows a schematic diagram of the structure of an intelligent power module provided by another embodiment of the present application.
  • the second end of the pin can be a broken line shape that is partially perpendicular to the first direction, so as to facilitate surface mounting on an external printed circuit board.
  • FIG. 4 shows a schematic diagram of the structure of an intelligent power module provided by another embodiment of the present application.
  • the pin as a whole can be a columnar structure.
  • the second end of the pin can be made into a pad to facilitate surface mounting on an external printed circuit board.
  • the signal unit 200 may further include a second insulating layer 206, and the signal processing chip 201 may be embedded in the second insulating layer 206.
  • the signal processing chip 201 and the passive components 203 may be embedded in the second insulating layer 206 to form the signal unit 200, that is, the signal processing chip 201 and the passive components 203 may be embedded in the second insulating layer 206.
  • the pins may extend out of the second insulating layer 206.
  • the second insulating layer 206 may be formed by a glue filling process.
  • the third routing layer 202 may be arranged inside the second insulating layer 206, that is, the third routing layer 202 may be embedded in the second insulating layer 206; or, the third routing layer 202 may be arranged on the surface of the second insulating layer 206.
  • the relative positions among the signal processing chip 201, the passive components 203, the third routing layer 202 and the pins may be fixed by the second insulating layer 206.
  • the second insulating layer 206 can be bonded to the first insulating layer 107.
  • the second insulating layer 206 and the first insulating layer 107 can be made of the same material, so that the two can be integrally formed.
  • the intelligent power module may further include a heat dissipation unit 300.
  • the heat dissipation unit 300 and the power unit 100 may be stacked.
  • the power unit 100 may be located between the heat dissipation unit 300 and the signal unit 200.
  • the heat dissipation unit 300 is the side of the module away from the printed circuit board.
  • the heat dissipation unit 300 can realize the heat dissipation of the power unit 100 to the outside, which is conducive to the rapid dissipation of the module heat.
  • the heat dissipation unit 300 can also realize the insulation of the power unit 100 to the outside.
  • the heat dissipation unit 300 may include an insulating heat conductive layer 301 and a heat dissipation member 302.
  • the heat dissipation member 302 may be fixedly connected to the power unit 100 through the insulating heat conductive layer 301.
  • the insulating heat conductive layer 301 may be fixedly connected to the second wiring layer 104 of the power unit 100 to achieve rapid heat dissipation of the power unit 100.
  • the insulating heat conductive layer 301 may be bonded to the power unit 100, and the heat dissipation member 302 may be bonded to the insulating heat conductive layer 301.
  • the heat sink 302 can be made of copper or other materials with relatively ideal thermal conductivity.
  • the heat sink 302 can be in various shapes such as a sheet.
  • the embodiment of the present application does not limit the material and shape of the heat sink 302.
  • the insulating thermal conductive layer 301 can be formed by a glue injection process.
  • the insulating thermal conductive layer 301 and the first insulating layer 107 can be made of the same material, so that the insulating thermal conductive layer 301 and the first insulating layer 107 can be integrally formed.
  • the insulating thermal conductive layer 301, the first insulating layer 107 and the second insulating layer 206 can be made of the same material, and the three can be integrally formed.
  • the insulating thermal conductive layer 301 can be made of a copper-clad ceramic substrate (direct bonding copper, DBC) or an active metal brazing (active metal brazing, AMB) copper-clad ceramic substrate, etc., which can be welded on the second wiring layer 104.
  • DBC direct bonding copper
  • AMB active metal brazing
  • FIG. 5 shows a schematic diagram of the structure of an intelligent power module provided by another embodiment of the present application.
  • a heat sink 302 away from the power unit 100 may be provided with a heat dissipation fin 303 to improve the heat dissipation efficiency.
  • the heat dissipation fin 303 and the heat sink 302 may be welded or integrally formed.
  • the heat sink 302 and the heat dissipation fin 303 as a whole may be regarded as a heat sink of the module.
  • FIG. 6 shows a schematic diagram of the structure of an intelligent power module provided by another embodiment of the present application.
  • the heat sink 302 can be connected to the heat sink 400 outside the module to improve the heat dissipation capacity.
  • the heat sink 400 and the heat sink 302 can be fixedly connected by a thermal interface material (TIM) or solder, so that the heat sink 400 and the module can be formed into a whole by pressing or welding, and the bonding surface between the heat sink 400 and the module is relatively tight, which can ensure the effectiveness of the heat dissipation capacity of the heat sink 400.
  • TIM thermal interface material
  • the intelligent power module provided in the embodiment of the present application can be used as a power conversion function module of the power system, and can also be applied to other chip packaging fields that are sensitive to parasitics and heat dissipation, for example, it can be used as a processor, converter and other functional modules.
  • the power chip can also use a chip of radio frequency, artificial intelligence (AI), central processing unit (CPU) or graphic processing unit (GPU), etc.
  • AI artificial intelligence
  • CPU central processing unit
  • GPU graphic processing unit
  • the signal processing chip can use a memory, etc.
  • the embodiment of the present application does not limit the specific application of the intelligent power module.

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Abstract

提供了一种智能功率模块及功率转换设备。智能功率模块包括功率部和信号部，功率部和信号部在第一方向上层叠设置。功率部包括功率芯片和第一绝缘层，功率芯片内埋于第一绝缘层。信号部包括信号处理芯片，信号处理芯片和功率芯片在第一方向上交叠设置，信号处理芯片与功率芯片电连接。本方案中，功率部和信号部在第一方向上层叠设置，从而功率芯片和信号处理芯片第一方向上分层设置，且功率芯片和信号处理芯片在第一方向上交叠布置，实现功率芯片和信号处理芯片在三维空间内堆叠，模块整体尺寸可以较小，模块塑封应力较小，可以降低芯片受损风险。且功率芯片和信号处理芯片较近，寄生电感及电阻可以较小，芯片受到的电压应力较小，模块效率较高。

Description

智能功率模块及功率转换设备
相关申请的交叉引用
本申请要求在2022年12月07日提交中国专利局、申请号为202211567621.9、申请名称为“智能功率模块及功率转换设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及电子设备技术领域，尤其涉及一种智能功率模块及功率转换设备。
背景技术
智能功率模块(intelligent power module，IPM)是一种比较先进的功率开关器件，具有大功率晶体管的高电流密度、低饱和电压和耐高压的优点，还具有金属氧化物半导体场效应晶体管(metal-oxide-semiconductor field-effect transistor，MOSFET)的高输入阻抗、高开关频率和低驱动功率的优点。而且智能功率模块内部集成了逻辑、控制、检测和保护电路，使用起来方便，不仅减小了系统的体积以及开发时间，也增强了系统的可靠性，适应了当今功率器件的模块化、复合化和功率集成电路(power integrated circuit，PIC)的发展方向，在电力电子领域得到了越来越广泛的应用。
目前的智能功率模块的封装解决方案中，驱动芯片和功率芯片平铺排布，驱动芯片由额外的框架或电路板承载，驱动芯片和功率芯片的距离较远，驱动芯片和功率芯片采用引线键合的方式互连。采用这种封装的智能功率模块，尺寸较大，塑封应力较大，芯片受损风险较高，容易出现芯片翘曲、开裂等问题。此外，引线键合的互连方式的寄生电感及电阻较大，导致芯片受到的电压应力较大，使得模块的开关响应速度较慢，开关频率较低，致使模块的效率较低。
发明内容
本申请提供了一种智能功率模块及功率转换设备，以减小模块尺寸，降低芯片受损风险。
第一方面，本申请提供了一种智能功率模块，可以包括功率部和信号部，功率部和信号部可以在第一方向上层叠设置。功率部可以包括功率芯片和第一绝缘层，功率芯片内埋于第一绝缘层。信号部可以包括信号处理芯片，信号处理芯片和功率芯片可以在第一方向上交叠设置，从而可以实现功率芯片和信号处理芯片在三维空间内堆叠。信号处理芯片与功率芯片可以电连接。
本申请提供的技术方案，功率部和信号部在第一方向上层叠设置，从而功率芯片和信号处理芯片第一方向上分层设置，且功率芯片和信号处理芯片在第一方向上交叠布置，实现功率芯片和信号处理芯片在三维空间内堆叠，使得模块整体尺寸可以较小，模块塑封应力较小，可以降低芯片受损风险，芯片不易出现翘曲、开裂等问题。并且，得益于功率芯片和信号处理芯片在三维空间内堆叠，功率芯片和信号处理芯片较近，使得连接功率芯片和信号处理芯片的导电件可以较短，寄生电感及电阻可以控制在较小范围内，从而芯片受到的电压应力较小，模块的开关响应速度较快，开关频率较高，由此，模块的效率较高。整体而言，本申请实施例提供的智能功率模块可以实现小型化、低寄生参数，可以满足更多应用场景的使用需求。此外，功率芯片内埋于第一绝缘层，使得功率芯片的位置比较稳定，可以提高模块的稳定性。
在具体连接信号处理芯片与功率芯片时，信号处理芯片可以通过第一过孔与功率芯片电连接。第一过孔可以较短，寄生电感及电阻可以控制在较小范围内，可以减小芯片受到的电压应力，从而可以提高模块的开关响应速度，及开关频率。
在一个具体的可实施方案中，功率部还可以包括第一走线层，第一走线层可以设置在功率芯片靠近信号部的一侧，功率芯片可以与第一走线层电连接。便于功率芯片与信号处理芯片的连接。
在一个具体的可实施方案中，第一走线层可以与第一过孔电连接，从而可以实现功率芯片与第一过孔电连接，进而可以实现功率芯片与信号处理芯片电连接，即实现功率芯片通过第一走线层及第一过孔与信号处理芯片电连接。
在一个具体的可实施方案中，功率部还可以包括第二走线层，第二走线层可以设置在功率芯片远离信号部的一侧，功率芯片可以与第二走线层电连接。便于功率芯片的布置。
在一个具体的可实施方案中，第二走线层可以通过第二过孔与第一走线层电连接。便于第二走线层与第一走线层的连接，第二走线层与第一走线层连接也为功率芯片对内及对外的连接提供更多可能性，可以适应多种布设需求。
在一个具体的可实施方案中，信号部还可以包括第三走线层，第三走线层可以设置在信号处理芯片靠近功率部的一侧，信号处理芯片可以与第三走线层电连接，功率芯片可以与第三走线层电连接。第三走线层的设置便于信号处理芯片与功率芯片的连接，也便于信号处理芯片及功率芯片对外连接。具体地，功率芯片可以通过第一走线层及第一过孔与第三走线层电连接。
在一个具体的可实施方案中，第三走线层可以通过第一过孔与第一走线层电连接，从而可以实现信号处理芯片通过第三走线层、第一过孔及第一走线层与功率芯片电连接。
在一个具体的可实施方案中，第三走线层上可以电连接有被动元器件。被动元器件可以为电阻、电容、电感、传感器等，可以丰富模块功能。
在一个具体的可实施方案中，第三走线层上还可以电连接有多个引脚，引脚的第一端可以与第三走线层电连接，引脚的第二端可以伸出信号部。引脚的设置便于模块与外部的印制电路板等连接。
在一个具体的可实施方案中，信号部还可以包括第二绝缘层，信号处理芯片内埋于第二绝缘层。第二绝缘层可以起到绝缘及保护作用，还可以起到定位作用，使得信号处理芯片的位置比较稳定。
在一个具体的可实施方案中，智能功率模块还可以包括散热部，散热部和功率部可以层叠设置，功率部可以位于散热部和信号部之间。可以提升模块的散热能力。
在一个具体的可实施方案中，散热部可以包括绝缘导热层和散热件，散热件可以通过绝缘导热层与功率部固定连接。可以加快功率部的热量散发，从而可以加快模块的散热速度。
在一个具体的可实施方案中，散热件远离功率部的一侧可以设置有散热翅片。可以提高模块的散热效率。
第二方面，本申请提供了一种功率转换设备，可以包括电路板，以及由至少一个如前述第一方面中任一可实施方案中的智能功率模块组成的功率转换电路，智能功率模块可以设置在电路板上，智能功率模块可以与电路板电连接，功率转换电路可以用于交、直流转换。智能功率模块的尺寸较小，性能比较稳定，效率较高，从而功率转换设备的尺寸可以对应地较小，性能比较优越。
附图说明
图1为本申请实施例提供的智能功率模块的结构示意图；
图2为本申请另一实施例提供的智能功率模块的结构示意图；
图3为本申请另一实施例提供的智能功率模块的结构示意图；
图4为本申请另一实施例提供的智能功率模块的结构示意图；
图5为本申请另一实施例提供的智能功率模块的结构示意图；
图6为本申请另一实施例提供的智能功率模块的结构示意图。
附图标记：
100-功率部；200-信号部；300-散热部；400-散热器；101-功率芯片；102-第一过孔；
103-第一走线层；104-第二走线层；105-第二过孔；106-第三过孔；107-第一绝缘层；
201-信号处理芯片；202-第三走线层；203-被动元器件；204-功率引脚；205-信号引脚；
206-第二绝缘层；301-绝缘导热层；302-散热件；303-散热翅片。
具体实施方式
下面将结合附图，对本申请实施例进行详细描述。
为了方便理解，首先说明本申请涉及的智能功率模块的应用场景。本申请实施例提供的智能功率模块可以适配于功率转换设备，作为一种可能的应用场景，本申请实施例提供的智能功率模块可以应用于电源系统，如可以作为系统级变电功能模块，用于实现升降压，及交直流转换等功能。具体设置时，本申请实施例提供的智能功率模块可以设置在电路板上，并与电路板电连接。
智能功率模块通常包括驱动芯片、功率芯片及其他电子元器件，在目前的智能功率模块的封装方案中，驱动芯片和功率芯片平铺排布，驱动芯片通常由额外的框架或印制电路板(printed circuit board，PCB)承载，使得驱动芯片和功率芯片的距离较远，驱动芯片和功率芯片通常采用引线键合的方式互连。 采用这种封装方案的智能功率模块，尺寸较大，成本较高，且塑封应力较大，芯片受损风险较高，容易出现芯片翘曲、开裂等问题。并且，引线键合的互连方式的寄生电感及电阻较大，导致芯片受到的电压应力较大，这就造成模块的开关响应速度较慢，开关频率较低，模块整体表现为效率较低。
基于此，本申请实施例提供了一种智能功率模块，以减小模块尺寸，降低芯片受损风险。
首先参照图1，图1示出了本申请实施例提供的智能功率模块的结构示意图。如图1所示，本申请实施例提供的智能功率模块可以包括功率部100和信号部200。功率部100和信号部200可以在第一方向上层叠设置。功率部100可以包括功率芯片101。信号部200可以驱动及控制功率芯片101，还可以进行相关智能控制，信号部200可以包括信号处理芯片201。具体实施时，信号处理芯片201和功率芯片101可以在第一方向上交叠设置，信号处理芯片201与功率芯片101电连接。本申请实施例中的交叠，是指信号处理芯片201和功率芯片101这两个器件在第一方向上至少部分存在重叠，即其中一个器件沿第一方向在另一个器件的放置面上的投影，与另一个器件沿第一方向在其自身的放置面上的投影至少部分存在重叠。具体地，信号处理芯片201和功率芯片101在设置时，二者可以大小一致，也可以大小不一致，二者既可以部分重叠，也可以完全重叠。
本申请实施例提供的智能功率模块，功率部100和信号部200在第一方向上层叠设置，从而功率芯片101和信号处理芯片201第一方向上分层设置，且功率芯片101和信号处理芯片201在第一方向上交叠布置，实现功率芯片101和信号处理芯片201在三维空间内堆叠，使得模块整体尺寸可以较小，模块塑封应力较小，可以降低芯片受损风险，芯片不易出现翘曲、开裂等问题。并且，得益于功率芯片101和信号处理芯片201在三维空间内堆叠，功率芯片101和信号处理芯片201较近，使得连接功率芯片101和信号处理芯片201的导电件可以较短，寄生电感及电阻可以控制在较小范围内，从而芯片受到的电压应力较小，模块的开关响应速度较快，开关频率较高，由此，模块的效率较高。
在具体实施中，功率芯片101可以采用绝缘栅双极型晶体管(insulated gate bipolar transistor，IGBT)、场效应晶体管(MOSFET)、二极管(diode)等较大功率器件。信号处理芯片201可以采用驱动芯片(Driver IC)、控制芯片(Controller IC)等较小功率器件。
在一种可能的应用场景中，本申请实施例提供的智能功率模块可以作为电源系统的变电功能模块，此时，功率芯片101可以采用MOSFET，信号处理芯片201可以采用驱动芯片，以实现升降压及交直流转换等功能。具体应用时，模块整体可以与模块以外的印制电路板互连。根据实际需要，模块的信号部200除包括驱动芯片以外，还可以包括电阻、电容、电感等元器件。
作为一种可能的实施例，信号处理芯片201可以通过第一过孔102与功率芯片101电连接。第一过孔102可以成型在信号部200及功率部100内，具体地，可以在信号部200及功率部100内成型通孔，对通孔镀铜或镀其他导电金属，以形成第一过孔102，即第一过孔102可以为金属通孔结构。在具体实施中，除采用金属通孔结构外，还可以采用布设在信号部200及功率部100内的金属走线实现信号处理芯片201与功率芯片101电连接，如采用铜走线等。
作为一种可能的实施例，功率部100还可以包括第一走线层103，第一走线层103可以设置在功率芯片101靠近信号部200的一侧，功率芯片101可以与第一走线层103电连接。具体地，第一走线层103可以为由铜制成的片状结构，功率芯片101与第一走线层103可以焊接以实现电连接。第一走线层103也可以由其他导电金属制成，也可以为其他形状，本申请实施例对第一走线层103的材质及形状不作限制。
实际设置时，第一过孔102也可以与第一走线层103电连接，具体地，第一过孔102与第一走线层103可以焊接以实现电连接，或者，第一过孔102与第一走线层103可以一体成型。第一过孔102与第一走线层103电连接，从而可以实现第一过孔102与功率芯片101电连接，进而可以实现信号处理芯片201与功率芯片101电连接，也就是说，信号处理芯片201可以通过第一过孔102及第一走线层103与功率芯片101电连接。在具体实施中，根据实际需求，功率部100可以包括一个或多个第一走线层103，以设置其他元器件，多个第一走线层103之间可以全部电连接，或者部分电连接，或者互不电连接，多个第一走线层103可以平铺设置，或者层叠设置。当多个第一走线层103层叠设置时，相邻第一走线层103可以通过金属通孔结构或金属走线电连接，其中，部分第一走线层103可以设置在功率芯片101在第一方向垂向上的一侧或两侧，即可以设置在图1中功率芯片101的左侧和/或右侧。当功率部100包括多个第一走线层103时，功率芯片101可以与最靠近自身的一个第一走线层103电连接。
作为一种可能的实施例，功率部100还可以包括第二走线层104，第二走线层104可以设置在功率 芯片101远离信号部200的一侧，在具体成型功率部100时，第二走线层104可以起到承载功率芯片101的作用。功率芯片101可以与第二走线层104电连接。具体地，第二走线层104可以为由铜制成的片状结构。第二走线层104也可以由其他导电金属制成，也可以为其他形状，本申请实施例对第二走线层104的材质及形状不作限制。
在一种可能的具体实施中，功率芯片101与第二走线层104可以金属化直接连接以实现电连接。本申请实施例中的金属化，是指在第二走线层104上物理气相沉积金属层，之后再蚀刻出不同的图形，以与功率芯片101的引脚相匹配连接。
参照图2，图2示出了本申请另一实施例提供的智能功率模块的结构示意图。如图2所示，在另一种可能的具体实施中，功率芯片101与第二走线层104可以通过第三过孔106电连接。具体地，第三过孔106可以为金属通孔结构。
继续参照图1，具体实施时，第二走线层104可以凸出于功率部100表面，或者，第二走线层104可以与功率部100表面平齐，由此，第二走线层104可以起到加快散热的作用，有利于功率芯片101的热量的快速散发。相似地，根据实际需求，功率部100可以包括一个或多个第二走线层104，以设置其他元器件，多个第二走线层104之间可以全部电连接，或者部分电连接，或者互不电连接，多个第二走线层104可以平铺设置，或者层叠设置。当多个第二走线层104层叠设置时，相邻第二走线层104可以通过金属通孔结构或金属走线电连接，其中，部分第二走线层104也可以设置在功率芯片101在第一方向垂向上的一侧或两侧，即可以设置在图1中功率芯片101的左侧和/或右侧。当功率部100包括多个第二走线层104时，功率芯片101可以与最靠近自身的一个第二走线层104电连接，距离功率芯片101最远的第二走线层104可以凸出于功率部100表面或与功率部100表面平齐。
作为一种可能的实施例，根据实际连接需求，第二走线层104可以通过第二过孔105与第一走线层103电连接。第二过孔105可以成型在功率部100内，具体地，可以在功率部100内成型通孔，对该通孔镀铜或镀其他导电金属，以形成第二过孔105，即第二过孔105也可以为金属通孔结构。除采用金属通孔结构外，还可以采用铜柱或由其他导电金属制成的柱状结构实现第二走线层104与第一走线层103电连接。
在一种具体实施中，功率部100还可以包括第一绝缘层107，功率芯片101可以内埋于第一绝缘层107。具体地，功率芯片101及其他可能实际需要的元器件可以内埋于第一绝缘层107以形成功率部100，即功率芯片101可以通过内埋的方式封装在第一绝缘层107内。具体实施时，第一绝缘层107可以通过灌胶工艺成型。
实际设置时，第一走线层103可以设置在第一绝缘层107内，即第一走线层103可以通过内埋的方式封装在第一绝缘层107内。第二走线层104可以凸出于第一绝缘层107，或者，第二走线层104可以与第一绝缘层107的表面相平齐。功率芯片101、第一走线层103及第二走线层104之间的相对位置可以由第一绝缘层107固定。
作为一种可能的实施例，信号部200还可以包括第三走线层202，第三走线层202可以设置在信号处理芯片201靠近功率部100的一侧。在具体成型信号部200时，第三走线层202可以起到承载信号处理芯片201的作用。信号处理芯片201可以与第三走线层202电连接，具体地，第三走线层202可以为由铜制成的片状结构，信号处理芯片201与第三走线层202可以焊接以实现电连接。功率芯片101也可以与第三走线层202电连接。第三走线层202除了可以由铜制成以外，还可以由其他导电金属制成，也可以为其他形状，本申请实施例对第三走线层202的材质及形状不作限制。在具体实施中，根据实际需求，相似地，信号部200可以包括一个或多个第三走线层202，以设置其他元器件，多个第三走线层202之间可以全部电连接，或者部分电连接，或者互不电连接，多个第三走线层202可以平铺设置，或者层叠设置。当多个第三走线层202层叠设置时，相邻第三走线层202可以通过金属通孔结构电连接。当信号部200包括多个第三走线层202时，信号处理芯片201可以与最靠近自身的一个第三走线层202电连接。
在具体实施中，第三走线层202可以设置在信号部200的内部或信号部200的表面，也可以设置在功率部100的内部或功率部100的表面，还可以设置在信号部200与功率部100的交界区域，即第三走线层202可以一部分位于信号部200内，另一部分位于功率部100内。
具体设置时，第一过孔102可以与第三走线层202电连接，具体地，第一过孔102与第三走线层202可以焊接以实现电连接，或者，第一过孔102与第三走线层202可以一体成型。第一过孔102与第 三走线层202电连接，从而可以实现第一过孔102与信号处理芯片201电连接，进而可以实现功率芯片101与信号处理芯片201电连接，也就是说，功率芯片101可以通过第一过孔102及第三走线层202与信号处理芯片201电连接。或者，功率芯片101可以通过第二走线层104、第二过孔105、第一走线层103及第一过孔102与第三走线层202电连接，从而与信号处理芯片201电连接。
结合上述具体实施例，第一过孔102可以同时与第一走线层103和第三走线层202焊接连接，即第三走线层202可以通过第一过孔102与第一走线层103电连接。或者，第一过孔102可以与第一走线层103及第三走线层202一体成型。功率芯片101可以通过第一走线层103、第一过孔102及第三走线层202与信号处理芯片201电连接。
作为一种可能的实施例，第三走线层202上可以设置有被动元器件203，在具体成型信号部200时，第三走线层202可以起到承载被动元器件203的作用。实际应用时，被动元器件203可以采用电阻、电容、电感、传感器等，可以根据实际需要选择。第三走线层202上可以设置一个或多个被动元器件203。被动元器件203与第三走线层202电连接，具体地，被动元器件203可以与第三走线层202焊接以实现电连接。第三走线层202的设置可以实现增设被动元器件203以充分利用信号部200内部空间，可以丰富模块功能，还可以将多个被动元器件203集中，也可以将信号处理芯片201与被动元器件203集中，从而可以减小模块整体尺寸。
作为一种可能的实施例，第三走线层202上可以设置有引脚，引脚与第三走线层202电连接，具体地，引脚与第三走线层202可以焊接以实现电连接。实际设置时，引脚的第一端可以与第三走线层202电连接，引脚的第二端可以伸出信号部200，以与模块以外的印制电路板电连接，实现模块与外部的印制电路板互连。根据实际需要，第三走线层202上可以设置有多个引脚，引脚可以分布在模块侧面的任意位置，本申请实施例对引脚的数量及分布位置不作限制。在具体实施中，多个引脚中的一部分可以作为功率引脚(power pin)，另一部分可以作为信号引脚(signal pin)。如图1所示，功率引脚204可以与功率芯片101电连接，具体地，功率引脚204可以通过第三走线层202、第一过孔102、第一走线层103、第二过孔105及第二走线层104与功率芯片101电连接，或者，功率引脚204可以通过第三走线层202、第一过孔102及第一走线层103与功率芯片101电连接。信号引脚205可以与信号处理芯片201电连接，具体地，信号引脚205可以通过第三走线层202与信号处理芯片201电连接。
具体实施时，引脚可以由铜或其他导电金属材质制成。在一种可能的具体实施中，引脚可以通过折弯成型为多种形状，以适用于多种组装方式，例如，插装或表贴在模块以外的印制电路板上。
在一种可能的具体实施中，以功率引脚204为例，引脚的第二端可以是沿第一方向设置的直线状，以便于插接在外部的印制电路板上。
参照图3，图3示出了本申请另一实施例提供的智能功率模块的结构示意图。如图3所示，在另一种可能的具体实施中，以功率引脚204为例，引脚的第二端可以是部分垂直于第一方向设置的折线状，以便于表贴在外部的印制电路板上。
参照图4，图4示出了本申请另一实施例提供的智能功率模块的结构示意图。如图4所示，在另一种可能的具体实施中，以功率引脚204为例，引脚整体可以为柱状结构。引脚的第二端可以制作成焊盘，以便于表贴在外部的印制电路板上。
继续参照图1，作为一种可能的实施例，信号部200还可以包括第二绝缘层206，信号处理芯片201可以内埋于第二绝缘层206。具体地，信号处理芯片201及被动元器件203等可以内埋于第二绝缘层206以形成信号部200，即信号处理芯片201及被动元器件203等可以通过内埋的方式封装在第二绝缘层206内。引脚可以伸出于第二绝缘层206。具体实施时，第二绝缘层206可以通过灌胶工艺成型。第三走线层202可以设置在第二绝缘层206的内部，即第三走线层202可以通过内埋的方式封装在第二绝缘层206内；或者，第三走线层202可以设置在第二绝缘层206的表面。信号处理芯片201、被动元器件203、第三走线层202及引脚之间的相对位置可以由第二绝缘层206固定。
具体实施时，第二绝缘层206与第一绝缘层107可以粘接。或者，第二绝缘层206与第一绝缘层107可以采用相同材质制成，从而二者可以一体成型。
作为一种可能的实施例，智能功率模块还可以包括散热部300，散热部300和功率部100可以层叠设置，具体地，功率部100可以位于散热部300和信号部200之间。对于模块整体而言，模块与外部的印制电路板连接后，散热部300为模块的远离印制电路板的一侧。散热部300可以实现功率部100对外的散热，有利于模块热量的快速散发。散热部300还可以实现功率部100对外的绝缘。
在具体实施中，散热部300可以包括绝缘导热层301和散热件302，散热件302可以通过绝缘导热层301与功率部100固定连接，具体地，绝缘导热层301可以与功率部100的第二走线层104固定连接，实现功率部100的快速散热。具体设置时，绝缘导热层301可以与功率部100粘接，散热件302可以与绝缘导热层301粘接。
具体实施时，散热件302可以采用铜或其他导热性能比较理想的材质制成，散热件302可以为片状等多种形状，本申请实施例对散热件302的材质及形状不作限制。绝缘导热层301可以通过灌胶工艺成型。绝缘导热层301与第一绝缘层107可以采用相同材质制成，从而绝缘导热层301与第一绝缘层107可以一体成型。进而，绝缘导热层301、第一绝缘层107和第二绝缘层206可以采用相同材质制成，三者可以一体成型。在一种可能的具体实施中，绝缘导热层301可以采用覆铜陶瓷基板(direct bonding copper，DBC)或活性金属钎焊(active metal brazing，AMB)覆铜陶瓷基板等，可以焊接在第二走线层104上。
参照图5，图5示出了本申请另一实施例提供的智能功率模块的结构示意图。如图5所示，作为一种可能的实施例，散热件302远离功率部100的一侧可以设置有散热翅片303，以提高散热效率。具体地，散热翅片303与散热件302可以焊接或一体成型。在这种具体实施中，散热件302与散热翅片303整体可以看作是模块的散热器。
参照图6，图6示出了本申请另一实施例提供的智能功率模块的结构示意图。如图6所示，在另一种具体实施中，散热件302可以与模块外部的散热器400连接，以提升散热能力。具体地，散热器400与散热件302可以通过导热界面材料(thermal interface material，TIM)或焊料固定连接，从而散热器400与模块可以通过压合或焊接形成一个整体，散热器400与模块的结合面比较紧密，可以保证散热器400散热能力的有效性。
在一种可能的应用场景中，本申请实施例提供的智能功率模块除了可以作为电源系统的变电功能模块以外，还可以应用于其他对寄生及散热敏感的芯片封装领域，例如可以作为处理器、转换器等功能模块。具体地，功率芯片还可以采用射频、人工智能(artificial intelligence，AI)、中央处理单元(central processing unit，CPU)或图形处理单元(graphic processing unit，GPU)等的芯片，信号处理芯片可以采用存储器等。本申请实施例对智能功率模块的具体应用不作限制。
以上，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到的变化或替换，都应涵盖在本申请的保护范围之内。

Claims (15)

  1. 一种智能功率模块，其特征在于，包括功率部和信号部，所述功率部和所述信号部在第一方向上层叠设置；
    所述功率部包括功率芯片和第一绝缘层，所述功率芯片内埋于所述第一绝缘层；
    所述信号部包括信号处理芯片，所述信号处理芯片和所述功率芯片在所述第一方向上交叠设置，所述信号处理芯片与所述功率芯片电连接。
  2. 如权利要求1所述的智能功率模块，其特征在于，所述信号处理芯片通过第一过孔与所述功率芯片电连接。
  3. 如权利要求2所述的智能功率模块，其特征在于，所述功率部还包括第一走线层，所述第一走线层设置在所述功率芯片靠近所述信号部的一侧，所述功率芯片与所述第一走线层电连接。
  4. 如权利要求3所述的智能功率模块，其特征在于，所述第一走线层与所述第一过孔电连接。
  5. 如权利要求3所述的智能功率模块，其特征在于，所述功率部还包括第二走线层，所述第二走线层设置在所述功率芯片远离所述信号部的一侧，所述功率芯片与所述第二走线层电连接。
  6. 如权利要求5所述的智能功率模块，其特征在于，所述第二走线层通过第二过孔与所述第一走线层电连接。
  7. 如权利要求3～6任一项所述的智能功率模块，其特征在于，所述信号部还包括第三走线层，所述第三走线层设置在所述信号处理芯片靠近所述功率部的一侧，所述信号处理芯片与所述第三走线层电连接，所述功率芯片与所述第三走线层电连接。
  8. 如权利要求7所述的智能功率模块，其特征在于，所述第三走线层通过所述第一过孔与所述第一走线层电连接。
  9. 如权利要求7或8所述的智能功率模块，其特征在于，所述第三走线层上电连接有被动元器件。
  10. 如权利要求7～9任一项所述的智能功率模块，其特征在于，所述第三走线层上电连接有多个引脚，所述引脚的第一端与所述第三走线层电连接，所述引脚的第二端伸出所述信号部。
  11. 如权利要求1～10任一项所述的智能功率模块，其特征在于，所述信号部还包括第二绝缘层，所述信号处理芯片内埋于所述第二绝缘层。
  12. 如权利要求1～11任一项所述的智能功率模块，其特征在于，还包括散热部，所述散热部和所述功率部层叠设置，所述功率部位于所述散热部和所述信号部之间。
  13. 如权利要求12所述的智能功率模块，其特征在于，所述散热部包括绝缘导热层和散热件，所述散热件通过所述绝缘导热层与所述功率部固定连接。
  14. 如权利要求13所述的智能功率模块，其特征在于，所述散热件远离所述功率部的一侧设置有散热翅片。
  15. 一种功率转换设备，其特征在于，包括电路板，以及由至少一个如权利要求1～14任一项所述的智能功率模块组成的功率转换电路，所述智能功率模块设置在所述电路板上，所述智能功率模块与所述电路板电连接，所述功率转换电路用于交、直流转换。
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