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KR940022769A - 집적회로 칩의 제위치 검사 방법 및 장치 - Google Patents

집적회로 칩의 제위치 검사 방법 및 장치 Download PDF

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KR940022769A
KR940022769A KR1019940003002A KR19940003002A KR940022769A KR 940022769 A KR940022769 A KR 940022769A KR 1019940003002 A KR1019940003002 A KR 1019940003002A KR 19940003002 A KR19940003002 A KR 19940003002A KR 940022769 A KR940022769 A KR 940022769A
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semiconductor chip
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KR0130736B1 (ko
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치누프라사드 바뜨 아닐쿠마르
레이몬드 부다 레오
더글라스 에드워즈 로버트
조세프 하트 폴
폴 잉그라함 앤소니
리스타 미르코비히 보야
아베딘 몰라 제이날
제랄드 머피 리차드
주니어 조지 삭스엔마이어
프레드릭 워커 조지
제이 왈렌 베트
스튜어트 자르 리차드
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윌리엄 티. 엘리스
인터내셔널 비지네스 머신즈 코포레이션
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Abstract

반도체 칩을 검사하는 방법이 기술된다. 개벽적인 반도체 칩은 I/O, 전력 및 접지 접촉들을 갖는다. 본 발명의 방법에서는 칩 캐리어가 제공된다. 칩 캐리어는 반도체 칩상의 접촉들에 대응하는 접촉들을 갖는다. 캐리어 접촉들은 덴드라이트 표면을 갖는다. 칩 접촉들은 칩 캐리어상의 도체 패드들과 도전성 접촉된다. 검사신호 입력벡터는 반도체 칩의 입력에 인가되고, 출력신호 벡터는 반도체 칩으로부터 수신된다. 검사후, 칩은 기판으로부터 제거될 수 있다. 선택적으로, 칩은 성공적인 검사후 기판에 덴드라이트 도체 패드를 통해서 결합될 수 있다.

Description

집적회로 칩의 제위치 검사 방법 및 장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명의 방법의 개략적인 플로우차트, 제4도는 랜덤 액세스 메모리(RAM)셀에서의 수동결함을 나타내는 도면, 제5도는 랜덤 액세스 메모리(RAM)셀에서의 능동결함을 나타내는 도면.

Claims (14)

  1. 다수의 제1 I/O, 전력 및 접지 접촉을 갖는 반도체 칩을 검사하는 방법에 있어서, 상기 검사방법이 a. 상기 다수의 제1접촉에 대응하고, 넓은 표면적 도체 표면을 갖는 다수의 제2접촉을 갖는 칩 캐리어를 제공하는 단계, b. 반도체 칩의 다수의 제1접촉이 칩 캐리어상의 다수의 제2접촉과 도전성 접촉되게 하는 단계 및 c. 반도체 칩에 검사신호 입력벡터를 통과시키고, 반도체 칩으로부터 검사신호 출력벡터를 수신하는 단계를 포함하는 것을 특징으로 하는 검사방법.
  2. 제1항에 있어서, 상기 칩 캐리어는 검사 고정구이고, 상기 방법은 검사 고정구로부터 집적회로 칩을 제거하는 단계 및 검사에 불합격한 칩으로부터 검사에 합격한 칩을 분리하는 단계를 더 포함하는 것을 특징으로 하는 검사방법.
  3. 제1항에 있어서, 상기 칩 캐리어는 전자회로 패키지이고, 상기 방법은 패키지로부터 검사에 불합격한 칩을 제거하고, 패키지에 검사에 합격한 칩을 결합하는 단계를 더 포함하는 것을 특징으로 하는 검사방법.
  4. 제1항에 있어서, 반도체 칩의 다수의 제1접촉은 땜납, 200℃ 이하의 융점을 갖는 저융점 합금, 땜 납볼 및 제어된 콜랩스 칩 접속기 볼로 구성된 그룹으로부터 선택되는 것을 특징으로 하는 검사방법.
  5. 제1항에 있어서, 넓은 표면적을 갖는 다수의 제2접촉은 원주형 덴드라이트들과 중합체 코어 원뿔형 접속기로 구성된 그룹으로부터 선택되는 것을 특징으로 하는 검사방법.
  6. 제5항에 있어서, 넓은 표면적을 갖는 다수의 제2접촉은 평탄한 Pd막 위에 있는 원주형 Pd로 구성되는 원주형 덴드라이트들인 것을 특징으로 하는 검사방법.
  7. 제6항에 있어서, 원주형 Pd덴드라이트들은 약 10 내지 100미크론의 높이 및 ㎟당 약 200 내지 500덴드라이트들의 밀도를 갖는 것을 특징으로 하는 검사방법.
  8. 제6항에 있어서, 상기 원주형 Pd는 2 위상 펄스식 전착에 의해 피착되는 것을 특징으로 하는 검사방법.
  9. 땜납, 200℃ 이하의 융점을 갖는 저융점 합금, 땜납볼 및 제어된 콜랩스 칩 접속기들로 구성된 그룹으로부터 선택된, 다수의 제1 I/O, 전력 및 접지 접촉을 갖는 반도체 칩을 검사하는 방법에 있어서, 상기 검사방법이 a. (ⅰ) 원주형 덴드라이트들 및 (ⅱ) 중합체 코어 원뿔형 접속기들로 구성된 그룹으로부터 선택된 다수의 제2접촉을 갖는 칩 캐리어를 제공하는 단계, b. 반도체기판의 다수의 제1접촉이 칩 캐리어 상의 다수의 제2접촉과 도전성 접촉되게 하는 단계, c. 반도체 칩에 검사신호 입력벡터를 통과시키고, 반도체 칩으로부터 검사신호 출력벡터를 수신하는 단계, d. 칩 캐리어로부터 검사에 불합격한 반도체 칩을 제거하는 단계 및 e. 칩 캐리어에 검사에 합격한 반도체 칩을 결합시키는 단계를 포함하는 것을 특징으로 하는 검사방법.
  10. 땜납, 200℃ 이하의 융점을 갖는 저융점 합금, 땜납볼 및 제어된 콜랩스 칩 접속기들로 구성된 그룹으로부터 선택된, 다수의 제1 I/O, 전력 및 접지 접촉을 갖는 반도체 칩을 검사하는 방법에 있어서, 상기 검사방법이 a. 상기 다수의 제1접촉에 대응하는 원주형 Pd 덴드라이트들을 포함하는 다수의 제2접촉을 갖는 칩 캐리어를 제공하는 단계, b. 반도체 칩의 다수의 제1접촉이 칩 캐리어상의 다수의 제2접촉과 도전성 접촉되게 하는 단계, c. 반도체 칩에 검사신호 입력벡터를 통과시키고, 반도체 칩으로부터 검사신호 출력벡터를 수신하는 단계, d. 칩 캐리어로부터 검사에 불합격한 반도체 칩을 제거하는 단계 및 e. 칩 캐리어에 검사에 합격한 반도체 칩을 결합시키는 단계를 포함하는 것을 특징으로 하는 검사방법.
  11. 제10항에 있어서, 원주형 덴드라이트들이 평탄형 Pd막 위에 있는 원주형 Pd를 포함하는 것을 특징으로 하는 검사방법.
  12. 제11항에 있어서, 원주형 Pd 덴드라이트들이 약 10 내지 100미크론의 높이 및 ㎟당 약 200 내지 500덴드라이트들의 밀도를 갖는 것을 특징으로 하는 검사방법.
  13. 제11항에 있어서, 상기 원주형 Pd는 2위상 펄스식 전착에 의해 피착되는 것을 특징으로 하는 검사방법.
  14. 땜납, 200℃ 이하의 융점을 갖는 저융점 합금, 땜납볼 및 제어된 콜랩스 칩 접속기들로 구성된 그룹으로부터 선택된, 다수의 제1 I/O, 전력 및 접지 접촉을 갖는 반도체 칩을 검사하는 방법에 있어서, 상기 검사방법이 a. 상기 다수의 제1접촉에 대응하고, 평탄형 Pd막 위에 2위상 펄스식 전착에 의해 피착된 원주형 Pd를 포함하고, 약 10 내지 100미크론의 높이 및 ㎟당 약 200 내지 500덴드라이트들의 밀도를 갖는 원주형 Pd 덴드라이트들을 포함하는 다수의 제2접촉을 갖는 칩 캐리어를 제공하는 단계,, b. 반도체 칩의 다수의 제1접촉을 칩 캐리어 상의 다수의 제2접촉과 도전성 접촉되게 하는 단계, c. 반도체 칩에 검사신호 입력벡터를 통과시키고, 반도체 칩으로부터 검사신호 출력벡터를 수신하는 단계, d. 칩 캐리어로부터 검사에 불합격한 반도체 칩을 제거하는 단계 및 e. 칩 캐리어에 검사에 합격한 반도체 칩을 결합시키는 단계를 포함하는 것을 특징으로 하는 검사방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940003002A 1993-03-01 1994-02-19 집적회로 칩의 제위치 검사 방법 및 장치 KR0130736B1 (ko)

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