KR19980018040A - 다층 배선판의 제조방법 - Google Patents
다층 배선판의 제조방법 Download PDFInfo
- Publication number
- KR19980018040A KR19980018040A KR1019970006666A KR19970006666A KR19980018040A KR 19980018040 A KR19980018040 A KR 19980018040A KR 1019970006666 A KR1019970006666 A KR 1019970006666A KR 19970006666 A KR19970006666 A KR 19970006666A KR 19980018040 A KR19980018040 A KR 19980018040A
- Authority
- KR
- South Korea
- Prior art keywords
- insulating layer
- wiring board
- multilayer wiring
- interlayer insulating
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0166—Polymeric layer used for special processing, e.g. resist for etching insulating material or photoresist used as a mask during plasma etching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/025—Abrading, e.g. grinding or sand blasting
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S428/00—Stock material or miscellaneous articles
- Y10S428/901—Printed circuit
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
Claims (30)
- 기판의 적어도 한쪽면상에, 복수층의 배선 패턴과 층간절연층을 가지며, 이 층간절연층의 소정개소에 상기 배선 패턴을 서로 전기적으로 접속하기 위한 바이어 홀을 설치하여 이루어지는 다층 배선판의 제조방법에 있어서, 상기 바이어 홀을 설치함에 있어, 층간 절연층상에 내샌드블라스트성을 갖는 피막을 패턴 형성하고, 이어서 샌드블라스트 처리를 실시함으로서, 층간절연층을 선택적으로 제거하여 바이어 홀을 형성시킨후, 내샌드블라스트성을 갖는 피막을 제거하고, 그런 후에 도전층을 설치하는 것을 특징으로 하는 다층 배선판의 제조방법.
- 제 1 항에 있어서, 층간 절연층은 열 또는 광경화성을 갖는 전기절연층을 미경화후, 샌드블라스트 처리에 의해 선택적으로 제거시키고, 가열 경화한 것인 다층 배선판의 제조방법.
- 제 1 항에 있어서, 층간절연층 표면을 조면화하는 공정을 더 포함하는 다층 배선판의 제조방법.
- 제 3 항에 있어서, 내샌드블라스트성을 갖는 피막을 제거한후, 층간 절연층 표면을 조면화하고, 그런 후에 도전층을 설치하는 다층 배선판의 제조방법.
- 제 3 항에 있어서, 층간절연층 표면을 조면화한후, 이 층상에 내샌드블라스트성을 갖는 피막을 패턴형성하는 다층 배선판의 제조방법.
- 제 3 항에 있어서 층간절연층 표면의 조면화를 표면 평균조도 (Ra) = 0.1 ~ 10 ㎛ 의 범위에서 행하는 다층 배선판의 제조방법.
- 제 1 항에 있어서, 무전해 도금처리에 의해 도전층을 설치하는 다층 배선판의 제조방법.
- 제 1 항에 있어서, 직접 전해 도금처리에 의해 도전층을 설치하는 다층 배선판의 제조방법.
- 제 1 항에 있어서, 내샌드블라스트성을 갖는 피막이 감광성 수지인 다층 배선판의 제조방법.
- 제 9 항에 있어서, 내샌드블라스트성을 갖는 피막이 우레탄 (메타) 아크릴레이트 올리고머, 수용성 셀룰로오스수지, 광중합 개시제 및, (메타) 아크릴레이트 단량체를 함유하는 감광성 수지인 다층 배선판의 제조방법.
- 제 1 항에 있어서, 층간절연층 중에 황 함유 유기화합물을 함유하여 이루어지는 다층 배선판의 제조방법.
- 제 1 항에 있어서, 층간절연층이 에폭시수지, 폴리페놀수지, 노볼락수지, 폴리아미드수지 및, 폴리이미드수지 중에서 선택된 적어도 하나인 다층 배선판의 제조방법.
- 제 1 항의 제조방법에 의해 제조된 다층 배선판.
- 제 2 항에 있어서, 열 또는 광경화성을 갖는 전기절연층을 70 ℃ 이상 110 ℃ 이하의 온도에서 미경화시키는 다층 배선판의 제조방법.
- 제 2 항에 있어서, 미경화된 전기 절연층을 광조사 또는 110 ℃ 초과 ~ 200 ℃ 이하의 온도에서 가열경화시킴으로서, 층간 절연층으로 하는 다층 배선판의 제조방법
- 기판의 적어도 한쪽면상에, 복수층의 배선 패턴과 층간절연층을 가지며, 이 층간절연층의 소정개소에 상기 배선 패턴을 서로 전기적으로 접속하기 위한 홈형상 도통부를 설치하여 이루어지는 다층 배선판의 제조방법에 있어서, 상기 홈형상 도통부를 설치함에 있어, 층간절연층상에 내샌드블라스트성을 갖는 피막을 패턴형성하고, 이어서 샌드블라스트 처리를 실시함으로서 층간절연층을 선택적으로 제거하여 홈형상 도통부를 단면에서 보아 발(鉢) 형상으로 형성한후, 내샌드블라스트성을 갖는 피막을 제거하고, 그런 후에 도전층을 설치하는 것을 특징으로 하는 다층 배선판의 제조방법.
- 제 16 항에 있어서, 층간절연층은 열 또는 광경화성을 갖는 전기절연층을 미경화후 샌드블라스트 처리에 의해 선택적으로 제거시키고, 가열경화한 것인 다층 배선판의 제조방법.
- 제 16 항에 있어서, 층간절연층 표면을 조면화하는 공정을 더 포함하는 다층 배선판의 제조방법.
- 제 18 항에 있어서, 내샌드블라스트성을 갖는 피막을 제거한 후, 층간절연층 표면을 조면화하고, 그런 후에 도전층을 설치하는 다층 배선판의 제조방법.
- 제 18 항에 있어서, 층간절연층 표면을 조면화한 후, 이 층상에 내샌드블라스트성을 갖는 피막을 패턴 형성하는 다층 배선판의 제조방법.
- 제 18 항에 있어서, 층간절연층 표면의 조면화를 표면평균 조도 (Ra) = 0.1 ~ 10 ㎛ 의 범위에서 행하는 다층 배선판의 제조방법.
- 제 16 항에 있어서, 무전해 도금처리에 의해 도전층을 설치하는 다층 배선판의 제조방법.
- 제 16 항에 있어서, 직접 전해도금 처리에 의해 도전층을 설치하는 다층 배선판의 제조방법.
- 제 16 항에 있어서, 내샌드블라스트성을 갖는 피막이 감광성 수지인 다층 배선판의 제조방법.
- 제 24 항에 있어서, 내샌드블라스트성을 갖는 피막이 우레탄 (메타) 아크릴레이트 올리고머, 수용성 셀룰로오스 수지, 광중합 개시제 및, (메타) 아크릴레이트 단량체를 함유하는 감광성 수지인 다층 배선판의 제조방법.
- 제 16 항에 있어서, 층간절연층 중에 황 함유 유기화합물을 함유하여 이루어지는 다층 배선판의 제조방법.
- 제 16 항에 있어서, 층간절연층이 에폭시수지, 폴리페놀수지, 노볼락수지, 폴리아미드수지, 및 폴리이미드수지 중에서 선택된 적어도 하나인 다층 배선판의 제조방법.
- 제 16 항의 제조방법에 의해 제조되어 이루어지는 다층 배선판.
- 제 17 항에 있어서, 열 또는 광경화성을 갖는 전기절연층을 70 ℃ 이상 110 ℃ 이하의 온도에서 미경화시키는 다층 배선판의 제조방법.
- 제 17 항에 있어서, 미경화된 전기절연층을 광조사 또는 110 ℃ 초과 ~ 200 ℃ 이하의 온도에서 가열경화함으로서 층간절연층으로 하는 다층 배선판의 제조방법.
Applications Claiming Priority (10)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP96-69083 | 1996-02-29 | ||
JP6908396A JPH09237976A (ja) | 1996-02-29 | 1996-02-29 | 多層配線板の製造方法 |
JP22076796A JPH1051142A (ja) | 1996-08-05 | 1996-08-05 | 多層配線板の製造方法 |
JP96-220767 | 1996-08-05 | ||
JP96-242624 | 1996-08-26 | ||
JP96-242625 | 1996-08-26 | ||
JP24262596A JPH1070371A (ja) | 1996-08-26 | 1996-08-26 | 多層配線板の製造方法 |
JP24262496A JPH1070366A (ja) | 1996-08-26 | 1996-08-26 | 多層配線板の製造方法 |
JP96-277475 | 1996-08-27 | ||
JP27747596A JPH10107446A (ja) | 1996-09-27 | 1996-09-27 | 多層配線板の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR19980018040A true KR19980018040A (ko) | 1998-06-05 |
KR100429443B1 KR100429443B1 (ko) | 2004-06-16 |
Family
ID=27524158
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019970006666A Expired - Fee Related KR100429443B1 (ko) | 1996-02-29 | 1997-02-28 | 다층배선판의제조방법 |
Country Status (5)
Country | Link |
---|---|
US (2) | US6010956A (ko) |
EP (1) | EP0793406B1 (ko) |
KR (1) | KR100429443B1 (ko) |
DE (1) | DE69734947T2 (ko) |
TW (1) | TW322680B (ko) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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KR100744244B1 (ko) * | 2005-12-28 | 2007-07-30 | 동부일렉트로닉스 주식회사 | 반도체 소자의 구리배선 제조 방법 |
KR100966774B1 (ko) * | 2005-05-23 | 2010-06-29 | 이비덴 가부시키가이샤 | 프린트 배선판 |
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CN101848594B (zh) * | 2003-02-06 | 2013-03-13 | 株式会社半导体能源研究所 | 等离子体装置 |
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1997
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- 1997-02-27 EP EP97103255A patent/EP0793406B1/en not_active Expired - Lifetime
- 1997-02-27 DE DE69734947T patent/DE69734947T2/de not_active Expired - Fee Related
- 1997-02-27 TW TW086102413A patent/TW322680B/zh active
- 1997-02-28 KR KR1019970006666A patent/KR100429443B1/ko not_active Expired - Fee Related
-
1999
- 1999-03-22 US US09/273,265 patent/US6228465B1/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
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KR100966774B1 (ko) * | 2005-05-23 | 2010-06-29 | 이비덴 가부시키가이샤 | 프린트 배선판 |
US8198546B2 (en) | 2005-05-23 | 2012-06-12 | Ibiden Co., Ltd. | Printed wiring board |
KR100744244B1 (ko) * | 2005-12-28 | 2007-07-30 | 동부일렉트로닉스 주식회사 | 반도체 소자의 구리배선 제조 방법 |
Also Published As
Publication number | Publication date |
---|---|
US6010956A (en) | 2000-01-04 |
KR100429443B1 (ko) | 2004-06-16 |
TW322680B (ko) | 1997-12-11 |
US6228465B1 (en) | 2001-05-08 |
EP0793406B1 (en) | 2005-12-28 |
DE69734947D1 (de) | 2006-02-02 |
DE69734947T2 (de) | 2006-08-24 |
EP0793406A1 (en) | 1997-09-03 |
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